Tin oxide thin film spacers in semiconductor device manufacturing

Abstract

The present invention relates to tin oxide thin film spacers in semiconductor device manufacturing. Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, the thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and multiple protruding features including a second material (e.g., silicon or carbon). For example, an atomic layer deposition can be used to deposit a 10-100nm thick tin oxide layer. The tin oxide film is then removed from the horizontal surface without being completely removed from the sidewalls of the protruding features. Next, the material of the protruding features is etched away, leaving tin oxide spacers on the substrate. Afterwards, the unprotected portion of the first material is etched without removing the spacers. Next, the lower layer is etched, and the spacers are removed. Tin-containing particles can be removed from a processing chamber by converting them into volatile tin hydride.

Description

[0001] This application is a divisional application of the application with application number 201710498301.5, application date June 27, 2017, and invention name “Tin oxide thin film spacer in semiconductor device manufacturing”. Technical Field

[0002] The present invention relates to patterning methods in semiconductor device manufacturing. In particular, the present invention relates to methods of using thin tin oxide films as spacers in semiconductor processing. Background Art

[0003] In integrated circuit (IC) manufacturing, deposition and etching techniques are used to form patterns of materials, such as forming metal lines embedded in dielectric layers. Some patterning schemes involve the use of spacers that enable precise patterning and formation of small-scale features. Spacers are formed on a substrate so that they are separated by a defined distance (usually determined by previous patterning) and are used as a mask for patterning the layers below. The materials of the spacers and surrounding layers are selected to have a suitable etch selectivity, which enables the spacers to be formed and the layers below to be patterned. After patterning is complete, the spacers are removed by etching and are not part of the final manufactured semiconductor device.

[0004] Spacers are used for patterning in a variety of applications, including for forming dynamic random access memory (DRAM), patterning fins in fin field effect transistors (finFETs), and back-end-of-line (BEOL) processing. Summary of the invention

[0005] It has been found that during patterning, many spacer materials (e.g., silicon oxide or titanium oxide) cause pitch walking and / or particle contamination problems. For example, silicon oxide is characterized by a relatively low etch selectivity relative to many materials commonly used in semiconductor processing, thereby requiring the use of thicker spacers. This in turn results in inconsistent consumption of the lateral spacer sidewalls across the way, and may ultimately result in pitch walking (inconsistent distances between spacers). When titanium oxide is used as a spacer material, etch selectivity can be sufficient, but titanium-containing particles may contaminate the processing chamber. For example, after fluorocarbon plasma etching, titanium fluoride particles may contaminate the etching chamber. This results in the need to frequently clean the etching chamber and reduce productivity.

[0006] These problems are solved here by using tin oxide as a spacer material. Tin oxide has a high modulus, which is associated with good etching selectivity required to reduce spacing variation and edge roughness. In addition, unlike titanium, tin forms highly volatile hydrides that can be easily removed from a processing chamber. Therefore, in some embodiments, the processing method provided includes converting any tin-containing material (e.g., tin fluoride) (e.g., by plasma treatment in a hydrogen-containing process gas) into tin hydride, and removing the formed volatile tin hydride from the processing chamber by purging and / or extraction. A cleaning process for removing tin-containing particles from the interior of the chamber can be carried out in an etching or deposition chamber, typically in the absence of a substrate.

[0007] In one aspect of the present invention, a method for processing a semiconductor substrate is provided. The method includes: providing a semiconductor substrate having an exposed layer including a first material and at least one protruding feature including a second material different from the first material; and depositing a SnO layer on both the first material and the second material, including depositing the SnO layer on the sidewalls of the at least one protruding feature. The first material and the second material are selected so that the ratio of the etching rate of the first material to the etching rate of SnO for a first etching chemistry is greater than 1, and the ratio of the etching rate of the second material to the etching rate of SnO for a second etching chemistry is greater than 1. For example, in some embodiments, the first material is silicon oxide and / or silicon nitride, and the first etching chemistry is a fluorocarbon plasma etch. In some embodiments, the second material includes amorphous silicon and / or carbon, and the second etching chemistry is an oxidative oxygen-containing chemistry (e.g., a plasma treatment in a process gas containing HBr and O2).

[0008] In some implementations, the substrate includes a plurality of protruding features, and the distance between the closest protruding features before SnO deposition is between about 10-100 nm. In some implementations, the distance between the closest protruding features is between about 40-100 nm. In other implementations, the distance between the closest protruding features is between about 10-30 nm. In some embodiments, the SnO layer is conformally deposited, such as by atomic layer deposition (ALD), to a thickness between about 5-30 nm, such as to a thickness between about 10-20 nm.

[0009] After depositing the SnO layer, a spacer is formed from the SnO layer. In some embodiments, the formation of the spacer includes: after depositing the SnO layer, completely removing the SnO layer from the horizontal surface of the semiconductor substrate without completely removing the SnO layer covering the sidewall of the at least one protruding feature. Thereafter, completely removing the at least one protruding feature without completely removing the SnO layer covering the sidewall of the at least one protruding feature using the second etching chemistry, thereby forming the SnO spacer.

[0010] After forming the SnO spacers, the process can continue by removing the exposed portions of the first material using the first etch chemistry (e.g., using a plasma fluorocarbon etch) without completely removing the SnO spacers, thereby exposing portions of the hard mask layer below the first material layer. The process can then remove the SnO layer and the exposed portions of the hard mask layer without completely removing the layer of the first material located below the SnO layer.

[0011] In some embodiments, the semiconductor processing methods provided herein involve converting the tin-containing particles remaining in the processing chamber into tin hydride after any deposition and etching operations provided herein. The conversion is performed by exposing the processing chamber to a plasma formed in a process gas containing a hydrogen-containing gas. In some embodiments, the hydrogen-containing gas is H2 and / or NH3. In some embodiments, the etching chamber is cleaned after fluorocarbon plasma etching by converting the tin-containing particles (e.g., tin fluoride) into tin hydride and by removing volatile tin hydride from the etching chamber.

[0012] In some embodiments, the methods provided herein are used in conjunction with a photolithography process and include: applying a photoresist to the semiconductor substrate; exposing the photoresist to light; patterning the photoresist and transferring the pattern to the semiconductor substrate; and selectively removing the photoresist from the semiconductor substrate. For example, photolithography can be used to form a pattern of protruding features before depositing a SnO layer on the substrate.

[0013] In another aspect, a partially fabricated semiconductor device is provided, wherein the device comprises an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of SnO spacers located on the layer of the first material. In some embodiments, the distance between the spacers is between about 5-90 nm.

[0014] According to another aspect, an apparatus for depositing a SnO layer is provided. The apparatus comprises: a processing chamber having a substrate holder configured to hold a substrate in place during deposition, and an inlet for introducing reactants. The apparatus also comprises a controller comprising program instructions for depositing a SnO layer according to the method provided herein.

[0015] According to another aspect, a system for processing a semiconductor substrate using SnO spacers is provided. The system includes one or more deposition processing chambers and one or more etching processing chambers, and a controller including program instructions for processing a semiconductor substrate according to the methods provided herein.

[0016] According to another aspect, a system is provided herein, comprising any device or system provided herein, and a stepper.

[0017] According to another aspect, a non-transitory computer machine readable medium is provided, which includes program instructions for controlling any device or system provided herein. The instructions include codes for the processing method provided herein.

[0018] Specifically, some aspects of the present invention can be described as follows:

[0019] 1. A method for processing a semiconductor substrate, the method comprising:

[0020] (a) providing a semiconductor substrate having an exposed layer comprising a first material and at least one protruding feature comprising a second material different from the first material; and

[0021] (b) depositing a SnO layer on both the first material and the second material, including depositing the SnO layer on the sidewalls of the at least one protruding feature, wherein the first material and the second material are selected such that a ratio of an etch rate of the first material to an etch rate of SnO is greater than 1 for a first etch chemistry and a ratio of an etch rate of the second material to an etch rate of SnO is greater than 1 for a second etch chemistry.

[0022] 2. The method of clause 1, wherein the SnO layer is deposited conformally.

[0023] 3. The method of clause 1, wherein the SnO layer is deposited by atomic layer deposition (ALD).

[0024] 4. The method of clause 1, wherein the SnO layer is deposited to a thickness between about 5-30 nm.

[0025] 5. The method of clause 1, wherein the SnO layer is deposited to a thickness between about 10-20 nm.

[0026] 6. The method of clause 1, wherein the first material comprises a material selected from silicon oxide and silicon nitride.

[0027] 7. The method of clause 1, wherein the second material comprises a material selected from amorphous silicon and carbon.

[0028] 8. The method of clause 1, wherein the first material comprises silicon oxide and the first etch chemistry is a plasma fluorocarbon etch.

[0029] 9. The method of clause 1, wherein the second material comprises amorphous silicon and the second etch chemistry comprises an oxygen-containing oxidation chemistry.

[0030] 10. The method of clause 9, wherein the second etch chemistry is a plasma etch, wherein the plasma is formed in a process gas comprising HBr and O2.

[0031] 11. The method according to clause 1, further comprising:

[0032] (c) after depositing the SnO layer, completely removing the SnO layer from horizontal surfaces of the semiconductor substrate without completely removing the SnO layer covering the sidewalls of the at least one protruding feature.

[0033] 12. The method according to clause 11, further comprising:

[0034] (d) after removing the SnO layer from the horizontal surface of the semiconductor substrate, completely removing the at least one protruding feature without completely removing the SnO layer covering the sidewalls of the at least one protruding feature using the second etch chemistry to form SnO spacers.

[0035] 13. The method according to clause 12, further comprising:

[0036] (e) after forming the SnO spacers, removing exposed portions of the first material using the first etch chemistry without completely removing the SnO spacers, thereby exposing portions of the hard mask layer underlying the first material layer.

[0037] 14. The method according to clause 13, further comprising:

[0038] (f) After (e), removing the SnO layer and the exposed portion of the hard mask layer without completely removing the first material layer located below the SnO layer.

[0039] 15. The method of clause 13, wherein (e) comprises exposing the substrate to a plasma fluorocarbon etch.

[0040] 16. The method of clause 15, further comprising: cleaning the etching chamber by forming a plasma in the process gas comprising a hydrogen-containing gas after (e) to form volatile tin hydride.

[0041] 17. The method according to clause 16, wherein the hydrogen-containing gas is H2 and / or NH3.

[0042] 18. The method of clause 1, wherein the semiconductor substrate comprises a plurality of protruding features comprising the second material, wherein a distance between closest protruding features is between about 10-100 nm.

[0043] 19. The method of clause 1, wherein the semiconductor substrate comprises a plurality of protruding features comprising the second material, wherein a distance between closest protruding features is between about 40-100 nm.

[0044] 20. The method of clause 1, wherein the semiconductor substrate comprises a plurality of protruding features comprising the second material, wherein a distance between closest protruding features is between about 10-30 nm.

[0045] 21. The method according to clause 1, further comprising:

[0046] applying a photoresist to the semiconductor substrate;

[0047] exposing the photoresist to light;

[0048] patterning the photoresist and transferring the pattern to the semiconductor substrate; and

[0049] The photoresist is selectively removed from the semiconductor substrate.

[0050] 22. The method of clause 1, wherein the first material comprises a material selected from silicon nitride and silicon oxide, and wherein the second material comprises a material selected from amorphous silicon and carbon.

[0051] 23. A partially fabricated semiconductor device, wherein the device comprises an exposed layer of a first material and a plurality of SnO spacers located on the layer of the first material.

[0052] 24. An apparatus for depositing a SnO layer on a semiconductor substrate, the apparatus comprising:

[0053] a processing chamber having a substrate holder configured to hold the semiconductor substrate during SnO deposition;

[0054] an inlet for introducing reactants; and

[0055] A controller including program instructions for:

[0056] A SnO layer is conformally deposited on a semiconductor substrate having an exposed layer of a first material and a plurality of protrusions made of a second material, wherein the first material is selected from silicon nitride and silicon oxide, and the second material is selected from amorphous silicon and carbon.

[0057] 25. A system for processing a semiconductor substrate, the system comprising:

[0058] one or more deposition process chambers,

[0059] one or more etching process chambers, and

[0060] A process controller including program instructions for:

[0061] (a) providing a semiconductor substrate having an exposed layer comprising a first material and at least one protruding feature comprising a second material different from the first material; and

[0062] (b) depositing a SnO layer on both the first material and the second material, including depositing the SnO layer on the sidewalls of the at least one protruding feature, wherein the first material and the second material are selected such that a ratio of an etch rate of the first material to an etch rate of SnO is greater than 1 for a first etch chemistry and a ratio of an etch rate of the second material to an etch rate of SnO is greater than 1 for a second etch chemistry.

[0063] 26. The system of clause 25, further comprising a stepper.

[0064] 27. A non-transitory computer-readable medium comprising code for:

[0065] (a) providing a semiconductor substrate having an exposed layer comprising a first material and at least one protruding feature comprising a second material different from the first material; and

[0066] (b) depositing a SnO layer on both the first material and the second material, including depositing the SnO layer on the sidewalls of the at least one protruding feature, wherein the first material and the second material are selected such that a ratio of an etch rate of the first material to an etch rate of SnO is greater than 1 for a first etch chemistry and a ratio of an etch rate of the second material to an etch rate of SnO is greater than 1 for a second etch chemistry.

[0067] These and other aspects of implementations of the subject matter described in this specification are set forth in the drawings and the description that follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1-6 A schematic cross-sectional view of a semiconductor substrate processed according to embodiments described herein is shown.

[0069] Figure 7 is a process flow diagram of a treatment method according to an embodiment provided herein.

[0070] Figure 8 is a process flow diagram of a treatment method according to an embodiment provided herein.

[0071] Fig. 9 is a schematic diagram of a plasma enhanced atomic layer deposition (PEALD) processing station suitable for depositing a SnO layer according to embodiments provided herein.

[0072] Fig.10 A schematic diagram of a multi-station processing tool according to embodiments provided herein is shown.

[0073] Fig.11 is a block diagram of a processing tool configured for depositing and post-processing thin films according to embodiments provided herein. DETAILED DESCRIPTION

[0074] In the detailed description that follows, many specific implementations are set forth in order to provide a thorough understanding of the disclosed implementations. However, as will be apparent to one of ordinary skill in the art, the disclosed implementations may be implemented without these specific details or by using alternative elements or processes. In other cases, well-known processes, procedures, and components are not described in detail in order to avoid unnecessarily obscuring aspects of the disclosed implementations.

[0075] In this application, the terms "semiconductor substrate," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. One of ordinary skill in the art will appreciate that the term "partially fabricated integrated circuit" may refer to a silicon wafer during any of the many stages of integrated circuit fabrication thereon. Additionally, the term "semiconductor substrate" refers to a substrate that contains semiconductor material anywhere within the substrate and may include layers of other materials. The following detailed description assumes that the disclosed implementations are implemented on a wafer. However, the disclosed implementations are not limited thereto. Workpieces may have a variety of shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that may utilize the disclosed implementations include various articles of manufacture such as printed circuit boards.

[0076] Provided herein is a method for treating a semiconductor substrate using a tin oxide (SnO) spacer. Tin oxide (also referred to herein as SnO) as used herein refers to a material comprising tin (Sn) and oxygen (O) and optionally comprising hydrogen. As used herein, tin oxide (SnO) may also include a small amount of other elements, such as carbon and nitrogen, wherein the total amount of the other elements is 10 atomic % or less (wherein hydrogen is not included in the calculation of the content). For example, ALD deposited SnO may contain about 0.5-5 atomic % carbon. The term "SnO" as used herein does not represent the stoichiometry of the oxide, which may vary. In some embodiments, the stoichiometric ratio of SnO is about 1 tin atom for every two oxygen atoms.

[0077] It should be understood that other materials discussed herein, such as silicon (Si), carbon (C), silicon oxide (SiO2), and silicon nitride (SiN) may optionally include hydrogen. Other elements may be present in small amounts in these materials, such as other elements (excluding hydrogen) present in a combined content of 10 atomic % or less. For example, the term "silicon oxide" includes carbon-doped silicon oxide and other doped forms of silicon oxide.

[0078] refer to Figure 1-6 shows the use of tin oxide spacers, Figure 1-6 Schematic cross-sectional views of semiconductor substrates at various stages of processing are provided. Figure 7 and Figure 8 A process flow chart of a semiconductor substrate processing method is provided.

[0079] refer to Figure 7 The method begins at 701 by providing a substrate having an exposed layer of a first material and at least one protruding feature comprising a second material. The layer of the first material is referred to as an etch stop layer (ESL), and the protruding feature is referred to as a mandrel. Figure 1 An exemplary substrate is shown in , which shows two mandrels 101 located on an ESL 103. In some embodiments, the distance d1 between adjacent mandrels is between about 10-100 nm. In some embodiments, a relatively larger distance of about 40-100 nm is used. In other applications, the distance between the closest mandrels is between about 10-30 nm. In some embodiments, the distance d2 (also called the spacing) between the centers of the closest mandrels is between about 30-130 nm. In some embodiments, the spacing is between about 80-130 nm. In other embodiments, the spacing is between about 30 and 40 nm. The height d3 of the mandrels is typically between about 20-200 nm, for example, between about 50-100 nm.

[0080] The material of the mandrel and the material of the ESL are selected so as to enable the mandrel material to be subsequently selectively etched in the presence of exposed tin oxide, and to enable the ESL material to be selectively etched in the presence of exposed tin oxide. Thus, for the first etch chemistry, the ratio of the etch rate of the ESL material to the etch rate of the tin oxide is greater than 1, more preferably greater than about 1.5, such as greater than about 2. Similarly, for the second etch chemistry, the ratio of the etch rate of the mandrel material to the etch rate of the tin oxide is greater than 1, more preferably greater than about 1.5, such as greater than about 2.

[0081] In some embodiments, the ESL material is selected from silicon oxide-based materials, silicon nitride, and combinations thereof, and the mandrel material is amorphous silicon (doped or undoped) or carbon (doped or undoped). Examples of dopants for silicon and carbon include, but are not limited to, N, S, B, and W. The ESL layer and mandrel can be formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), ALD (plasma-free or by PEALD), or plasma enhanced chemical vapor deposition (PECVD), and photolithography techniques can be used to define the pattern of the mandrel.

[0082] Reference again Figure 1 The substrate shown, the ESL layer 103 is located on and in contact with the target layer 105. The target layer 105 is the layer that needs to be patterned. The target layer 105 can be a semiconductor, a dielectric or other layer, and can be made of, for example, silicon (Si), silicon dioxide (SiO2), silicon nitride (SiN) or titanium nitride (TiN). In some embodiments, the target layer is called a hard mask layer and includes a metal nitride, such as titanium nitride. The target layer 105 can be deposited by ALD (plasma-free or by PEALD), CVD or other suitable deposition techniques.

[0083] Target layer 105 is located on and in contact with layer 107 , which in some embodiments is a BEOL layer comprising a plurality of metal lines embedded in a layer of dielectric material.

[0084] Reference again Figure 7 The process continues at 703 by depositing a SnO layer on both the first and second materials. Figure 2 In the structure shown, SnO layer 109 is deposited over ESL 103 and over mandrel 101, including on the sidewalls of the mandrel. The SnO layer is deposited by any suitable method such as CVD (including PECVD), ALD (including PEALD), sputtering, etc. In some embodiments, it is preferred to conformally deposit the SnO film so that it follows the surface of layer 103 and mandrel 101, such as Figure 2As shown. In some embodiments, the SnO layer is conformally deposited to a thickness between about 5-30nm, for example, a thickness between about 10-20nm. One of the suitable deposition methods for conformal SnO films is ALD. Thermal ALD or plasma enhanced ALD can be used. In a typical thermal ALD method, a substrate is provided to an ALD processing chamber and sequentially exposed to a tin-containing precursor and an oxygen-containing reactant, wherein the tin-containing precursor and the oxygen-containing reactant are capable of reacting on the surface of the substrate to form SnO. After the substrate is exposed to the tin-containing precursor and before the oxygen-containing reactant enters the processing chamber, the ALD processing chamber is typically purged with an inert gas to prevent reactions in a large part of the processing chamber (bulk). In addition, after treating the substrate with the oxygen-containing reactant, the ALD processing chamber is typically purged with an inert gas. The sequential exposure is repeated for several cycles, for example, about 10-100 cycles can be performed until a SnO layer with a desired thickness is deposited. Examples of suitable tin-containing precursors include halogenated tin-containing precursors (e.g., SnCl4 and SnBr4) and non-halogenated tin-containing precursors (e.g., organotin compounds including alkyl-substituted tin amides, etc.). Specific examples of alkyl-substituted tin amides suitable for ALD are tetrakis(dimethylamino)tin, tetrakis(ethylmethylamino)tin, N 2 ,N 3 -Di-tert-butyl-butane-2,3-diaminotin(II) (N 2 ,N 3 -di-tert-butyl-butane-2,3-diamino-tin(II)) and (1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidine). Oxygen-containing reactants include, but are not limited to, oxygen, ozone, water, hydrogen peroxide, and NO. Oxygen-containing reactants may also be used. The deposition conditions will vary depending on the choice of ALD reactants, with more reactive precursors typically reacting at lower temperatures than less reactive precursors. The process will typically be carried out at a temperature between about 20-500°C and a pressure below atmospheric pressure. The temperature and pressure are selected so that the reactants remain gaseous in the processing chamber to avoid condensation. Each reactant is provided to the processing chamber in gaseous form alone or mixed with a carrier gas (e.g., argon, helium, or nitrogen). The flow rate of these mixtures will depend on the size of the processing chamber, and in some embodiments the flow rate is about 10-10,000 sccm.

[0085] An article entitled "Tin Oxide with Controlled Morphology and Crystallinity by Atomic Layer Deposition onto Graphene Nanosheets for Enhanced Lithium Storage" (Advanced Functional Materials, 2012, 22, 8, 1647-1654) by Li et al. describes a specific example of thermal ALD process conditions suitable for depositing the conformal SnO layer provided herein, and the entire content of the article is incorporated herein by reference. The process includes sequentially and alternately exposing a substrate in an ALD vacuum chamber to SnCl4 (a tin-containing precursor) and deionized water (an oxygen-containing reactant) at a temperature of 200-400°C. In a specific example of an ALD cycle, a mixture of SnCl4 vapor and N2 carrier gas is introduced into the ALD processing chamber for 0.5 seconds and then exposed to the substrate for 3 seconds. Next, the ALD processing chamber is purged with N2 for 10 seconds to remove SnCl4 from most of the processing chamber, and a mixture of H2O vapor and N2 carrier gas is flowed into the processing chamber for 1 second and exposed to the substrate for 3 seconds. Next, the ALD chamber is purged with N2 and the cycle is repeated. The ALD process is performed at a pressure below atmospheric pressure (eg, 0.4 Torr) and a temperature of 200-400°C.

[0086] Another example of thermal ALD process conditions suitable for depositing SnO films in the method provided herein is given in the article entitled "In situ Examination of Tin Oxide Atomic Layer Deposition using Quartz Crystal Microbalance and Fourier Transform Infrared Techniques" (J. Vac. Sci. Technol. A 23, 581 (2005)) by Du et al., the entire contents of which are incorporated herein by reference. In this process, the substrate is exposed to SnCl4 and H2O2 in sequence in an ALD processing chamber at a temperature between about 150-430°C.

[0087] Although it is suitable to use a halogenated tin precursor in ALD in many embodiments, in some embodiments, it is more preferred to use a non-halogenated organotin precursor to avoid corrosion problems that may occur when using a halogenated precursor (such as SnCl4). Examples of suitable non-halogenated organotin precursors include alkylaminotin (alkylated tinamide) precursors, such as tetrakis(dimethylamino)tin (tretrakis(dimethylamino)tin). An example of a suitable thermal ALD deposition method using this precursor is provided in an article by Elam et al. entitled "Atomic Layer Deposition of Tin Oxide Films using Tetrakis(dimethylamino)tin" (J. Vac. Sci. Technol. A 26, 244 (2008)), the entire contents of which are incorporated herein by reference. In this method, a substrate is sequentially exposed to tetrakis(dimethylamino)tin and H2O2 in an ALD chamber at a temperature between about 50-300°C. Advantageously, the use of this precursor allows SnO films to be deposited at low temperatures of 100°C or less. For example, SnO films can be deposited at 50°C without using plasma to increase the reaction rate. Another example of thermal ALD of SnO using tetrakis(dimethylamino)tin and H2O2 is provided in an article by Elam et al. entitled "Atomic Layer Deposition of Indium Tin Oxide Thin Films Using Nonhalogenated Precursors" (J. Phys. Chem. C 2008, 112, 1938-1945), which is incorporated herein by reference.

[0088] Another example of a low temperature thermal ALD method using a reactive organotin precursor is provided in Heo et al., entitled "Low temperature Atomic Layer Deposition of Tin Oxide" (Chem. Mater., 2010, 22 (7) 4964-4973), the entire contents of which are incorporated herein by reference. In this deposition process (which is suitable for depositing the SnO film provided herein), a substrate is exposed to N in an ALD vacuum chamber in sequence. 2 ,N 3 -Di-tert-butyl-butane-2,3-diaminotin(II) (N 3-di-tert-butyl-butane-2,3-diamino-tin(II)) and 50% H2O2. These reactants are evaporated and each is provided to the process chamber, mixed with N2 carrier gas. After each exposure of the substrate to the reactants, the chamber is purged with N2. Deposition can be performed at a temperature between about 50-150°C.

[0089] Although hydrogen peroxide generally works well as an oxygen-containing reactant in the ALD process to form SnO, it can sometimes result in insufficient control of SnO film growth due to the decomposition of H2O2. In some embodiments, a more stable oxygen-containing precursor, such as NO, is used. An example of suitable process conditions using NO as an oxygen-containing reactant is provided in the article entitled "Atomic Layer Deposition of Tin Oxide with Nitric Oxide as an Oxidant Gas" by Heo et al. (J. Mater. Chem., 2012, 22, 4599), which is incorporated herein by reference. The deposition includes sequentially exposing the substrate to cyclic Sn(II)amide(1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidine) and NO at a temperature of about 130-250°C.

[0090] In some embodiments, the SnO film is deposited by PEALD. Tin-containing precursors and oxygen-containing reactants of the same type as those for the above-mentioned thermal ALD can be used. In PEALD, the ALD device is equipped with a system for generating plasma in a processing chamber and treating a substrate with plasma. In a typical PEALD process step, a substrate is provided to a PEALD processing chamber and exposed to a tin-containing precursor adsorbed on the surface of the substrate. The processing chamber is purged with an inert gas (such as argon or helium) to remove the precursor from the processing chamber and expose the substrate to the oxygen-containing reactant introduced into the processing chamber. Plasma is formed in the processing chamber while or after the introduction of the oxygen-containing reactant. Plasma promotes the reaction between the tin-containing precursor and the oxygen-containing reactant on the substrate surface that causes the formation of SnO. Next, the processing chamber is purged with an inert gas, and as required, a cycle comprising tin precursor dosing, purging, oxygen-containing reactant dosing, plasma treatment and a second purge is repeated multiple times to form a SnO film of desired thickness.

[0091] An example of process conditions suitable for PEALD formation of SnO films is provided in an article by Seop et al. entitled "The Fabrication of Tin Oxide Films by Atomic Layer Deposition using Tetrakis(ethylmethylamino)tin Precursor" (Transactions on Electrical and Electronic Materials, 2009, 10, 5, 173-176), which is incorporated herein by reference. A substrate is provided to a PEALD processing chamber and exposed to tetrakis(ethylmethylamino)tin for 4 seconds in the absence of plasma. Next, the tin-containing precursor is purged from the processing chamber by flowing argon gas through the processing chamber for 20 seconds. Then, O2 is injected for an additional 2 seconds at a radio frequency (RF) power of 100 W. An argon purge is then performed, which completes a PEALD cycle. In this example, the process is performed in a temperature range of 50-200°C and at a pressure of 0.8 Torr.

[0092] Although ALD (both thermal ALD and plasma enhanced ALD) is one of the preferred methods for depositing SnO films, it should be understood that other SnO deposition methods such as CVD, PECVD, and sputtering may also be used.

[0093] refer to Figure 7 In the process diagram of FIG. 1 , after depositing the SnO layer, the process continues by forming SnO spacers on the substrate in 705. The SnO spacers are formed by Figure 3 and Figure 4 First, the SnO layer 109 is etched from the horizontal surface on the layer 103 and the horizontal surface on the mandrel 101, without completely etching from the location adhering to the side wall of the mandrel 101. This etch exposes all locations of the layer 103 except for the location near the side wall of the mandrel 101. In addition, this etch exposes the top of the mandrel. The resulting structure is shown in FIG. Figure 3As shown. The chemistry of the etching will depend on the type of material used for layers 101 and 103. The etching used for SnO layer removal in this step is selected so that the ratio of the SnO etching rate to the mandrel material etching rate is greater than 1, and so that the ratio of the SnO etching rate to the layer 103 material etching rate is greater than 1. SnO can be etched using a variety of wet etching and dry etching techniques. In wet etching, the substrate is contacted with a wet etchant that can be sprayed onto the substrate, for example. Alternatively, the substrate can be immersed in a wet (aqueous) etchant. In dry etching, the substrate is placed in a dry etching chamber, where the substrate is contacted with a gas etchant with or without the use of plasma. "Wet etching" as used herein refers to etching with a liquid etchant, while "dry etching" refers to etching with a gas (including evaporated) etchant, regardless of whether water is used. An example of a wet etch suitable for etching SnO is acid etching, in which the substrate is contacted with an aqueous solution of an acid (such as HCl).

[0094] In one implementation of HCl etching, the substrate is contacted with an aqueous solution prepared from an aqueous solution of HCl and chromium metal. The etching chemistry is described in an article entitled "Texture Etched SnO2 Glasses Applied to Silicon Thin-film Solar Cells" (Journal of Nanomaterials, vol. 2014, 1-9) by Wu et al., which is incorporated herein by reference in its entirety. In this embodiment, the SnO layer is etched by a preformed mixture containing HCl and Cr (II) ions, which reduces Sn (IV) to Sn (II) and helps dissolve the oxide. In one implementation, a HCl:Cr etching solution is prepared by dissolving chromium metal (20 g) in a 50% HCl aqueous solution (5 L) at 90 ° C. The chromium concentration can vary between 0.05 and 1% by weight. In some embodiments, etching is performed at a temperature range of 20-100 ° C.

[0095] In another example of a wet etching process, the SnO layer is treated with an aqueous HX (wherein X is Cl, Br or I) solution in the presence of zinc powder. In this method, the oxide is directly reduced by the hydrogen formed in the reaction of zinc with HX. In another wet etching embodiment, SnO is etched by an aqueous phosphoric acid solution, for example, provided in a ratio of H3PO4:H2O of 1:3. In addition, the SnO film can be etched by a mixture of an aqueous HNO3 solution and an aqueous HCl solution or by an aqueous HI solution at a temperature of about 60°C.

[0096] An example of a dry etch chemistry for SnO removal includes treatment with HBr in a plasma. Kwon et al. describe such a process in an article entitled "Etch Mechanism of In2O3 and SnO2 thin films in HBr-based inductively coupled plasmas" (J. Vac. Sci. Technol. A 28, 226 (2010)), which is incorporated herein by reference in its entirety. The substrate is treated with an inductively coupled plasma formed in a process gas containing HBr and argon.

[0097] In another embodiment, the process gas containing HBr also includes an oxygen-containing compound, such as O2. In some embodiments, etching is performed by exposing the substrate to a plasma formed in a process gas containing HBr, O2 and N2. This type of etching can selectively remove SnO materials relative to materials such as silicon and silicon oxide. It should be noted that the surface of the silicon mandrel is typically covered with a silicon oxide layer, which protects the silicon mandrel from being etched by the etching chemistry. In some embodiments, the process conditions of the etching step include applying a relatively high radio frequency (RF) bias to the substrate holder, for example to increase the ion energy in the plasma and increase the etching rate of the SnO material. Other dry etching chemicals suitable for SnO removal include plasma treatment in a mixture of Cl2 and hydrocarbons, and treatment in a plasma in a process gas including a chlorinated hydrocarbon (such as CH2Cl2 or CHCl3). In some embodiments, a substrate containing an exposed SnO layer is contacted with a plasma formed in a process gas containing CH4 and Cl2.

[0098] Another suitable dry etching chemistry for removing SnO films is a hydrogen-based plasma. In some embodiments, SnO is etched by exposing the substrate to a plasma formed in a process gas containing H2. In some embodiments, the plasma is formed in a process gas formed in a mixture of H2 and a hydrocarbon (e.g., CH4).

[0099] In some embodiments, removing the SnO layer from the horizontal portion of the substrate includes two steps using two different chemical processes. In the first step, which is called the main etching, most of the SnO layer is removed from the horizontal surface without completely exposing the mandrel and ESL material layer below. Therefore, the etching chemical process of etching does not need to be selective. In some embodiments, the main etching is performed by treating the substrate with a plasma formed in a process gas containing Cl2 and hydrocarbons (e.g., Cl2 and CH4). After the main etching etches through the SnO film or when the main etching is about to etch through the SnO film, the etching chemical process is switched to the over-etching chemical process. The end point of the main etching can be detected by using an optical probe, which will send a signal when the mandrel material or the ESL material is exposed. The over-etching chemical is used to remove the residual SnO film without etching the material of the mandrel and ESL. For the over-etching chemical process, the ratio of the SnO etching rate to the etching rate of the mandrel material is preferably greater than 1. For the over-etching chemical process, the ratio of the etching rate of SnO to the etching rate of the ESL material is also preferably greater than 1. In some embodiments (eg, when using silicon mandrels and silicon oxide ESLs), the overetching includes exposing the substrate with the remaining SnO film, the exposed mandrels, and the exposed ESL to a plasma formed in a process gas comprising HBr, N2, and O2.

[0100] The SnO etch in this step removes SnO from the horizontal surface, but the vertical portion of the SnO layer at the sidewalls of the mandrel remains on the substrate. Figure 4As shown, the mandrel 101 is removed from the substrate, leaving exposed SnO spacers 109 and exposed ESL 103. The removal of the mandrel is performed by exposing the substrate to an etching chemical that selectively etches the mandrel material. Therefore, in this step, the ratio of the etching rate of the mandrel material to the etching rate of SnO is greater than 1, and more preferably greater than 1.5. In addition, the etching chemical used in this step should selectively etch the mandrel material relative to the ESL material. Various etching methods can be used, and the specific selection of chemicals depends on the material of the mandrel and the material of the ESL layer. When the mandrel is made of amorphous silicon and the ESL material is silicon oxide, the mandrel can be removed by using an oxidizing oxygen-containing plasma. For example, the silicon mandrel can be selectively etched by exposing the substrate to a plasma formed in a process gas composed of HBr and O2. The chemical will selectively etch the silicon material in the presence of SnO and silicon oxide. In some embodiments, before etching begins, a thin silicon oxide protective layer is removed from the surface of the silicon mandrel. This can be accomplished by briefly exposing the substrate to a plasma formed in a process gas comprising a fluorocarbon. After removing the protective silicon oxide layer from the mandrel, the silicon is selectively etched. In some embodiments, it is preferred to use a relatively small RF bias in this step, or to use no external bias at all to the substrate. If no external bias is used, self-biasing of the substrate (10-20V) is sufficient. Under no bias or low bias conditions, the HBr / O2 plasma will selectively etch silicon in the presence of SnO and silicon oxide. Figure 4 The resulting structure showing the SnO spacers after removal of the mandrels is shown in FIG.

[0101] Next, the exposed ESL film 103 is etched to expose the underlying target layer 105 at all locations not protected by the SnO spacers 109. The resulting structure is shown in FIG. Figure 5 As shown. The etching chemical used in this step selectively etches the ESL material in the presence of SnO. In other words, the ratio of the etching rate of the ESL material to the etching rate of SnO is greater than 1, and more preferably greater than 1.5. The type of specific chemical used in this step will depend on the type of ESL material. When silicon oxide and silicon oxide-based materials are used, selective etching can be achieved by exposing the substrate to a plasma formed in a process gas including a fluorocarbon. For example, the ESL film can be etched by a plasma formed in a process gas including one or more of CF4, C2F6 and C3F8.

[0102] In the next step, the target layer 105 is etched at all locations not protected by the ESL film 103 to expose the underlying layer 107. The SnO spacers 109 are also removed in this etching step, providing Figure 6The patterned structure shown. In some embodiments, the etching chemistry used in this step is selected to remove both the target material and the SnO spacer material. In other embodiments, two different etching steps with different chemistries can be used to pattern the target layer 105 and remove the SnO spacers 109 accordingly. Depending on the chemical properties of the target layer, a variety of etching chemicals can be used. In one embodiment, the target layer 105 is a metal nitride layer (e.g., TiN) layer. In this embodiment, the metal layer is etched and the SnO spacers can be removed using a single etching chemistry by exposing the substrate to a plasma formed in a process gas comprising Cl2 and a hydrocarbon (e.g., CH4). Generally, the SnO spacers can be removed using any of the above-mentioned SnO etching methods.

[0103] At any time during the described process steps, the etching chamber and / or deposition chamber can be cleaned by converting the tin-containing particles into volatile tin hydride that can be easily removed by purging and / or extraction. In some embodiments, the conversion is carried out by contacting the substrate with a plasma formed in a hydrogen-containing gas (such as H2, NH3, or a mixture thereof).

[0104] exist Figure 8 A specific example of semiconductor substrate patterning using SnO spacers is provided in the process flow diagram of . Figure 1-6 The process begins at 801 by providing a substrate having an exposed layer including a silicon oxide layer and a plurality of protruding silicon features. In this example, reference Figure 1 , the substrate includes an exposed silicon oxide layer 103 and a plurality of protruding features (mandrels) 101 made of amorphous silicon. A hard mask layer 105 is located below the silicon oxide layer 103. In this example, the hard mask layer is made of titanium nitride. The hard mask layer 105 covers the BEOL layer 107.

[0105] Next, a SnO layer is conformally deposited on both the silicon oxide layer and the silicon protruding features in operation 803. In some embodiments, the conformal deposition is performed by ALD (thermal ALD or plasma assisted ALD) as previously described. Figure 2 A conformal SnO layer 109 covering the silicon mandrel surface and the silicon oxide layer is shown. In operation 805, the SnO on the horizontal surfaces is removed without removing the SnO layer on the sidewalls of the silicon protruding features. In this example, this removal is performed by a two-step etch. In the first step, the SnO layer is removed by removing the SnO layer from the silicon mandrel surface. Figure 2The substrate shown is exposed to a plasma formed in a process gas comprising Cl2 and CH4 for the main etch. Next, after most of the SnO film is removed from the horizontal surfaces, the remaining SnO film is removed from the horizontal surfaces by exposing the substrate to an overetch chemistry (including a plasma formed in a process gas consisting of HBr, O2, and N2). This step is performed by applying a relatively high bias to the substrate pedestal. During this step, the silicon mandrels are covered by a protective layer of silicon oxide, which is not significantly etched by the chemistry. The resulting structure is shown in FIG. Figure 3 As shown, the silicon oxide layer 103 and the silicon mandrel 101 are exposed.

[0106] Next, in operation 807, the silicon protruding features are removed and SnO spacers are formed therefrom, such as Figure 4 In this example, the silicon mandrels are selectively etched by exposing the substrate to a plasma formed in a process gas comprising HBr and O2 without applying a bias to the substrate or by using a bias lower than that used in the HBr / O2 / N2 etch of the SnO layer. In some embodiments, prior to removing the silicon mandrels, a protective silicon oxide layer is etched from the surface of the silicon, for example, by briefly exposing the substrate to a plasma formed in a process gas comprising a fluorocarbon.

[0107] In a subsequent step 809, the exposed silicon oxide layer is removed and the underlying hard mask layer is exposed. The silicon oxide is selectively etched by exposing the substrate to a plasma formed in a process gas comprising one or more fluorocarbons.

[0108] After this step, the etching process chamber where the fluorocarbon etch is performed can be cleaned to remove any tin-containing particles. For example, tin fluoride may be inadvertently deposited on the surface of the chamber. After the substrate is removed from the process chamber, a hydrogen-containing gas (e.g., H2, NH3, or a mixture of these gases) is flowed into the process chamber to convert the tin-containing particles into volatile tin hydride. In one example, the cleaning is performed by forming a plasma in the process gas. In other embodiments, the chamber is exposed to H2 in the absence of a plasma. The substrate obtained after the silicon oxide layer is removed is then Figure 5 , which shows the exposed hard mask layer 105. Next, in operation 811, the exposed hard mask layer and SnO spacers are removed. In one example, by Figure 5 The substrate shown is exposed to a plasma formed in a process gas consisting of Cl2 and CH4 to form a TiN hard mask and SnO layer.

[0109] Tin oxide is advantageous over other spacer materials (e.g., TiO2 and SiO2) because it is characterized by a relatively high modulus associated with the desired etch selectivity properties. The modulus of bulk tin (II) oxide is 360 GPa, which is greater than the modulus of titanium oxide (210 GPa) and the modulus of silicon oxide (70 GPa). Therefore, problems associated with low etch selectivity, such as spacing variation, are solved by using SnO spacers. In addition, the melting point of tin hydride is -52°C, while the melting point of titanium hydride is greater than 350°C. When using titanium oxide as a spacer, it is not possible to clean the process chamber by converting titanium-containing particles (e.g., titanium chloride or titanium fluoride) into titanium hydride because titanium hydride is non-volatile. In contrast, when using tin oxide as a spacer material, the process chamber can be easily cleaned by converting tin-containing particles into volatile tin hydride that can be purged from the process chamber.

[0110] Device

[0111] Another aspect of the implementation disclosed herein is a device and system configured to complete the method described herein. Suitable devices include hardware for completing processing operations and a system controller with instructions for controlling processing operations according to the disclosed implementation. In some embodiments, a deposition device for depositing a SnO layer is provided. In some embodiments, it is an ALD device (e.g., a PEALD device). In other embodiments, it can be a CVD device or a sputtering device including a tin oxide target. The device includes a processing chamber, a support for holding a substrate in place during deposition, an inlet for allowing process gases to flow into the processing chamber, and may also include a system for forming plasma in the processing chamber. In addition, according to the method provided herein, the device includes a controller with program instructions for depositing a SnO layer.

[0112] The dry etching operation provided herein can be carried out in various devices equipped with a delivery line and a control mechanism configured to convey gas reagents. The example of a suitable treatment chamber includes a plasma etching chamber, an RIE chamber, an isotropic etching chamber, and a resist stripping chamber (resist strip chamber). In some embodiments, the dry etching device includes a treatment chamber accommodating a support for holding a substrate and a delivery line for conveying one or more process gases to the treatment chamber. In some embodiments, the device also includes a system for generating plasma in the process gas. The treatment chamber may also include a controller, and the controller includes a program instruction for performing etching. The instruction may include an instruction for conveying process gas, an instruction for setting the temperature and pressure in the treatment chamber, and an instruction on plasma parameters.

[0113] The wet etching operation provided herein can be carried out in various devices configured to be used for conveying wet etchant to substrate. These can be configured to be used for immersing substrate in liquid etchant, so that etchant is sprayed or flowed onto substrate or for other contact methods. In some embodiments, the device includes a support that can be configured to rotate the substrate and is configured to spray or flow liquid etchant to one or more delivery ports (e.g., nozzle) of substrate for holding the substrate in position during etchant delivery. The device can also include a controller with program instructions for wet etching process.

[0114] In another aspect, a system is provided, wherein the system includes a deposition chamber configured to deposit a SnO layer and one or more etching chambers (e.g., RIE chamber, wet etching chamber) configured to etch one or more materials on a substrate. The system also includes a controller having program instructions for depositing a SnO layer and for forming SnO spacers according to the methods disclosed herein.

[0115] A PEALD apparatus will now be described as an example of an apparatus suitable for depositing a SnO layer according to the methods provided herein.

[0116] In some embodiments, conformal deposition of the SnO layer is performed in a PEALD reactor that is part of a Vector Excel deposition module available from Lam Research Corp. of Fremont, California. A suitable process chamber includes a support (wafer pedestal) for holding a wafer substrate during deposition, a generator for forming a plasma in the process chamber, and conduits for delivering components of the process gas (tin-containing precursors, oxygen-containing reactants, carrier gas, etc.) to the process chamber. The apparatus is also configured for purging and / or evacuating the process chamber and for maintaining a desired pressure and temperature in the process chamber during deposition.

[0117] Examples of PEALD processing chambers are described in U.S. Patent No. 6,416,822, U.S. Patent No. 6,428,859, and U.S. Patent No. 8,747,964, which are incorporated herein by reference in their entireties.

[0118] Fig. 9 An embodiment of a PEALD process station 900 that can be used to deposit a provided SnO film is schematically illustrated. For simplicity, the process station 900 is depicted as a stand-alone process station having a process chamber body 902 for maintaining a low pressure environment. However, it should be understood that multiple process stations 900 can be included in a common process tool environment. In addition, it should be understood that in some embodiments, one or more hardware parameters of the process station 900, including those discussed in detail below, can be adjusted programmatically by one or more computer controllers.

[0119] The processing station 900 is in fluid communication with a reactant delivery system 901 for delivering process gases to a distribution showerhead 906. The reactant delivery system 901 includes a mixing vessel 904 for mixing and / or conditioning process gases for delivery to the showerhead 906. One or more mixing vessel inlet valves 920 can control the introduction of process gases into the mixing vessel 904. Similarly, a showerhead inlet valve 905 can control the introduction of process gases into the showerhead 906.

[0120] Some reactants may be stored in liquid form before being evaporated and subsequently transported to a processing station. For example, Fig. 9 Embodiments include an evaporation point 903 for evaporating liquid reactants to be supplied to a mixing container 904. In some embodiments, the evaporation point 903 may be a heated evaporator. The reactant vapor produced by such an evaporator may condense in a downstream delivery pipeline. Incompatible gases exposed to condensed reactants may produce small particles. These small particles may block pipelines, hinder valve operation, contaminate substrates, etc. Some methods to solve these problems include sweeping and / or emptying the delivery pipeline to remove residual reactants. However, sweeping the delivery pipeline may increase the processing station cycle time and reduce the throughput of the processing station. Therefore, in some embodiments, the delivery pipeline downstream of the evaporation point 903 may be heat traced. In some examples, the mixing container 904 may also be heat traced. In a non-limiting example, the pipeline downstream of the evaporation point 903 has an elevated temperature distribution extending from about 100°C to about 150°C at the mixing container 904.

[0121] In some embodiments, the reactant liquid can be evaporated at the liquid injector. For example, the liquid injector can inject a pulse of the liquid reactant into the carrier gas flow upstream of the mixing vessel. In one case, the liquid injector can vaporize the reactant by flashing the liquid from a higher pressure to a lower pressure. In another case, the liquid injector can atomize the liquid into dispersed droplets, which then evaporate in the heated delivery pipeline. It should be understood that smaller droplets can be vaporized faster than larger droplets, thereby reducing the delay between liquid injection and complete vaporization. Faster evaporation can reduce the length of the pipeline downstream of the evaporation point 903. In one case, the liquid injector can be directly mounted to the mixing vessel 904. In another case, the liquid injector can be directly mounted to the spray head 906.

[0122] In some embodiments, a liquid flow controller upstream of the evaporation point 903 may be provided to control the mass flow of the liquid for vaporization and delivery to the processing station 900. For example, a liquid flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC may be adjusted in response to a feedback control signal provided by a proportional integral differential (PID) controller electrically connected to the MFM. However, the use of feedback control may require one second or longer to stabilize the liquid flow. This may extend the time for dosing the liquid reactant. Therefore, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, by disabling the sensing tubes of the LFC and PID controller, the LFC may be dynamically switched from a feedback control mode to a direct control mode.

[0123] The showerhead 906 distributes the process gas to the substrate 912. Fig. 9 In the illustrated embodiment, substrate 912 is positioned below showerhead 906 and is shown resting on pedestal 908. It will be appreciated that showerhead 906 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to substrate 912.

[0124] In some embodiments, microvolume 907 is located below showerhead 906. Performing the ALD process in a microvolume of the processing station rather than the entire volume can reduce reactant exposure and sweep time, can reduce the time to change process conditions (such as pressure, temperature, etc.), can limit the exposure of the processing station robot to process gases, etc. Example microvolume sizes include, but are not limited to, volumes between 0.1 liters and 2 liters. Such microvolumes can also affect productivity. When the deposition rate per cycle decreases, the cycle time is also reduced. In some cases, the latter effect is large enough to increase the overall throughput of the module for a given target thickness of the film.

[0125] In some embodiments, the pedestal 908 can be raised or lowered to expose the substrate 912 to the microvolume 907 and / or to change the volume of the microvolume 907. For example, during a substrate transport phase, the pedestal 908 can be lowered to allow the substrate 912 to be loaded on the pedestal 908. During a deposition process phase, the pedestal 908 can be raised to place the substrate 912 within the microvolume 907. In some embodiments, the microvolume 907 can completely surround the substrate 912 and a portion of the pedestal 908 to create an area of ​​high flow impedance during the deposition process.

[0126] Optionally, the pedestal 908 can be lowered and / or raised during portions of the deposition process to adjust process pressure, reactant concentrations, etc. within the microvolume 907. In one instance where the chamber body 902 is maintained at a base pressure during the deposition process, lowering the pedestal 908 can enable the microvolume 907 to be evacuated. Exemplary ratios of microvolume to chamber volume include, but are not limited to, volume ratios between 1:900 and 1:10. It should be appreciated that in some embodiments, the pedestal height can be programmatically adjusted by an appropriate computer controller.

[0127] In another case, adjusting the height of pedestal 908 can enable the plasma density to be varied during plasma activation and / or treatment cycles included in the deposition process. At the end of the deposition process phase, pedestal 308 can be lowered during another substrate transport phase to enable removal of substrate 912 from pedestal 908.

[0128] Although the exemplary microvolume variations described herein relate to a height adjustable pedestal, it should be understood that in some embodiments, the position of the showerhead 906 can be adjusted relative to the pedestal 908 to change the volume of the microvolume 907. In addition, it should be understood that the vertical position of the pedestal 908 and / or showerhead 906 can be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 908 can include a rotation axis for rotating the orientation of the substrate 912. It should be understood that in some embodiments, one or more of these exemplary adjustments can be performed programmatically by one or more suitable computer controllers.

[0129] Back to Fig. 9In the embodiment shown, the showerhead 906 and the base 908 are electrically connected to the RF power supply 914 and the matching network 916 to power the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 914 and the matching network 916 can be operated at any suitable power to form a plasma of free radical species with a desired composition. Examples of suitable powers are listed above. Similarly, the RF power supply 914 can provide RF power of any suitable frequency. In some embodiments, the RF power supply 914 can be configured to control high-frequency and low-frequency RF power supplies independently of each other. Exemplary low-frequency RF frequencies can include, but are not limited to, frequencies between 50kHz and 900kHz. Exemplary high-frequency RF frequencies can include, but are not limited to, frequencies between 1.8MHz and 2.45GHz. It should be understood that any suitable parameter can be modulated discretely or continuously to provide plasma energy for surface reactions. In a non-limiting example, the plasma power can be pulsed intermittently to reduce ion bombardment on the substrate surface relative to a continuously powered plasma.

[0130] In some embodiments, plasma can be monitored in situ by one or more plasma monitors. In one case, plasma power can be monitored by one or more voltage, current sensors (e.g., VI probes). In another case, plasma density and / or process gas concentration can be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be programmatically adjusted based on measurements from such in situ plasma monitors. For example, OES sensors can be used in a feedback loop to provide programmed control of plasma power. It should be understood that in some embodiments, other monitors can be used to monitor plasma and other process characteristics. Such monitors can include, but are not limited to, infrared (IR) monitors, sound monitors, and pressure sensors.

[0131] In some embodiments, the plasma can be controlled by input / output control (IOC) sequencing instructions. In one example, instructions for setting the plasma conditions of the plasma treatment stage can be included in the corresponding plasma activation recipe stage of the deposition process recipe. In some cases, the process recipe stages can be arranged sequentially so that all instructions for the deposition treatment stage are executed simultaneously with the treatment stage. In some embodiments, instructions for setting one or more plasma parameters can be included in the recipe stage before the plasma treatment stage. For example, the first recipe stage may include instructions for setting the flow rate and / or instructions of the process gas or its various components, instructions for setting the plasma generator to a power set point, and time delay instructions for the first recipe stage. The second subsequent recipe stage may include instructions for enabling the plasma generator and time delay instructions for the second recipe stage. The third recipe stage may include instructions for disabling the plasma generator and time delay instructions for the third recipe stage. It should be understood that within the scope of the present disclosure, these recipe stages can be further subdivided and / or iterated in any suitable manner.

[0132] In some embodiments, the susceptor 908 can be temperature controlled via a heater 910. Additionally, in some embodiments, pressure control of the deposition processing station 900 can be provided by a butterfly valve 918. Fig. 9 In the embodiment shown in FIG. 1 , butterfly valve 918 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of process station 900 can also be adjusted by changing the flow rate of one or more gases introduced into process station 900.

[0133] In some embodiments, substrates provided herein are processed in a multi-station tool. Fig.10A schematic diagram of an embodiment of a multi-station processing tool 1000 having an inbound load lock 1002 and an outbound load lock 1004 is shown, one or both of which may include a remote plasma source. A robot 1006 is configured to move a wafer from a box loaded through a container 1008 into the inlet load lock 1002 via an atmospheric port 1010 at atmospheric pressure. The wafer is placed on a pedestal 1012 in the inbound load lock 1002 by the robot 1006, the atmospheric port 1010 is closed, and the load lock is evacuated (pump down). In the case where the inbound load lock 1002 includes a remote plasma source, the wafer can be exposed to a remote plasma treatment in the load lock before being introduced into the processing chamber 1014. In addition, the wafer can also be heated in the inbound load lock 1002 to, for example, remove moisture and adsorbed gases. Next, the chamber transfer port 1016 of the process chamber 1014 is opened and another robot (not shown) places the wafer on a susceptor in the reactor for processing at the first station shown in the reactor.

[0134] The depicted processing chamber 1014 includes Fig.10 In the illustrated embodiment there are four processing stations numbered 1 to 4. Each station has a heated pedestal (the pedestal for station 1 is shown as 1018) and a gas line inlet. It should be understood that in some embodiments, each processing station may have a different or multiple purposes. Although the depicted processing chamber 1014 includes four stations, it should be understood that a processing chamber according to the present disclosure may have any suitable number of stations. For example, in some embodiments, a processing chamber may have five or more stations, while in other embodiments, a processing chamber may have three or fewer stations.

[0135] Fig.10 Also depicted is an embodiment of a wafer handling system 1090 for transferring wafers within the process chamber 1014. In some embodiments, the wafer handling system 1090 can transfer wafers between various processing stations and / or between a processing station and a load lock. It should be understood that any suitable wafer handling system can be used. Non-limiting examples include a wafer turntable and a wafer handling robot. Fig.10 Also depicted is an embodiment of a system controller 1050 for controlling process conditions and hardware states of the processing tool 1000. The system controller 1050 may include one or more memory devices 1056, one or more mass storage devices 1054, and one or more processors 1052. The processor 1052 may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, and the like.

[0136] In some embodiments, the system controller 1050 controls all activities of the processing tool 1000. The system controller 1050 executes system control software 1058 stored in the mass storage device 1054, loaded into the memory device 1056, and executed on the processor 1052. The system control software 1058 may include instructions for controlling timing, gas mixtures, chamber and / or station pressures, chamber and / or station temperatures, purge conditions and timing, wafer temperature, RF power levels, RF frequencies, substrate, pedestal, chuck and / or susceptor positions, and other parameters of a particular process performed by the processing tool 1000. The system control software 1058 may be configured in any suitable manner. For example, various processing tool component subroutines or control objects may be written to control the operation of the processing tool components necessary to perform various processing tool processes according to the disclosed methods. The system control software 1058 may be encoded in any suitable computer-readable programming language.

[0137] In some embodiments, the system control software 1058 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each stage of the PEALD process may include one or more instructions for execution by the system controller 1050.

[0138] Other computer software and / or programs stored on the mass storage device 1054 and / or the memory device 1056 associated with the system controller 1050 may be employed in some embodiments. Examples of programs or program segments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

[0139] The substrate positioning program may include program code for process tool components used to load a substrate onto the pedestal 1018 and control the spacing between the substrate and other components of the process tool 1000 .

[0140] The process gas control program may include code for controlling gas composition and flow rate and optionally for flowing gas into one or more process stations prior to deposition to stabilize the pressure in the process station. The process gas control program may include code for controlling the gas composition and flow rate within any of the disclosed ranges. The pressure control program may include code for controlling the pressure in the process station by adjusting, for example, a throttle valve in the exhaust system of the process station, the flow of gas into the process station, etc. The pressure control program may include code for maintaining the pressure in the process station within any disclosed pressure range.

[0141] The heater control program may include code for controlling the current flowing to a heating unit for heating the substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas (e.g., helium) to the substrate. The heater control program may include instructions for maintaining the temperature of the substrate within the disclosed range.

[0142] The plasma control program may include code for setting the RF power level and frequency applied to the process electrodes in one or more process stations, for example using any of the RF power levels disclosed herein. The plasma control program may also include code for controlling the duration of each plasma exposure.

[0143] In some implementations, there may be a user interface associated with the system controller 1050. The user interface may include a display screen, graphical software displays of device and / or processing conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, and the like.

[0144] In some embodiments, the parameters adjusted by the system controller 1050 may relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF power level, frequency, and exposure time), etc. These parameters may be provided to the user in the form of a recipe, which may be entered using a user interface.

[0145] Signals for monitoring the process may be provided from various process tool sensors through analog and / or digital input connections of the system controller 1050. Signals for controlling the process may be output through analog and digital output connections of the process tool 1000. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (e.g., manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with the data from these sensors to maintain process conditions.

[0146] Any suitable chamber may be used to implement the disclosed embodiments. Exemplary deposition apparatus include, but are not limited to, those from Lam Research Corp., both available from Fremont, California. Product Series, Product range and / or The stations may be devices from a product line, or devices from any of a variety of other commercially available systems. Two or more stations may perform the same function. Similarly, two or more stations may perform different functions. Each station may be designed / configured to perform a specific function / method as desired.

[0147] Fig.111 is a block diagram of a processing system suitable for performing thin film deposition processes according to certain embodiments. System 1100 includes a transfer module 1103. The transfer module 1103 provides a clean pressurized environment to minimize the risk of contamination of the processed substrate when it moves between various reactor modules. Mounted on the transfer module 1103 are two multi-station reactors 1109 and 1110, each of which is capable of performing atomic layer deposition (ALD) and / or chemical vapor deposition (CVD) according to certain embodiments. In other embodiments, one reactor may include a station configured to perform ALD, while the other reactor may include a station configured to perform etching. Reactors 1109 and 1110 may include multiple stations 1111, 1113, 1115, and 1117 that can perform operations sequentially or non-sequentially according to the disclosed embodiments. These stations may include a heated susceptor or substrate support, one or more gas inlets or nozzles, or a dispersion plate.

[0148] Also mounted on the transfer module 1103 may be one or more single or multi-station modules 1107 capable of performing plasma or chemical (non-plasma) pre-cleaning, or any other process described in connection with the disclosed method. In some cases, the module 1107 may be used for various processes, such as preparing a substrate for a deposition process. The module 1107 may also be designed / configured to perform various other processes such as etching or polishing. The system 1100 also includes one or more wafer source modules 1101, where wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 1119 may first move the wafer from the source module 1101 to the load lock 1121. The wafer transfer device (typically a robot arm unit) in the transfer module 1103 moves the wafer from the load lock 1121 to the modules mounted on the transfer module 1103 and moves the wafer between the modules mounted on the transfer module 1103.

[0149] In various embodiments, a system controller 1129 is used to control process conditions during deposition. The controller 1129 will typically include one or more memory devices and one or more processors. The processor may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0150] The controller 1129 can control all activities of the deposition apparatus. The system controller 1129 executes system control software, which includes instruction sets for controlling timing, gas mixtures, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process. Other computer programs stored on a memory device associated with the controller 1129 may be employed in some embodiments.

[0151] Typically, there will be a user interface associated with controller 1129. The user interface may include a display screen, graphical software displays of device and / or processing conditions, and user input devices (e.g., pointing device, keyboard, touch screen, microphone, etc.).

[0152] The system control logic may be configured in any suitable manner. In general, the logic may be designed or configured in hardware and / or software. The instructions for controlling the drive circuit may be hard-coded or provided as software. The instructions may be provided by "programming". Such programming is understood to include any form of logic including hard-coded logic in digital signal processors, application specific integrated circuits, and other devices having specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that can be executed on a general purpose processor. The system control software may be encoded in any suitable computer readable programming language.

[0153] The computer program code for controlling the germanium-containing reducing agent pulses, hydrogen gas flow, and tungsten-containing precursor pulses, as well as other processes in the process sequence, can be written in any conventional computer-readable programming language (e.g., assembly language, C, C++, Pascal, Fortran, etc.). The compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as shown, the program code can also be hard-coded.

[0154] Controller parameters relate to process conditions such as process gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of recipes and can be input using a user interface. Signals for monitoring the process can be provided by analog and / or digital input connections of the system controller 1129. Signals for controlling the process are output on analog and digital output connections of the deposition apparatus 1100.

[0155] The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control the operation of the chamber components necessary to perform deposition processes (and in some cases other processes) in accordance with the disclosed embodiments. Examples of programs or program segments for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0156] In some implementations, the controller 1129 is part of a system, which can be part of the above examples. The system can include semiconductor processing equipment, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems can be integrated with electronic devices for controlling their operation before, during, and after the processing of semiconductor wafers or substrates. The electronic device can be referred to as a "controller", which can control various components or subcomponents of the system. Depending on the processing requirements and / or the type of system, the controller 1129 can be programmed to control any process disclosed herein, including controlling the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer delivery in and out of tools and other delivery tools and / or load locks connected to a specific system or interfaced with a specific system.

[0157] In general, a controller can be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. The integrated circuit can include a chip in the form of firmware that stores program instructions, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and / or one or more microprocessors, or a microcontroller that executes program instructions (e.g., software). The program instructions can be instructions delivered to the controller in the form of various separate settings (or program files) that define operating parameters for performing a specific process on or for a semiconductor wafer or system. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer to complete one or more processing steps during the manufacture of one or more (kinds of) layers, materials, metals, oxides, silicon, silicon oxides, surfaces, circuits, and / or dies of a wafer.

[0158] In some implementations, the controller may be part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the "cloud" or in all or part of a wafer fab host system that may allow remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, study trends or performance metrics from multiple manufacturing operations, change the parameters of the current processing, set the processing steps to follow the current processing, or start a new processing. In some examples, a remote computer (e.g., a server) may provide a process recipe to the system via a network (which may include a local network or the Internet). The remote computer may include a user interface that enables input or programming of parameters and / or settings, which are then delivered from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify the parameters of each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool, and the controller is configured to interface with or control the tool. Thus, as described above, the controller may be distributed, for example, by including one or more discrete controllers networked together and working toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such a purpose is one or more integrated circuits on a chamber that communicate with one or more integrated circuits located remotely (e.g., at a platform level or as part of a remote computer), which combine to control the process on the chamber.

[0159] Example systems may include, but are not limited to, plasma etch chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfer edge etch chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etch (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system that may be associated with or used in the manufacture and / or preparation of semiconductor wafers.

[0160] As described above, depending on one or more processing steps to be performed by the tool, the controller may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the facility, a host computer, another controller, or tools used in the transport of materials to transport wafer containers to and from tool locations and / or load ports in a semiconductor manufacturing facility.

[0161] Further embodiments

[0162] The apparatus and processes described herein can be used in conjunction with photolithographic patterning tools or processes, for example, for preparing or manufacturing semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, although not necessarily, such apparatus and processes will be used or performed together in a common manufacturing facility. Photolithographic patterning of films typically includes some or all of the following steps, each of which can be implemented using a number of possible tools: (1) applying a photoresist to a workpiece (i.e., substrate) using a spin coating or spray coating tool; (2) curing the photoresist using a hot plate or oven or a UV curing tool; (3) exposing the photoresist to visible light or UV or X-ray light using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist so that it can be patterned using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece using a dry etching tool or a plasma assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

Claims

1. A method for processing a semiconductor substrate, the method comprising: (a) providing a semiconductor substrate having an exposed layer comprising a first material and at least one protruding feature comprising a second material different from the first material; as well as (b) depositing a SnO2 layer on both the first material and the second material, including depositing the SnO2 layer on the sidewalls of the at least one protruding feature, wherein the first material and the second material are selected such that a ratio of an etch rate of the first material to an etch rate of SnO2 is greater than 1 for a first etch chemistry and a ratio of an etch rate of the second material to an etch rate of SnO2 is greater than 1 for a second etch chemistry, and wherein the depositing comprises exposing the first material and the second material of the semiconductor substrate to a tin-containing precursor and an oxygen-containing precursor; (c) after depositing the SnO2 layer, completely removing the SnO2 layer from horizontal surfaces of the semiconductor substrate without completely removing the SnO2 layer covering the sidewalls of the at least one protruding feature; as well as (d) after removing the SnO2 layer from the horizontal surface of the semiconductor substrate, completely removing the at least one protruding feature using the second etch chemistry without completely removing the SnO2 layer covering the sidewalls of the at least one protruding feature, thereby forming a SnO2 spacer.

2. The method of claim 1, wherein the depositing comprises exposing the first material and the second material of the semiconductor substrate to the tin-containing precursor having the formula: Rx-Sn-A(4-x) where x can be 0, 1, 2 or 3; R may be selected from aliphatic substituents, heteroaliphatic substituents, or any combination thereof; and A is YR'z, wherein Y can be selected from N or O; When Y is O, z is 1, and when Y is N, z is 2; and Each R' can be independently selected from an aliphatic substituent, a heteroaliphatic substituent, or any combination thereof.

3. The method of claim 1, wherein the tin in the tin-containing precursor is selected from tin (II) and tin (IV).

4. The method according to claim 2, wherein YR' z The first R' and YR' z The same as the second R'.

5. The method of claim 4, wherein the tin-containing precursor is tetrakis(dimethylamino)tin.

6. The method according to claim 2, wherein YR' z The first R' is different from YR' z The second R'.

7. The method of claim 6, wherein the tin-containing precursor is tetrakis(ethylmethylamino)tin.

8. The method of claim 2, wherein R and R' are each independently selected from an alkyl group, an alkenyl group, an alkynyl group, or a combination thereof.

9. The method of claim 8, wherein the alkyl group is methyl, ethyl, propyl, isopropyl, butyl, isobutyl, tert-butyl, or a combination thereof.

10. The method of claim 1, wherein the tin-containing precursor is an alkyl-substituted tin amide.

11. The method according to claim 1, wherein the tin-containing precursor is selected from tetrakis(dimethylamino)tin, tetrakis(ethylmethylamino)tin, N 2 ,N 3 -di-tert-butyl-butane-2,3-diamino-tin(II) and 1,3-bis(1,2-methylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannane-2-ylidene.

12. The method of claim 1, wherein the tin-containing precursor is tetrakis(dimethylamino)tin.

13. The method of claim 1, wherein the depositing comprises purging a processing chamber housing the semiconductor substrate with an inert gas between sequential exposures of the tin-containing precursor and the oxygen-containing precursor.

14. The method of claim 13, wherein the deposition of the SnO2 layer is performed with process parameters such that the tin-containing precursor and the oxygen-containing precursor each independently remain in a gas phase.

15. The method of claim 14, wherein the process parameter is a temperature of the process chamber that is between about 20°C and about 500°C.

16. The method of claim 14, wherein the process parameter is a flow rate at which the tin-containing precursor and the oxygen-containing precursor each independently flow, which is between about 10 seem and about 10,000 seem.

17. The method of claim 1, wherein the oxygen-containing precursor is selected from the group consisting of ozone, water, oxygen, hydrogen peroxide, and NO.

18. The method of claim 1, wherein the tin-containing precursor and the oxygen-containing precursor are each independently combined with a carrier gas selected from the group consisting of helium, argon, and nitrogen.

19. The method of claim 1, wherein the depositing of the SnO2 layer is performed using at least one of a chemical vapor deposition process, atomic layer deposition, or any combination thereof.

20. The method of claim 1, wherein the depositing of SnO2 comprises sequentially exposing the first material and the second material of the semiconductor substrate to a tin-containing precursor and an oxygen-containing precursor.

21. A deposition apparatus comprising: (a) a processing chamber comprising a substrate holder configured to hold a semiconductor substrate; (b) an inlet in the process chamber, the inlet configured for introducing a tin-containing precursor and an oxygen-containing precursor; as well as (c) a controller including program instructions configured to cause: (i) contacting the semiconductor substrate in the process chamber with the tin-containing precursor and the oxygen-containing precursor to coat the semiconductor substrate comprising a layer of a first material and a plurality of protruding features made of a second material with a layer of SnO2, wherein the first material and the second material are selected such that a ratio of an etch rate of the first material to an etch rate of SnO2 for a first etch chemistry is greater than 1, and a ratio of an etch rate of the second material to an etch rate of SnO2 for a second etch chemistry is greater than 1; and (ii) cleaning the process chamber after (i) by contacting the process chamber with a hydrogen-containing gas activated in a plasma to form a volatile tin-containing product.

22. The deposition apparatus of claim 21, wherein the tin-containing precursor has the formula: Rx-Sn-A(4-x) where x can be 0, 1, 2 or 3; R may be selected from aliphatic substituents, heteroaliphatic substituents, or any combination thereof; and A is YR'z, wherein Y can be selected from N or O; When Y is O, z is 1, and when Y is N, z is 2; and Each R' may be independently selected from an aliphatic substituent, a heteroaliphatic substituent, or any combination thereof.

23. The deposition apparatus according to claim 21, wherein the tin-containing precursor is selected from tetrakis(dimethylamino)tin, tetrakis(ethylmethylamino)tin, N 2 ,N 3 -di-tert-butyl-butane-2,3-diamino-tin(II) and 1,3-bis(1,2-methylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannane-2-ylidene.

24. The deposition apparatus of claim 22, wherein the controller comprises program instructions configured to cause sequential contact of the semiconductor substrate with the tin-containing precursor and the oxygen-containing precursor.

25. A system for processing a semiconductor substrate, comprising one or more deposition chambers and one or more etching chambers, and a controller comprising program instructions configured to: (i) depositing a SnO2 layer on a semiconductor substrate having an exposed layer comprising a first material and at least one protruding feature comprising a second material different from the first material, on both the first material and the second material, including depositing the SnO2 layer on sidewalls of the at least one protruding feature, wherein the first material and the second material are selected such that a ratio of an etch rate of the first material to an etch rate of SnO2 is greater than 1 for a first etch chemistry and a ratio of an etch rate of the second material to an etch rate of SnO2 is greater than 1 for a second etch chemistry, and wherein the depositing comprises exposing the first material and the second material of the semiconductor substrate to a tin-containing precursor and an oxygen-containing precursor; (ii) after depositing the SnO2 layer, completely removing the SnO2 layer from horizontal surfaces of the semiconductor substrate without completely removing the SnO2 layer covering the sidewalls of the at least one protruding feature; as well as (iii) after removing the SnO2 layer from the horizontal surface of the semiconductor substrate, completely removing the at least one protruding feature using the second etch chemistry without completely removing the SnO2 layer covering the sidewalls of the at least one protruding feature, thereby forming a SnO2 spacer.

26. The system of claim 25, wherein the program instructions are configured to (i) deposit SnO2 by sequentially exposing the first material and the second material of the semiconductor substrate to a tin-containing precursor and an oxygen-containing precursor.

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