Power conversion device
By connecting multiple circuit units in series to each other on the output side of the inverter unit of the power conversion device, the problems of larger-scale and increased transmission loss caused by the power conversion device in the prior art are solved, and large-capacity supply of power and suppression of energy loss are achieved.
Patent Information
- Application Number
- CN202010136525.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-04-04
- Filing Date
- 2020-03-02
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2040-03-02
AI Technical Summary
When existing power conversion devices increase current to achieve large-capacity power supply, they lead to problems such as larger devices and increased transmission losses.
By connecting a plurality of circuit units including smoothing capacitors and semiconductor switching elements in series on the output side of the inverter unit, the voltage is increased without increasing the current, thereby avoiding conductor thickening and energy loss.
It effectively suppresses the scale-up of the device and the increase in transmission loss, while achieving large-capacity supply of power.
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Figure CN111865100B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a power conversion device, and more particularly to a power conversion device including a smoothing capacitor and an inverter unit. Background Art
[0002] Conventionally, a power conversion device including a smoothing capacitor and an inverter unit has been disclosed. Such a power conversion device is disclosed in, for example, Japanese Patent Application Publication No. 2017-118693.
[0003] In Japanese Patent Publication No. 2017-118693, there is described an induction heating power supply device (power conversion device) having a DC power supply unit (AC power supply and converter unit), a smoothing unit (smoothing capacitor), an inverter unit, and an output unit. In the induction heating power supply device described in Japanese Patent Publication No. 2017-118693, the DC power supply unit converts the AC power supplied by the commercial AC power supply into DC power. In addition, the smoothing unit smoothes the pulsating current of the DC power output from the DC power supply unit. In addition, the inverter unit reversely converts the DC power smoothed by the smoothing unit into high-frequency AC power. In addition, the output unit outputs the AC power converted by the inverter unit to the heating coil.
[0004] In the induction heating power supply device described in Japanese Patent Publication No. 2017-118693, the inverter unit includes two bridge circuits, and the bridge circuit has a plurality of bridge arms formed by two power semiconductor elements connected in series. In addition, the output side of the two bridge circuits is connected in parallel with respect to the heating coil. Thus, the power supply to the heating coil is distributed to the two bridge circuits. That is, in the induction heating power supply device described in Japanese Patent Publication No. 2017-118693, the inverter unit is provided with a plurality (two) of inverters on the output side of the bridge circuit in a manner connected in parallel with each other.
[0005] Here, in a conventional power conversion device such as that described in Japanese Patent Publication No. 2017-118693, in order to increase the capacity of the power that can be supplied, a method of increasing the number of parallel inverter units connected in parallel to increase the current supplied is considered. However, when the current is increased, the conductor needs to be thickened in accordance with the increased current at the portion where the currents of the respective inverter units after being connected in parallel converge, thereby making the device larger. In addition, the heat loss lost as heat energy at the resistor (conductor) depends on the size of the current, so when the current increases, the energy loss (transmission loss) in the transmission path becomes larger. Therefore, in a conventional power conversion device such as that described in Japanese Patent Publication No. 2017-118693, there is a desire to suppress the enlargement of the device and the increase of the transmission loss and to increase the capacity of the power that can be supplied. Summary of the invention
[0006] Problem that the invention aims to solve
[0007] The present invention has been made to solve the above-mentioned problems, and one object of the present invention is to provide a power conversion device that can increase the capacity of power that can be supplied while suppressing an increase in the size of the device and an increase in power transmission loss.
[0008] Solutions for solving problems
[0009] In order to achieve the above-mentioned purpose, a technical solution of the present invention provides a power conversion device, wherein the power conversion device comprises: a smoothing capacitor, which is connected to the output side of a rectifier circuit that rectifies an AC voltage; and an inverter unit, which includes a semiconductor switching element unit having a plurality of semiconductor switching elements, and the DC voltage smoothed by the smoothing capacitor is converted into an AC voltage by switching the semiconductor switching elements, and a circuit unit including the smoothing capacitor and the inverter unit is provided in plurality on the output side of the inverter circuit in a manner connected in series with each other.
[0010] In a power conversion device of a technical solution of the present invention, as described above, a plurality of circuit units including a smoothing capacitor and an inverter unit are provided on the output side of the inverter unit in a manner connected in series with each other. As a result, the voltage of the connected plurality of inverter units as a whole becomes the sum of the voltages of the respective inverter units in the plurality of inverter units connected in series, so that the voltage output from the power conversion device can be increased (high voltage) without increasing the current flowing in the inverter unit. Furthermore, since the current flowing in the inverter unit is not increased, it is not necessary to thicken the conductor (enlarge the device) as in the case where a plurality of inverter units are connected in parallel. In addition, since the heat loss lost as heat energy in the resistor (conductor) does not depend on the magnitude of the voltage, the energy loss (transmission loss) will not increase even if the voltage of the inverter unit as a whole increases. As a result, it is possible to suppress the enlargement of the device and the increase of the transmission loss and to increase the capacity of the power that can be supplied.
[0011] In the power conversion device of the above-mentioned technical solution, it is preferred that each of the plurality of circuit units includes an intra-unit connection portion connecting the smoothing capacitor and the semiconductor switch element portion, and the intra-unit connection portions of each of the plurality of circuit units are configured in such a way that the inductance between the smoothing capacitor and the semiconductor switch element portion is equal to each other. Here, in the inverter portion that switches the semiconductor switch element, there is a case where a surge voltage (a large wave voltage generated by instantaneously exceeding the steady state) is generated when the switch element is turned on / off. In addition, in the case where surge voltages of different magnitudes are generated in the inverter portions connected in series, unexpected circulating currents sometimes flow between the inverter portions connected in series. That is, in the inverter portions connected in series, there is a device failure such as damage to the device or malfunction caused by the surge voltage compared to the case where the surge voltages are equal to each other. In addition, the surge voltage depends on the current flowing in the circuit and the inductance in the circuit. Therefore, by configuring as described above, the inductance between the smoothing capacitor and the semiconductor switch element is equal among the plurality of circuit units, so that the difference in surge voltage among the plurality of circuit units can be suppressed from becoming large. As a result, in each inverter unit connected in series, device failure due to surge voltage can be suppressed.
[0012] In this case, it is preferred that the circuit unit includes a first circuit unit and a second circuit unit which are connected in series and arranged in a manner along the first direction, and the structure in the first circuit unit and the structure in the second circuit unit are configured to be symmetrical with respect to a center plane between the first circuit unit and the second circuit unit which is orthogonal to the first direction. If configured in this way, since the unit-internal connection portion of the first circuit unit and the unit-internal connection portion of the second circuit unit have the same shape, it is easy to realize a structure in which the inductance between the smoothing capacitor and the semiconductor switch element portion is equal to each other between the first circuit unit and the second circuit unit. In addition, in each of the first circuit unit and each of the second circuit units, components other than the unit-internal connection portion also have the same shape, so that the current flowing between the first circuit unit and the second circuit unit connected in series can be suppressed from becoming electrically unbalanced.
[0013] In the structure in which the first circuit unit and the second circuit unit are symmetrical with respect to a center plane between the first circuit unit and the second circuit unit, it is preferable that the smoothing capacitor of each of the first circuit unit and the second circuit unit has a rectangular parallelepiped shape including a terminal arrangement surface on which the terminals of the smoothing capacitor are arranged, the semiconductor switch element portion of each of the first circuit unit and the second circuit unit is arranged along a side surface intersecting the terminal arrangement surface, and the first circuit unit and the second circuit unit are arranged in a manner that the terminal arrangement surface of the first circuit unit and the terminal arrangement surface of the second circuit unit face each other. If so constituted, since the first circuit unit and the second circuit unit are arranged in a manner that the terminal arrangement surface of the first circuit unit and the terminal arrangement surface of the second circuit unit face each other, the unit internal connection portion connected to the terminal of the smoothing capacitor arranged on the terminal arrangement surface of the first circuit unit and the unit internal connection portion connected to the terminal of the smoothing capacitor arranged on the terminal arrangement surface of the second circuit unit can be arranged relatively close. Therefore, for example, when the distance between the smoothing capacitor and the semiconductor switch element section at the connection portion within the unit is reduced in each of the first circuit unit and each of the second circuit units in order to reduce the inductance between the smoothing capacitor and the semiconductor switch element section, the semiconductor switch element section of the first circuit unit and the semiconductor switch element section of the second circuit unit can be arranged relatively close. In this case, it is possible to suppress the increase in the connection distance when connecting the first circuit unit and the second circuit unit, thereby reducing the inductance between the smoothing capacitor and the semiconductor switch element section, and also reducing the inductance in the member connecting the units. In addition, in each of the first circuit unit and each of the second circuit units, the semiconductor switch element section can be arranged along the side surface (surface different from the terminal arrangement surface) intersecting the terminal arrangement surface where the terminals of the smoothing capacitor are arranged, thereby, compared with the case where the semiconductor switch element section is arranged along the surface (terminal arrangement surface) where the terminals of the smoothing capacitor are arranged, the space around the smoothing capacitor having a rectangular parallelepiped shape can be effectively used for arranging the components.
[0014] In this case, it is preferred that the power conversion device further includes an inter-unit connection portion for connecting the semiconductor switch element portion of the first circuit unit and the semiconductor switch element portion of the second circuit unit, the semiconductor switch element portion of the first circuit unit is provided in plurality on the side surface in a manner arranged along a second direction orthogonal to the first direction, and the semiconductor switch element portion of the second circuit unit is provided in plurality on the side surface in a manner corresponding to each of the plurality of semiconductor switch element portions of the first circuit unit in a manner arranged along the second direction orthogonal to the first direction. If so configured, since the plurality of semiconductor switch element portions provided in the first circuit unit and the plurality of semiconductor switch element portions provided in the second circuit unit are arranged in the second direction in a manner corresponding to each other, the shape of the inter-unit connection portion for connecting the semiconductor switch element portion of the first circuit unit and the semiconductor switch element portion of the second circuit unit can be simplified.
[0015] In the structure having the above-mentioned inter-unit connection part, it is preferred that the inter-unit connection part includes at least one of a notch and a through hole. If so configured, at least one of the notch and the through hole can be used to adjust so that the difference in the length of the current path of each semiconductor switch element part of the plurality of semiconductor switch element parts of the circuit unit is small. As a result, it is possible to suppress the increase in the electrical imbalance of the current flowing from each semiconductor switch element part of the plurality of semiconductor switch element parts of the circuit unit.
[0016] In the structure having the above-mentioned inter-unit connection part, it is preferable that the inter-unit connection part has a shape symmetrical with respect to a center line of the inter-unit connection part in the second direction along the first direction. With such a structure, since the length of the current path from each of the plurality of semiconductor switch element parts of the circuit unit can be equal on one side and the other side in the second direction with the center line as the center, it is possible to suppress the increase of electrical imbalance of the current flowing from each of the plurality of semiconductor switch element parts of the circuit unit.
[0017] In the structure having the above-mentioned inter-unit connection part, it is preferred that the inter-unit connection part includes: a first part, which is provided at a position corresponding to a plurality of semiconductor switch element parts of the first circuit unit in a manner extending along the second direction; a second part, which is provided at a position corresponding to a plurality of semiconductor switch element parts of the second circuit unit in a manner extending along the second direction; and a third part, which is provided independently of the first part and the second part in a manner extending along the first direction and is provided to connect the first part and the second part. If so configured, since the third part is provided independently of the first part provided in the first circuit unit and the second part provided in the second circuit unit, the first part and the second part are treated as units connected to the first circuit unit and the second circuit unit, respectively, and the third part is treated as a connection part connecting the units to each other, so that the workability during assembly and maintenance of the device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 This is a circuit diagram of a power conversion device according to one embodiment of the present invention.
[0019] Figure 2 It is a perspective view showing a schematic structure of a power conversion device according to one embodiment of the present invention.
[0020] Figure 3 This is a perspective view of a stacked portion of a power conversion device according to an embodiment of the present invention.
[0021] Figure 4 This is an exploded perspective view (1) of a stacked portion of a power conversion device according to an embodiment of the present invention.
[0022] Figure 5 It is a cross-sectional view (side view) of a power conversion device according to one embodiment of the present invention.
[0023] Figure 6 This is an exploded perspective view (2) of a power conversion device according to an embodiment of the present invention.
[0024] Figure 7 This is a front view for explaining the arrangement of stacked parts of the power conversion device according to one embodiment of the present invention.
[0025] Figure 8 This is a side view for explaining the arrangement of stacked parts in the power conversion device according to one embodiment of the present invention. DETAILED DESCRIPTION
[0026] Hereinafter, embodiments of the present invention will be described based on the drawings.
[0027] Reference Figures 1 to 8The structure of a power converter 100 according to one embodiment of the present invention will be described. The power converter 100 is for an induction heating device 200 of a melting furnace for melting metal by induction heating. The power converter 100 is configured to generate AC from an AC power source 300 using semiconductor switching elements 31 .
[0028] (Circuit Structure of Power Converter)
[0029] First, refer to Figure 1 The circuit configuration of the power conversion device 100 will be described.
[0030] like Figure 1 As shown, the power conversion device 100 includes a plurality of rectifier circuits 10 (rectifier circuits 10a to 10d), a plurality of smoothing capacitors 20 (smoothing capacitors 20a to 20d), and a plurality of inverter units 30 (inverter units 30a to 30d).
[0031] The rectifier circuit 10 converts the AC voltage input from the AC power supply 300 into a DC voltage. A plurality of (two) rectifier circuits 10 are provided for one AC power supply 300. That is, a rectifier circuit 10a and a rectifier circuit 10b are provided for the AC power supply 301 (transformer 301). In addition, a rectifier circuit 10c and a rectifier circuit 10d are provided for the AC power supply 302 (transformer 302). Furthermore, the anode side and the cathode side of the rectifier circuit 10a are electrically connected to the anode side and the cathode side of the rectifier circuit 10c, respectively. In addition, the anode side and the cathode side of the rectifier circuit 10b are electrically connected to the anode side and the cathode side of the rectifier circuit 10d, respectively.
[0032] The smoothing capacitor 20 is connected to the output side of the rectifier circuit 10 that rectifies the AC voltage. One smoothing capacitor 20 is provided for each rectifier circuit 10. That is, the smoothing capacitors 20a, 20b, 20c, and 20d are connected to the output sides of the rectifier circuits 10a, 10b, 10c, and 10d, respectively. And the positive side and the negative side of the smoothing capacitor 20a are electrically connected to the positive side and the negative side of the smoothing capacitor 20c, respectively. In addition, the positive side and the negative side of the smoothing capacitor 20b are electrically connected to the positive side and the negative side of the smoothing capacitor 20d, respectively.
[0033] The inverter unit 30 converts the DC voltage smoothed by the rectifier circuit 10 into an AC voltage by switching the semiconductor switch element 31. Then, the converted AC voltage is output from the inverter unit 30 to the induction heating coil 210 of the induction heating device 200. In addition, one inverter unit 30 is provided for each rectifier circuit 10. That is, the inverter units 30a, 30b, 30c, and 30d are provided for the rectifier circuits 10a, 10b, 10c, and 10d, respectively.
[0034] The inverter unit 30 includes a semiconductor module 32 (a semiconductor module 32a and a semiconductor module 32b) having a plurality of semiconductor switch elements 31. The semiconductor module 32a contains a semiconductor switch element 31a and a semiconductor switch element 31b. The semiconductor module 32b contains a semiconductor switch element 31c and a semiconductor switch element 31d. The semiconductor module 32 is an example of a "semiconductor switch element unit" of the technical solution of the present invention.
[0035] And, in Figure 1 Although not shown in the figure, for the semiconductor component 32a and the semiconductor component 32b, a plurality of semiconductor components are connected in parallel, for example, they are arranged in parallel in a manner of 6. In addition, a full-bridge circuit is formed by semiconductor switching elements 31a to 31d. In addition, the connection point where the semiconductor switching element 31a of the inverter part 30a (inverter part 30c) is connected to the semiconductor switching element 31b is electrically connected to one end side of the induction heating coil 210. In addition, the connection point where the semiconductor switching element 31c of the inverter part 30b (inverter part 30d) is connected to the semiconductor switching element 31d is electrically connected to the other end side of the induction heating coil 210.
[0036] In the power conversion device 100, the stacking unit (circuit unit) 40 is composed of the smoothing capacitor 20 and the inverter unit 30. In addition, the stacking unit 40 is provided with a plurality of stacking units (stacking units 40a to 40d). In addition, the stacking unit 40a and the stacking unit 40c are examples of the "first circuit unit" of the technical solution of the present invention. In addition, the stacking unit 40b and the stacking unit 40d are examples of the "second circuit unit" of the technical solution of the present invention.
[0037] Specifically, the stacked portion 40a is formed by the smoothing capacitor 20a and the inverter portion 30a. In addition, the stacked portion 40b is formed by the smoothing capacitor 20b and the inverter portion 30b. In addition, the stacked portion 40c is formed by the smoothing capacitor 20c and the inverter portion 30c. In addition, the stacked portion 40d is formed by the smoothing capacitor 20d and the inverter portion 30d.
[0038] Here, in the present embodiment, the stacking unit 40 including the smoothing capacitor 20 and the inverter unit 30 is connected in series with each other on the output side of the inverter unit 30. Specifically, the output side of the inverter unit 30a of the stacking unit 40a and the output side of the inverter unit 30b of the stacking unit 40b are electrically connected in series. In addition, the output side of the inverter unit 30c of the stacking unit 40c and the output side of the inverter unit 30d of the stacking unit 40d are electrically connected in series.
[0039] Specifically, the connection point between the semiconductor switch element 31c and the semiconductor switch element 31d of the inverter section 30a is electrically connected to the connection point between the semiconductor switch element 31a and the semiconductor switch element 31b of the inverter section 30b. In addition, the connection point between the semiconductor switch element 31c and the semiconductor switch element 31d of the inverter section 30c is electrically connected to the connection point between the semiconductor switch element 31a and the semiconductor switch element 31b of the inverter section 30d.
[0040] (Schematic Structure of Power Converter)
[0041] Next, refer to Figure 2 The schematic structure of the power conversion device 100 will be described.
[0042] like Figure 2 As shown, in the power conversion device 100, two stacking parts 40 (stack 40a and stack 40b) are arranged in a housing 50 in a manner of being arranged in the up-down direction (Z direction). In addition, the stacking part 40a and the stacking part 40b are arranged on the lower side (Z2 side) and the upper side (Z1 side) of the housing 50, respectively. In addition, the arrangement structure of the stacking part 40c and the stacking part 40d is substantially the same as the arrangement structure of the stacking part 40a and the stacking part 40b. Figure 2 This is not shown in the figure.
[0043] In the following description, the up-down direction, left-right direction, and front-back direction of the housing 50 are referred to as the Z direction, the X direction, and the Y direction, respectively. In addition, the upper direction (upper side), the lower direction (lower side), the left side, the right side, the front side, and the rear side are referred to as the Z1 direction (Z1 side), the Z2 direction (Z2 side), the X1 side, the X2 side, the Y1 side, and the Y2 side, respectively. In addition, the Z direction and the Y direction are examples of the “first direction” and the “second direction” of the technical solution of the present invention, respectively.
[0044] (Structure of stacking section)
[0045] Next, refer to Figure 3 to Figure 6 The structure of the stacking section 40 will be described. Figure 3 to Figure 6 In the stacking section 40, the Figure 2 The arrangement (direction) of the stacking portion 40a shown will be described.
[0046] like Figure 3 and Figure 4 As shown in FIG. 1 , the smoothing capacitor 20 is composed of a film capacitor having a substantially rectangular parallelepiped shape. Figure 4As shown, the smoothing capacitor 20 includes a terminal arrangement surface 22 on which the terminals 21 of the smoothing capacitor 20 are arranged in a straight line. The terminal arrangement surface 22 is a surface on the Z1 side of the smoothing capacitor 20. In addition, the terminal 21 includes a positive terminal 21p and a negative terminal 21n. The positive terminal 21p and the negative terminal 21n are alternately arranged along the Y direction on the terminal arrangement surface 22.
[0047] The semiconductor element 32 includes a positive terminal 32p, a negative terminal 32n, and an output terminal 32o, which are arranged in this order from the Z1 side toward the Z2 side.
[0048] The semiconductor components 32 are arranged along the side surface 23 of the smoothing capacitor 20 intersecting the terminal arrangement surface 22, and the side surface 23 is line-symmetrical with respect to the terminal 21 arranged in a straight line. In addition, a plurality of semiconductor components 32 are arranged on the side surface 23 along the Y direction. Specifically, for example, six parallel (six) semiconductor components 32a of the plurality of semiconductor components 32 are arranged along the Y direction on the side surface 23a on the X2 side of the smoothing capacitor 20. In addition, as Figure 5 As shown, six (six) parallel semiconductor components 32b are arranged along the Y direction on the side surface 23b on the X1 side of the smoothing capacitor 20. In addition, the semiconductor component 32 is arranged in such a manner that the surface of the semiconductor component 32 (the surface provided with the positive terminal 32p, the negative terminal 32n, and the output terminal 32o) is along the side surface 23.
[0049] In addition, if Figure 4 As shown, the semiconductor component 32 is arranged near the terminal arrangement surface 22 in the Z direction. Specifically, the semiconductor component 32 is arranged at a position closer to the Z1 side than the center C of the side surface 23 in the Z direction. As a result, the distance between the positive terminal 32p of the semiconductor component 32 and the positive terminal 21p of the smoothing capacitor 20 can be made relatively small. In addition, the distance between the negative terminal 32n of the semiconductor component 32 and the negative terminal 21n of the smoothing capacitor 20 can be made relatively small. As a result, the inductance of the bus bar 60 (described later) connecting the positive terminal 32p of the semiconductor component 32 and the positive terminal 21p of the smoothing capacitor 20 and the inductance of the bus bar 60 (described later) connecting the negative terminal 32n of the semiconductor component 32 and the negative terminal 21n of the smoothing capacitor 20 can be reduced.
[0050] In addition, if Figure 5As shown, the height position h1 of the semiconductor component 32a disposed on the side surface 23a on the X2 side relative to the terminal 21 of the smoothing capacitor 20 and the height position h2 of the semiconductor component 32b disposed on the side surface 23b on the X1 side relative to the terminal 21 of the smoothing capacitor 20 relative to the smoothing capacitor 20 are substantially equal. Specifically, the height position h1 of the end portion on the Z1 side of the semiconductor component 32a and the height position h2 of the end portion on the Z1 side of the semiconductor component 32b are substantially equal. In addition, the height positions h1 of the six semiconductor components 32a are equal to each other. In addition, the height positions h2 of the six semiconductor components 32b are equal to each other.
[0051] In addition, if Figure 3 As shown, the stacking portion 40 is provided with bus bars 60 (positive side bus bar 61 and negative side bus bar 62) for connecting the smoothing capacitor 20 and the semiconductor component 32. The positive side bus bar 61 is electrically connected to the positive side terminal 32p of the semiconductor component 32 and the positive side terminal 21p of the smoothing capacitor 20. The negative side bus bar 62 is electrically connected to the negative side terminal 32n of the semiconductor component 32 and the negative side terminal 21n of the smoothing capacitor 20. In addition, the bus bar 60 is an example of the "intra-unit connection portion" of the technical solution of the present invention.
[0052] Here, in the power conversion device 100, the plurality of semiconductor components 32 are arranged on both the side surface 23a on the X2 side relative to the terminal configuration surface 22 and the side surface 23b on the X1 side relative to the terminal configuration surface 22 in such a manner that the impedance (each impedance) between each semiconductor component 32 in the plurality of semiconductor components 32 and the smoothing capacitor 20 is approximately equal.
[0053] Specifically, if Figure 5 As shown in FIG. 1 , the distance L1 (denoted by Figure 5 The distance L11 between the negative terminal 32n of the semiconductor component 32a and the terminal 21 of the smoothing capacitor 20 on the negative side bus bar 62 is substantially equal to the distance L12 between the negative terminal 32n of the semiconductor component 32b and the terminal 21 of the smoothing capacitor 20 on the negative side bus bar 62. Thus, the impedance (each impedance) between each of the plurality of semiconductor components 32 and the smoothing capacitor 20 can be substantially equal, so that the current flowing between the semiconductor component 32 and the smoothing capacitor 20 can be stabilized.
[0054] In addition, in the power conversion device 100, if Figure 4 As shown in FIG. 1 , the positive side bus bar 61 and the negative side bus bar 62 are respectively provided to be common to the plurality of semiconductor components 32. Figure 5 As shown, the positive side bus bar 61 and the negative side bus bar 62 have a roughly U-shaped area covering the terminal configuration surface 22 and the side surface 23a and the side surface 23b on both sides of the smoothing capacitor 20. Specifically, the positive side bus bar 61 and the negative side bus bar 62 are stacked in the order of the positive side bus bar 61 and the negative side bus bar 62 with respect to the smoothing capacitor 20. That is, the roughly U-shaped positive side bus bar 61 is arranged inside the roughly U-shaped negative side bus bar 62. In addition, the positive side bus bar 61 and the negative side bus bar 62 are each formed by bending one metal plate. As a result, compared with the case where the bus bar 60 is formed by connecting a plurality of metal plates, it is possible to seek a lower inductance of the bus bar 60.
[0055] In addition, if Figure 6 As shown, insulating paper 70 is disposed between the positive bus bar 61 and the negative bus bar 62. The insulating paper 70 is provided in a plurality of overlapping sheets. That is, the bus bar 60 is a bus bar of a laminated structure in which a conductive layer and an insulating layer are overlapped.
[0056] In addition, if Figure 5 As shown, the positive side bus bar 61 includes a first portion 61a extending along the X direction and a second portion 61b extending from both ends of the first portion 61a in the X direction toward the Z2 side. In addition, the negative side bus bar 62 includes a first portion 62a extending along the X direction and a second portion 62b extending from both ends of the first portion 62a in the X direction toward the Z2 side. In addition, the length L21 of the first portion 61a of the positive side bus bar 61 in the X direction is smaller than the length L22 of the first portion 62a of the negative side bus bar 62 in the X direction. In addition, the length L31 of the second portion 61b of the positive side bus bar 61 in the Z direction is smaller than the length L32 of the second portion 62b of the negative side bus bar 62 in the Z direction.
[0057] The positive side bus bar 61 has a leg 61c connected to the positive side terminal 32p of the semiconductor component 32a and the positive side terminal 32p of the semiconductor component 32b. In addition, the negative side bus bar 62 has a leg 62c connected to the negative side terminal 32n of the semiconductor component 32a and the negative side terminal 32n of the semiconductor component 32b. The leg 61c of the positive side bus bar 61 is connected to the positive side terminal 32p of the semiconductor component 32 by a screw 71. In addition, the leg 62c of the negative side bus bar 62 is connected to the negative side terminal 32n of the semiconductor component 32 by a screw 71. In addition, the leg 61c and the leg 62c are arranged along the X direction. In addition, the length L41 of the leg 61c of the positive side bus bar 61 in the X direction is smaller than the length L42 of the leg 62c of the negative side bus bar 62 in the X direction.
[0058] The interval D1 between the first portion 61a of the positive side bus bar 61 and the first portion 62a of the negative side bus bar 62 in the Z direction is relatively small. In addition, the interval D2 between the second portion 61b of the positive side bus bar 61 and the second portion 62b of the negative side bus bar 62 in the X direction is relatively small. On the other hand, the interval D3 between the leg portion 61c of the positive side bus bar 61 and the leg portion 62c of the negative side bus bar 62 in the Z direction is relatively large. However, the portion of the entire area of the positive side bus bar 61 that has a relatively large interval with the negative side bus bar 62 is only the leg portion 61c (only a relatively small area). Therefore, the leg portion 61c (leg portion 62c) has little influence on the effect of low inductance of the bus bar 60 (positive side bus bar 61 and negative side bus bar 62) achieved by stacking the positive side bus bar 61 and the negative side bus bar 62 with the insulating paper 70 sandwiched therebetween.
[0059] In addition, if Figure 6 As shown, a plurality of holes 61d are provided in the positive side bus bar 61. In addition, a plurality of holes 62d are provided in the negative side bus bar 62. In addition, a plurality of holes 70a are provided in the insulating paper 70. And, the screw member 71 is screwed to the positive side terminal 21p of the smoothing capacitor 20 from the Z1 side via the hole portion 62d of the negative side bus bar 62, the hole portion 70a of the insulating paper 70, and the positive side bus bar 61. Thus, the positive side bus bar 61 is connected to the positive side terminal 21p of the smoothing capacitor 20. In addition, the screw member 71 is screwed to the negative side terminal 21n of the smoothing capacitor 20 from the Z1 side via the hole portion 70a of the insulating paper 70, and the hole portion 61d of the positive side bus bar 61. Thus, the negative side bus bar 62 is connected to the negative side terminal 21n of the smoothing capacitor 20.
[0060] (Structure between multiple stacked parts)
[0061] Next, refer to Figure 7 and Figure 8The structure between the plurality of stacked sections 40 of the power conversion device 100 will be described.
[0062] like Figure 7 As shown, in this embodiment, each of the plurality of stacked portions 40 includes a bus bar 60 that connects the smoothing capacitor 20 and the semiconductor element 32. The bus bars 60 are configured so that the inductances between the smoothing capacitor 20 and the semiconductor element 32 are substantially equal to each other.
[0063] In detail, Figure 7 and Figure 8 As shown, the bus bar 60 of the stacking section 40a and the bus bar 60 of the stacking section 40b are configured to be substantially symmetrical with respect to a center plane 90 between the stacking section 40a and the stacking section 40b that is orthogonal to the Z direction. That is, in the power conversion device 100, the structures within the plurality of stacking sections 40 (stacking sections 40a to 40d) (the shapes of the components within the stacking section 40 and the relative arrangements between the components within the stacking section 40) are configured to be substantially equal to each other.
[0064] Specifically, if Figure 7 As shown, in the power conversion device 100, the stacking part 40a and the stacking part 40b are arranged in such a manner that the terminal arrangement surface 22 of the stacking part 40a and the terminal arrangement surface 22 of the stacking part 40b face each other. That is, the stacking part 40a is arranged on the lower side (Z2 side) of the housing 50 in such a manner that the terminal arrangement surface 22 becomes the upper side (Z1 side). In addition, the stacking part 40b is arranged on the upper side of the housing 50 in such a manner that the terminal arrangement surface 22 becomes the lower side.
[0065] Accordingly, the first portion 61a (first portion 62a) of the positive side bus bar 61 (negative side bus bar 62) of the stack portion 40a is arranged on the upper side (Z1 side) of the stack portion 40a. In addition, the first portion 61a (first portion 62a) of the positive side bus bar 61 (negative side bus bar 62) of the stack portion 40b is arranged on the lower side (Z2 side) of the stack portion 40b.
[0066] In addition, the semiconductor components 32 of the stacking portion 40a are arranged in a plurality on the side surface 23 in the Y direction orthogonal to the Z direction. In addition, the semiconductor components 32 of the stacking portion 40b are arranged in a plurality on the side surface 23 in the Y direction orthogonal to the Z direction in a manner corresponding to each of the plurality of semiconductor components 32 of the stacking portion 40a.
[0067] Here, in this embodiment, if Figure 8As shown, the power conversion device 100 includes a bus bar 80 that connects the semiconductor components 32 of the stack 40a and the semiconductor components 32 of the stack 40b. The bus bar 80 is an example of an "inter-unit connection portion" in the technical aspects of the present invention.
[0068] Specifically, the bus bar 80 has a shape that is substantially symmetrical with respect to a center line 91 of the bus bar 80 in the Y direction along the Z direction. The bus bar 80 includes a first portion 81 provided on the stacking portion 40a side, a second portion 82 provided on the stacking portion 40b side, and a third portion 83 provided to connect the first portion 81 and the second portion 82.
[0069] Specifically, the first portion 81 is provided at a position corresponding to the plurality of semiconductor components 32 of the stacking portion 40a so as to extend in the Y direction. In addition, the second portion 82 is provided at a position corresponding to the plurality of semiconductor components 32 of the stacking portion 40b so as to extend in the Y direction. In addition, the third portion 83 is provided so as to extend in the Z direction so as to connect the first portion 81 and the second portion 82.
[0070] The first part 81, the second part 82, and the third part 83 are provided independently of each other, and are fastened by bolts and nuts between the first part 81 and the third part 83 and between the second part 82 and the third part 83. In addition, the third part 83 is arranged substantially in the center of the first part 81 and the second part 82 in the Y direction.
[0071] In addition, in the present embodiment, the bus bar 80 includes a through hole 80a. Specifically, the through hole 80a formed in a slit shape extending in the Y direction is provided in the approximate center of the first portion 81 and the approximate center of the second portion 82. In addition, the length of the through hole 80a in the Y direction is greater than the length of the third portion 83 in the Y direction.
[0072] (Effects of Embodiments)
[0073] In this embodiment, the following effects can be obtained.
[0074] In the present embodiment, as described above, a plurality of stacking units 40 including the smoothing capacitor 20 and the inverter unit 30 are provided on the output side of the inverter unit 30 in a manner connected in series with each other. As a result, the voltage of the connected plurality of inverter units 30 as a whole becomes the sum of the voltages of the respective inverter units 30 in the plurality of inverter units 30 connected in series, so that the voltage output from the power conversion device 100 can be increased (high voltage) without increasing the current flowing in the inverter unit 30. In addition, since the current flowing in the inverter unit 30 is not increased, it is not necessary to thicken the conductor (enlarge the power conversion device 100) as in the case where the plurality of inverter units 30 are connected in parallel. In addition, since the heat loss lost as heat energy in the resistor (conductor) does not depend on the magnitude of the voltage, even if the voltage of the inverter unit 30 as a whole increases, the energy loss (power transmission loss) does not increase. As a result, it is possible to suppress the enlargement of the power conversion device 100 and the increase of the power transmission loss and to increase the capacity of the power that can be supplied.
[0075] In addition, in the present embodiment, as described above, each of the plurality of stacked units 40 is configured to include the bus bar 60 that connects the smoothing capacitor 20 and the semiconductor element 32. Furthermore, the bus bar 60 of each of the plurality of stacked units 40 is configured so that the inductance between the smoothing capacitor 20 and the semiconductor element 32 is substantially equal to each other. Thus, the inductance between the smoothing capacitor 20 and the semiconductor element 32 is substantially equal to each other among the plurality of stacked units 40, and thus, it is possible to suppress the increase in the difference in surge voltage among the plurality of stacked units 40. As a result, in each inverter unit 30 connected in series, it is possible to suppress the failure of the power conversion device 100 caused by the surge voltage.
[0076] In addition, in the present embodiment, as described above, the stacking section 40 is configured to include the stacking section 40a (stacking section 40c) and the stacking section 40b (stacking section 40d) which are connected in series and arranged in a row in the Z direction. Furthermore, the structure in the stacking section 40a (stacking section 40c) and the structure in the stacking section 40b (stacking section 40d) are configured to be substantially symmetrical with respect to the central plane 90 which is the center between the stacking section 40a (stacking section 40c) and the stacking section 40b (stacking section 40d) which is orthogonal to the Z direction. As a result, the bus bar 60 of the stacking section 40a (stacking section 40c) and the bus bar 60 of the stacking section 40b (stacking section 40d) have substantially the same shape, so that a structure in which the inductance between the smoothing capacitor 20 and the semiconductor element 32 is substantially equal can be easily realized between the stacking section 40a (stacking section 40c) and the stacking section 40b (stacking section 40d). In addition, in each stacking section 40a (stacking section 40c) and each stacking section 40b (stacking section 40d), components other than the bus bar 60 also become approximately the same shape, thereby preventing the current flowing between the stacking sections 40a (stacking section 40c) and the stacking sections 40b (stacking section 40d) connected in series from becoming electrically unbalanced.
[0077] In addition, in the present embodiment, as described above, the smoothing capacitor 20 of each of the stacking portion 40a (stacking portion 40c) and the stacking portion 40b (stacking portion 40d) is configured to have a substantially rectangular parallelepiped shape including the terminal arrangement surface 22 on which the terminals 21 of the smoothing capacitor 20 are arranged. In addition, the semiconductor components 32 of each of the stacking portion 40a (stacking portion 40c) and the stacking portion 40b (stacking portion 40d) are arranged along the side surface 23 intersecting the terminal arrangement surface 22. And the stacking portion 40a (stacking portion 40c) and the stacking portion 40b (stacking portion 40d) are arranged so that the terminal arrangement surface 22 of the stacking portion 40a (stacking portion 40c) and the terminal arrangement surface 22 of the stacking portion 40b (stacking portion 40d) face each other. Thus, since the stacking portion 40a (stacked portion 40c) and the stacking portion 40b (stacked portion 40d) are arranged in a manner such that the terminal configuration surface 22 of the stacking portion 40a (stacked portion 40c) and the terminal configuration surface 22 of the stacking portion 40b (stacked portion 40d) are opposite to each other, the bus bar 60 connected to the terminal 21 of the smoothing capacitor 20 arranged on the terminal configuration surface 22 of the stacking portion 40a (stacked portion 40c) and the bus bar 60 connected to the terminal 21 of the smoothing capacitor 20 arranged on the terminal configuration surface 22 of the stacking portion 40b (stacked portion 40d) can be arranged relatively close. Therefore, when the distance between the smoothing capacitor 20 and the semiconductor element 32 on the bus bar 60 is reduced in each stacking portion 40a (stacking portion 40c) and each stacking portion 40b (stacking portion 40d) in order to reduce the inductance between the smoothing capacitor 20 and the semiconductor element 32, the semiconductor element 32 of the stacking portion 40a (stacking portion 40c) and the semiconductor element 32 of the stacking portion 40b (stacking portion 40d) can be arranged relatively close. As a result, it is possible to suppress the connection distance when connecting the stacking portion 40a (stacking portion 40c) and the stacking portion 40b (stacking portion 40d) from becoming larger, so that the inductance between the smoothing capacitor 20 and the semiconductor element 32 can be reduced, and the inductance in the member (bus bar 80) connecting the stacking portions 40 can also be reduced. In addition, in each stacking portion 40a (stacking portion 40c) and each stacking portion 40b (stacking portion 40d), the semiconductor component 32 can be arranged along a side surface 23 (a surface different from the terminal configuration surface 22) that intersects the terminal configuration surface 22 on which the terminals 21 of the smoothing capacitor 20 are arranged. As a result, compared with a case where the semiconductor component 32 is arranged along a surface (terminal configuration surface 22) on which the terminals 21 of the smoothing capacitor 20 are arranged, the space around the smoothing capacitor 20 having a substantially rectangular shape can be effectively used for arranging components.
[0078] In addition, in the present embodiment, as described above, the power conversion device 100 is configured to include the bus bar 80 that connects the semiconductor components 32 of the stacking section 40a (stacking section 40c) and the semiconductor components 32 of the stacking section 40b (stacking section 40d). In addition, a plurality of semiconductor components 32 of the stacking section 40a (stacking section 40c) are arranged in the Y direction orthogonal to the Z direction on the side surface 23 intersecting the terminal arrangement surface 22. In addition, a plurality of semiconductor components 32 of the stacking section 40b (stacking section 40d) are arranged in the Y direction orthogonal to the Z direction on the side surface 23 intersecting the terminal arrangement surface 22 in a manner corresponding to each of the plurality of semiconductor components 32 of the stacking section 40a (stacking section 40c). Thus, the plurality of semiconductor components 32 provided in the stacking portion 40a (stacking portion 40c) and the plurality of semiconductor components 32 provided in the stacking portion 40b (stacking portion 40d) are arranged along the Y direction in a manner corresponding to each other, thereby simplifying the shape of the bus bar 80 connecting the semiconductor components 32 of the stacking portion 40a (stacking portion 40c) and the semiconductor components 32 of the stacking portion 40b (stacking portion 40d).
[0079] In addition, in the present embodiment, as described above, the bus bar 80 is configured to include the through hole 80a. Thus, the through hole 80a can be used to adjust the length of the current path from each of the plurality of semiconductor components 32 (arranged in the Y direction) of the stacked portion 40 to be smaller. As a result, it is possible to suppress the increase in the electrical imbalance of the current flowing from each of the plurality of semiconductor components 32 of the stacked portion 40.
[0080] In addition, in the present embodiment, as described above, the bus bar 80 is configured to have a substantially symmetrical shape with respect to the center line 91 of the bus bar 80 in the Y direction along the Z direction. As a result, the length of the current path from each of the plurality of semiconductor switch element portions of the stacked portion 40 can be made substantially equal on one side (Y1 side) and the other side (Y2 side) in the Y direction with the center line 91 as the center, thereby suppressing the increase of electrical imbalance of the current flowing from each of the plurality of semiconductor components 32 of the stacked portion 40.
[0081] In addition, in the present embodiment, as described above, the bus bar 80 is configured to include the first portion 81, the second portion 82, and the third portion 83. The first portion 81 is provided at a position corresponding to the plurality of semiconductor components 32 of the stacking portion 40a so as to extend in the Y direction. The second portion 82 is provided at a position corresponding to the plurality of semiconductor components 32 of the stacking portion 40b so as to extend in the Y direction. The third portion 83 is provided independently of the first portion 81 and the second portion 82 so as to extend in the Z direction, and is provided to connect the first portion 81 and the second portion 82. Thus, the third part 83 is independently provided relative to the first part 81 provided in the stacking part 40a (stacking part 40c) and the second part 82 provided in the stacking part 40b (stacking part 40d). Therefore, by treating the first part 81 and the second part 82 as units connected to the stacking part 40a and the stacking part 40b respectively and treating the third part 83 as a connecting part connecting the units to each other, the operability during assembly and maintenance of the power conversion device 100 can be improved.
[0082] [Modifications]
[0083] The embodiments disclosed herein are illustrative in all respects and are not restrictive. The scope of the present invention is indicated by the claims, not by the description of the embodiments described above, and includes all modifications (variations) within the meaning and scope equivalent to the claims.
[0084] For example, in the above embodiment, the bus bar 80 is configured to include the first portion 81 provided at a position corresponding to the plurality of semiconductor components 32 of the stacking portion 40a (stacked portion 40c), the second portion 82 provided at a position corresponding to the plurality of semiconductor components 32 of the stacking portion 40b (stacked portion 40d), and the third portion 83 provided independently of the first portion 81 and the second portion 82 and provided to connect the first portion and the second portion, but the present invention is not limited thereto. In the present invention, it is also possible to configure the "inter-unit connection portion" to be a single member provided by the first portion, the second portion, and the third portion being integrally provided.
[0085] In addition, in the above embodiment, an example is shown in which the bus bar 80 is configured to include the through hole 80a, but the present invention is not limited to this. In the present invention, the "inter-unit connection portion" may be configured to include a notch instead of a through hole. In addition, the "inter-unit connection portion" may be configured to include both a through hole and a notch.
[0086] In addition, in the above-mentioned embodiment, an example is shown in which a plurality of semiconductor components 32 of the stacking portion 40a (stacked portion 40c) are arranged in the Y direction and a plurality of semiconductor components 32 of the stacking portion 40b (stacked portion 40d) are arranged in the Y direction in a manner corresponding to each of the plurality of semiconductor components 32 of the stacking portion 40a (stacked portion 40c), but the present invention is not limited thereto. In the present invention, the "semiconductor switch element portion" of the "first circuit unit" and the "semiconductor switch element portion" of the "second circuit unit" may be configured to be arranged in a plurality in different directions.
[0087] In addition, in the above-mentioned embodiment, the smoothing capacitor 20 of each of the stacking part 40a (stacking part 40c) and the stacking part 40b (stacking part 40d) is configured to have a substantially rectangular parallelepiped shape including the terminal arrangement surface 22 for arranging the terminal 21 of the smoothing capacitor 20, and the stacking part 40a (stacking part 40c) and the stacking part 40b (stacking part 40d) are arranged in such a manner that the terminal arrangement surface 22 of the stacking part 40a (stacking part 40c) and the terminal arrangement surface 22 of the stacking part 40b (stacking part 40d) are opposite to each other, but the present invention is not limited to this. In the present invention, the "first circuit unit" and the "second circuit unit" may also be arranged in such a manner that the terminal arrangement surface of the "first circuit unit" and the terminal arrangement surface of the "second circuit unit" are not opposite to each other.
[0088] In addition, in the above-mentioned embodiment, the smoothing capacitor 20 of each stacking part 40a (stacking part 40c) and stacking part 40b (stacking part 40d) is configured to have a substantially rectangular parallelepiped shape including the terminal arrangement surface 22 where the terminals 21 of the smoothing capacitor 20 are arranged, and the semiconductor components 32 of each stacking part 40a (stacking part 40c) and stacking part 40b (stacking part 40d) are arranged along the side surface 23 intersecting with the terminal arrangement surface 22, but the present invention is not limited to this. In the present invention, the "semiconductor switching element part" of each of the "first circuit unit" and the "second circuit unit" may be arranged along a surface other than the side surface intersecting with the terminal arrangement surface such as the terminal arrangement surface where the terminals of the smoothing capacitor are arranged.
[0089] In addition, in the above-mentioned embodiment, an example is shown in which the stacking section 40 is configured to include two stacking sections 40 (stacked section 40a (stacked section 40c) and stacked section 40b (stacked section 40d)) connected in series with each other and arranged in a manner along the Z direction, but the present invention is not limited to this. In the present invention, the "circuit unit" may also be configured to include three or more "circuit units" connected in series with each other and arranged in a manner along the Z direction.
[0090] For example, in the above-mentioned embodiment, an example is shown in which the stacking portion 40a (stacked portion 40c) and the stacking portion 40b (stacked portion 40d) are configured to be approximately symmetrical with respect to the central plane 90 between the stacking portion 40a (stacked portion 40c) and the stacking portion 40b (stacked portion 40d) which is orthogonal to the Z direction, but the present invention is not limited to this. In the present invention, the "first circuit unit" and the "second circuit unit" may be configured to be approximately symmetrical with respect to the plane other than the central plane between the "first circuit unit" and the "second circuit unit". In addition, the "first circuit unit" and the "second circuit unit" may be configured in an asymmetrical manner. In this case, it is desirable to configure the "first circuit unit" and the "second circuit unit" so that the inductance between the smoothing capacitor and the "semiconductor switch element unit" is approximately equal to each other.
Claims
1. A power conversion device, wherein: The power conversion device has: a smoothing capacitor connected to an output side of a rectifying circuit that rectifies an AC voltage; and an inverter unit including a semiconductor switch element unit having a plurality of semiconductor switch elements, wherein the DC voltage smoothed by the smoothing capacitor is converted into an AC voltage by switching of the semiconductor switch elements, A plurality of circuit units including the smoothing capacitor and the inverter unit are provided on the output side of the inverter unit in a manner connected in series with each other. The power conversion device is characterized in that Each of the plurality of circuit units includes an intra-unit connection portion that connects the smoothing capacitor and the semiconductor switch element portion. The internal connection portions of each of the plurality of circuit units that are connected in series and arranged in a manner along the first direction are constructed to be symmetrical with respect to a central plane that is orthogonal to the first direction and is the center between the plurality of circuit units that are connected in series and arranged in a manner along the first direction.
2. The power conversion device according to claim 1, wherein: The intra-unit connection portion of each of the plurality of circuit units connected in series and arranged in line along the first direction is configured such that the inductances between the smoothing capacitor and the semiconductor switch element portion are equal to each other.
3. The power conversion device according to claim 1 or 2, wherein: The circuit unit includes a first circuit unit and a second circuit unit which are connected in series and arranged in a first direction. The structure in the first circuit unit and the structure in the second circuit unit are configured to be symmetrical with respect to a center plane that is perpendicular to the first direction and is located between the first circuit unit and the second circuit unit.
4. The power conversion device according to claim 3, wherein: The smoothing capacitor of each of the first circuit unit and the second circuit unit has a rectangular parallelepiped shape including a terminal arrangement surface on which terminals of the smoothing capacitor are arranged. The semiconductor switch element portion of each of the first circuit unit and the second circuit unit is arranged along a side surface intersecting the terminal arrangement surface. The first circuit unit and the second circuit unit are arranged such that the terminal arrangement surface of the first circuit unit and the terminal arrangement surface of the second circuit unit face each other.
5. The power conversion device according to claim 4, wherein: The power conversion device further includes an inter-unit connection portion that connects the semiconductor switch element portion of the first circuit unit and the semiconductor switch element portion of the second circuit unit. The semiconductor switch element portion of the first circuit unit is provided in plurality on the side surface so as to be arranged in a second direction orthogonal to the first direction. A plurality of the semiconductor switch element portions of the second circuit unit are arranged on the side surface along the second direction orthogonal to the first direction so as to correspond to each of the plurality of semiconductor switch element portions of the first circuit unit.
6. The power conversion device according to claim 5, wherein: The inter-cell connection portion includes at least any one of a notch and a through hole.
7. The power conversion device according to claim 5 or 6, wherein: The inter-unit connecting portion has a shape that is symmetrical with respect to a center line of the inter-unit connecting portion in the second direction along the first direction.
8. The power conversion device according to claim 5, wherein: The inter-unit connection portion comprises: a first portion provided at a position corresponding to the plurality of semiconductor switch element portions of the first circuit unit in a manner extending along the second direction; a second portion provided at a position corresponding to the plurality of semiconductor switch element portions of the second circuit unit in a manner extending along the second direction; as well as The third portion is provided independently of the first portion and the second portion so as to extend in the first direction, and is provided to connect the first portion and the second portion.
Citation Information
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