Frequency oscillator with integrated FM mode switching power supply soft start function

Abstract

The present invention discloses a frequency oscillator with an integrated frequency modulation mode switch power supply slow start function, the slow start circuit comprises three groups of current sources IFstart, IFmin, IFb connected in parallel with an input DC voltage VDD, an oscillation capacitor CF connected at one end to the other end of the three groups of current sources and grounded at the other end, an operational amplifier U1 connected at the positive input end to the other end of the three groups of current sources, a resistor R1 and a switch K connected in series and then connected in parallel with CF, and a controlled variable reference voltage Vref connected at the positive pole to the negative input end of the operational amplifier U1 and grounded at the negative pole, wherein the output terminal level V2 of U1 controls the on-off of the switch K and the level of the controlled variable reference voltage Vref. Through the above scheme, the present invention achieves the purpose of using only a small number of components to realize a frequency oscillator circuit with frequency upper and lower limit locking and frequency modulation mode switch power supply startup slow start function, avoiding the impact of startup energy on the power supply, and has high practical value and promotion value.

Description

Technical Field

[0001] The invention belongs to the technical field of switch power supply control, and in particular relates to a frequency oscillator with a slow start function of an integrated frequency modulation mode switch power supply. Background Art

[0002] The control technology of switching power supplies is generally divided into two categories: PWM (Pulse-Width-Modulation) pulse width modulation and PFM (Pulse-Width-Modulation) pulse frequency modulation. The PWM pulse width modulation mode uses the switching pulse frequency to remain unchanged and the pulse duty cycle to change to complete the output voltage regulation; the PFM pulse frequency modulation mode uses the switching pulse duty cycle to remain unchanged and the switching frequency to change to complete the output voltage regulation. In order for the PFM mode switching power supply to work properly, usually only a small part of the switching frequency frequency variation range is the normal working range of the power supply. If this range is exceeded, the power supply will fail or even be damaged. Therefore, it is necessary to limit the upper and lower limits of the switching frequency, and then the power supply determines a specific switching frequency point value within this range through the output voltage sampling feedback circuit.

[0003] With a traditional analog control power supply, two frequency oscillators are used to generate minimum and maximum frequency signals. The output sampling feedback determines the generated switching frequency signal and compares it with these two signals in each switching cycle to prevent the switching frequency from exceeding the normal operating range. The power supply requires two oscillators to generate frequency signals and a frequency operational amplifier for comparison, which wastes resources.

[0004] Take the most commonly used LLC circuit of PFM mode as an example. When the power supply is turned on, if the power supply adopts a closed-loop non-slow-start mode, due to the large gap between the output voltage starting value and the set target voltage value, the sampling feedback circuit is saturated, and the controller outputs the minimum frequency PFM pulse signal. At this time, the LLC resonant cavity impedance is very small, the DC gain is very large, and the filter capacitor of the subsequent stage is basically in a short-circuit state in the initial stage of startup, which will cause a large current impact. At this time, a slow-start circuit should be used for startup control to avoid excessive startup energy causing circuit damage. Traditional slow-start technology also uses the function of feedback reference voltage slow start, but in the LLC startup process, although the feedback reference voltage rises very slowly, the system will still start at the lowest frequency, which will still cause a large impact. Therefore, how to solve the deficiencies in the prior art is a problem that technicians in this field need to solve urgently. Summary of the invention

[0005] The purpose of the present invention is to provide a frequency oscillator with an integrated frequency modulation mode switching power supply soft start function, which mainly solves the problem that the frequency oscillator and the upper and lower frequency limit locking circuits in the prior art are relatively complex to implement, and the startup energy easily causes impact on the power supply when using a closed-loop non-soft start or a feedback reference voltage soft start.

[0006] In order to achieve the above object, the technical solution adopted by the present invention is as follows:

[0007] The frequency oscillator with integrated frequency modulation mode switching power supply slow start function comprises three groups of current sources IFstart, IFmin and IFb connected in parallel with VDD at one end, an oscillation capacitor CF connected at one end to the other end of the three groups of current sources and grounded at the other end, an operational amplifier U1 connected at the positive input end to the other end of the three groups of current sources, a resistor R1 and a switch K connected in series with one end connected to the positive input end of the operational amplifier U1 and grounded at the other end, and a controlled variable reference voltage Vref connected at the positive pole to the negative input end of the operational amplifier U1 and grounded at the negative pole, wherein the output terminal level V2 of U1 controls the on-off of the switch K and the level of the controlled variable reference voltage Vref.

[0008] Further, the current sources IFstart and IFmin include MOS transistors Q1 and Q2 whose sources are simultaneously in contact with the power supply VDD, a transistor Q5 whose collector is connected to the drain of the MOS transistor Q1 and whose base is connected to the voltage reference VrefA, a resistor Rmin whose one end is connected to the emitter of the transistor Q5 and whose other end is grounded, and a resistor Rstart and a capacitor Cstart whose one end is connected in series to the emitter of the transistor Q5 and whose other end is grounded, wherein the gates of the MOS transistors Q1 and Q2 are connected to each other, the gate of the MOS transistor Q1 is connected to its drain to form a mirror current source, and the drain of the MOS transistor Q2 is connected to the positive input terminal of the operational amplifier.

[0009] Specifically, the current source IFb includes two MOS tubes Q3 and Q4 whose sources are simultaneously in contact with the power supply VDD, a transistor Q6 whose collector is connected to the drain of the MOS tube Q3 and whose base is connected to the voltage reference VrefB, a resistor Rmax at one end connected to the emitter of the transistor Q6, a transistor output end of the photoelectric coupler U2 whose collector is connected to the other end of the resistor Rmax and whose emitter is grounded, and one end is connected to the diode input end of the photoelectric coupler U2 through a current limiting resistor R2 and provides a voltage output sampling feedback voltage Fb for it, wherein the gates of the MOS tubes Q3 and Q4 are connected to each other, the gate of the MOS tube Q3 is connected to its drain to form a mirror current source, and the drain of the MOS tube Q4 is connected to the positive input end of the operational amplifier.

[0010] Compared with the prior art, the present invention has the following beneficial effects:

[0011] (1) The present invention uses a simple circuit to build a frequency oscillator to generate a frequency signal, and integrates a feedback signal frequency generation circuit into the oscillator circuit. The natural frequency locking method limits the operating frequency of the switching power supply to between the minimum frequency and the maximum frequency, avoiding the comparison process of the frequency operational amplifier, and adopts a slow start circuit to control the startup frequency, thereby avoiding the impact of startup energy on the power supply.

[0012] (2) The present invention can complete the frequency oscillator function through an oscillation capacitor CF, and only a small number of components are needed to set upper and lower limits on the oscillation frequency. During the power-on process, a simple RC circuit is used to control the current source charging current to control the power-on oscillation frequency, thereby avoiding impact on the power supply.

[0013] (3) The slow start circuit of the present invention limits the minimum frequency output when starting up to avoid impact, and gradually reduces the minimum frequency during the slow start process, and finally completes the slow start and enters a closed-loop control state; the impact of startup energy on the power supply is avoided; at the same time, the discharge time of the oscillation capacitor CF can be adjusted by adjusting the size of the resistor R1 to control the size of the complementary pulse drive dead time. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a circuit schematic diagram of the present invention.

[0015] Figure 2 for Figure 1 Expanded circuit schematic.

[0016] Figure 3 This is a schematic diagram of the V2 voltage control driving circuit generated by the frequency oscillator of the present invention.

[0017] Figure 4 This is a simulation waveform diagram of the frequency oscillator and driving circuit of the present invention. DETAILED DESCRIPTION

[0018] The present invention is further described below in conjunction with the accompanying drawings and examples. The embodiments of the present invention include but are not limited to the following examples.

[0019] Example

[0020] like Figures 1 to 3As shown, a frequency oscillator with an integrated frequency modulation mode switching power supply slow start function comprises three groups of current sources IFstart, IFmin, and IFb connected in parallel with an input DC voltage VDD at one end, an oscillation capacitor CF connected at one end to the other ends of the three groups of current sources and grounded at the other end, an operational amplifier U1 connected at a positive input end to the other ends of the three groups of current sources, a resistor R1 and a switch K connected in series and then in parallel with CF, and a controlled variable reference voltage Vref connected at a positive pole to a negative input end of the operational amplifier U1 and grounded at a negative pole, wherein the output end of the operational amplifier U1 controls the on / off of the switch K (the switch K may be a relay switch, an optical coupler switch, a MOS tube switch, etc., and the switch form is not limited) and the level of the controlled variable reference voltage Vref, and one end of the switch K is grounded (the switch K and the resistor R1 are connected in series and their positions can be swapped).

[0021] like Figure 1 As shown, the circuit determines the oscillation frequency, that is, the switching frequency of the power supply, by charging and discharging the oscillation capacitor CF. The IFmin current source is a constant current source, which charges the oscillation capacitor CF at a fixed charging rate. This current source determines the minimum current for charging the oscillation capacitor CF, and also determines the minimum oscillation frequency of the oscillation capacitor CF, that is, the minimum switching frequency of the power supply; the IFb current source is a current source controlled by the power supply feedback signal, thereby determining the specific operating frequency of the power supply; the IFstart current source only works when the power supply is turned on, and the minimum switching frequency threshold at the time of startup is increased by the charging current from large to small and slowly released to the lowest frequency, so as to achieve the purpose of slow start. The controlled variable reference Vref has two reference values, a high reference value and a low reference value. When the circuit is in the initial state, Vref is at a high reference voltage value. When the oscillation capacitor CF starts to charge and its voltage is greater than the high reference voltage value of Vref, the output V2 of the operational amplifier U1 changes from a low level to a high level, thereby controlling the controlled variable reference voltage Vref to switch to a low reference voltage value, and controlling the switch K to close, and releasing the charge on the oscillation capacitor CF through the resistor R1. When the oscillation capacitor CF is discharged to the low reference voltage value of Vref, the output V2 of the operational amplifier U1 changes from a high level to a low level, thereby controlling the controlled variable reference voltage Vref to switch to a high reference voltage value, the relay switch K is disconnected, and the oscillation capacitor CF is charged again, completing the reciprocating process.

[0022] like Figure 2As shown, the IFmin current source and the IFstart current source are generated by the same mirror current source, and the IFb current source is generated by another set of mirror current sources. VrefA is used as a reference voltage to generate the IFmin current and the IFstart current, and VrefB is used as a reference voltage to generate the IFb current. For example, IFmin=(VrefA-Vbe) / Rmin, where Vbe is the BE junction voltage drop of the transistor, which is a constant value. When the power supply is just turned on, since there is no charge on the capacitor Cstart, it is equivalent to the resistors Rstart and Rmin being connected in parallel, so that the charging current is IFmin+IFstart, so that the actual minimum frequency threshold is greater than the minimum frequency set in the steady state. When the capacitor Cstart is charged slowly, the IFstart charging current gradually decreases, and the operating frequency threshold is then slowly and smoothly reduced until the capacitor Cstart is charged, the IFstart current is turned off, and the current source current is reduced to IFmin, that is, the minimum charging current of the oscillation capacitor CF is IFmin, and the actual minimum operating frequency is reduced to the minimum frequency set in the steady state Fmin. This avoids the controller directly outputting the minimum frequency PFM pulse signal during the startup process, causing the power supply to be impacted. The IFb current source is generated by another set of current sources. Fb is the output sampling feedback voltage of the power supply, which can be isolated by the optocoupler U2. The feedback voltage signal of the switching power supply controls the conduction degree of the transistor output pole of the optocoupler U2 to determine the size of the IFb current source, thereby determining the specific operating frequency of the power supply, and when the transistor output pole of U2 is fully turned on, the maximum current of IFb is limited by the Rmax resistor. At this time, the IFb current source current is (IFb max=(VrefB-Vbe) / Rmax), so the maximum charging current of the oscillation capacitor CF is IFmin+IFbmax, and the CF voltage oscillation operating frequency at this time is the maximum limit frequency Fmax. When the output negative feedback voltage Fb changes, the IFb current also changes, and the charging frequency of the oscillation capacitor CF changes, so that the operating frequency of the power supply also changes, but it will not exceed the upper and lower frequency thresholds, forming a closed-loop system.

[0023] like Figure 3 As shown, the U2 D flip-flop, U3 inverter, U4 AND gate and U5 AND gate form a driving circuit. The V2 voltage generated by the output of the op amp in the frequency oscillator is the pulse driving dead zone voltage, which is connected to the input of the driving circuit. V3 and V4 are complementary driving outputs. The size of the V2 voltage pulse width is the size of the dead zone time, which is controlled by the R1 discharge resistor. The conversion is performed at the high level threshold point and the low level threshold point of the VCF voltage, and the dead zone time between the two sets of complementary driving voltages is adjusted by the discharge time of the resistor R1.

[0024] like Figure 4As shown, the horizontal axis represents the time axis and the vertical axis represents the output voltage. In the simulation waveform, VCF is the voltage on the oscillation capacitor CF, which is in a back-and-forth oscillation state. V3 and V4 are complementary drive waveforms, which are alternately output under the control of the VCF voltage and are converted at the high level threshold point and the low level threshold point of the VCF voltage. The dead time between the two sets of complementary drive voltages is controlled by the V2 voltage and can be adjusted by the discharge time of the resistor R1.

[0025] The present invention can complete the frequency oscillator function through an oscillation capacitor CF and a small number of components, and set upper and lower limits on the oscillation frequency. During the power-on process, a simple RC circuit is used to control the current source charging current to control the power-on oscillation frequency, thereby avoiding impact on the power supply.

[0026] The above embodiments are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any changes made by adopting the design principles of the present invention and performing non-creative work on this basis should fall within the protection scope of the present invention.

Claims

1. A frequency oscillator with integrated frequency modulation mode switching power supply slow start function, characterized in that: It includes three groups of current sources IFstart, IFmin, and IFb, one end of which is connected in parallel to the input DC voltage VDD, an oscillating capacitor CF, one end of which is connected to the other end of the three groups of current sources and the other end of which is grounded, an operational amplifier U1 with a positive input connected to the other end of the three groups of current sources, a resistor R1 and a switch K, each of which is connected in series and then connected in parallel with CF, and a controlled variable reference voltage Vref, the positive electrode of which is connected to the negative input end of the operational amplifier U1 and the negative electrode of which is grounded, wherein the output terminal level V2 of U1 controls the on-off of the switch K and the level of the controlled variable reference voltage Vref; The current sources IFstart and IFmin include MOS transistors Q1 and Q2 whose two sources are simultaneously connected to the input DC power supply VDD, a transistor Q5 whose collector is connected to the drain of the MOS transistor Q1 and whose base is connected to the voltage reference VrefA, a resistor Rmin whose one end is connected to the emitter of the transistor Q5 and whose other end is grounded, and a resistor Rstart and a capacitor Cstart whose one end is connected in series to the emitter of the transistor Q5 and whose other end is grounded, wherein the gates of the MOS transistors Q1 and Q2 are connected to each other, the gate of the MOS transistor Q1 is connected to its drain to form a mirror current source, and the drain of the MOS transistor Q2 is connected to the positive input terminal of the operational amplifier; The current source IFb includes two MOS tubes Q3 and Q4 whose sources are simultaneously in contact with the power supply VDD, a transistor Q6 whose collector is connected to the drain of the MOS tube Q3 and whose base is connected to the voltage reference VrefB, a resistor Rmax at one end connected to the emitter of the transistor Q6, a transistor output end of the photoelectric coupler U2 whose collector is connected to the other end of the resistor Rmax and whose emitter is grounded, and one end of which is connected to the diode input end of the photoelectric coupler U2 through the current limiting resistor R2 and provides a voltage output sampling feedback voltage Fb for it, wherein the gates of the MOS tubes Q3 and Q4 are connected to each other, the gate of the MOS tube Q3 is connected to its drain to form a mirror current source, and the drain of the MOS tube Q4 is connected to the positive input end of the operational amplifier.

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