Printed Circuit Board

Abstract

The present invention provides a printed circuit board, which includes: a first insulating layer; an embedded pattern embedded in one surface of the first insulating layer; a pad formed on the one surface of the first insulating layer; and a column, wherein the center of the side surface of the column contacts the one surface of the first insulating layer.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2019-0072318 filed on June 18, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety for all purposes by reference. Technical Field

[0002] The following description relates to a printed circuit board. Background Art

[0003] The demand for multifunctional, small and thin electronic devices such as cellular phones in the field of information technology (IT) has increased. Therefore, printed circuit board structures with various types of microcircuits have been proposed. For example, a printed circuit board including a column is proposed to reduce the pitch of a bump.

[0004] However, a printed circuit board having posts has a problem in forming a fine circuit between the posts included in the printed circuit board. Summary of the invention

[0005] This summary is provided to introduce selected concepts in a simplified form, which are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0006] In one general aspect, a printed circuit board includes: a first insulating layer; an embedded pattern embedded in one surface of the first insulating layer; a pad formed on the one surface of the first insulating layer; and a column, wherein the center of a side surface of the column contacts the one surface of the first insulating layer.

[0007] A lower portion of the pillar may be embedded below the one surface of the first insulating layer, and an upper portion of the pillar may protrude from the one surface of the first insulating layer.

[0008] The printed circuit board may further include a second insulating layer formed on the first insulating layer and including a through hole, wherein the embedded pattern and the pad are exposed through the through hole.

[0009] The printed circuit board may include pads, and the embedded pattern may be arranged between the pads.

[0010] The second insulating layer may be a solder resist layer, and an opening may be formed in the solder resist layer to expose the pillar.

[0011] The printed circuit board may include posts, and the through-holes may be arranged between the posts.

[0012] The column may further include an intermediate layer between an upper portion of the column and a lower portion of the column.

[0013] A lower surface of the intermediate layer may be located on the same plane as the one surface of the first insulating layer.

[0014] The printed circuit board may further include a bottom layer interposed between the pad and the one surface of the first insulating layer.

[0015] The base layer and the intermediate layer are formed in the same layer.

[0016] Other features and aspects will be apparent from the following detailed description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a diagram illustrating a printed circuit board according to an example.

[0018] Figure 2 is a diagram illustrating a printed circuit board according to an example.

[0019] Figures 3 to 7 is a diagram illustrating a method for manufacturing a printed circuit board according to an example.

[0020] Figures 8 to 11 is a diagram illustrating a method for manufacturing a printed circuit board according to an example.

[0021] Throughout the drawings and detailed description, the same reference numerals refer to the same elements. The drawings may not be drawn to scale, and the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0022] The following specific embodiments are provided to help the reader gain a comprehensive understanding of the methods, devices and / or systems described herein. However, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be apparent after understanding the disclosure of the present application. For example, the order of operations described herein is merely an example and is not limited to the order set forth herein, but in addition to the operations that must occur in a certain order, changes that will be apparent after understanding the disclosure of the present application may be made. In addition, in order to improve clarity and brevity, the description of features known in the art may be omitted.

[0023] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein are provided only to illustrate some of the many possible ways to implement the methods, devices, and / or systems described herein that will be apparent after understanding the disclosure of the present application.

[0024] Throughout the specification, when an element such as a layer, a region, or a substrate is described as being “on”, “connected to”, or “coupled to” another element, the element may be directly “on”, “connected to”, or “coupled to” another element, or one or more other elements may be present between them. In contrast, when an element is described as being “directly on”, “directly connected to”, or “directly coupled to” another element, other elements may not be present between them.

[0025] As used herein, the term "and / or" includes any one of the associated listed items and any combination of any two or more items.

[0026] Although terms such as "first," "second," and "third" may be used herein to describe various members, components, regions, layers, or portions, these members, components, regions, layers, or portions are not limited by these terms. Rather, these terms are used only to distinguish one member, component, region, layer, or portion from another member, component, region, layer, or portion. Therefore, without departing from the teachings of the examples described herein, the first member, first component, first region, first layer, or first portion mentioned in the examples may also be referred to as the second member, second component, second region, second layer, or second portion.

[0027] For ease of description, spatially related terms such as "above," "above," "below," and "below" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. Such spatially related terms are intended to include different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as being "above" or "above" relative to another element will subsequently be located "below" or "below" relative to the other element. Therefore, the term "above" includes both "above" and "below" orientations depending on the spatial orientation of the device. The device may also be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially related terms used herein are interpreted accordingly.

[0028] The terms used herein are only used to describe various examples and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms "comprise", "include" and "have" list the existence of the stated features, quantities, operations, components, elements and / or their combinations, but do not exclude the existence or addition of one or more other features, quantities, operations, components, elements and / or their combinations.

[0029] Variations in the shapes shown in the drawings may occur due to manufacturing techniques and / or tolerances. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings but include variations in shapes that occur during manufacturing.

[0030] The features of the examples described herein can be combined in various ways that will be apparent after understanding the disclosure of the present application. In addition, although the examples described herein have various configurations, other configurations that will be apparent after understanding the disclosure of the present application are also feasible.

[0031] As used herein, expressions such as "first conductivity type" and "second conductivity type" may refer to opposite conductivity types (such as N-type conductivity type and P-type conductivity type), and examples using such expressions described herein also include supplementary examples. For example, an example in which the first conductivity type is N-type and the second conductivity type is P-type includes an example in which the first conductivity type is P-type and the second conductivity type is N-type.

[0032] Here, it should be noted that the use of the term "may" with respect to an example or embodiment (e.g., with respect to what an example or embodiment may include or implement) means that there is at least one example or embodiment that includes or implements such features, while all examples and embodiments are not limited thereto.

[0033] When an element is described as being “connected”, “coupled” or “bonded” to another element, the element should be interpreted as being directly connected, directly coupled or directly bonded to the other element, but may have another element interposed therebetween.

[0034] Hereinafter, various examples of the printed circuit board will be described separately, but it is not excluded that the description of any one embodiment can be applied to other examples. As long as the relationship is compatible, the description of any one example can be applied to other examples.

[0035] Figure 1 is a diagram illustrating a printed circuit board according to an example.

[0036] Reference Figure 1 According to an example, the printed circuit board according to the example may include a first insulating layer 12, an embedded pattern 22, a pad 24, and a pillar 26.

[0037] The insulating layer 12 can electrically insulate the circuit pattern 20 of the printed circuit board. For example, the first insulating layer 12 can be made of a resin material. The first insulating layer 12 can include a thermosetting resin such as an epoxy resin or a thermoplastic resin such as polyimide (PI), and can be formed using a prepreg (PPG) or ABF (Ajinomoto Build-up Film).

[0038] Reference Figure 1In an example of the present invention, the insulating layers 14, 16, and 18 other than the first insulating layer 12 may be laminated to form a multi-layer structure. Therefore, the circuit pattern 20 may be formed on each surface of the insulating layers 14, 16, and 18.

[0039] The embedded pattern 22 as a portion of the circuit pattern 20 formed on the first insulating layer 12 may be embedded in one surface of the first insulating layer 12 .

[0040] The circuit pattern 20 may be formed using a metal (such as copper) capable of transmitting an electrical signal. However, copper is merely an example, and other metals may be used in other examples. The circuit pattern 20 may be formed on one surface, on another surface, or inside each insulating layer. For example, the circuit pattern 20 may include a via hole connecting two surfaces of the first insulating layer 12 by penetrating the first insulating layer 12 and a pad 24 formed on one surface of the first insulating layer 12 and connected to the via hole.

[0041] Only one surface of the embedded pattern 22 may be exposed by being embedded in the first insulating layer 12. For example, the embedded pattern 22 may have a circuit structure of an embedded trace substrate (ETS) in which a fine circuit is embedded in a substrate.

[0042] Reference Figure 1 For example, the upper surface of the embedded pattern 22 may be substantially flush with one surface of the first insulating layer 12 and also exposed through the one surface of the first insulating layer 12 .

[0043] The pad 24 may be formed on one surface of the first insulating layer 12 as a part of the circuit pattern 20 formed on / in the first insulating layer 12. Therefore, the pad 24 may be provided in a protruding structure on one surface of the first insulating layer 12. The pad 24 may be connected to another pad of an electronic component or another substrate.

[0044] Reference Figure 1 For example, a lower surface of the pad 24 may be substantially flush with one surface of the first insulating layer 12 , and a via hole penetrating the first insulating layer 12 may be connected to the lower surface of the pad 24 .

[0045] The second insulating layer 14 having the through hole 15 may be formed on the first insulating layer 12 and the pad 24 , and the embedded pattern 22 in the first insulating layer 12 may be exposed through the through hole 15 of the second insulating layer 14 .

[0046] More than one pad 24 may be formed, and the embedded pattern 22 may be disposed between the pads 24. The embedded pattern 22 formed to be smaller in height than the pad 24 may thus be disposed between the protruding pads 24.

[0047] The pillar 26 is a portion of the circuit pattern 20 formed on / in the first insulating layer 12. A portion of the pillar 26 may be embedded in the first insulating layer 12, and the other portion may protrude from the first insulating layer 12. In other words, the center of the side surface of the pillar 26 may contact one surface of the first insulating layer 12.

[0048] Reference Figure 1 In the example of FIG. 1 , the lower portion 26a of the pillar 26 may be embedded under one surface of the first insulating layer 12, and the upper portion 26b may protrude from one surface of the first insulating layer 12. In this example, the upper surface of the protruding upper portion 26b of the pillar 26 may be substantially flush with the upper surface of the pad 24.

[0049] The second insulating layer 14 may be a solder resist layer. Figure 1 In the example of FIG. 5 , pillars 26 may be exposed through openings formed in the solder resist layer.

[0050] More than one pillar 26 may be formed, and the through hole 15 may be disposed between the pillars 26. Therefore, the pad 24 and the embedded pattern 22 may be disposed between the pillars 26. That is, a microcircuit such as the ETS type embedded pattern 22 may be formed between the pillars 26.

[0051] Figures 3 to 7 is a diagram illustrating a method for manufacturing a printed circuit board according to an example.

[0052] Reference Figure 3 The circuit pattern 20 may be formed on one surface of the first insulating layer 12. The circuit pattern 20 may also be formed on the other surface of the first insulating layer 12 or inside the first insulating layer 12. The circuit pattern 20 may include an embedded pattern 22. Such an embedded pattern 22 may have a circuit structure of an embedded circuit substrate in which a fine circuit is embedded in the substrate.

[0053] exist Figure 3 In the embodiment, the copper foil 3 may be formed on the outer layer of the carrier 1 having the insulating material 2 and the release layer 4. In such an example, the first insulating layer 12 and the circuit pattern 20 may be formed on the copper foil 3. For example, the embedded pattern 22 and the lower portion 26a of the pillar 26 may be formed on the copper foil 3.

[0054] Specifically, in such an example, a plating layer may be formed on the copper foil 3, and a patterning process may be performed by selective etching. The circuit pattern 20 may be formed by coating a conductive metal material onto the release layer 4 of the carrier 1 and then performing a patterning process, etc. The patterning process may be a tenting process, a modified semi-additive process (MSAP) process, a semi-additive process (SAP) process, or another suitable similar patterning process.

[0055] After the circuit pattern 20 is formed on the carrier 1, the first insulating layer 12 may be pressed and laminated to the carrier 1 so that the circuit pattern 20 is embedded in the first insulating layer 12. For example, the first insulating layer 12 may be a prepreg. Alternatively, the first insulating layer 12 in which the circuit pattern 20 is embedded may be formed by applying an insulating resin to the carrier 1. The circuit pattern 20 such as a via may be additionally formed in the first insulating layer 12 laminated on the carrier 1. In addition, another insulating layer 16 may be laminated to the first insulating layer 12 and another circuit pattern 20 may be further formed on the another insulating layer 16.

[0056] Reference Figure 4 , the first insulating layer 12 on which the circuit pattern 20 including the embedded pattern 22 and the lower portion 26a of the pillar 26 is formed can be separated from the carrier 1. At this time, the copper foil 3 can be separated from the carrier 1 by the release layer 4 so that the copper foil 3 can be bonded to one surface of the first insulating layer 12.

[0057] The embedded pattern 22 and the lower portion 26 a of the pillar 26 may be embedded in the first insulating layer 12 , and may be bonded to the copper foil 3 formed on one surface of the first insulating layer 12 .

[0058] Reference Figure 5 , a resist 30 may be formed, which may selectively expose an area other than an area where the circuit pattern 20 is to be formed by the copper foil 3. For example, the resist 30 may be formed on a portion of the copper foil 3 where the pad 24 and the upper portion 26b of the pillar 26 are to be formed.

[0059] In order to protect the circuit pattern 20 formed on the other surface of the first insulating layer 12 or on the other insulating layer 16 , the resist 30 may cover the circuit pattern 20 that has been formed.

[0060] Reference Figure 6 , the circuit pattern 20 protruding from one surface of the first insulating layer 12 can be formed by patterning the copper foil 3 through etching. For example, the copper foil 3 can be etched so that the pad 24 and the upper portion 26b of the pillar 26 are formed on the first insulating layer 12. However, this is only one example of etching, and other suitable etching can be performed in other examples.

[0061] exist Figure 6 In the embodiment, the pillar 26 may be formed to have a thickness including a lower portion 26a embedded in the first insulating layer 12 and an upper portion 26b located on the first insulating layer 12. In other words, the thickness of the pillar 26 may be the sum of the thickness of the embedded pattern 22 and the thickness of the copper foil 3.

[0062] Since the resist is present to assist the etching process, after etching the copper foil 3, the resist 30 may be removed when it is no longer needed.

[0063] Figure 2 is a diagram illustrating a printed circuit board according to another example.

[0064] Reference Figure 2 An example of a printed circuit board according to the example is characterized in that, Fig. 9 The metal layer 3a shown in FIG. 1 is formed on the first insulating layer 12. Therefore, the metal layer 3a is provided at the middle portion of the pillar 26 and / or on the lower surface of the pad 24.

[0065] The column 26 may further include an intermediate layer 27 between the upper portion 26b and the lower portion 26a of the column 26. For example, the intermediate layer 27 may be formed by Fig. 9 The metal layer 3a shown in FIG. 1 is formed so as to cover a portion of the embedded pattern 22 left in the process of manufacturing the printed circuit board.

[0066] The metal layer 3a may be made of a material different from that used for the circuit pattern 20. For example, the metal layer 3a made of a material different from that of the circuit pattern 20 may protect the embedded pattern 22 from being damaged in a process associated with patterning of the circuit pattern 20. Most of the metal layer 3a may be removed during a process of manufacturing a printed circuit board. However, a portion of the metal layer 3a may remain between the upper portion 26b and the lower portion 26a of the pillar 26.

[0067] For example, the intermediate layer 27 may be formed using plating. The intermediate layer 27 may use nickel plating as an example metal, but this is only an example, and other metals other than nickel may be used in other examples. Since the nickel plating has corrosion resistance to a substance used to etch the copper circuit pattern 20, the circuit pattern 20 covered by the nickel plating can be prevented from being damaged during the process of forming the circuit pattern 20.

[0068] Furthermore, since the embedded pattern 22 is resistant to damage from laser and physical processing, by processing as described above, it is also possible to effectively prevent the embedded pattern 22 from being damaged in the process of processing various substrates.

[0069] Specifically, because the fine circuit pattern 20 of the embedded circuit substrate has a very small thickness and width, the fine circuit pattern 20 can be significantly damaged by a small error in etching or processing. Therefore, when the circuit pattern 20 is covered with a metal layer 3a (such as a nickel plating layer) selected to be excellent in corrosion resistance and mechanical wear resistance, the reliability and efficiency of manufacturing the printed circuit board can be improved. Such reliability and efficiency are caused by the protective effect of the above-mentioned metal layer 3a.

[0070] Reference Figure 2In an example of the present invention, the lower surface of the intermediate layer 27 may be disposed on the same plane as one surface of the first insulating layer 12. In such an example, the metal layer 3a may be formed on one surface of the first insulating layer 12 so that the intermediate layer 27 formed as a part of the metal layer 3a may contact one surface of the first insulating layer 12.

[0071] The printed circuit board may further include a bottom layer 25 between one surface of the first insulating layer 12 and the pad 24. Figure 2 In the example of FIG. 1 , a portion of the metal layer 3 a may remain between the pad 24 and one surface of the first insulating layer 12 to become the bottom layer 25 .

[0072] Reference Figure 2 In the example of FIG. 2 , the bottom layer 25 and the middle layer 27 may be formed in the same layer. Since the bottom layer 25 and the middle layer 27 are formed by remaining as a part of the metal layer 3 a, the bottom layer 25 and the middle layer 27 may be located in the same layer.

[0073] Figures 8 to 11 is a diagram illustrating a method for manufacturing a printed circuit board according to an example.

[0074] Reference Figure 8 , unlike the above-mentioned method of manufacturing a printed circuit board, a metal layer 3a may be additionally formed on the copper foil 3 of the carrier board 1 so that the metal layer 3a becomes the outermost layer. Therefore, a structure in which the metal layer 3a is laminated on one surface of the first insulating layer 12 may be formed, and the embedded pattern 22 and the lower portion 26a of the pillar 26 may also be combined with the metal layer 3a.

[0075] Reference Fig. 9 , when the first insulating layer 12 on which the circuit pattern 20 is formed is separated from the carrier 1 , the metal layer 3 a and the copper foil 3 may be sequentially laminated on one surface of the first insulating layer 12 .

[0076] Reference Fig.10 , the circuit pattern 20 protruding from the metal layer 3a can be formed by patterning the copper foil 3 through etching. For example, the copper foil 3 can be etched so that the pad 24 and the upper portion 26b of the pillar 26 are formed on the metal layer 3a. The metal layer 3a made of a different material from the circuit pattern 20 can protect the embedded pattern 22 from being damaged during the etching process of the copper foil 3. Various aspects of the method have been further discussed above and will be further discussed below.

[0077] Reference Fig.11, the metal layer 3a exposed by etching the copper foil 3 may be removed from one surface of the first insulating layer 12. In such an example, a portion of the metal layer 3a may be disposed at the middle portion of the pillar 26 and / or on the lower surface of the pad 24. The embedded pattern 22 and the pad 24 can be prevented from being damaged during the process by using a material that does not etch copper as an etching solution for etching the metal layer 3a. If this type of etching solution is used, a potential result that will be obtained is that etching may occur, but copper still acts as a protective layer.

[0078] Here, the thickness of the pillar 26 may be the sum of the thickness of the lower portion 26a of the pillar embedded in the first insulating layer 12, the thickness of the intermediate layer 27, and the thickness of the upper portion 26b of the pillar on the first insulating layer 12. In other words, the thickness of the pillar 26 may be the sum of the thickness of the embedded pattern 22, the thickness of the metal layer 3a, and the thickness of the copper foil 3.

[0079] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail can be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein will be considered as descriptive only, not for the purpose of limitation. The description of the features or aspects in each example will be considered to be applicable to similar features or aspects in other examples. If the described techniques are performed in different orders, and / or if the components in the described system, architecture, device or circuit are combined in different ways and / or replaced or supplemented by other components or their equivalents, the components in the described system, architecture, device or circuit can be obtained. Therefore, the scope of the present disclosure is not limited by specific embodiments, but by the claims and their equivalents, and all changes within the scope of the claims and their equivalents will be interpreted as being included in the present disclosure.

Claims

1. A printed circuit board, comprising: a first insulating layer; an embedded pattern embedded in a surface of the first insulating layer; a pad protruding from the one surface of the first insulating layer and spaced apart from the embedded pattern; a via hole penetrating through at least a portion of the first insulating layer and connected to the pad; as well as A column, wherein the center of the side surface of the column contacts the one surface of the first insulating layer, and the upper surface of the column and the upper surface of the pad are located on the same plane, wherein the column includes a lower portion embedded under the one surface of the first insulating layer and an upper portion protruding from the one surface of the first insulating layer, and no organic insulating layer exists at a boundary between the upper portion and the lower portion, or The column includes a lower portion embedded under the one surface of the first insulating layer, an upper portion protruding from the one surface of the first insulating layer, and an intermediate layer between the upper portion of the column and the lower portion of the column, the intermediate layer includes a metal different from the metal of the upper portion and the lower portion, and no organic insulating layer exists at the boundary between the lower portion and the intermediate layer and at the boundary between the intermediate layer and the upper portion.

2. The printed circuit board of claim 1, further comprising a second insulating layer formed on the first insulating layer and comprising a through hole, in, The embedded pattern and the pad are exposed through the through hole.

3. The printed circuit board according to claim 2, wherein: The pad includes a plurality of pads, and the embedded pattern is arranged between the plurality of pads.

4. The printed circuit board according to claim 2, wherein: The second insulating layer is a solder resist layer, and the solder resist layer further includes an opening spaced apart from the through hole, the pillar being exposed through the opening.

5. The printed circuit board according to claim 2, wherein: The column includes a plurality of columns, and the through-hole is arranged between the plurality of columns.

6. The printed circuit board according to claim 1, wherein: A lower surface of the intermediate layer is located on the same plane as the one surface of the first insulating layer.

7. The printed circuit board according to claim 1, wherein: The printed circuit board further includes a bottom layer interposed between the pad and the one surface of the first insulating layer.

8. The printed circuit board according to claim 7, wherein: The base layer and the intermediate layer are formed in the same layer.

9. The printed circuit board according to claim 8, wherein: Each of the upper and lower portions of the pillar includes copper, the pad includes copper, and each of the bottom layer and the middle layer includes nickel.

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