Compensation device and method, storage medium, and electronic device

Abstract

The present invention provides a compensation device, method, storage medium, and electronic device, wherein the compensation device includes: a time-interleaved analog-to-digital converter (TIADC) configured to receive an input signal and output an output signal; a compensation module configured to obtain first estimation information at time n-a and second estimation information at time n-b at time n, and obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to instruct the compensation module to compensate the output signal of the TIADC based on the third estimation information at time n+1. The present invention solves the technical problem in the related art that a sampling clock mismatch estimator cannot effectively estimate and compensate for the mismatch error according to the frequency change of the TIADC input signal when performing mismatch error estimation and compensation, thereby achieving the effect that the sampling clock mismatch estimator can adapt to the frequency change of the TIADC input signal.

Description

Technical Field

[0001] The present invention relates to the field of electronics, and in particular to a compensation device and method, a storage medium, and an electronic device. Background Art

[0002] A time-interleaved analog-to-digital converter (TIADC) consists of M parallel sub-ADCs, or sub-channels. Figure 1 This is a schematic diagram of the architecture of an M-channel TIADC in related technology, such as Figure 1 As shown, the M-channel TIADC contains M sub-ADCs, where the sampling rate of each sub-ADC is f S / M; Figure 2 This is an ideal sampling diagram of an M-channel TIADC in related technologies, such as Figure 2 As shown, the multiple sub-ADCs in this TIADC sample in a time-interleaved manner. Ideally, the M-channel TIADC described above can achieve a system sampling rate M times that of a single sub-ADC. However, due to inherent shortcomings in the manufacturing process, multiple sub-ADCs are unlikely to be identical, leading to mismatch errors between them. Mismatch errors in TIADCs primarily include offset mismatch, gain mismatch, and sampling clock mismatch.

[0003] To prevent the aforementioned mismatch from affecting TIADC performance, related technologies typically employ an estimator to compensate for TIADC errors. For example, a sampling clock mismatch error estimator is employed to compensate for the TIADC's sampling clock mismatch. However, the parameter value used by the sampling clock mismatch error estimator for its estimation is often related to the frequency of the TIADC's input signal. This parameter fluctuates as the frequency of the TIADC's input signal changes.

[0004] The above characteristics of the sampling clock mismatch error estimator result in the sampling clock mismatch error estimator being unable to perform effective error compensation processing in application scenarios where the frequency of the input signal is variable and unknown. For example, in 4G or 5G communication systems, the base station or terminal has an unknown number of supported carriers for TIADC, and the frequency resource blocks activated within a carrier are also unknown. If a fixed parameter is selected to estimate the sampling clock mismatch error, when the actual parameters of the estimator differ too much from the pre-selected fixed parameters, the residual error, convergence time, etc. of the estimator will be affected, thereby causing the sampling clock mismatch error estimator to be unable to perform effective error estimation and compensation for the TIADC.

[0005] Regarding the technical problem in the related art that a sampling clock mismatch estimator cannot perform effective error estimation and compensation according to the frequency change of the input signal of the TIADC when performing mismatch error estimation and compensation, no solution has been proposed in the related art. Summary of the Invention

[0006] Embodiments of the present invention provide a compensation device and method, a storage medium, and an electronic device to at least address the technical problem in the related art that a sampling clock mismatch estimator cannot effectively perform error estimation and compensation based on the frequency variation of a TIADC input signal when performing mismatch error estimation and compensation.

[0007] According to one embodiment of the present invention, a compensation device is provided, comprising:

[0008] a time-interleaved analog-to-digital converter TIADC configured to receive an input signal and output an output signal;

[0009] a compensation module configured to obtain first estimation information at time na and second estimation information at time nb at time n, and obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to instruct the compensation module to compensate the output signal of the TIADC based on the third estimation information at time n+1;

[0010] The nath moment and the nbth moment are used to indicate the moment before the nth moment, and the n+1th moment is used to indicate the adjacent moment after the nth moment.

[0011] According to another embodiment of the present invention, a compensation method is provided, which is applied to a time-interleaved analog-to-digital converter (TIADC). The TIADC is configured to receive an input signal and output an output signal. The method includes:

[0012] At the nth moment, obtaining first estimation information of the nath moment and second estimation information of the nbth moment; wherein the nath moment and the nbth moment are used to indicate moments before the nth moment;

[0013] Obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation for the output signal of the TIADC based on the third estimation information at the n+1th moment; the n+1th moment is used to indicate an adjacent moment after the nth moment.

[0014] According to another embodiment of the present invention, a compensation device is provided, which is applied to a time-interleaved analog-to-digital converter (TIADC). The TIADC is configured to receive an input signal and output an output signal. The device includes:

[0015] an acquisition module, configured to acquire, at time n, first estimation information at time na and second estimation information at time nb; wherein the time na and the time nb indicate moments before the time n;

[0016] an estimation module, configured to obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation for the output signal of the TIADC based on the third estimation information at the n+1th moment; and the n+1th moment is used to indicate an adjacent moment after the nth moment.

[0017] According to yet another embodiment of the present invention, a storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when running.

[0018] According to another embodiment of the present invention, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any one of the above method embodiments.

[0019] Through the present invention, the compensation module obtains third estimation information at time n based on the first estimation information of the nth time before time n and the second estimation information of the nbth time, and compensates the output signal of the TIADC at the next time n+1 based on the third estimation information. Therefore, the present invention can solve the technical problem in the related art that the sampling clock mismatch estimator cannot effectively perform error estimation and compensation according to the frequency change of the TIADC input signal when performing mismatch error estimation and compensation. The sampling clock mismatch estimator can adapt to the frequency change of the TIADC input signal to achieve the effect of effective error estimation and compensation. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0021] Figure 1 Schematic diagram of the architecture of an M-channel TIADC in the related art;

[0022] Figure 2This is the ideal sampling diagram of the M-channel TIADC in the related art;

[0023] Figure 3 This is a schematic diagram of the mean change of the sampling clock mismatch error estimator under input signals of different frequencies;

[0024] Figure 4 Schematic diagram of the deviation distribution of the sampling clock mismatch error estimator for input signals of different frequencies;

[0025] Figure 5 Schematic diagram of the deviation change of the sampling clock mismatch error estimator under input signals of different frequencies;

[0026] Figure 6 1 is a functional schematic diagram of a compensation module provided according to an embodiment of the present invention (I);

[0027] Figure 7 2 is a functional schematic diagram of a compensation module according to an embodiment of the present invention;

[0028] Figure 8 is a schematic diagram of a third estimation information estimation process provided according to an embodiment of the present invention;

[0029] Figure 9 is a flow chart of a compensation method provided according to an embodiment of the present invention;

[0030] Figure 10 is a structural block diagram of a compensation device provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that, unless there is a conflict, the embodiments and features in the embodiments of the present application can be combined with each other.

[0032] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0033] To further illustrate the sampling clock mismatch error estimation process of the sampling clock mismatch error estimator in the present invention, as well as the influence of the frequency of the input signal on the sampling clock mismatch error estimator in the related art TIADS, the following describes in detail the sampling clock mismatch error estimation method of the sampling clock mismatch error estimator.

[0034] Assuming that the offset mismatch and gain mismatch of the TIADC have been ideally compensated, that is, the residual error after offset mismatch and gain mismatch compensation will not affect the TIADC's effective number of bits (ENOB) and spurious free dynamic range (SFDR) performance. In this case, the impact of the TIADC's sampling clock mismatch on the TIADC's operation can be seen in the following formula:

[0035] y k (n) = x(Mn+k) = A*sin[2πf in ((Mn+k)T s +Δτ k )+θ],k=0,1,M-1 Formula 1

[0036] The above formula 1 is used to express the relationship between the input signal and the output signal of TIADC, where y k (n) is used to represent the output of subchannel k in TIADC at time n=nTs, f s =1 / T s Used to indicate the sampling frequency of TIADC, corresponding to T s is the sampling period of TIADC; M is used to represent the number of sub-channels in TIADC; A is used to represent the gain of the sub-channel; x(n)=sin(2πf in nT s +θ) is used to represent the sinusoidal signal input by TIADC, where f in Used to represent the frequency of the input sinusoidal signal, Δτ k =d k *T s It is used to represent the sampling clock mismatch error on subchannel k, d k For T s The sampling clock mismatch error is obtained after normalization.

[0037] Based on this, the above formula 1 can be used to express that the sinusoidal signal at the input of TIADC is x(n)=sin(2πf in nT s +θ), the y is obtained according to the input signal and the number of sub-channels, gain, sampling clock mismatch error and other parameters of the TIADC. k (n).

[0038] Furthermore, taking a TIADC with 2 sub-channels M as an example, the method of obtaining the sampling clock mismatch in the above formula 1 is described. For this 2-channel TIADC, when there is no sampling clock mismatch between the two sub-channels, according to the above formula 1, the sampling points of sub-channel 0 and sub-channel 1 for the input signal are y0(n) = x(Mn) and y1(n) = x(Mn+1), respectively. On this basis, when the sampling clock mismatch error in the TIADC is Δd = d1-d0 = Δτ1-Δτ0 / T s =Δτ / T s When , the actual sampling points of sub-channel 0 and sub-channel 1 in the nth cycle can be expressed as y0(n)=x(Mn+d0) and y1(n)=x(Mn+1+d1), respectively.

[0039] Furthermore, the absolute value of the sampling clock mismatch error in the aforementioned TIADS is typically much less than 1, i.e., abs(Δd)<<1. Based on this, with subchannel 0 as the reference channel, the actual sampling time point y1(n) = x(Mn+1+d1) of subchannel 1 relative to subchannel 0 deviates from the ideal sampling time point by Δd.

[0040] The relationship between the above Δd and the sampling points y0 and y1 of subchannel 0 and subchannel 1 can be seen in the following formula, that is, formula 2:

[0041]

[0042] In the above formula 2, σ 2 It is used to represent the average power of each sampling point. Since the average power of the two sampling points is similar, it can be assumed here that the σ of subchannel 0 and subchannel 1 is 2 The last term of Formula 2 is used to express the expectation of the cross-correlation function of adjacent sampling points, which can be further expressed as R(1+Δd). Based on this, the above Formula 2 can be further expressed as:

[0043] E[(y1(n)-y0(n)) 2 ]=2σ 2 -2R(1+Δd) Formula 3

[0044] Similarly, in the n+1th cycle, the above formula 2 can be further expressed as:

[0045] E[(y0(n+1)-y1(n)) 2 ]=2σ 2 -2R(1-Δd) Formula 4

[0046] Subtract the above formula 3 from formula 4. Since abs(Δd)<<1, that is, the value of Δd is very small, the Taylor series expansion can be used to sample the cross-correlation function, retaining only the first-order derivative, and then the following formula is obtained:

[0047] e(n)=E[(y1(n)-y0(n)) 2 ]-E[(y0(n+1)-y1(n)) 2 ]≈-4ΔdR'(1) Formula 1

[0048] In Equation 5, R'(1) is the first-order derivative of R(1). From a statistical perspective, when the statistical sample size is large enough, R'(1) for a TIADC under a certain input signal can be approximated to a fixed value. Therefore, Equation 5 can be understood as a fixed proportional relationship between e(n) and Δd. It should be further explained that in Equation 5, e(n) represents an observed value in the estimation of sampling clock mismatch.

[0049] Therefore, the estimated value of Δd satisfies the following formula:

[0050]

[0051] The estimation of Δd is obtained by executing an estimator, such as a sampling clock mismatch error estimator. In the process of obtaining Δd, the estimator samples some parameters in an approximate manner. For example, the cross-correlation function is sampled by retaining only the first-order derivative in the Taylor series expansion, or R'(1) is approximated to a certain value. Therefore, the estimation result of the estimator is not an exact Δd, but an estimate of Δd, that is, Should The error between Δd and Δd is within the controllable range, so it can be Compensate for sampling clock mismatch.

[0052] In the above formula 6, g is the gain of the estimator, and b is the bias of the estimator. It should be further explained that in this solution, the sampling gain and bias are used as parameters estimated by the sampling clock mismatch error estimator, but are not limited to this. The following description uses the gain and bias as the estimated parameters.

[0053] The above formula 6 estimates the error based on a 2-channel TIADC. This formula 6 can also be extended to a TIADC system with any number M. For example, when M = 4, sub-channel 0 can still be used as the reference to first estimate the sampling clock mismatch error of sub-channel 2. After compensation, the sampling clock mismatch errors of sub-channels 1 and 3 are then estimated. In this 4-channel TIADS with M = 4, the sampling clock mismatch errors of sub-channels 1, 2, and 3 can be estimated using the following formula, that is, formula 7:

[0054]

[0055] Equations 6 and 7 above respectively represent the estimation process for the TIADC sampling clock mismatch error when M = 2 and M = 4. However, as shown in Equations 6 and 7, during the estimation of the sampling clock mismatch error, the estimated error is correlated with e(n). As shown in Equation 5, e(n) is further correlated with the derivative of the cross-correlation function, R'(1), which in turn is correlated with R(1). Equation 2 further indicates that R(1) is correlated with the frequency of the TIADC input signal. Therefore, during the estimation of the sampling clock mismatch error, the estimated error is correlated with the frequency of the TIADC input signal.

[0056] Furthermore, as shown in Equations 6 and 7, the parameters used by the sampling clock error estimator during estimation, such as the gain and offset in Equations 6 and 7, also exhibit characteristics related to the frequency of the input signal. To further illustrate the relationship between the estimator's gain and offset parameters and the frequency of the TIADS input signal, the following lists the relationships between the input signal and related parameters at different frequencies:

[0057] Figure 3 This is a schematic diagram of the mean change of the sampling clock mismatch error estimator under input signals of different frequencies. Figure 3 Specifically, it is used to indicate the change of the estimated mean value of the sampling clock mismatch error estimator with different time errors under the input signals of M=4 TIADS with different frequencies, where the sampling frequency f of TIADS is s =2GHz, the frequencies of the three input signals listed are: f in 1=333MHz,f in 2=239MHz,f in 3 = 166MHz; for the input signals corresponding to the above three frequencies, set the time error within -0.03Ts to 0.03Ts and scan at intervals of 0.01Ts to obtain the estimated mean value of the sampling clock mismatch error estimator corresponding to the time error.

[0058] like Figure 3As shown in FIG, under input signals of different frequencies, the slope of the mean change line of the sampling clock mismatch error estimator is significantly different. This slope represents the gain of the sampling clock mismatch error estimator. Therefore, the gain of the sampling clock mismatch error estimator varies with the frequency of the input signal, specifically, increases with increasing frequency of the input signal.

[0059] at the same time, Figure 3 The deviation variation trend of the sampling clock mismatch error estimator under different frequency input signals can be further illustrated in FIG. When the time error is zero, that is, Figure 3 The mean value of the mean variation straight line of the sampling clock mismatch error estimator corresponding to the frequency of each input signal at the zero point, that is, the deviation of the sampling clock mismatch error estimator under the input signal of the frequency; Figure 4 This is a schematic diagram of the deviation distribution of the sampling clock mismatch error estimator under input signals of different frequencies, as shown in Figure 4 As shown, Figure 3 After amplifying the zero point position of the mean change line of the sampling clock mismatch error estimator corresponding to the frequency of each input signal, the distribution of the deviation of the sampling clock mismatch error estimator also changes significantly. Specifically, the deviation of the sampling clock mismatch error estimator increases with the increase of the frequency of the input signal.

[0060] Figure 5 This is a schematic diagram of the deviation change of the sampling clock mismatch error estimator under input signals of different frequencies. Figure 5 Specifically, it is used to indicate the variance of the sampling clock mismatch error estimator of M=4 TIADS under different frequency input signals with different time errors, where the sampling frequency f of TIADS is s =2GHz, the frequencies of the three input signals listed are: f in 1=333MHz,f in 2=239MHz,f in 3 = 166MHz; for the input signals corresponding to the above three frequencies, set the time error within -0.03Ts to 0.03Ts and scan at intervals of 0.01Ts to obtain the variance of the sampling clock mismatch error estimator corresponding to the time error.

[0061] like Figure 5As shown in the figure, the variance distribution of the sampling clock mismatch error estimator differs significantly for input signals of different frequencies. Specifically, the variance of the sampling clock mismatch error estimator increases with increasing input signal frequency. This indicates that the gain, variance, and bias of the sampling clock mismatch error estimator are all correlated with the frequency of the TIADS input signal. Therefore, the sampling clock mismatch error estimator is significantly affected by the frequency of the TIADS input signal when estimating the sampling clock mismatch error.

[0062] It should be further explained that although the bias of the sampling clock mismatch error estimator described above varies slightly under input signal frequencies, estimation error propagation can occur in TIADCs, especially those with more than two subchannels. For example, in the process of sampling time mismatch error estimation and compensation between multiple subchannels in a four-channel TIADC as shown in Equation 7, the estimates for subchannels 1 and 3 are both derived using the error estimate and compensated result of subchannel 2. Due to the characteristics of the sampling clock mismatch error estimator described above, subchannel 2 fails to form an effective estimate of its sampling clock mismatch error, resulting in a certain estimation-compensation residual error in the other subchannel. This causes the estimation-compensation residual error of subchannel 2 to propagate. Specifically, the estimation-compensation residual error of subchannel 2 is added to the estimation process of subchannels 1 and 3, further increasing the estimation-compensation residual errors of subchannels 1 and 3. Therefore, this estimation error propagation phenomenon leads to higher requirements for the estimation-compensation residual error of each subchannel in TIADS as M increases.

[0063] Based on the above analysis, the parameters used by the sampling clock mismatch error estimator during error estimation, such as gain, bias, and variance, are all related to the frequency of the TIADC's input signal. This characteristic causes the sampling clock mismatch error estimator to generate a certain estimation-compensation residual error when performing error estimation under input signals of different frequencies. This estimation-compensation residual error not only makes it impossible to effectively estimate and compensate the corresponding sub-channel, but also further causes the estimation-compensation residual error to propagate when references are involved between multiple sub-channels, thereby gradually expanding the error. Therefore, the above-mentioned sampling clock mismatch error estimator cannot perform effective error estimation and compensation in application scenarios such as 4G and 5G communication systems where the maximum frequency of the input signal is variable and unknown.

[0064] In this regard, the sampling clock mismatch error estimator in the related art usually selects a smaller estimation gain for estimation based on its characteristics to ensure that the estimator can converge and the variance is small after convergence, and at the same time selects an average deviation to ensure that the estimation-compensation residual error of the estimator is small. In this scenario, although the selection of the deviation has little effect on the estimation-compensation residual error of the estimator, for the estimation gain, when the actual gain of the estimator is higher than the selected fixed gain, it will cause the estimator to converge too slowly. When the actual gain of the estimator is lower than the selected fixed gain, it will cause the estimator variance to be large after convergence, affecting the performance of the ADC or even preventing convergence. Such TIADC and error estimation and compensation methods will lead to degradation of TIADC performance when used in 4G or 5G communication systems. For example, the sampling clock mismatch error estimation-compensation convergence time is too long, the estimator output variance is too large, or there is a deviation that causes ADC performance degradation or even failure to converge.

[0065] Example 1

[0066] In this embodiment, a compensation device is provided. Figure 6 1 is a functional diagram of a compensation module according to an embodiment of the present invention (I), as shown in FIG. Figure 6 As shown, the compensation device includes:

[0067] a time-interleaved analog-to-digital converter TIADC 102 configured to receive an input signal and output an output signal;

[0068] The compensation module 104 is configured to obtain first estimation information at time n and second estimation information at time nb at time n, and obtain third estimation information based on the first estimation information and the second estimation information, where the third estimation information is used to instruct the compensation module to compensate the output signal of the TIADC 101 at time n+1 based on the third estimation information;

[0069] The nath moment and the nbth moment are used to indicate the moments before the nth moment, and the n+1th moment is used to indicate the adjacent moment after the nth moment.

[0070] With the compensation device of this embodiment, the compensation module obtains third estimation information at time n based on the first estimation information of the nth time before time n and the second estimation information of the nbth time, and compensates the output signal of the TIADC at the next time n+1 based on the third estimation information. Therefore, the compensation device of this embodiment can solve the technical problem in the related art that the sampling clock mismatch estimator cannot effectively perform error estimation and compensation according to the frequency change of the TIADC input signal when performing mismatch error estimation and compensation. The sampling clock mismatch estimator can adapt to the frequency change of the TIADC input signal to achieve the effect of effective error estimation and compensation.

[0071] It should be further explained that the aforementioned nth moment is used to indicate any moment during the formal operation of the TIADC. That is, as long as at least the nath moment and the nbth moment exist before the nth moment, the nth moment can be any moment. The nath moment and the nbth moment are both used to indicate the moment before the nth moment. The nath moment and the nbth moment can be adjacent moments, such as the n-1th moment and the n-2th moment, or non-adjacent moments, such as the n-1th moment and the n-3th moment. Accordingly, in the process of selecting the moment before the nth moment, two adjacent moments can be directly selected according to preset requirements, or a set of multiple moments can be selected, and two adjacent or non-adjacent moments can be selected from the set. The present invention is not limited to this.

[0072] Accordingly, the aforementioned moment (n+1) is used to indicate the next moment after the nth moment. Since the TIADC has completed the estimation and compensation of the sampling clock mismatch error at the nth moment, the sampling clock mismatch error can be estimated and compensated for the TIADC at the next moment only when the third estimation information is obtained.

[0073] In this embodiment, the nth moment, the nath moment, the nbth moment, and the n+1th moment are all used to indicate the working process of the compensation device at different moments, and do not represent a specific moment. By reassigning n, the cyclic operation of the compensation device in this embodiment can be achieved. For example, the nth moment is the 5th moment, the corresponding nath moment is the 4th moment, the nbth moment is the 3rd moment, and the corresponding n+1th moment is the 6th moment. The compensation device in this embodiment can obtain third estimation information at the 5th moment based on the first estimation information at the 4th moment and the second estimation information at the 3rd moment, and compensate for the sampling clock mismatch error of the output signal of the TIADC at the 6th moment based on the third estimation information.

[0074] After the compensation is completed at the 6th moment, the nth moment can be reassigned to the 6th moment. At this time, the n+1th moment is the 7th moment. The corresponding nath moment and nbth moment can be maintained as the 4th moment and the 3rd moment, or can be reassigned as the 5th moment and the 4th moment. In this way, the third estimation information is obtained again based on the first estimation information and the second estimation information of the corresponding moment (if the nath moment and the nbth moment are reassigned, the first estimation information and the second estimation information need to be updated), and the sampling clock mismatch error of the output signal of the TIADC can be compensated at the 7th moment; in this cycle, the continuous acquisition of the third estimation information and the compensation of the TIADC can be achieved during the operation of the TIADC.

[0075] When the compensation device in this embodiment performs sampling clock mismatch error compensation on the TIADC, the third estimation information used is obtained based on the first estimation information and the second estimation information at the previous moment. Therefore, the third estimation information is not calculated based on the preset fixed parameters of the estimator, but is the estimation information corresponding to the input frequency at the current moment obtained by considering the estimation information at different moments.

[0076] Specifically, for example, the frequency of the input signal at time 1 is 250 MHz, and at time 4 the frequency of the input signal changes to 350 MHz. In the related art, estimation parameters are typically configured based on the frequency of the input signal in the initial state, such as the gain and offset corresponding to the frequency of 250 MHz at time 1. However, at time 4 and thereafter, due to the change in the frequency of the input signal, the gain and offset corresponding to the original frequency of 250 MHz cannot effectively estimate and compensate for the output of the TIADC at the current time. In this embodiment, at time 6, for example, the compensation device can generate third estimation information based on the estimation information at time 4 and time 5 (i.e., the first estimation information and the second estimation information in this embodiment), and perform compensation for time 7. Since the third estimation information considers the estimation information at time 4 and time 5, the frequency of the input signal it considers is the changed frequency. Therefore, the compensation device in this embodiment can adapt to the change in the input frequency, thereby achieving effective estimation and compensation for the output of the TIADC.

[0077] Based on the above analysis, in application scenarios such as 4G and 5G communication systems where the maximum frequency of the input signal is variable and unknown, when the frequency of the TIADC input signal changes at different times, the compensation module in this embodiment adapts the third estimation information to the changed input frequency, so that the TIADC can obtain effective error compensation.

[0078] In an alternative embodiment, Figure 7 : is a functional diagram (II) of the compensation module provided according to an embodiment of the present invention, such as Figure 7 As shown, the compensation module 104 includes:

[0079] a compensation unit 1042 configured to compensate the output signal of the TIADC;

[0080] an estimating unit 1044 configured to provide estimation information to the compensation unit, wherein the estimation information is used to instruct the compensation unit to compensate for the output signal of the TIADC;

[0081] an acquiring unit 1046 configured to acquire, at time n, first estimation information of the estimation unit at time na and second estimation information of the estimation unit at time nb; acquire an estimation parameter at time n based on the first estimation information and the second estimation information, and transmit the estimation parameter at time n to the estimation unit;

[0082] The estimation unit 1044 is further configured to provide third estimation information to the compensation unit according to the estimation parameters at the nth moment; wherein the third estimation information is used to instruct the compensation unit to compensate the output signal of the TIADC according to the third estimation information at the n+1th moment.

[0083] It should be further explained that in the compensation module, the compensation unit, the estimation unit, and the acquisition unit constitute a feedback correction circuit. The compensation unit is connected to the output of the TIADC to compensate for the TIADC output. The estimation unit is connected to the compensation unit on the one hand to provide the compensation unit with an error estimate, and is connected to the acquisition unit on the other hand. The estimation unit can estimate and process the estimation information based on configured estimation parameters, such as gain and bias. Taking time n as an example, the acquisition unit acquires the first estimation information provided by the estimation unit to the compensation unit at time na, and the second estimation information provided by the estimation unit to the compensation unit at time nb. The acquisition of the first and second estimation information can be achieved by the estimation unit storing the estimation information at different times in an internal or external storage medium, and the acquisition unit actively querying and acquiring the information. Alternatively, the estimation unit or the compensation unit can actively send the first and second estimation information to the acquisition unit when the acquisition unit is operating. The present invention is not limited to this.

[0084] After the acquisition unit acquires the first and second estimated information, it can use them to obtain the estimated parameters at time n. According to Formulas 6 and 7, the estimated parameters in the sampling clock mismatch error estimator are often correlated with the frequency of the TIADC output signal. Therefore, the actual frequency of the input signal at the current time can be obtained based on the estimated parameters at time n. This can then be used to compensate for the TIADC at the next time, i.e., time n+1, using the third estimated information to ensure that the compensation for the TIADC matches the current input frequency.

[0085] In an optional embodiment, the estimation unit 1044 is further configured to:

[0086] Estimation information is provided to the compensation unit according to the estimated parameter; wherein the estimated parameter is related to the frequency of the input signal of the TIADC.

[0087] It should be further explained that when the estimated parameters of the sampling clock mismatch error estimator are related to the frequency of the TIADC input signal, that is, the estimated parameters will change with the change of the TIADC input signal, they are all applicable to the compensation device in this embodiment.

[0088] In an optional embodiment, the estimated parameters include: gain information and deviation information.

[0089] In an optional embodiment, the compensation module 1042 is further configured to:

[0090] When the TIADC receives input signals of different frequencies, the estimation unit obtains simulation gain information and simulation deviation information for input signals of different frequencies to establish a corresponding relationship between the frequency of the input signal and the simulation gain information, and a corresponding relationship between the frequency of the input signal and the simulation deviation information.

[0091] It should be further explained that when the compensation unit obtains input signals of different frequencies received by the TIADC, the estimation unit can obtain the simulation gain information and simulation deviation information under the input signals of different frequencies by performing offline simulation processing on the frequencies of all possible input signals of the TIADC to obtain the simulation gain information and simulation deviation information corresponding to the input signal of the frequency, thereby establishing a correspondence between the frequency of the input signal and the simulation gain information and simulation deviation information; the correspondence can be saved in the internal or external storage medium of the compensation module for query by the estimation unit, and the present invention does not limit the storage method.

[0092] In an optional embodiment, the obtaining unit 1046 is further configured to:

[0093] The gain information at the nth moment is acquired according to the first estimation information, the second estimation information, the gain information at the nath moment and / or the gain information at the nbth moment.

[0094] It should be further explained that the following takes a 2-channel TIADC as an example to illustrate how to obtain the gain information at the nth moment.

[0095] Assume TIADC M=2. The estimation unit can estimate the sampling clock mismatch error of the TIADC with reference to the aforementioned formula 6. Assume that the nath moment is the n-1th moment, and the nbth moment is the n-2th moment. At the n-1th moment and the n-2th moment, the estimation unit can record the gain information and offset information corresponding to the n-1th moment and the n-2th moment when performing the sampling clock mismatch error estimation.

[0096] The gain information at the n-2th moment is g(f,n-2), and the bias information is b(f,n-2). The output of the sampling mismatch error estimation performed by the estimation unit at the n-2th moment, i.e., the second estimation information, can be referred to the following formula:

[0097]

[0098] Based on the sampling mismatch error estimation performed at the n-2th moment in the above formula 8, it can be provided to the compensation unit at the n-1th moment to compensate for the output of the TIADC. At the same time, since the gain and offset at the n-1th moment and the n-2th moment are set to be equal, the gain information and offset information at the n-1th moment satisfy g(f,n-1)=g(f,n-2) and b(f,n-1)=b(f,n-2), so as to output the error estimation, that is, the first estimation information can refer to the following formula:

[0099]

[0100] g(f,n) and b(f,n) are used to represent the actual gain information and actual deviation information of the sampling mismatch error estimation corresponding to the frequency of the TIADC input signal at time n. Substituting the above gain information and deviation information into the above formula 8, the actual sampling clock mismatch error at time n-2 can be expressed by the following formula:

[0101] Δd(n-2)=g(f,n)*(e(n-2)-b(f,n)) Formula 10

[0102] Substituting the calculation method of e(n) in the above formula 5 into the above formula 10, the actual sampling clock mismatch error at time n-2 can be further expressed by the following formula 11:

[0103]

[0104] Similarly, for time n-1, the actual sampling clock mismatch error at time n-1 can be expressed using the following formula 12:

[0105]

[0106] Furthermore, by substituting the above formula 11 into formula 12, we can obtain:

[0107]

[0108] Formula 13 represents the relationship between the sampling clock mismatch error and the actual gain under the current input signal, namely, the relationship between the sampling clock mismatch error and the gain at time n, the first estimation information at time n-1, and the second estimation information at time n-2. Therefore, when the acquisition unit acquires the first estimation information and the second estimation information, Formula 13 can be used to determine the actual gain at time n, namely, the gain information corresponding to the frequency of the TIADC input signal at time n.

[0109] In an optional embodiment, the obtaining unit 1046 is further configured to:

[0110] Determining the frequency of the input signal at the nth moment according to the gain information at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation gain information;

[0111] The deviation information at the nth moment is determined according to the frequency of the input signal at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation deviation information.

[0112] It should be further explained that, based on the premise that the actual gain information g(f,n) of the estimator at time n is obtained according to the above formula 13, the corresponding relationship between the frequency of the input signal and the simulated gain information can be consulted using this g(f,n) to determine the frequency of the input signal at time n. Simultaneously, the corresponding relationship between the frequency of the input signal and the simulated deviation information can be used to confirm the actual deviation information b(f,n) at time n. In this way, the sampling clock mismatch error estimation information required at time n+1, i.e., the third estimation information, can be obtained using g(f,n) and b(f,n) according to the above formula 6. Figure 8 : is a schematic diagram of a third estimation information estimation process according to an embodiment of the present invention. The third estimation information, i.e., the acquisition process of the sampling clock mismatch error estimation information required at the n+1th moment, is as follows: Figure 8 shown.

[0113] In an optional embodiment, the gain information at the nath moment is equal to the gain information at the nbth moment; the deviation information at the nath moment is equal to the deviation information at the nbth moment.

[0114] It should be further explained that, under the premise of satisfying the above relationship, the nath moment and the nbth moment may be adjacent or not.

[0115] It should be further explained that when the TIADC starts operating (e.g., when n is between 0 and 1), the compensation device in this embodiment cannot obtain the two corresponding na-th and nb-th moments before the n-th moment. Therefore, when estimating and compensating for the sampling clock mismatch error output by the TIADC, the compensation module can directly sample the preset gain information and offset information to perform the estimation. Since the TIADC has just started operating in this state and the frequency does not change, effective error estimation and compensation can be performed for the TIADC based on the initial gain information and offset information.

[0116] Example 2

[0117] In this embodiment, a compensation method is also provided, which is applied to a time-interleaved analog-to-digital converter (TIADC). The TIADC is configured to receive an input signal and output an output signal. Figure 9 is a flow chart of a compensation method provided according to an embodiment of the present invention. Figure 9 As shown, the compensation method in this embodiment includes:

[0118] S202, obtaining, at the nth moment, first estimation information of the nath moment and second estimation information of the nbth moment; wherein the nath moment and the nbth moment are used to indicate moments before the nth moment;

[0119] S204 , obtaining third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation of the output signal of the TIADC based on the third estimation information at the n+1th moment; the n+1th moment is used to indicate an adjacent moment after the nth moment.

[0120] Through the compensation method of this embodiment, since third estimation information can be obtained at the nth moment based on the first estimation information of the nth moment before the nth moment and the second estimation information of the nbth moment, the output signal of the TIADC can be compensated based on the third estimation information at the next n+1th moment; therefore, the compensation method of this embodiment can solve the technical problem in the related art that the sampling clock mismatch estimator cannot effectively perform error estimation and compensation according to the frequency change of the TIADC input signal when performing mismatch error estimation and compensation, so that the sampling clock mismatch estimator can adapt to the frequency change of the TIADC input signal to achieve the effect of effective error estimation and compensation.

[0121] It should be further explained that the aforementioned nth moment is used to indicate any moment during the formal operation of the TIADC. That is, as long as at least the nath moment and the nbth moment exist before the nth moment, the nth moment can be any moment. The nath moment and the nbth moment are both used to indicate the moment before the nth moment. The nath moment and the nbth moment can be adjacent moments, such as the n-1th moment and the n-2th moment, or non-adjacent moments, such as the n-1th moment and the n-3th moment. Accordingly, in the process of selecting the moment before the nth moment, two adjacent moments can be directly selected according to preset requirements, or a set of multiple moments can be selected, and two adjacent or non-adjacent moments can be selected from the set. The present invention is not limited to this.

[0122] Accordingly, the aforementioned moment (n+1) is used to indicate the next moment after the nth moment. Since the TIADC has completed the estimation and compensation of the sampling clock mismatch error at the nth moment, the sampling clock mismatch error can be estimated and compensated for the TIADC at the next moment only when the third estimation information is obtained.

[0123] In this embodiment, the nth moment, nath moment, nbth moment, and n+1th moment are all used to indicate the working process of the compensation device at different moments, and do not represent a specific moment. By reassigning n, the compensation method in this embodiment can be cyclically executed. For example, the nth moment is the 5th moment, the corresponding nath moment is the 4th moment, the nbth moment is the 3rd moment, and the corresponding n+1th moment is the 6th moment. The compensation device in this embodiment can obtain the third estimation information at the 5th moment based on the first estimation information at the 4th moment and the second estimation information at the 3rd moment, and compensate for the sampling clock mismatch error of the output signal of the TIADC at the 6th moment based on the third estimation information.

[0124] After the compensation is completed at the 6th moment, the nth moment can be reassigned to the 6th moment. At this time, the n+1th moment is the 7th moment. The corresponding nath moment and nbth moment can be maintained as the 4th moment and the 3rd moment, or can be reassigned as the 5th moment and the 4th moment. In this way, the third estimation information is obtained again based on the first estimation information and the second estimation information of the corresponding moment (if the nath moment and the nbth moment are reassigned, the first estimation information and the second estimation information need to be updated), and the sampling clock mismatch error of the output signal of the TIADC can be compensated at the 7th moment; in this cycle, the continuous acquisition of the third estimation information and the compensation of the TIADC can be achieved during the operation of the TIADC.

[0125] In the compensation method of this embodiment, when performing compensation for sampling clock mismatch errors on the TIADC, the third estimated information used is obtained based on the first estimated information and the second estimated information at the previous moment. Therefore, the third estimated information is not calculated based on the preset fixed parameters of the estimator, but rather is the estimated information corresponding to the input frequency at the current moment obtained by considering the estimated information at different moments.

[0126] Specifically, for example, the frequency of the input signal at time 1 is 250 MHz, and at time 4 the frequency of the input signal changes to 350 MHz. In the related art, estimation parameters are typically configured based on the frequency of the input signal in the initial state, such as the gain and offset corresponding to the frequency of 250 MHz at time 1. However, at time 4 and thereafter, due to the change in the frequency of the input signal, the gain and offset corresponding to the original frequency of 250 MHz cannot effectively estimate and compensate for the output of the TIADC at the current time. In this embodiment, at time 6, for example, the compensation device can generate third estimation information based on the estimation information at time 4 and time 5 (i.e., the first estimation information and the second estimation information in this embodiment), and perform compensation for time 7. Since the third estimation information considers the estimation information at time 4 and time 5, the frequency of the input signal it considers is the changed frequency. Therefore, the compensation device in this embodiment can adapt to the change in the input frequency, thereby achieving effective estimation and compensation for the output of the TIADC.

[0127] Based on the above analysis, in application scenarios such as 4G and 5G communication systems where the maximum frequency of the input signal is variable and unknown, when the frequency of the input signal of the TIADC changes at different times, the compensation method in this embodiment adapts the third estimation information to the changed input frequency, so that the TIADC can obtain effective error compensation.

[0128] In an optional embodiment, in step S204, obtaining third estimation information according to the first estimation information and the second estimation information includes:

[0129] At the nth moment, obtain the first estimation information at the nath moment and the second estimation information at the nbth moment;

[0130] Obtaining an estimated parameter at the nth moment according to the first estimation information and the second estimation information;

[0131] The third estimation information is obtained according to the estimation parameters at the nth moment.

[0132] In an alternative embodiment, the estimated parameter is related to the frequency of the input signal of the TIADC.

[0133] In an optional embodiment, the estimated parameters include: gain information and deviation information.

[0134] In an optional embodiment, the compensation method further includes:

[0135] When the TIADC receives input signals of different frequencies, the simulation gain information and simulation deviation information under the input signals of different frequencies are obtained to establish a corresponding relationship between the frequency of the input signal and the simulation gain information, and a corresponding relationship between the frequency of the input signal and the simulation deviation information.

[0136] In an optional embodiment, the step of obtaining the estimated parameter at the nth moment based on the first estimation information and the second estimation information includes:

[0137] The gain information at the nth moment is acquired according to the first estimation information, the second estimation information, the gain information at the nath moment and / or the gain information at the nbth moment.

[0138] In an optional embodiment, the obtaining of the estimated parameter at the nth moment according to the first estimation information and the second estimation information further includes:

[0139] Determining the frequency of the input signal at the nth moment according to the gain information at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation gain information;

[0140] The deviation information at the nth moment is determined according to the frequency of the input signal at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation deviation information.

[0141] The above-mentioned method for obtaining the gain information and the deviation information at the nth moment corresponds to the method for obtaining the gain information and the deviation information at the nth moment in the compensation device in Example 1, and therefore will not be repeated in this embodiment.

[0142] To further illustrate the method for obtaining the third estimation information at the nth moment in this embodiment, the following process is used for description:

[0143] S302, obtaining simulation gain information and simulation deviation information under input signals of different frequencies when the TIADC receives input signals of different frequencies, so as to establish a corresponding relationship between the frequency of the input signal and the simulation gain information, and a corresponding relationship between the frequency of the input signal and the simulation deviation information;

[0144] S304, configuring initial gain information and initial deviation information of the sampling clock mismatch error estimator at the initial moment of the TIADC, and performing sampling clock mismatch error estimation at the initial moment according to the initial gain information and the initial deviation information;

[0145] S306, obtaining, at time n, first estimation information at time na and second estimation information at time nb;

[0146] S308, acquiring gain information at the nth moment according to the first estimation information, the second estimation information, the gain information at the nath moment, and / or the gain information at the nbth moment;

[0147] S310, determining the frequency of the input signal at the nth moment according to the gain information at the nth moment and the correspondence between the frequency of the input signal and the simulation gain information;

[0148] S312, determining deviation information at the nth moment according to the frequency of the input signal at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation deviation information;

[0149] S314 , obtaining third estimation information according to the gain information and the deviation information at the nth moment, and providing compensation to the output signal of the TIADC according to the third estimation information.

[0150] It should be further explained that in the above step S304, since the time when the TIADC starts operating, for example, when n is between 0 and 1, the two corresponding times na and nb cannot be obtained before the nth time. Therefore, when estimating and compensating the sampling clock mismatch error output by the TIADC, the preset gain information and offset information can be directly sampled for estimation. Since the TIADC has just started operating in this state and the frequency does not change, effective error estimation and compensation can be performed for the TIADC based on the initial gain information and offset information.

[0151] In an optional embodiment, the gain information at the nath moment is equal to the gain information at the nbth moment; the deviation information at the nath moment is equal to the deviation information at the nbth moment.

[0152] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present invention.

[0153] Example 3

[0154] This embodiment also provides a compensation device for implementing the above-mentioned embodiments and preferred embodiments. Details already described will not be repeated. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0155] Figure 10 is a structural block diagram of a compensation device according to an embodiment of the present invention. Figure 10 As shown, the device includes:

[0156] An acquisition module 302 is configured to acquire, at time n, first estimation information at time na and second estimation information at time nb; wherein time na and time nb indicate times before time n;

[0157] The estimation module 304 is configured to obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation of the output signal of the TIADC based on the third estimation information at the n+1th moment; the n+1th moment is used to indicate an adjacent moment after the nth moment.

[0158] The compensation device of this embodiment can obtain third estimation information at time n based on the first estimation information at the nth time and the second estimation information at the nbth time, so that the output signal of the TIADC can be compensated based on the third estimation information at the next time (n+1). Therefore, the compensation device of this embodiment can solve the technical problem in the related art that the sampling clock mismatch estimator cannot effectively perform error estimation and compensation based on the frequency change of the TIADC input signal when performing mismatch error estimation and compensation. The sampling clock mismatch estimator can adapt to the frequency change of the TIADC input signal to achieve the effect of effective error estimation and compensation.

[0159] The remaining technical effects and methods of this embodiment correspond to the compensation device in Example 1, so they will not be repeated here.

[0160] In an optional embodiment, obtaining third estimation information according to the first estimation information and the second estimation information includes:

[0161] At the nth moment, obtain the first estimation information at the nath moment and the second estimation information at the nbth moment;

[0162] Obtaining an estimated parameter at the nth moment according to the first estimation information and the second estimation information;

[0163] The third estimation information is obtained according to the estimation parameters at the nth moment.

[0164] In an alternative embodiment, the estimated parameter is related to the frequency of the input signal of the TIADC.

[0165] In an optional embodiment, the estimated parameters include: gain information and deviation information.

[0166] In an optional embodiment, the acquiring unit is further configured to:

[0167] When the TIADC receives input signals of different frequencies, the simulation gain information and simulation deviation information under the input signals of different frequencies are obtained to establish a corresponding relationship between the frequency of the input signal and the simulation gain information, and a corresponding relationship between the frequency of the input signal and the simulation deviation information.

[0168] In an optional embodiment, obtaining the estimated parameter at the nth moment according to the first estimation information and the second estimation information includes:

[0169] The gain information at the nth moment is acquired according to the first estimation information, the second estimation information, the gain information at the nath moment and / or the gain information at the nbth moment.

[0170] In an optional embodiment, obtaining the estimated parameter at the nth moment according to the first estimation information and the second estimation information further includes:

[0171] Determining the frequency of the input signal at the nth moment according to the gain information at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation gain information;

[0172] The deviation information at the nth moment is determined according to the frequency of the input signal at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation deviation information.

[0173] In an optional embodiment, the gain information at the nath moment is equal to the gain information at the nbth moment; the deviation information at the nath moment is equal to the deviation information at the nbth moment.

[0174] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0175] Example 4

[0176] An embodiment of the present invention further provides a storage medium storing a computer program, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0177] Optionally, in this embodiment, the storage medium may be configured to store a computer program for performing the following steps:

[0178] S1, obtaining, at time n, first estimation information of time na and second estimation information of time nb; wherein time na and time nb are used to indicate times before time n;

[0179] S2. Obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation of the output signal of the TIADC based on the third estimation information at the n+1th moment; the n+1th moment is used to indicate an adjacent moment after the nth moment.

[0180] Optionally, in this embodiment, the above-mentioned storage medium may include but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store computer programs.

[0181] Example 5

[0182] An embodiment of the present invention further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0183] Optionally, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0184] Optionally, in this embodiment, the processor may be configured to execute the following steps through a computer program:

[0185] S1, obtaining, at time n, first estimation information of time na and second estimation information of time nb; wherein time na and time nb are used to indicate times before time n;

[0186] S2. Obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation of the output signal of the TIADC based on the third estimation information at the n+1th moment; the n+1th moment is used to indicate an adjacent moment after the nth moment.

[0187] Optionally, specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0188] Obviously, those skilled in the art will appreciate that the various modules or steps of the present invention described above can be implemented using a general-purpose computing device, centralized on a single computing device, or distributed across a network of multiple computing devices. Alternatively, they can be implemented using program code executable by a computing device, which can then be stored in a storage device and executed by the computing device. In some cases, the steps shown or described can be performed in a different order than that shown, or can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0189] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A compensation device, characterized in that: include: a time-interleaved analog-to-digital converter TIADC configured to receive an input signal and output an output signal; a compensation module configured to obtain first estimation information at time na and second estimation information at time nb at time n, and obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to instruct the compensation module to compensate the output signal of the TIADC based on the third estimation information at time n+1; The nath moment and the nbth moment are used to indicate the moment before the nth moment, and the n+1th moment is used to indicate the adjacent moment after the nth moment.

2. The device according to claim 1, characterized in that The compensation module includes: a compensation unit, configured to compensate the output signal of the TIADC; an estimation unit configured to provide estimation information to the compensation unit, wherein the estimation information is used to instruct the compensation unit to compensate the output signal of the TIADC; an acquiring unit configured to acquire, at time n, the first estimation information of the estimation unit at time na and the second estimation information of the estimation unit at time nb; acquire an estimation parameter at time n based on the first estimation information and the second estimation information, and deliver the estimation parameter at time n to the estimation unit; The estimation unit is further configured to provide the compensation unit with the third estimation information based on the estimation parameters at the nth moment; wherein the third estimation information is used to instruct the compensation unit to compensate the output signal of the TIADC based on the third estimation information at the n+1th moment.

3. The device according to claim 2, characterized in that The estimation unit is further configured to: Providing estimation information to the compensation unit according to an estimation parameter; wherein the estimation parameter is related to the frequency of the input signal of the TIADC.

4. The device according to claim 3, characterized in that The estimated parameters include: gain information and deviation information.

5. The device according to claim 4, characterized in that The compensation module is further configured as follows: When the TIADC receives the input signals of different frequencies, the estimation unit obtains the simulation gain information and the simulation deviation information for the input signals of different frequencies to establish a correspondence between the frequency of the input signal and the simulation gain information, and a correspondence between the frequency of the input signal and the simulation deviation information.

6. The device according to claim 5, characterized in that The acquisition unit is further configured to: The gain information at the nth moment is acquired according to the first estimation information, the second estimation information, the gain information at the nath moment and / or the gain information at the nbth moment.

7. The device according to claim 6, characterized in that The acquisition unit is further configured to: determining the frequency of the input signal at the nth moment according to the gain information at the nth moment and a correspondence between the frequency of the input signal and the simulation gain information; The deviation information at the nth moment is determined according to the frequency of the input signal at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation deviation information.

8. The device according to any one of claims 1 to 7, characterized in that The gain information at the nath moment and the gain information at the nbth moment are equal to each other; the deviation information at the nath moment and the deviation information at the nbth moment are equal to each other.

9. A compensation method, characterized in that: The method is applied to a time-interleaved analog-to-digital converter (TIADC), wherein the TIADC is configured to receive an input signal and output an output signal; the method comprises: At the nth moment, obtaining first estimation information of the nath moment and second estimation information of the nbth moment; wherein the nath moment and the nbth moment are used to indicate moments before the nth moment; Obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation for the output signal of the TIADC based on the third estimation information at the n+1th moment; the n+1th moment is used to indicate an adjacent moment after the nth moment.

10. The method according to claim 9, characterized in that The obtaining third estimation information according to the first estimation information and the second estimation information includes: Acquire, at the nth moment, the first estimation information at the nath moment and the second estimation information at the nbth moment; Obtaining the estimated parameter at the nth moment according to the first estimation information and the second estimation information; The third estimation information is obtained according to the estimation parameter at the nth moment.

11. The method according to claim 10, characterized in that The estimated parameter is related to the frequency of the input signal of the TIADC.

12. The method according to claim 11, characterized in that The estimated parameters include: gain information and deviation information.

13. The method according to claim 12, characterized in that The method further comprises: When the TIADC receives the input signals of different frequencies, the simulation gain information and the simulation deviation information under the input signals of different frequencies are obtained to establish a corresponding relationship between the frequency of the input signal and the simulation gain information, and a corresponding relationship between the frequency of the input signal and the simulation deviation information.

14. The method according to claim 13, characterized in that The acquiring the estimated parameter at the nth moment according to the first estimation information and the second estimation information includes: The gain information at the nth moment is acquired according to the first estimation information, the second estimation information, the gain information at the nath moment and / or the gain information at the nbth moment.

15. The method according to claim 14, characterized in that The acquiring the estimated parameter at the nth moment according to the first estimation information and the second estimation information further includes: determining the frequency of the input signal at the nth moment according to the gain information at the nth moment and a correspondence between the frequency of the input signal and the simulation gain information; The deviation information at the nth moment is determined according to the frequency of the input signal at the nth moment and the corresponding relationship between the frequency of the input signal and the simulation deviation information.

16. The method according to any one of claims 9 to 15, characterized in that The gain information at the nath moment and the gain information at the nbth moment are equal to each other; the deviation information at the nath moment and the deviation information at the nbth moment are equal to each other.

17. A compensation device, characterized in that: Applied to a time-interleaved analog-to-digital converter (TIADC), the TIADC being configured to receive an input signal and output an output signal; the device comprising: an acquisition module, configured to acquire, at time n, first estimation information at time na and second estimation information at time nb; wherein the time na and the time nb indicate moments before the time n; an estimation module, configured to obtain third estimation information based on the first estimation information and the second estimation information, wherein the third estimation information is used to indicate compensation for the output signal of the TIADC based on the third estimation information at the n+1th moment; and the n+1th moment is used to indicate an adjacent moment after the nth moment.

18. A storage medium, characterized in that The storage medium stores a computer program, wherein the computer program is configured to execute the method according to any one of claims 9 to 16 when executed.

19. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to run the computer program to perform the method according to any one of claims 9 to 16.

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