A voltage equalization control circuit and a control method thereof

Abstract

The present invention discloses a voltage balancing control circuit and a control method thereof. The control circuit comprises three main power circuits, a sampling circuit and a main control chip connected in series. The output ends of the three main power circuits are all connected to the input ends of the sampling circuits, the output ends of the sampling circuits are connected to the main control chip, and the main control chip is respectively connected to the control ends of the three main power circuits. Each main power circuit comprises a full-bridge conversion module, a resonance module, a rectification module and a filter module, which are connected in sequence. When a DC power supply is lightly loaded or no-loaded, the three main power circuits perform PWM control by replicating the wave, and at the same time, the output voltage balancing loops of two of the main power circuits function to fine-tune the duty cycle of the drive signal, thereby realizing voltage balancing control. The present invention has the advantage of solving the problem that the DC power supply cannot achieve voltage balancing when it is no-loaded or light-loaded.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of measuring electronic equipment for testing, and more particularly to a voltage equalization control circuit and a control method thereof. BACKGROUND

[0002] In the field of electronic technology, the DC test power supply is one of the essential test instruments for power electronic enterprises. Since many devices to be tested require high voltage testing, the DC test power supply is required to provide high voltage output to meet various testing environments. Full-bridge conversion is a commonly used topology for high-frequency DC test power supply. However, due to the limitations of the development level of existing semiconductor devices, it is difficult to achieve high voltage output in a single channel. Therefore, multiple channels are used in series to achieve high voltage output. However, when the output is in an idle or light load state, the duty cycle of the main control signal is very small, and individual differences in hardware can cause each module to fail to achieve voltage equalization output. The existing method of adding a dead load greatly reduces the efficiency of the power supply itself, and also increases the size and cost of the power supply. There is also a method of separately controlling the wave generation, which occupies a large amount of DSP resources.

[0003] Chinese patent publication CN108494259A discloses a control method for a high-voltage DC power supply series-parallel combination system, which belongs to the technical field of high-voltage DC power supply and voltage and current control. When the high-voltage DC power supply IPOS combination system is working normally, the voltage outer loop samples the system output voltage and the output voltage of each module in each switching cycle, adjusts the system output voltage through a PI control strategy, and simultaneously achieves output voltage equalization. The current inner loop mainly uses a deadbeat control strategy to control the output current of the inverter module in the system, reduces the distortion rate of the current waveform, and improves the instantaneous response speed of the system. The control method in the patent application not only obtains high voltage and high power, but also reduces the current stress of the input side switch and the voltage stress of the output side device, simultaneously speeds up the dynamic response speed, and improves the control precision. The patent application is suitable for high-voltage DC power supplies that require high output voltage and fast dynamic response. However, it does not solve the problem of voltage equalization when the DC power supply is in an idle or light load state. SUMMARY

[0004] The technical problem to be solved by the present application is that the existing DC power supply cannot achieve voltage equalization when in an idle or light load state.

[0005] The application solves the above technical problems by the following technical means: a voltage equalization control circuit, comprising three main power circuits connected in series, a sampling circuit and a master control chip, the output ends of the three main power circuits are connected with the input end of the sampling circuit, the output end of the sampling circuit is connected with the master control chip, the master control chip is connected with the control ends of the three main power circuits respectively, each main power circuit comprises a full-bridge conversion module, a resonance module, a rectification module and a filter module, and the full-bridge conversion module, the resonance module, the rectification module and the filter module are connected in sequence; when the DC power supply is in light load or no load output, the three main power circuits are PWM controlled by the way of copying and emitting waves, and the output voltage equalization ring of two of the three main power circuits functions to fine-tune the duty cycle of the driving signal, so that the voltage equalization control is realized.

[0006] The application realizes the voltage sampling of each output by the main power circuits connected in series, and feeds back the DC voltage to the control ends of the three main power circuits, controls the conduction and turn-off of the full-bridge conversion module by the pulse driving signal emitted by the master control chip, realizes the size of the output voltage and power by adjusting the duty cycle of the driving signal, realizes the specified high voltage equalization output by the resonance module, the rectification module and the filter module and the series connection of the three main power circuits, and realizes the voltage equalization control by the PWM control of the three main power circuits by the way of copying and emitting waves and the fine-tuning of the duty cycle of the driving signal by the output voltage equalization ring of two of the three main power circuits when the DC power supply is in light load or no load output, so that the problem of no voltage equalization in no load or light load output is solved.

[0007] Further, the full-bridge conversion module comprises a capacitor C3n, a switch tube An, a switch tube Bn, a switch tube Cn and a switch tube Dn, one end of the capacitor C3n is connected with the source electrode of the switch tube An, the drain electrode of the switch tube An is connected with the source electrode of the switch tube Cn, the drain electrode of the switch tube Cn is connected with the other end of the capacitor C3n, the source electrode of the switch tube Bn is connected with the source electrode of the switch tube An, the drain electrode of the switch tube Bn is connected with the source electrode of the switch tube Dn, the drain electrode of the switch tube Dn is connected with the drain electrode of the switch tube Cn, wherein n is 1, 2 or 3, and n represents the nth main power circuit.

[0008] Further, the resonance module comprises an inductor L1n, a capacitor C1n and an inductor L2n, one end of the inductor L1n is connected with the drain electrode of the switch tube An, the other end of the inductor L1n is connected with one end of the inductor L2n through the capacitor C1n.

[0009] Further, the rectifier module comprises a transformer Tn, a diode D1n, a diode D2n, a diode D3n and a diode D4n, one end of a primary winding of the transformer Tn is connected with the other end of the inductor L2n, the other end of the primary winding of the transformer Tn is connected with the source of the switch tube Dn, one end of a secondary winding of the transformer Tn is connected with the anode of the diode D1n and the cathode of the diode D2n, the other end of the secondary winding of the transformer Tn is connected with the anode of the diode D3n and the cathode of the diode D4n, the cathode of the diode D3n is connected with the cathode of the diode D1n, and the anode of the diode D4n is connected with the anode of the diode D2n.

[0010] Further, the filter module comprises an inductor L3n, a capacitor C2n and a load Rn, one end of the inductor L3n is connected with the cathode of the diode D3n, the other end of the inductor L3n is connected with one end of the capacitor C2n and one end of the load Rn respectively, the other end of the capacitor C2n and the other end of the load Rn are both connected with the anode of the diode D4n.

[0011] Further, the model of the main control chip is TMS320F28335.

[0012] Further, the model of the main chip of the sampling circuit is ADMC401.

[0013] The application also provides a control method of the voltage-sharing control circuit, which comprises: the sum of the output voltages of the three main power circuits is U O , the sum of the output voltages of the second main power circuit and the third main power circuit is 2U O / 3, the output voltage of the third main power circuit is U O / 3, the sum of the output voltages of the three main power circuits is compared with the reference voltage Uref and then input to the third PI regulator, the output result of the third PI regulator is compared with the average of the primary-side current, the comparison result is output to the fourth PI regulator, the fourth PI regulator outputs three identical PWM waves to respectively control the three main power circuits, and the sum of the output voltages of the second main power circuit and the third main power circuit 2U O / 3 is sampled by the sampling circuit and then compared with the sum of the output voltages of the three main power circuits U OThe voltage of the first main power circuit is obtained by difference, the voltage of the first main power circuit is compared with a reference value and the comparison result is input to a first PI regulator, the first PI regulator fine tunes the duty cycle of the driving signal of the first main power circuit as an output voltage equalization ring of the first main power circuit, and controls the first main power circuit; the output voltage of the third main power circuit is sampled by a sampling circuit, and then the main control chip compares the sampling value with the reference value and inputs the comparison result to a second PI regulator, the second PI regulator fine tunes the duty cycle of the driving signal of the third main power circuit as an output voltage equalization ring of the third main power circuit, and controls the third main power circuit.

[0014] Further, the method further comprises: testing how much load can be output with voltage equalization without performing voltage equalization control on the second main power circuit and the third main power circuit before performing the voltage equalization control.

[0015] Further, the testing how much load can be output with voltage equalization without performing voltage equalization control on the second main power circuit and the third main power circuit comprises: opening a loop of an output voltage equalization ring of the second main power circuit and the third main power circuit, outputting in an empty state, monitoring the output voltage of each circuit, gradually increasing the load until the output voltage is equalized, and recording an output current Imin; when the output current is lower than Imin, a fourth PI regulator outputs three same PWM waves to perform PI regulation on the first main power circuit, the second main power circuit and the third main power circuit, and the output voltage equalization rings of the second main power circuit and the third main power circuit are enabled, that is, the first PI regulator and the second PI regulator are enabled, to fine tune the duty cycle of the driving signal of each main power circuit, so as to realize voltage equalization in an empty state or a light load state; when the output current is greater than Imin, the output voltage equalization rings of the second main power circuit and the third main power circuit are shielded, and the fourth PI regulator directly outputs three same PWM waves to control the three main power circuits, so as to realize natural voltage equalization.

[0016] The application has the advantages that:

[0017] (1) The application realizes voltage equalization in an empty state or a light load state by designing a series connection of main power circuits, sampling the output voltage of each circuit and sending the voltage to a main control chip. In operation, a direct current voltage is fed back to the control end of the three main power circuits, a pulse driving signal output by the main control chip is used to control the conduction and turn-off of a full-bridge conversion module, the main control chip adjusts the duty cycle of the driving signal to realize the size of the output voltage and power, and the three main power circuits perform PWM control in a copy wave mode when the direct current power is in a light load state or an empty state, and the output voltage equalization ring is enabled to fine tune the duty cycle of the driving signal, so as to realize voltage equalization control and solve the problem of voltage unequalization in an empty state or a light load state.

[0018] (2) The voltage equalization control method provided by the application, when the output current is lower than Imin, namely when the DC power supply is in no-load or light-load output, the first main power circuit, the second main power circuit and the third main power circuit are subjected to PI regulation, the output voltage equalization ring of the second main power circuit and the third main power circuit is in action, the three-way driving signal is copied and wave-reused for fine-tuning by the voltage equalization ring, and the logic is clear and the control is simple.

[0019] (3) The voltage equalization control method provided by the application, when the output current is greater than Imin, the output voltage equalization ring of the second main power circuit and the third main power circuit is shielded, the first main power circuit is subjected to PI regulation, and the three-way same PWM wave is directly output by the fourth PI regulator, namely the three-way main power circuit is copied and wave-reused for control, so that the natural voltage equalization effect can be achieved, at this time, the control is simple, the PI regulators required are less, and since the current is greater than Imin, the natural voltage equalization can be achieved, so that the output voltage equalization ring of the second main power circuit and the third main power circuit is directly shielded, thereby only the third PI regulator and the fourth PI regulator are in action, the control logic is reduced, the control steps are simplified, and the DSP resource occupied by the three-way separate control is less. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 A schematic diagram of a voltage equalization control circuit provided by the embodiment of the application;

[0021] Figure 2 A driving signal waveform diagram of a voltage equalization control circuit provided by the embodiment of the application;

[0022] Figure 3 A control logic schematic diagram of a control method of a voltage equalization control circuit provided by the embodiment of the application;

[0023] Figure 4 A control logic schematic diagram of a control method of a voltage equalization control circuit provided by the embodiment of the application when the output current is greater than Imin. DETAILED DESCRIPTION

[0024] To make the purpose, technical scheme and advantages of the embodiments of the application clearer, the technical scheme in the embodiments of the application will be described below in a clear and complete manner in combination with the embodiments of the application. Obviously, the described embodiments are some of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the application.

[0025] As Figure 1As shown, a kind of voltage-sharing control circuit, including three-way series connection main power circuit, sampling circuit U1 and main control chip U2, the output end of three-way main power circuit is connected with the input end of sampling circuit U1, the output end of sampling circuit U1 is connected with main control chip U2, main control chip U2 is connected with the control end of three-way main power circuit respectively, each main power circuit includes full-bridge conversion module 1, resonant module 2, rectifier module 3 and filter module 4, the full-bridge conversion module 1, resonant module 2, rectifier module 3 and filter module 4 are sequentially connected;When the DC power supply light load or no-load output, three-way main power circuit is driven by the mode of PWM control simultaneously output voltage-sharing ring and functions to output duty cycle fine adjustment, realizes voltage-sharing control.The model of main control chip U2 is TMS320F28335.The main chip model of sampling circuit U1 is ADMC401.

[0026] The full-bridge conversion module 1 includes capacitor C3n, switch tube An, switch tube Bn, switch tube Cn and switch tube Dn, one end of the capacitor C3n is connected with the source electrode of switch tube An, the drain electrode of switch tube An is connected with the source electrode of switch tube Cn, the drain electrode of switch tube Cn is connected with the other end of capacitor C3n, the source electrode of switch tube Bn is connected with the source electrode of switch tube An, the drain electrode of switch tube Bn is connected with the source electrode of switch tube Dn, the drain electrode of switch tube Dn is connected with the drain electrode of switch tube Cn, wherein n is 1, 2 or 3, n represents the nth main power circuit.

[0027] The resonant module 2 includes inductor L1n, capacitor C1n and inductor L2n, one end of the inductor L1n is connected with the drain electrode of switch tube An, the other end of the inductor L1n is connected with one end of the inductor L2n through the capacitor C1n.

[0028] The rectifier module 3 includes transformer Tn, diode D1n, diode D2n, diode D3n and diode D4n, one end of the primary coil of transformer Tn is connected with the other end of inductor L2n, the other end of the primary coil of transformer Tn is connected with the source electrode of switch tube Dn, one end of the secondary coil of transformer Tn is connected with the anode of diode D1n and the cathode of diode D2n, the other end of the secondary coil of transformer Tn is connected with the anode of diode D3n and the cathode of diode D4n, the cathode of diode D3n is connected with the cathode of diode D1n, the anode of diode D4n is connected with the anode of diode D2n.

[0029] The filter module 4 includes inductor L3n, capacitor C2n and load Rn, one end of the inductor L3n is connected with the cathode of diode D3n, the other end of the inductor L3n is connected with one end of the capacitor C2n and one end of the load Rn respectively, the other end of the capacitor C2n and the other end of the load Rn are both connected with the anode of diode D4n.

[0030] The full-bridge conversion structure of the primary side three paths is composed of four switch tubes, a resonant inductor and a DC blocking capacitor, the secondary side three paths are composed of rectifier circuit and LC filter circuit, and the voltage sampling of each path is sent to the master control chip U2. During operation, the DC voltage is applied between the bus Vbus+ and Vbus-, the on and off of the four switch tubes An, Bn, Cn and Dn are controlled by the pulse driving signal sent by the master control chip U2, the size of the output voltage and power is realized by adjusting the duty cycle of the driving signal in the PWM mode, then the effect of electrical isolation and step-up or step-down of the primary and secondary sides is achieved through the transformer, and finally the specified high voltage equalization output is achieved through LC filtering and three paths in series. The driving signal waveform of each switch tube is as shown in Figure 2 .

[0031] However, due to the individual differences of hardware, the actual conduction time of the switch tube will have errors, and in the case of no load or light load, the actual duty cycle of the switch tube will be very small because there is not enough load at the output end to consume this part of energy, so the actual duty cycle of each switch tube will be quite different, resulting in uneven voltage of the three paths. The present application adopts the mode of three-way driving signal replication and fine tuning to control. The 1 / 3Uo and 2 / 3Uo output equalization rings output current inner ring, and the equalization output is realized by fine tuning the duty cycle of the driving signal of each switch tube, but the size of the duty cycle of the equalization ring change is limited, and the specific control method is described in detail as shown in Figure 3 , the present application also provides a control method of the equalization control circuit, the method comprising: the sum of the output voltages of the three main power circuits is U O , the sum of the output voltages of the second main power circuit and the third main power circuit is 2U O / 3, the output voltage of the third main power circuit is U O / 3, the sum of the output voltages of the three main power circuits is compared with the reference voltage Uref and then input to the third PI regulator, the output result of the third PI regulator is compared with the average of the primary current, and the comparison result is output to the fourth PI regulator, the fourth PI regulator outputs three identical PWM waves to control the three main power circuits respectively; the sum of the output voltages of the second main power circuit and the third main power circuit 2U O / 3 is sampled by the sampling circuit, and then the master control chip compares it with the sum of the output voltages of the three main power circuits U OThe voltage of the first main power circuit is subtracted to obtain a first voltage, the first voltage is compared with a reference value, and a comparison result is input to a first PI regulator. The first PI regulator fine-tunes a duty cycle of a driving signal of the first main power circuit as an output voltage loop of the first main power circuit, and controls the first main power circuit. The output voltage of the third main power circuit is sampled by a sampling circuit, and then a sampling value is compared with the reference value by the master control chip, and a comparison result is input to a second PI regulator. The second PI regulator fine-tunes a duty cycle of a driving signal of the third main power circuit as an output voltage loop of the third main power circuit, and controls the third main power circuit.

[0032] The method further comprises testing how much load can be output by the output end in the case that the second main power circuit and the third main power circuit are not subjected to the voltage equalization control before the voltage equalization control is performed.

[0033] The testing how much load can be output by the output end in the case that the second main power circuit and the third main power circuit are not subjected to the voltage equalization control comprises: opening a loop of an output voltage loop of the second main power circuit and the third main power circuit, outputting in an empty state, monitoring each output voltage, gradually increasing the load until the output voltage is equalized, and recording an output current Imin. When the output current is lower than Imin, i.e., the DC power supply is in an empty state or a light load state, a fourth PI regulator outputs three identical PWM waves to PI-regulate the first main power circuit, the second main power circuit and the third main power circuit. Meanwhile, the output voltage loop of the second main power circuit and the third main power circuit is effective, i.e., the first PI regulator and the second PI regulator are effective, to fine-tune a duty cycle of a driving signal of each main power circuit. The three driving signals are copied and output, and then fine-tuned by the output voltage loop. The logic is clear and the control is simple. Figure 4 As shown in the figure, when the output current is greater than Imin, the output voltage loop of the second main power circuit and the third main power circuit is shielded, and three identical PWM waves output by the fourth PI regulator are directly used to control the three main power circuits. In this way, the three PWM waves are identical, and the natural voltage equalization effect can be achieved. At this time, the control is simple, the PI regulators required are less, and since the natural voltage equalization can be achieved when the current is greater than Imin, the output voltage loop of the second main power circuit and the third main power circuit does not need to be subjected to the voltage equalization regulation. Therefore, only the third PI regulator and the fourth PI regulator are effective, the control logic is reduced, the control steps are simplified, and the DSP resource occupied is less than that in the three separate controls.

[0034] The above examples are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can be modified, or some technical features can be replaced by equivalent features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A voltage-sharing control circuit, characterized in that: The system comprises three main power circuits, a sampling circuit and a main control chip connected in series. The output ends of the three main power circuits are connected to the input ends of the sampling circuits, the output ends of the sampling circuits are connected to the main control chip, and the main control chip is respectively connected to the control ends of the three main power circuits. Each main power circuit comprises a full-bridge conversion module, a resonance module, a rectifier module and a filter module, which are connected in sequence. When the DC power supply is lightly loaded or no-loaded, the three main power circuits perform PWM control by copying the wave, and at the same time, the output voltage-sharing loops of two of the main power circuits work to fine-tune the duty cycle of the drive signal to achieve voltage-sharing control. The sum of the output voltages of the three main power circuits is U O The sum of the output voltages of the second and third main power circuits is 2U O / 3, the output voltage of the third main power circuit is U O / 3, the sum of the output voltages of the three main power circuits is compared with the reference voltage Uref and then input to the third PI regulator. The output result of the third PI regulator is compared with the average value of the primary current, and the comparison result is output to the fourth PI regulator. The fourth PI regulator outputs three identical PWM waves to perform PWM control on the three main power circuits respectively. The sum of the output voltages of the second main power circuit and the third main power circuit is 2U O After sampling by the sampling circuit, the main control chip calculates the sum of the output voltage of the sampling circuit and the output voltage of the three main power circuits as U O The voltage of the first main power circuit is obtained by difference, the voltage of the first main power circuit is compared with the reference value and the comparison result is input to the first PI regulator. The first PI regulator serves as the output equalizing loop of the first main power circuit to fine-tune the duty cycle of the drive signal of the first main power circuit, thereby controlling the first main power circuit. After the output voltage of the third main power circuit is sampled by the sampling circuit, the main control chip compares the sampled value with the reference value and inputs the comparison result to the second PI regulator. The second PI regulator serves as the output equalizing loop of the third main power circuit to fine-tune the duty cycle of the drive signal of the third main power circuit, thereby controlling the third main power circuit.

2. The voltage-sharing control circuit according to claim 1, wherein: The full-bridge conversion module includes a capacitor C3n, a switch tube An, a switch tube Bn, a switch tube Cn, and a switch tube Dn. One end of the capacitor C3n is connected to the source of the switch tube An, the drain of the switch tube An is connected to the source of the switch tube Cn, the drain of the switch tube Cn is connected to the other end of the capacitor C3n, the source of the switch tube Bn is connected to the source of the switch tube An, the drain of the switch tube Bn is connected to the source of the switch tube Dn, and the drain of the switch tube Dn is connected to the drain of the switch tube Cn. Wherein, n is 1, 2, or 3, and n represents the nth main power circuit.

3. The voltage-sharing control circuit according to claim 2, wherein: The resonance module includes an inductor L1n, a capacitor C1n, and an inductor L2n. One end of the inductor L1n is connected to the drain of the switch tube An, and the other end of the inductor L1n is connected to one end of the inductor L2n through the capacitor C1n.

4. The voltage-sharing control circuit according to claim 3, wherein: The rectifier module includes a transformer Tn, a diode D1n, a diode D2n, a diode D3n, and a diode D4n. One end of the primary coil of the transformer Tn is connected to the other end of the inductor L2n, the other end of the primary coil of the transformer Tn is connected to the source of the switch tube Dn, one end of the secondary coil of the transformer Tn is connected to the anode of the diode D1n and the cathode of the diode D2n, the other end of the secondary coil of the transformer Tn is connected to the anode of the diode D3n and the cathode of the diode D4n, the cathode of the diode D3n is connected to the cathode of the diode D1n, and the anode of the diode D4n is connected to the anode of the diode D2n.

5. The voltage-sharing control circuit according to claim 4, characterized in that: The filtering module includes an inductor L3n, a capacitor C2n and a load Rn. One end of the inductor L3n is connected to the cathode of the diode D3n, and the other end of the inductor L3n is connected to one end of the capacitor C2n and one end of the load Rn respectively. The other end of the capacitor C2n and the other end of the load Rn are both connected to the anode of the diode D4n.

6. The voltage balancing control circuit according to claim 1, characterized in that: The model of the main control chip is TMS320F28335.

7. The voltage balancing control circuit according to claim 1, characterized in that: The main chip model of the sampling circuit is ADMC401.

8. A control method for a voltage balancing control circuit according to any one of claims 1 to 7, characterized in that: The method includes: the sum of the output voltages of the three main power circuits is U O The sum of the output voltages of the second and third main power circuits is 2U O / 3, the output voltage of the third main power circuit is U O / 3, the sum of the output voltages of the three main power circuits is compared with the reference voltage Uref and then input to the third PI regulator. The output result of the third PI regulator is compared with the average value of the primary current, and the comparison result is output to the fourth PI regulator. The fourth PI regulator outputs three identical PWM waves to perform PWM control on the three main power circuits respectively. The sum of the output voltages of the second main power circuit and the third main power circuit is 2U O After sampling by the sampling circuit, the main control chip calculates the sum of the output voltage of the sampling circuit and the output voltage of the three main power circuits as U O The voltage of the first main power circuit is obtained by difference, the voltage of the first main power circuit is compared with the reference value and the comparison result is input to the first PI regulator. The first PI regulator serves as the output equalizing loop of the first main power circuit to fine-tune the duty cycle of the drive signal of the first main power circuit, thereby controlling the first main power circuit. After the output voltage of the third main power circuit is sampled by the sampling circuit, the main control chip compares the sampled value with the reference value and inputs the comparison result to the second PI regulator. The second PI regulator serves as the output equalizing loop of the third main power circuit to fine-tune the duty cycle of the drive signal of the third main power circuit, thereby controlling the third main power circuit.

9. The control method of a voltage balancing control circuit according to claim 8, characterized in that: The method further includes: before performing the voltage balancing control, testing how much load is added to the output end to achieve voltage balancing output when the second main power circuit and the third main power circuit are not voltage balancing controlled.

10. The control method of a voltage balancing control circuit according to claim 9, characterized in that: The test shows how much load can be added to the output end to achieve voltage equalization when the second main power circuit and the third main power circuit are not subjected to voltage equalization control, including: opening the output voltage equalization loop of the second main power circuit and the third main power circuit, outputting at no load, monitoring the output voltage of each channel, gradually increasing the load until voltage equalization is output, and recording the output current Imin; when the output current is lower than Imin, the fourth PI regulator outputs three identical PWM waves to perform PI regulation on the first main power circuit, the second main power circuit and the third main power circuit; at the same time, the output voltage equalization loops of the second main power circuit and the third main power circuit work, that is, the first PI regulator and the second PI regulator work, and fine-tune the duty cycle of the drive signal of each main power circuit to achieve voltage equalization when no load or light load is applied; when the output current is greater than Imin, the output voltage equalization loops of the second main power circuit and the third main power circuit are shielded, and the fourth PI regulator directly outputs three identical PWM waves, that is, the wave control is replicated for the three main power circuits to achieve natural voltage equalization.

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