Data processing method, device, electronic device and computer readable storage medium

Abstract

The present disclosure discloses a data processing method, device, electronic device and computer-readable storage medium. The method includes: obtaining a plurality of first data, the plurality of first data having a first length; encoding the plurality of first data into second data, the second data having a second length; reading the second data in response to executing a first task; converting the second data into a plurality of third data, wherein the plurality of third data has a second length, and the values ​​of the plurality of third data are the same as the values ​​of the plurality of first data. The embodiment of the present disclosure encodes the data so that it saves storage space, and then decodes the data so that it can adapt to the data length required in the calculation process, which can save memory space and be applicable to more calculation processes.

Description

Technical Field

[0001] The present disclosure relates to the field of artificial intelligence technology, and in particular to a data processing method, device, and computer-readable storage medium. Background Art

[0002] With the development of artificial intelligence technology, more and more lightweight neural network models are running on embedded terminal processors, such as digital signal processing (DSP) and advanced RISC processors (ARM). With the development of technology, higher and higher requirements are put forward for the processing capabilities of embedded terminals, as well as the computing power and memory space of neural network models.

[0003] In the prior art, many DSP processors, such as the High Fidelity (HIFI) series DSP and CEVA series DSP in the voice industry, support a minimum calculation length of 16 bits, and usually use a 16-bit quantization model. However, the DSP cache is generally small, and the 16-bit quantization model can store fewer parameters, resulting in poor calculation results. An 8-bit quantization model can use more parameters, but the DSP processor supports a minimum of 16-bit data. Summary of the invention

[0004] This summary is provided to introduce concepts in a brief form that will be described in detail in the detailed description below. This summary is not intended to identify key features or essential features of the claimed technical solution, nor is it intended to limit the scope of the claimed technical solution.

[0005] In order to at least partially solve the above technical problems, according to one aspect of the present disclosure, the following technical solutions are provided:

[0006] A data processing method, comprising:

[0007] Acquire a plurality of first data, wherein the plurality of first data have a first length;

[0008] Encoding the plurality of first data into second data, wherein the second data has a second length;

[0009] In response to executing the first task, reading the second data;

[0010] The second data are converted into a plurality of third data, wherein the plurality of third data have a second length, and values ​​of the plurality of third data are the same as values ​​of the plurality of first data.

[0011] Furthermore, after encoding the plurality of first data into second data, the method further includes:

[0012] The second data is stored in a cache of a processor, and the processor is addressed with the second length.

[0013] Further, encoding the plurality of first data into second data includes:

[0014] generating a plurality of data segments according to the order of the plurality of first data;

[0015] The plurality of data segments are arranged in the order to generate the second data.

[0016] Further, encoding the plurality of first data into second data includes:

[0017] Combining the plurality of first data in pairs to obtain at least one first data group;

[0018] Two first data in the at least one first data group are encoded to obtain at least one second data.

[0019] Furthermore, converting the second data into a plurality of third data includes:

[0020] Decoding the second data to obtain the plurality of first data;

[0021] The plurality of first data are converted into a plurality of third data, wherein the plurality of third data have the same value as the plurality of first data.

[0022] Further, converting the plurality of first data into a plurality of third data includes:

[0023] The high bits of the plurality of first data are padded with 0 to generate the plurality of third data.

[0024] Further, decoding the second data to obtain the plurality of first data includes:

[0025] Segmenting the second data to obtain a plurality of data segments;

[0026] The plurality of data segments are subjected to a second calculation to obtain the plurality of first data.

[0027] In order to achieve the above object, according to one aspect of the present disclosure, the following technical solution is provided:

[0028] A data processing device, comprising:

[0029] A first data acquisition module, used for acquiring a plurality of first data, wherein the plurality of first data have a first length;

[0030] An encoding module, used for encoding the plurality of first data into second data, wherein the second data has a second length;

[0031] A second data reading module, configured to read the second data in response to executing the first task;

[0032] The data conversion module is used to convert the second data into a plurality of third data, wherein the plurality of third data has a second length, and the values ​​of the plurality of third data are the same as the values ​​of the plurality of first data.

[0033] Furthermore, the data processing device is also used for:

[0034] The second data is stored in a cache of a processor, and the processor is addressed with the second length.

[0035] Furthermore, the encoding module is also used for:

[0036] generating a plurality of data segments according to the order of the plurality of first data;

[0037] The plurality of data segments are arranged in the order to generate the second data.

[0038] Furthermore, the encoding module is also used for:

[0039] Combining the plurality of first data in pairs to obtain at least one first data group;

[0040] Two first data in the at least one first data group are encoded to obtain at least one second data.

[0041] Furthermore, the data conversion module is also used for:

[0042] Decoding the second data to obtain the plurality of first data;

[0043] The plurality of first data are converted into a plurality of third data, wherein the plurality of third data have the same value as the plurality of first data.

[0044] Furthermore, the data conversion module is also used for:

[0045] The high bits of the plurality of first data are padded with 0 to generate the plurality of third data.

[0046] Furthermore, the data conversion module is also used for:

[0047] Segmenting the second data to obtain a plurality of data segments;

[0048] The plurality of data segments are subjected to a second calculation to obtain the plurality of first data.

[0049] In order to achieve the above object, according to one aspect of the present disclosure, the following technical solution is provided:

[0050] An electronic device, comprising:

[0051] a memory for storing non-transitory computer-readable instructions; and

[0052] A processor is used to run the computer-readable instructions so that the processor implements any of the data processing methods described above when executing the instructions.

[0053] In order to achieve the above object, according to one aspect of the present disclosure, the following technical solution is provided:

[0054] A computer-readable storage medium is used to store non-transitory computer-readable instructions. When the non-transitory computer-readable instructions are executed by a computer, the computer is caused to execute any of the data processing methods described above.

[0055] In order to achieve the above object, according to another aspect of the present disclosure, the following technical solution is also provided:

[0056] A data processing terminal comprises any one of the above data processing devices.

[0057] The present disclosure discloses a data processing method, device, electronic device and computer-readable storage medium. The method includes: obtaining a plurality of first data, the plurality of first data having a first length; encoding the plurality of first data into second data, the second data having a second length; reading the second data in response to executing a first task; converting the second data into a plurality of third data, wherein the plurality of third data has a second length, and the values ​​of the plurality of third data are the same as the values ​​of the plurality of first data. The embodiment of the present disclosure encodes the data so that it saves storage space, and then decodes the data so that it can adapt to the data length required in the calculation process, which can save memory space and be applicable to more calculation processes.

[0058] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following specifically cites the preferred embodiments and describes them in detail with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0060] Figure 1 is a flowchart of a data processing method according to an embodiment of the present disclosure;

[0061] Figure 2 A further flowchart of a data processing method according to an embodiment of the present disclosure is shown;

[0062] Figure 3 A further flowchart of a data processing method according to an embodiment of the present disclosure is shown;

[0063] Figure 4 A further flowchart of a data processing method according to an embodiment of the present disclosure is shown;

[0064] Figure 5 A further flowchart of a data processing method according to an embodiment of the present disclosure is shown;

[0065] Figure 6 A further flowchart of a data processing method according to an embodiment of the present disclosure is shown;

[0066] Figure 7 is a structural schematic diagram of a data processing device according to an embodiment of the present disclosure;

[0067] Figure 8 The figure is a schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0068] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein, which are instead provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0069] It should be understood that the various steps described in the method embodiments of the present disclosure may be performed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present disclosure is not limited in this respect.

[0070] The term "including" and its variations used herein are open inclusions, i.e., "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the following description.

[0071] The present disclosure provides a data processing method. Figure 1 As shown, the data processing method mainly includes the following steps S101 to S104.

[0072] Step S101: Acquire a plurality of first data, wherein the plurality of first data have a first length;

[0073] Optionally, the first data is quantized data in a quantized network model, such as a quantization parameter. Exemplarily, the first data is an 8-bit quantization parameter, and its length is 8 bits. Quantization refers to approximating the original data to obtain data with low original precision but small storage space. For example, if the original parameter of the network model is 32-bit data, it is quantized into 8-bit parameters for calculation through the quantization. In this way, the same storage space can store four times as many parameters as before, and the available parameters are greatly increased.

[0074] Step S102: Encode the plurality of first data into second data, where the second data has a second length;

[0075] Since some processors do not support the calculation of 8-bit data, their addressing length is at least 16 bits, that is, their cache (RAM) uses 16 bits as a storage unit. Even if an 8-bit data is stored in it, it will take up 16 bits of storage space. Therefore, if an 8-bit quantized network model is used, if the model has N parameters, when a 16-bit processor is used, its cache needs to be at least 16N bits in size to store these N parameters, but the actual size of the parameters is 8N bits. Therefore, in step S12, the multiple first data are encoded so that they can adapt to addressing greater than the first length.

[0076] Optionally, the step S102 includes:

[0077] Step S201, generating a plurality of data segments according to the order of the plurality of first data;

[0078] Step S202: Arrange the multiple data segments in the order to generate the second data.

[0079] Among them, the multiple first data correspond to the multiple data segments one by one, that is, each first data generates a data segment. Exemplarily, the multiple first data are 2 8-bit quantized data, which are represented in hexadecimal as: 0x12 and 0x34 respectively; then the first data segment is generated by 0x12, and the second data segment is generated by 0x34, and then the two data segments are arranged into the second data in the order of the first data. In an example, the first data can be directly used as the data segment, that is, the two 8-bit quantized data are combined and respectively used as the high and low bits of a 16-bit data, such as the above-mentioned 0x12 and 0x34, which can be used as the high and low bits of a 16-bit data according to their original values: 0x1234. In this way, multiple first data with shorter lengths can be encoded into a second data with longer length to adapt to the storage space and calculation of a processor with a longer length.

[0080] Optionally, the step S201 includes: performing a first calculation on the multiple first data in sequence to obtain multiple data segments. Wherein, each first data in the sequence can be calculated differently. For example, adding 0 to the first first data and adding a first preset value to the second first data. Exemplarily, as the above two 8-bit quantized data: 0x12 and 0x34; wherein 0x12 does not change and serves as the high-order data of the second data, 0x34 plus a preset value 128 (0x80) is converted to 0xb4 as the low-order data of the second data, and the second data is 0x34b4.

[0081] Optionally, the step S102 includes:

[0082] Step S301, combining the plurality of first data in pairs to obtain at least one first data group;

[0083] Step S302: Encode two first data in the at least one first data group to obtain at least one second data.

[0084] Exemplarily, the plurality of first data are 16 8-bit quantized data, such as:

[0085] 0x12, 0x56, 0xab, 0x2a, 0x35, 0x89, 0x65, 0xcd;

[0086] 0x34, 0x78, 0xcd, 0x3b, 0x67, 0x34, 0xab, 0xde;

[0087] These 16 8-bit quantized data are grouped in pairs to obtain (0x12, 0x34), (0x56, 0x78), (0xab, 0xcd), (0x2a, 0x3b), (0x35, 0x67), (0x89, 0x34), (0x65, 0xab), and (0xcd, 0xde).

[0088] The two 8-bit quantized data in each group are encoded, and eight 16-bit data are obtained as calculated above: 0x12b4, 0x56f8, 0xab4d, 0x2abb, 0x35e7, 0x89b4, 0x652b, and 0xcd5e.

[0089] Through the above steps, the plurality of first data are converted into second data of a second length to adapt to the addressing length of the processor, so that the data is stored more compactly and the storage space is saved.

[0090] Optionally, after step S102, the method further includes:

[0091] The second data is stored in a cache of a processor, and the processor is addressed with the second length.

[0092] As for the parameters of the quantization model described in the above embodiment, when performing model calculation, the parameters need to be passed into the cache of the processor. Since the addressing length of the processor is large and the length of the parameters of the quantization model is short, the parameters are encoded into the second length through the above step S102 and then passed into the cache of the processor to execute the calculation task of the model.

[0093] Step S103, in response to executing the first task, reading the second data;

[0094] Optionally, in response to the processor executing a first task such as a model calculation task, second data related to the first task, such as parameters of an encoded 8-bit model, is read from a cache of the processor.

[0095] Step S104: convert the second data into a plurality of third data, wherein the plurality of third data has a second length, and the values ​​of the plurality of third data are the same as the values ​​of the plurality of first data.

[0096] Since the processor only supports the calculation of data of the minimum second length, and the second data is encoded data and cannot be used directly for calculation, in step S104, the second data is converted into multiple third data, the value of the third data is the same as the first data, but the length is still the second length.

[0097] Optionally, the step S104 includes:

[0098] Step S401, decoding the second data to obtain the plurality of first data;

[0099] Step S402: convert the plurality of first data into a plurality of third data, wherein the plurality of third data have the same value as the plurality of first data.

[0100] In the above steps, the second data is first restored into a plurality of first data by a decoding method opposite to the encoding method, and then the first data is converted into third data with a second length.

[0101] Optionally, the step S401 includes:

[0102] Step S501, segmenting the second data into multiple data segments;

[0103] Step S502: Perform a second calculation on the multiple data segments to obtain the multiple first data.

[0104] For example, the 16-bit data 0x12b4 is first divided into high-order data and low-order data. The high-order data remains unchanged to generate 0x12, and the low-order data is subtracted by 128 (0x80) to obtain 0x34.

[0105] Optionally, step S402 includes: padding the high bits of the plurality of first data with 0 to generate the plurality of third data. For example, padding the high bits of 0x12 with 0 to generate 0x0012, and padding the high bits of 0x34 with 0 to generate 0x0034. In this way, each of the generated third data has the same value as the corresponding first data, but has a length of 16 bits, so that the third data can be calculated in the processor.

[0106] Optionally, the step S104 includes:

[0107] Step S601, shifting the second data to obtain first and third data;

[0108] Step S602: Perform a third calculation on the second data to obtain second and third data.

[0109] Taking the above example, the second data is 16-bit data 0x12b4; 0x12b4 is shifted right by 8 bits to obtain 0x0012; 0x12b4 is first ANDed with 0x00ff to obtain 0x00b4, and then 128 (0x80) is subtracted to obtain 0x0034.

[0110] After the operation in step S104, the 16-bit coded data in the above example are all converted into 16-bit calculation data. For example, 0x12b4, 0x56f8, 0xab4d, 0x2abb, 0x35e7, 0x89b4, 0x652b, 0xcd5e are converted into: 0x0012, 0x0056, 0x00ab, 0x002a, 0x0035, 0x0089, 0x0065, 0x00cd, 0x0034, 0x0078, 0x00cd, 0x003b, 0x0067, 0x0034, 0x00ab, 0x00de. Since each data has the same value as the original data, the length becomes 16 bits, which can adapt to the 16-bit processor for calculation.

[0111] Through the above steps S101 and S102, multiple first data are encoded to obtain second data of the second length, so that the cache storing data with the second length can store more first data; through the above steps S103-S104, the length of the first data is converted to the second length, so that the processor that supports the second length at the minimum can use the first data for calculation. This solves the problem of storage space waste and processor inapplicability.

[0112] The above embodiment discloses a data processing method, the method comprising: obtaining a plurality of first data, the plurality of first data having a first length; encoding the plurality of first data into second data, the second data having a second length; in response to executing a first task, reading the second data; converting the second data into a plurality of third data, wherein the plurality of third data has a second length, and the values ​​of the plurality of third data are the same as the values ​​of the plurality of first data. The disclosed embodiment encodes the data so that it saves storage space, and then decodes the data so that it can adapt to the data length required in the calculation process, which can save memory space and be applicable to more calculation processes.

[0113] Those skilled in the art should understand that, based on the above embodiments, obvious modifications (for example, combining the listed modes) or equivalent substitutions may be made.

[0114] In the above, although the various steps in the data processing method embodiment are described in the above order, those skilled in the art should be aware that the steps in the embodiments of the present disclosure are not necessarily executed in the above order, and they may also be executed in other orders such as reverse order, parallel order, and cross order. Moreover, on the basis of the above steps, those skilled in the art may also add other steps. These obvious variations or equivalent replacement methods should also be included in the protection scope of the present disclosure and will not be repeated here.

[0115] The following is an embodiment of the device disclosed in the present invention. The embodiment of the device disclosed in the present invention can be used to execute the steps implemented by the embodiment of the method disclosed in the present invention. For the convenience of explanation, only the parts related to the embodiment of the present invention are shown. For specific technical details not disclosed, please refer to the embodiment of the method disclosed in the present invention.

[0116] Embodiment 2

[0117] In order to solve the technical problem that the 16-bit quantization model in the prior art will increase the computing burden of the terminal and increase the memory usage, the embodiment of the present disclosure provides a data processing device 700. The device 700 can execute the steps in the data processing method embodiment described in the above embodiment 1. Figure 7 As shown, the device mainly includes: a first data acquisition module 701, an encoding module 702, a second data reading module 703 and a data conversion module 704; wherein,

[0118] A first data acquisition module 701 is used to acquire a plurality of first data, where the plurality of first data have a first length;

[0119] An encoding module 702, configured to encode the plurality of first data into second data, wherein the second data has a second length;

[0120] A second data reading module 703, configured to read the second data in response to executing the first task;

[0121] The data conversion module 704 is configured to convert the second data into a plurality of third data, wherein the plurality of third data have a second length, and values ​​of the plurality of third data are the same as values ​​of the plurality of first data.

[0122] Furthermore, the data processing device 700 is also used for:

[0123] The second data is stored in a cache of a processor, and the processor is addressed with the second length.

[0124] Furthermore, the encoding module 702 is also used for:

[0125] generating a plurality of data segments according to the order of the plurality of first data;

[0126] The plurality of data segments are arranged in the order to generate the second data.

[0127] Furthermore, the encoding module 702 is also used for:

[0128] Combining the plurality of first data in pairs to obtain at least one first data group;

[0129] Two first data in the at least one first data group are encoded to obtain at least one second data.

[0130] Furthermore, the data conversion module 704 is also used for:

[0131] Decoding the second data to obtain the plurality of first data;

[0132] The plurality of first data are converted into a plurality of third data, wherein the plurality of third data have the same value as the plurality of first data.

[0133] Furthermore, the data conversion module 704 is also used for:

[0134] The high bits of the plurality of first data are padded with 0 to generate the plurality of third data.

[0135] Furthermore, the data conversion module 704 is also used for:

[0136] Segmenting the second data to obtain a plurality of data segments;

[0137] The plurality of data segments are subjected to a second calculation to obtain the plurality of first data.

[0138] For detailed descriptions on the working principle of the data processing device embodiment, the technical effects achieved, etc., please refer to the relevant descriptions in the aforementioned data processing method embodiment, which will not be repeated here.

[0139] Embodiment 3

[0140] Reference below Figure 8 , which shows a schematic diagram of the structure of an electronic device 800 suitable for implementing the embodiment of the present disclosure. The terminal device in the embodiment of the present disclosure may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 8 The electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0141] like Figure 8As shown, the electronic device 800 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 801, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 802 or a program loaded from a storage device 808 into a random access memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the electronic device 800 are also stored. The processing device 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0142] Typically, the following devices may be connected to the I / O interface 805: input devices 806 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; output devices 807 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 808 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 809. The communication device 809 may allow the electronic device 800 to communicate with other devices wirelessly or by wire to exchange data. Although Figure 8 The electronic device 800 is shown with various devices, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead.

[0143] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device 809, or installed from a storage device 808, or installed from a ROM 802. When the computer program is executed by the processing device 801, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed.

[0144] It should be noted that the computer-readable medium disclosed above may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in combination with an instruction execution system, device or device. In the present disclosure, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, in which a computer-readable program code is carried. This propagated data signal may take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. The computer readable signal medium may also be any computer readable medium other than a computer readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.

[0145] In some embodiments, the client and the server may communicate using any currently known or future developed network protocol such as HTTP (HyperText Transfer Protocol), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), an internet (e.g., the Internet), and a peer-to-peer network (e.g., an ad hoc peer-to-peer network), as well as any currently known or future developed network.

[0146] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device.

[0147] The above-mentioned computer-readable medium carries one or more programs. When the above-mentioned one or more programs are executed by the electronic device, the electronic device: performs 8-bit quantization on the network parameters of the neural network model to obtain a first network parameter; encodes the first network parameter to obtain a 16-bit quantized second network parameter supported by the terminal processor; wherein, after encoding the two first network parameters, a 16-bit quantized second network parameter is obtained; and during the calculation process of the neural network model, the second network parameter is decoded into a 16-bit network parameter.

[0148] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including, but not limited to, object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0149] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0150] The units involved in the embodiments described in the present disclosure may be implemented by software or hardware. The name of a unit does not limit the unit itself in some cases. For example, the first acquisition unit may also be described as a "unit for acquiring at least two Internet Protocol addresses".

[0151] The functions described above herein may be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), and the like.

[0152] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0153] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present disclosure (but not limited to) by each other to form a technical solution.

[0154] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.

[0155] Although the subject matter has been described in language specific to structural features and / or methodological logical actions, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. On the contrary, the specific features and actions described above are merely example forms of implementing the claims.

Claims

1. A data processing method, characterized in that: include: Acquire a plurality of first data, wherein the plurality of first data have a first length; Encoding the plurality of first data into second data, wherein the second data has a second length; In response to executing the first task, reading the second data; converting the second data into a plurality of third data, wherein the plurality of third data has a second length, and values ​​of the plurality of third data are the same as values ​​of the plurality of first data; The encoding of the plurality of first data into second data comprises: generating a plurality of data segments according to the order of the plurality of first data; Arranging the plurality of data segments in the order described above to generate the second data; or, The encoding of the plurality of first data into second data comprises: Combining the plurality of first data in pairs to obtain at least one first data group; Encoding two first data in the at least one first data group to obtain at least one second data; The converting the second data into a plurality of third data comprises: Decoding the second data to obtain the plurality of first data; converting the plurality of first data into a plurality of third data, wherein the plurality of third data has the same value as the plurality of first data; The converting the plurality of first data into a plurality of third data comprises: Fill the high bits of the plurality of first data with 0 to generate the plurality of third data; or, The decoding of the second data to obtain the plurality of first data includes: Segmenting the second data to obtain a plurality of data segments; Performing a second calculation on the plurality of data segments to obtain the plurality of first data; After encoding the plurality of first data into second data, the method further includes: storing the second data in a cache of a processor, the processor addressing with the second length; Wherein, a plurality of first data with shorter lengths are encoded into a second data with longer length to adapt to the storage space and calculation of the processor with longer length.

2. A data processing device, characterized in that: include: A first data acquisition module, used for acquiring a plurality of first data, wherein the plurality of first data have a first length; An encoding module, used for encoding the plurality of first data into second data, wherein the second data has a second length; A second data reading module, configured to read the second data in response to executing the first task; a data conversion module, configured to convert the second data into a plurality of third data, wherein the plurality of third data have a second length, and values ​​of the plurality of third data are the same as values ​​of the plurality of first data; The encoding module is further used for: generating a plurality of data segments according to the order of the plurality of first data; Arranging the plurality of data segments in the order described above to generate the second data; or, Combining the plurality of first data in pairs to obtain at least one first data group; Encoding two first data in the at least one first data group to obtain at least one second data; The data conversion module is further used for: Decoding the second data to obtain the plurality of first data; converting the plurality of first data into a plurality of third data, wherein the plurality of third data has the same value as the plurality of first data; The data conversion module is further used for: Fill the high bits of the plurality of first data with 0 to generate the plurality of third data; or, Segmenting the second data to obtain a plurality of data segments; Performing a second calculation on the plurality of data segments to obtain the plurality of first data; The data processing device is further used for: storing the second data in a cache of a processor, the processor addressing with the second length; Wherein, a plurality of first data with shorter lengths are encoded into a second data with longer length to adapt to the storage space and calculation of the processor with longer length.

3. An electronic device, comprising: a memory for storing non-transitory computer-readable instructions; as well as A processor is used to run the computer-readable instructions so that the processor implements the data processing method according to claim 1 when executing. 4 . A computer-readable storage medium for storing non-transitory computer-readable instructions, which, when executed by a computer, causes the computer to execute the data processing method of claim 1 .

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