Wafer processing method

Abstract

A wafer processing method is provided in which a bonding tape or a ring-shaped frame at the periphery of a wafer is dry-etched. The wafer processing method has a frame unit preparation step of preparing a frame unit in which a wafer is fixed to an opening of a ring-shaped frame by a bonding tape; a frame unit holding step of holding the wafer of the frame unit by electrostatic chucking through the bonding tape; a shielding step of covering a ring-shaped region of the ring-shaped frame and the bonding tape with a shield member to shield from the outside; and a dry etching step of dry-etching the wafer by supplying a gas to an etching chamber after the frame unit holding step and the shielding step are performed.

Description

Technical Field

[0001] The present invention relates to a method for processing a wafer. Background Art

[0002] There is a known technology for dry etching a device wafer having devices formed on a semiconductor substrate such as silicon (see, for example, Patent Document 1). As a dry etching method, there is, for example, etching based on a gas in a plasma state. This technology is also used for the purpose of forming dividing grooves that divide the wafer along the predetermined dividing lines (spacing streets) or removing debris or heat-affected layers (damaged layers) generated during laser processing to improve bending strength. In the case of such processing, there is a concern that the wafer may be damaged during processing or transportation, so the wafer is processed in the form of a frame unit that is fixed to the opening of a ring frame with an adhesive tape such as a dicing tape.

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-156973

[0004] However, when plasma-enhanced gas is supplied to the wafer using a frame unit, there is a concern that the adhesive tape or ring frame surrounding the wafer may also be plasma-etched. For example, if the ring frame is made of resin, there is a concern that plasma etching may cause discoloration or dust. In the case of adhesive tape, fluorine (F) is likely to remain as residue, particularly in the adhesive layer. After plasma etching, if the device is left in the air or in a sealed container, there is a concern that hydrogen fluoride (HF) formed from hydrogen (H) and fluorine (F) in the atmosphere may corrode the device electrodes. Summary of the Invention

[0005] The present invention has been made in view of this problem, and an object of the present invention is to provide a wafer processing method that prevents the adhesive tape or the ring frame on the outer periphery of the wafer from being dry-etched.

[0006] In order to solve the above-mentioned problems and achieve the purpose, the chip processing method of the present invention has the following steps: a frame unit preparation step, using adhesive tape to fix the chip to the opening of the annular frame to prepare the frame unit; a frame unit holding step, using a chuck worktable in the etching chamber to attract and hold the chip of the frame unit through the adhesive tape; a shielding step, using a cover part to cover the annular frame and / or the annular area of ​​the adhesive tape exposed between the annular frame and the chip to shield it from the external space; and a dry etching step, after implementing the frame unit holding step and the shielding step, supplying gas to the etching chamber to dry etch the chip.

[0007] In the above-mentioned wafer processing method, the annular frame may be formed of resin, and in the masking step, the annular frame may be covered with the cover member.

[0008] In the above-mentioned wafer processing method, in the dry etching step, plasma etching may be performed by supplying a gas in a plasma state to the wafer.

[0009] The present invention has the effect of suppressing the adhesive tape and the ring frame on the outer periphery of the wafer from being dry-etched. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a perspective view showing an example of a frame unit according to the embodiment.

[0011] Figure 2 This is a flowchart showing the flow of a wafer processing method according to an embodiment.

[0012] Figure 3 This is a side view showing a state of a mask layer covering step of covering a wafer with a mask layer in a wafer processing method according to an embodiment.

[0013] Figure 4 This is a side view showing a state of a wafer processing method according to an embodiment, in which a planned dividing line processing step of forming a processing groove on a mask layer on a wafer is performed.

[0014] Figure 5 This is a cross-sectional view showing a plasma etching apparatus used in a plasma etching step of performing plasma etching on a wafer in a wafer processing method according to an embodiment.

[0015] Figure 6 yes Figure 5 A perspective view of the electrostatic chuck table and cover assembly within an etch chamber is shown.

[0016] Figure 7 Move the frame unit into Figure 6 A cross-sectional view of the electrostatic chuck shown on a table and within a cover member.

[0017] Figure 8 It is a cross-sectional view of an electrostatic chuck table and a cover member showing a frame unit holding step and a shielding step of a wafer processing method according to an embodiment.

[0018] Figure 9 This is a cross-sectional view of an electrostatic chuck stage and a cover member showing a dry etching step of a wafer processing method according to an embodiment.

[0019] Description of labels

[0020] 1: Frame unit; 5: Cover part; 6: Electrostatic chuck workbench (chuck workbench); 11: Wafer; 12: Annular frame; 13: Adhesive tape; 131: Annular area; 41: Etching chamber; 45: Gas; ST1: Frame unit preparation step; ST4: Frame unit holding step; ST5: Masking step; ST6: Dry etching step. DETAILED DESCRIPTION

[0021] With reference to the accompanying drawings, the modes (embodiments) for implementing the present invention are described in detail. The present invention is not limited to the contents described in the following embodiments. In addition, the constituent elements described below include contents that can be easily thought of by those skilled in the art, and substantially the same contents. In addition, the structures described below can be appropriately combined. In addition, various omissions, replacements or changes in the structure can be made without departing from the scope of the present invention.

[0022] [Implementation Method]

[0023] A wafer processing method according to an embodiment of the present invention will be described with reference to the accompanying drawings. Figure 1 It is a perspective view showing an example of a frame unit according to the embodiment. Figure 2 This is a flowchart showing the flow of a wafer processing method according to an embodiment.

[0024] like Figure 1 As shown, the frame unit 1 includes a wafer 11 , a ring frame 12 , and an adhesive tape 13 .

[0025] Wafer 11 is formed into a disk shape from a material such as silicon (Si), silicon carbide (SiC), or sapphire (Al2O3). The front surface 111 of wafer 11 is divided into multiple regions by grid-like dividing lines 14 (streets). Devices 15, such as integrated circuits (ICs) and light-emitting diodes (LEDs), are formed in each region.

[0026] Adhesive tape 13, which has a larger diameter than the wafer 11, is adhered to the back surface 112 of the wafer 11. Adhesive tape 13 is also called a resin sheet. Adhesive tape 13 has a disc-like shape. Adhesive tape 13 includes a base layer made of an insulating synthetic resin and adhesive paste layers laminated on the front and back surfaces of the base layer. The inner peripheral edge 121 of the annular frame 12 is located further outward than the outer peripheral edge 113 of the wafer 11. That is, the outer diameter of the wafer 11 is smaller than the inner diameter of the annular frame 12. The inner side of the inner peripheral edge 121 of the annular frame 12 is open. Therefore, the annular frame 12 is arranged on the outer peripheral side of the wafer 11. The back surface of the annular frame 12 is adhered to the front surface of the outer peripheral portion of the adhesive tape 13. That is, the wafer 11 is secured to the opening of the annular frame 12 by the adhesive tape 13, thereby forming a frame unit 1 in which the wafer 11 is secured to the opening of the annular frame 12 by the adhesive tape 13. In addition, the annular frame 12 is sensitive to the plasma gas 45 ( Figure 9 As shown in FIG. 4 , the ring frame 12 has resistance and can be applied with a material that is not easily etched by the plasma gas 45. In the embodiment, the ring frame 12 is made of resin.

[0027] like Figure 2 As shown, the chip processing method of the embodiment includes a frame unit preparation step (ST1), a mask layer covering step (ST2), a dividing predetermined line processing step (ST3), a frame unit holding step (ST4), a masking step (ST5) and a dry etching step (ST6).

[0028] As described above, the frame unit 1 is prepared by fixing the wafer 11 to the opening of the ring frame 12 with the adhesive tape 13. The mask layer covering step ST2 and subsequent steps will be described below step by step.

[0029] (Mask layer covering step ST2)

[0030] The mask layer covering step ST2 is a step of covering the front surface 111 of the wafer 11 with the mask layer 26 . Figure 3 This is a side view showing a state in the mask layer coating step of coating a wafer with a mask layer in a wafer processing method according to an embodiment. The coating with mask layer 26 is performed using a spin coater 2. Mask layer 26 is also referred to as a coating layer. Spin coater 2 includes a rotary table (holding table) 21, a rotary shaft 22, a clamping device 23, and a nozzle 24.

[0031] In the mask layer coating step ST2, the rotation drive source of the spin coater 2 is operated to rotate the rotary table 21 that attracts and holds the wafer 11 around the rotation axis 22, and the frame unit 1 is rotated at the same time. Figure 3As shown, the spin coater 2 drips liquid resin 25 from the nozzle 24 and rotates the rotary table 4, thereby coating the liquid resin 25 on the front surface 111 of the wafer 11. Then, the liquid resin 25 is dried and hardened, etc., thereby forming a mask layer 26 on the front surface 111 of the wafer 11.

[0032] The liquid resin 25 is composed of a water-soluble liquid resin such as polyvinyl alcohol (PVA) or polyvinyl pyrrolidone (PVP), and is resistant to the plasma gas 45 ( Figure 5 and Figure 9 As shown in the figure, the resin is made of a resin that is resistant and not easily etched by the gas 45 in the plasma state.

[0033] (Split Planned Line Processing Step ST3)

[0034] The planned dividing line processing step ST3 is a step of forming a processing groove in the mask layer 26 on the planned dividing line of the wafer 11 . Figure 4 This is a side view showing a state of a predetermined dividing line processing step of processing a mask layer on a wafer to form a processed groove in a wafer processing method according to an embodiment. A processed groove 36 is formed on the predetermined dividing line 14 by processing the front surface 111 of the wafer 11. The predetermined dividing line processing step is performed using, for example, Figure 4 The laser processing device 3 shown is used.

[0035] In the embodiment, in the predetermined dividing line processing step ST3, the back side of the wafer 11 is sucked and held on the holding surface 311 of the chuck table 31 in the laser processing device 3 via the adhesive tape 13, and the annular frame 12 is clamped by the clamping device 33. Figure 4 As shown, the laser processing device 3 moves the laser irradiation unit 34 and the chuck table 31 along the predetermined dividing line 14 (see Figure 1 ) moves relatively, while irradiating the mask layer 26 with a laser beam 35 of a wavelength that is absorptive to the chip 11 from the laser irradiation unit 34, thereby forming a processing groove 36 on the chip 11 and the mask layer 26.

[0036] (Frame Unit Holding Step ST4 and Masking Step ST5)

[0037] Figure 5 This is a cross-sectional view showing a plasma etching apparatus used in a plasma etching step of performing plasma etching on a wafer in a wafer processing method according to an embodiment. Figure 6 yes Figure 5 A perspective view of the electrostatic chuck table and cover assembly within an etch chamber is shown. Figure 7Move the frame unit into Figure 6 A cross-sectional view of the electrostatic chuck shown on a table and within a cover member. Figure 8 It is a cross-sectional view of an electrostatic chuck table and a cover member showing a frame unit holding step and a shielding step of a wafer processing method according to an embodiment.

[0038] The frame unit holding step ST4 is to utilize Figure 5 The electrostatic chuck table 6 (chuck table) in the plasma etching apparatus 4 shown in the figure attracts and holds the wafer 11 of the frame unit 1 via the adhesive tape 13. In addition, the shielding step ST5 is a step of shielding the annular frame 12 and / or the annular region 131 of the adhesive tape 13 exposed between the annular frame 12 and the wafer 11 from the outside space by using the cover member 5. In addition, the annular region 131 of the adhesive tape 13 is as shown in FIG. Figures 5 to 8 The area shown is an annular region exposed between the annular frame 12 and the wafer 11 in the area of ​​the adhesive tape 13 .

[0039] like Figure 5 As shown, the plasma etching device 4 has an etching chamber 41 and an electrostatic chuck table 6 (chuck table). A plasma processing chamber 411 is provided inside the etching chamber 41. The etching chamber 41 has a bottom wall 412, an upper wall 413, a side wall 414, and a gas supply pipe 43. The gas supply pipe 43 is provided on the upper wall 413. With respect to the etching chamber 41, a plasma state gas 45 ( Figure 5 Arrows and Figure 9 4 (shown) is supplied to the plasma processing chamber 411 via a gas supply pipe 43. An opening 415 is provided in a side wall 414. A door 44 is moved up and down by an actuator (not shown). The up and down movement of the door 44 enables the opening 415 to be opened and closed. In addition, an exhaust line (not shown) is connected to the etching chamber 41 to exhaust the atmosphere inside.

[0040] The electrostatic chuck table 6 has a disc-like shape and attracts and holds the wafer 11 via the adhesive tape 13 by means of electrostatic adsorption force. Figure 7 As shown, the electrostatic chuck workbench 6 has a bottom surface 62, an upper surface 63 and a side surface 64. The upper surface 63 is a holding surface for holding the back side of the adhesive tape 13. A through hole 66 is provided on the outer periphery of the electrostatic chuck workbench 6, which passes through in the up and down direction (thickness direction). The through hole 66 is divided into a small diameter portion 661 on the lower side and a large diameter portion 662 on the upper side. The large diameter portion 662 is a recessed portion that is recessed downward from the upper surface 63. A groove with an arc-shaped cross section is provided along the entire circumference on the outer periphery of the upper surface 63 near the through hole 66, and an O-ring 50 is embedded in the groove. The O-ring 50 is formed of elastic rubber or the like.

[0041] In addition, if Figures 5 to 9 As shown in FIG. 4 , in the plasma etching device 4, a cover member 5 is arranged on the upper side of the electrostatic chuck table 6. Figure 7 As shown, the cover member 5 includes an outer peripheral wall portion 51, an inner peripheral wall portion 52, an upper wall portion 53, a bottom wall portion 54, and a connecting portion 55. The outer peripheral wall portion 51 and the inner peripheral wall portion 52 have cylindrical shapes extending in the circumferential direction. The outer peripheral wall portion 51 is formed into a cylindrical shape with an inner diameter larger than the outer diameter of the annular frame 12. The outer peripheral surface 511 of the outer peripheral wall portion 51 is aligned with the outer peripheral surface 64 of the electrostatic chuck table 6 in the radial direction. The bottom surface 512 of the outer peripheral wall portion 51 is capable of abutting against the outer edge 631 of the upper surface 63.

[0042] The inner wall portion 52 is formed into a cylindrical shape having an inner diameter larger than the outer diameter of the wafer 11 and an outer diameter smaller than the inner diameter of the annular frame 12. The inner peripheral surface 521 of the inner peripheral wall portion 52 is formed into an inclined surface that is directed downward as it moves toward the inner peripheral side. A groove having an arc-shaped cross section is provided on the bottom surface 522 along the entire circumference, and an O-ring 50 is embedded in the groove. The O-ring 50 is formed of elastic rubber or the like. The bottom surface 522 can abut against the front surface of the adhesive tape 13. Specifically, the bottom surface 522 abuts against the portion between the wafer 11 and the annular frame 12 on the front surface of the adhesive tape 13. The upper wall portion 53 is formed into an annular shape, connecting the upper end of the outer peripheral wall portion 51 and the upper end of the inner peripheral wall portion 52. The bottom wall portion 54 is formed into an annular shape having an inner diameter smaller than the inner diameter of the annular frame 12, except for the outer peripheral wall portion 51. Figure 6 The right end of Figure 7 As shown on the left side of the figure, the outer peripheral wall portion 51 and the outer edge portion are integrally connected by means of the connecting portion 55. On the other hand, Figure 7 The bottom wall portion 54 shown at the right end portion is not aligned with the outer peripheral wall portion 51. Figure 7 The right end of the outer peripheral wall portion 51 is connected, so the outer peripheral side opening 57 is opened between the outer peripheral wall portion 51 and the bottom wall portion 54. Figure 7 As shown by arrow IN, the outer peripheral opening 57 is formed to allow the frame unit 1 to enter and exit. In addition, the radial width of the bottom wall portion 54 is equal to the width of the large diameter portion 662 of 66. In addition, an inner peripheral opening 58 is provided between the bottom surface 522 and the bottom wall portion 54.

[0043] Furthermore, a support pipe 42 extending in the vertical direction is fixed to the lower side of the bottom wall portion 54. The interior of the support pipe 42 is hollow, and an inert gas 40 circulates therein. The inert gas 40 is, for example, helium. Furthermore, the upper end of the support pipe 42 is integral with the bottom wall portion 54, so the support pipe 42 also functions as a support member for vertically moving the cover member 5. In other words, the cover member 5 can be moved vertically by means of the support pipe 42 via an actuator (not shown).

[0044] In the frame unit holding step ST4, as shown in FIG. Figure 7As shown, when the cover member 5 is raised relative to the electrostatic chuck table 6 and the outer peripheral opening 57 is opened, the frame unit 1 is inserted from the outer peripheral opening 57, the annular frame 12 and the annular region 131 of the adhesive tape 13 (see FIG. Figure 5 and Figure 7 ) is arranged in an area surrounded by the outer peripheral wall portion 51, the inner peripheral wall portion 52 and the upper wall portion 53 of the cover member 5.

[0045] In the frame unit holding step ST4 and the shielding step ST5, as shown in FIG. Figure 8 As shown, the support pipe 42 and the cover member 5 are lowered so that the bottom wall portion 54 of the cover member 5 fits into the large diameter portion 662. As a result, the outer edge portion 631 of the upper surface 63 abuts against the bottom surface 512 of the outer peripheral wall portion 51, and the bottom surface 522 of the inner peripheral wall portion 52 abuts against the adhesive tape 13, and the O-ring 50 elastically deforms to perform a sealing function.

[0046] Furthermore, in the frame unit holding step ST4, when the cover member 5 is lowered and the bottom wall portion 54 is engaged with the large-diameter portion 662 serving as the recess, the wafer 11 is placed on the upper surface 63 of the electrostatic chuck table 6 via the adhesive tape 13. In the frame unit holding step ST4, power is supplied to the electrostatic chuck table 6 to generate an electrostatic attraction force, so that the wafer 11 is attracted and held on the upper surface 63 via the adhesive tape 13.

[0047] With the bottom wall portion 54 of the cover member 5 engaged with the large-diameter portion 662, the cover member 5 and the electrostatic chuck table 6 define a sealed space 7. Within the sealed space 7, the annular frame 12 and the annular region 131 of the adhesive tape 13 are housed. Thus, in the shielding step ST5, the annular frame 12 and the annular region 131 of the adhesive tape 13 are covered by the cover member 5, thereby shielding the sealed space 7 from the outside. Furthermore, by flowing the inert gas 40 into the sealed space 7 through the support pipe 42, the sealed space 7 can be maintained at a positive pressure.

[0048] Next, use Figures 5 to 7 The holding fixture 100 of the frame unit is described. The holding fixture 100 of the frame unit is a fixture for holding the frame unit 1 obtained by fixing the chip 11 to the opening of the annular frame 12 using the adhesive tape 13 in the etching chamber 41 of the plasma etching device 4. The holding fixture 100 includes an electrostatic chuck table 6 (chuck table), a cover part 5, a closed space 7, an inner peripheral opening 58, and an outer peripheral opening 57. The electrostatic chuck table 6 attracts and holds the chip 11. The cover part 5 is an annular part, and is arranged in a direction close to the electrostatic chuck table 6 ( Figures 5 to 7 down direction) and away from the electrostatic chuck table 6 ( Figures 5 to 7The enclosed space 7 houses the annular frame 12 of the frame unit 1 when the electrostatic chuck table 6 and the cover member 5 are close to each other and is sealed from the outside. An inner peripheral opening 58 is provided on the inner peripheral side of the cover member 5. When the inner peripheral opening 58 is opened, the annular frame 12 can be freely moved in and out of the enclosed space 7.

[0049] Inner peripheral opening 58 and outer peripheral opening 57 are sealed when cover member 5 and electrostatic chuck table 6 are brought into close proximity. Cover member 5 also includes bottom surface 522 of inner peripheral wall portion 52. When bottom surface 522 abuts against adhesive tape 13, enclosed space 7 is formed. Annular region 131 of adhesive tape 13 is housed within enclosed space 7.

[0050] (Dry Etching Step ST6)

[0051] Figure 9 1 is a cross-sectional view of an electrostatic chuck table and a cover member for dry etching in a wafer processing method according to an embodiment. The dry etching step ST6 is a step of supplying gas 45 to the etching chamber 41 to dry etch the wafer 11 after the frame unit holding step ST4 and the masking step ST5 are performed. In the dry etching step ST6, the annular frame 12 and the annular region 131 of the adhesive tape 13 are covered by the cover member 5 in the masking step ST5. Figure 5 As shown, a gas 45 in a plasma state flows from a gas supply pipe 43 into the interior of a plasma processing chamber 411. The wafer 11 is dry-etched by the gas 45 in a plasma state. Here, the annular frame 12 and the annular region 131 of the adhesive tape 13 are shielded by the cover part 5, thereby preventing the annular frame 12 and the annular region 131 of the adhesive tape 13 from being dry-etched. In addition, dry etching includes, for example, plasma etching and gas etching that exposes the material to a reactive gas. In addition, the purpose of dry etching in the embodiment is to remove debris or heat-affected layer (damaged layer) generated by laser processing in the predetermined dividing line processing step ST3, thereby improving the bending strength, but the present invention is not limited thereto, and dry etching can also be applied to the process of dividing the wafer 11 into rectangular chips along the predetermined dividing line 14.

[0052] In the embodiment, a so-called remote plasma etching apparatus is used, in which plasma gas 45 is introduced from outside the etching chamber 41 into the interior of the etching chamber 41 via a gas supply pipe 43. However, in the present invention, a so-called direct plasma etching apparatus may be used, in which a pre-plasma etching gas is supplied from an upper electrode inside the etching chamber 41, and high-frequency power is applied to each electrode to plasmatize the etching gas inside the etching chamber 41.

[0053] The chip processing method of the embodiment described above has the following steps: a frame unit preparation step, using the adhesive tape 13 to fix the chip 11 to the opening of the annular frame 12 to prepare the frame unit 1; a frame unit holding step, using the electrostatic chuck workbench 6 (chuck workbench) in the etching chamber 41 to attract and hold the chip 11 of the frame unit 1 through the adhesive tape 13; a shielding step, using the cover part 5 to cover the annular frame 12 and the annular area 131 of the adhesive tape 13 to shield them from the external space; and a dry etching step, after implementing the frame unit holding step and the shielding step, providing gas 45 to the etching chamber 41 to dry-etch the chip 11.

[0054] Thus, during dry etching, the cover member 5 covers the annular frame 12 and the annular region 131 of the adhesive tape 13, shielding them from the external air space. This effectively prevents the annular frame 12 and the annular region 131 of the adhesive tape 13 from deteriorating due to dry etching or from leaving fluorine residues. For example, if fluorine (F) remains as residue on the adhesive tape 13, there is a concern that it may corrode the device electrodes. However, according to this embodiment, corrosion of the device electrodes can be suppressed.

[0055] In the embodiment, the annular frame 12 is formed of resin and is covered by the cover member 5 in the masking step, thereby suppressing discoloration and dust emission of the annular frame 12 due to dry etching.

[0056] Furthermore, when plasma etching is performed as a dry etching step, the width set as the planned dividing lines (streets) 14 can be reduced to increase the number of devices per wafer 11 and shorten the processing time.

[0057] In the embodiment, the shielding step ST5 is performed after the frame unit holding step ST4 , but the frame unit holding step ST4 may be performed after the shielding step ST5 . Furthermore, the frame unit holding step ST4 and the shielding step ST5 may be performed simultaneously.

[0058] The present invention is not limited to the above-described embodiment, and can be implemented with various modifications without departing from the spirit of the present invention.

Claims

1. A method for processing a wafer, wherein: The wafer processing method has the following steps: a frame unit preparation step of fixing the wafer to the opening of the annular frame using adhesive tape to prepare the frame unit; a frame unit holding step of sucking and holding the wafer of the frame unit via the adhesive tape using a chuck table in the etching chamber; a shielding step of covering the annular frame and / or the annular region of the adhesive tape exposed between the annular frame and the wafer with a cover member, housing the annular frame and the annular region of the adhesive tape within a sealed space sealed from the outside, shielding the space from the outside, and allowing an inert gas to flow into the sealed space, thereby maintaining a positive pressure within the sealed space; and In the dry etching step, after the frame unit holding step and the masking step are performed, gas is supplied to the etching chamber to dry-etch the wafer.

2. The wafer processing method according to claim 1, wherein: The annular frame is formed of resin, and in the shielding step, the annular frame is covered with the cover member.

3. The wafer processing method according to claim 1 or 2, wherein: In the dry etching step, plasma etching is performed by supplying a gas in a plasma state to the wafer.

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