Memory chip overclocking test module and method

Abstract

The present invention is a memory chip overclocking test module and method, which are applied in a two-stage memory chip test process to screen memory chips of different speeds, including a test disk area, a positioning temporary storage disk, at least one pre-test machine, multiple test machines and a mechanical arm, wherein the mechanical arm is electrically connected to the test disk area, the positioning temporary storage disk, the pre-test machine and the test machine, and the pre-test machine is arranged between the positioning temporary storage disk and the test machine, and performs the first stage of testing and screening on the memory, and the memory that passes the screening of the first stage pre-test machine will be subjected to a complete memory chip test on the test machine, thereby improving efficiency, accuracy and reducing misjudgment.

Description

Technical Field

[0001] The invention relates to a memory chip overclocking test module and method thereof, in particular to a project of performing preliminary screening on memory chips through a pre-testing machine to achieve multi-speed classification. Background Art

[0002] With the rapid development of technology, various memories are also used in daily life in different forms to make various electronic devices more functional and operable. For example, the Random Access Memory (RAM) commonly used in personal computers (PCs) has the characteristics of read and write at any time and high speed, so it is often used as a storage medium for temporary data of operating systems or other running programs. It can be further divided into Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM).

[0003] Moreover, the e-sports industry has grown rapidly in recent years. Its primary equipment is to use high-end electronic equipment, such as motherboards, memory, etc., as standard equipment for winning, and then combined with the players' intelligence and skills. E-sports players pay the most attention to memory speed in the selection of hardware equipment. Therefore, in order to produce high-speed memory, it is necessary to increase the requirements on the process, that is, to start with particle testing, because particles are one of the important raw materials for manufacturing memory.

[0004] Traditionally, memory manufacturing and testing methods use a lot of manpower to classify the speed of particles, and screening must start from low speed. In order to detect overclocked memory, in order to avoid subsequent repair costs caused by machine failure, a large amount of manpower is used, which also means a lot of time and management costs. In addition, the fatigue and misjudgment caused by the eyesight and physical strength of the personnel also increase accordingly, which are all areas that need breakthroughs and improvements. Summary of the invention

[0005] Due to the above problems, in order to detect overclocked memory, the main purpose of the present invention is to provide a memory chip overclocking test module, which is used to screen memory chips with different speeds. The memory chip overclocking test module includes:

[0006] A test disk area, where the memory chips to be tested are placed;

[0007] A positioning temporary storage disk, the positioning temporary storage disk is divided into a positioning area and a temporary storage area, the positioning area is used to adjust the arrangement of the memory chips;

[0008] At least one pre-test machine, wherein a pre-test parameter is set in the pre-test machine;

[0009] Multiple test benches; and

[0010] a robotic arm, the robotic arm is used to grab the memory chip, and the robotic arm is electrically connected to the test disk area, the positioning temporary disk, the at least one pre-test machine and the plurality of test machines;

[0011] The robotic arm grabs memory chips from the test disk area and moves them to the positioning area of ​​the positioning temporary disk to arrange the memory chips in a consistent manner, grabs memory chips again and moves them to the at least one pre-test machine, and the at least one pre-test machine performs a first-stage screening on the memory chips according to the pre-test parameters. The memory chips that pass the first-stage screening are moved by the robotic arm to the test machine to perform a complete chip test on the memory chips. The temporary storage area is used to store memory chips waiting for a complete chip test, and the memory chips that fail the test are moved back to the test disk area by the robotic arm.

[0012] Preferably, the test tray area also includes at least one first test tray, at least one second test tray and at least one third test tray, wherein the at least one first test tray is used to place memory chips to be screened for the first time, the at least one second test tray is used to place memory chips waiting to be downgraded and retested, and the at least one third test tray is used to place memory chips to be eliminated.

[0013] Preferably, the pre-test parameter is set based on memory chips with specific speeds pre-screened by the user, and the pre-test parameter needs to be higher than the screened specific speed.

[0014] Preferably, whether the memory chip has passed the screening of the pre-test machine is determined by the mechanical arm through an interface of a communication device.

[0015] Preferably, the first stage screening performed by the pre-testing machine also includes a DC parameter test and an AC parameter test.

[0016] Another object of the present invention is to provide a memory chip overclocking test method, which is applied in a two-stage memory chip test process, comprising:

[0017] A pre-test parameter is set and stored in a pre-test machine, all memory chips to be screened for the first time are placed on a test tray, a robot arm grabs one row of memory chips on the test tray and moves it to a positioning area in a positioning temporary disk, and performs positioning and adjustment of the arrangement of the memory chips;

[0018] The mechanical arm moves the memory chip to the pre-test machine, and the pre-test machine powers on the memory chip for testing. The pre-test at this stage is the first stage test;

[0019] After completing the first phase of testing, the robotic arm will move the memory chip to different places according to the results of the memory chip pre-test. If the memory chip passes the pre-test of the pre-test machine, the memory chip will be grabbed to a test machine for the second phase of testing. This second phase of testing is a complete chip test. If the memory chip fails the pre-test of the pre-test machine, the robotic arm will grab the memory chip back to the test disk area and wait for downgrade and re-testing. When all the test machines are executing the second phase of testing, the robotic arm will first move the memory chip that has passed the pre-test to a temporary storage area in the positioning temporary storage disk.

[0020] The memory chips that have undergone the second phase of the complete chip test are tested to determine the speed of the memory chips and complete the classification of the memory chips;

[0021] For the memory chips that fail the pre-test, after waiting for all memory chips to complete the first screening, new pre-test parameters are set for the pre-test machine, and the above steps are repeated to perform downgrade re-testing;

[0022] The process ends when all memory chips have been screened and classified.

[0023] Preferably, the test tray area also includes at least one first test tray, at least one second test tray and at least one third test tray, wherein the at least one first test tray is used to place memory chips to be screened for the first time, the at least one second test tray is used to place memory chips waiting to be downgraded and retested, and the at least one third test tray is used to place memory chips to be eliminated.

[0024] Preferably, the pre-test parameter is set according to the memory chip with a specific speed selected by the user, and the pre-test parameter needs to be higher than the selected specific speed.

[0025] Preferably, whether the memory chip has passed the first stage test of the pre-test machine is determined by the mechanical arm through an interface of a communication device to determine whether the memory chip has passed the pre-test screening.

[0026] Preferably, the first stage screening performed by the pre-testing machine also includes a DC parameter test and an AC parameter test.

[0027] The present invention improves the high labor and time costs brought by the traditional process by using automated equipment to improve efficiency and reduce misjudgment. At the same time, it adds a two-stage screening of pre-testing to achieve the effect of classifying multiple speeds at one time, which is even different from the traditional reverse testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of a memory chip overclocking test module of the present invention;

[0029] Figure 2 A detailed schematic diagram of the test panel area of ​​the present invention;

[0030] Figure 3 A detailed schematic diagram of locating the temporary storage disk of the present invention;

[0031] Figure 4 is a schematic diagram of an embodiment of a memory chip overclocking test module of the present invention; and

[0032] Figure 5 The figure is a flow chart of the memory chip overclocking test method of the present invention.

[0033] Description of reference numerals:

[0034] 10 Test Panel

[0035] 11 First Test Disk

[0036] 12 Second test disk

[0037] 13 The third test disk

[0038] 20 Locating the scratch disk

[0039] 21 Positioning area

[0040] 22 Temporary Storage Area

[0041] 30 Pre-test machine

[0042] 40 test machines

[0043] 50 Robotic Arm DETAILED DESCRIPTION

[0044] The following is a more detailed description of the embodiments of the present invention with reference to icons and component symbols.

[0045] The present invention is a memory chip overclocking test module and method thereof, wherein the preferred embodiment of the memory chip overclocking test module is shown in Figure 1 , Figure 1 The schematic diagram of the memory chip overclocking test module of the present invention includes a test disk area 10, a positioning temporary disk 20, at least one pre-test machine 30, multiple test machines 40 and a mechanical arm 50, which is mainly used to test the memory speed for screening and classification.

[0046] Furthermore, a plurality of memories are placed on the test disk area 10, and the memories are moved between the test disk area 10, the positioning temporary disk 20, the pre-test machine 30 and the test machine 40 through the grabbing of the robot arm 50. The test disk area 10 of the present invention can be divided into three types, each of which is used to place different memories. Figure 2 , Figure 2The test disk area 10 shown in the figure is for illustration only and does not limit the arrangement of the memory thereon. The test disk area 10 is divided into a first test disk 11 for placing the memory to be tested, a second test disk 12 for placing the memory waiting for a second test, and a third test disk 13 for placing the memory to be eliminated.

[0047] The temporary storage disk 20 can be divided into two areas, such as Figure 3 As shown, one part is the positioning area 21, and the other part is the temporary storage area 22. Similarly, Figure 3 The positioning temporary storage disk 20 shown in the figure is for illustration only and does not limit the arrangement of the memory thereon. The robot arm 50 grabs the memory from the first test disk 11 in the test disk area 10 and places it in the positioning area 21 of the positioning temporary storage disk 20. The purpose of setting the positioning area 21 is to ensure that each grabbed memory to be tested is arranged neatly, because the position where the robot arm 50 grabs the memory from the test disk area 10 is not necessarily in the middle of the memory. Therefore, the special design of the positioning area 21 is required to make the memory placed on the positioning area 21 can be neatly arranged, so that the robot arm 50 can be accurately positioned in the middle of the memory when grabbing it again, and the temporary storage area 22 is used to store the memory prepared for the next stage of testing.

[0048] The pre-test machine 30 is set between the positioning temporary storage disk 20 and the test machine 40 to perform the first stage of testing and screening on the memory. The pre-test machine 30 includes a microprocessor (CPU) to directly control the pre-test machine to perform fast DC parameter testing and AC parameter testing on the memory. Because it is controlled by the CPU, there is no need to start the machine, which can shorten the pre-test time. The memory that has passed the screening of the pre-test machine 30 in the first stage will undergo a complete memory chip test on the test machine 40.

[0049] Specifically, the memory to be tested is placed on the first test tray 11, and a row of memory on the first test tray 11 is grabbed by the robot arm 50 and placed in the positioning area 21 on the positioning temporary storage tray 20 to make the arrangement of the memory more neat and consistent. The memory is then moved to the pre-test machine 30 by the robot arm 50 for the first stage of testing. The test in this first stage mainly tests the speed of the memory and the open circuit / short circuit test. After the first stage of testing, the memory that passes the test (screening) is moved to the test machine 40 by the robot arm 50, and the memory that fails is divided into two categories. Among them, the memory that is waiting for the second test (downgrade retest) is moved to the second test tray 12, and the memory that is short-circuited and to be eliminated is moved to the third test tray 13.

[0050] One embodiment of the present invention can refer to Figure 4As shown, the memory test module includes a test disk area 10, a positioning temporary disk 20, a pre-test machine 30, multiple test machines 40 and a robot arm 50. The positioning temporary disk 20 and the pre-test machine 30 are not limited in number. This embodiment only illustrates one of multiple situations. Among them, the test disk area 10 can include a first test disk 11, a second test disk 12 and a third test disk 13. The number of the first test disk 11, the second test disk 12 and the third test disk 13 in the test disk area 10 is also not limited. The positioning temporary disk 20 includes a positioning area 21 and a temporary storage area 22.

[0051] Before the first test (first screening), the memory to be tested is placed on the first test tray 11, and the first stage test (pre-test) parameters of the pre-test machine 30 are set. This parameter can be determined according to the speed of the memory to be screened out. If the memory with a speed higher than 3200MHz is to be screened out, the set parameter needs to be higher than the speed to be screened out, such as 3333MHz, so as to screen out the memory with a specific speed and improve efficiency.

[0052] The robot arm 50 is electrically connected to the test plate area 10, the positioning temporary storage tray 20, the pre-test machine 30 and the test machine 40, wherein the robot arm 50 is preferably disposed above the test plate area 10, the positioning temporary storage tray 20, the pre-test machine 30 and the test machine 40, which not only saves space but also increases mobility.

[0053] After the first stage test (pre-test) parameter setting is completed, the robot arm 50 grabs a row of memory to be tested in the first test tray 11 to the positioning area 21, adjusts the arrangement and moves to the pre-test machine 30. The pre-test machine 30 includes a microprocessor (CPU) to directly control the pre-test machine to perform fast DC parameter test and AC parameter test on the memory. Because it is directly controlled by the CPU and does not need to be turned on, it only takes about 8-10 seconds to complete. After the first stage test (pre-test) is completed, the memory that passes the test, that is, the memory with a speed higher than the parameter, will be moved to the test machine 40 for the second stage test, that is, the complete memory chip test, which is the so-called Burn in test. This second stage test takes a long time, and the memory that fails the test may include the speed not reaching the set parameters or the chip open circuit / short circuit, and is moved to the second test tray 12 and the third test tray 13 respectively.

[0054] Whether the memory chip has passed the screening of the pre-test machine 30 can be determined through the interface of the communication device so that the robot arm 50 can determine whether the memory chip has passed the pre-test screening.

[0055] After the memory chip is completely tested by the test machine 40, the speed of the memory can be classified and the memory of a specific speed can be selected. After all the memory of the first test disk 11 is completed, the pre-test parameters can be reset, and the memory of the second test disk 12 will be moved to the first test disk 11, and then a two-stage test will be performed to classify and select the memory of a specific speed.

[0056] Please refer to the memory chip overclocking test method of the present invention. Figure 5 , Figure 5 Schematic diagram of the method flow of the present invention. Different from the traditional testing method which can only start screening from low speed, the present invention divides a complete screening into two stages of testing, and can screen out memory of a specific speed according to the user's purpose.

[0057] First, the pre-test parameters are determined and set for the pre-test machine 30, and all the memory chips to be tested are placed on the first test disk 11 in the test disk area 10. For example, the pre-test parameters are set to 3333 MHz. Then, the robot arm 50 grabs one row of memory chips on the first test disk 11 and moves it to the positioning area 21 of the positioning temporary disk 20 to position, i.e., adjust the arrangement of the memory chips, so that the memory chips are arranged uniformly and neatly, so that the robot arm 50 can grab the position more accurately.

[0058] Then the robot arm 50 moves the memory chip to be tested to the pre-test machine 30, and performs a simple power-on test on the memory, including a memory open circuit / short circuit test. The pre-test at this stage is the first stage test and can also be regarded as the first stage screening. The pre-test machine 30 includes a microprocessor (CPU) that directly controls the pre-test machine to perform a fast DC parameter test and an AC parameter test on the memory. It takes about 8-10 seconds to test the memory chip on the pre-test machine 30.

[0059] Next, the robot arm 50 will move the memory chip to different places depending on the result of the memory chip pre-test. If the memory chip passes the pre-test of the pre-test machine 30, the memory chip will be captured to the test machine 40 for the second stage test (complete chip test), which is the so-called burn-in test. If the memory chip fails the pre-test of the pre-test machine 30, the memory chip will be captured to the second test tray 12 (waiting for downgrade and retest) or the third test tray 13 (elimination). However, because it takes a long time for the test machine 40 to perform the second stage test, when all the test machines 40 are performing the second stage test, the robot arm 50 will first move the memory chip that has passed the pre-test to the temporary storage area 22 in the positioning temporary storage tray 20 to wait.

[0060] The memory chips that fail the pre-test will be placed in the second test tray 12 in the test tray area 10. After all the memory chips in the first test tray 11 have completed the first screening, new pre-test parameters will be set for the pre-test machine 30. For example, the parameters will be reduced to 2888MHz for downgrade testing, which is the so-called second screening. The aforementioned steps will be repeated to complete the second screening and classification until all the memory chips have completed the screening and classification.

[0061] The main effect of the present invention is to improve the traditional chip testing process which requires a large amount of manpower for speed classification. The present invention uses automated equipment and robotic arms to reduce the cost of personnel management, as well as reduce misjudgments caused by personnel's eyesight and physical fatigue, thereby improving accuracy and efficiency.

[0062] Another benefit of the present invention is that it improves the traditional chip testing process that must start screening from a low speed and consumes a lot of time. The present invention utilizes a new two-stage test classification screening method to achieve one-time classification of multiple speeds, and can also specify a specific speed for screening, or different from the traditional reverse testing starting from a high speed, while also ensuring the stability of the test machine.

[0063] The above description is only used to explain the preferred embodiments of the present invention, and is not intended to limit the present invention in any form. Therefore, any modifications or changes made to the present invention under the same inventive spirit should still be included in the scope of protection intended by the present invention.

Claims

1. A memory chip overclocking test module, used for screening memory chips of different speeds, characterized in that: include: A test disk area, where the memory chips to be tested are placed; A positioning temporary storage disk, the positioning temporary storage disk is divided into a positioning area and a temporary storage area, the positioning area is used to adjust the arrangement of the memory chips; At least one pre-test machine, wherein a pre-test parameter is set in the pre-test machine; Multiple test machines; as well as a robotic arm, the robotic arm is used to grab the memory chip, and the robotic arm is electrically connected to the test disk area, the positioning temporary disk, the at least one pre-test machine and the plurality of test machines; The mechanical arm grabs the memory chips from the test disk area to the positioning area of ​​the positioning temporary storage disk, so that the memory chips are arranged uniformly, grabs the memory chips again and moves them to the at least one pre-testing machine, and the at least one pre-testing machine performs a first-stage screening on the memory chips according to the pre-testing parameters. The memory chips that pass the first-stage screening are moved by the mechanical arm to the test machine, and a complete chip test is performed on the memory chips. The temporary storage area is used to store memory chips waiting for the complete chip test, and the memory chips that fail the test are moved back to the test disk area by the mechanical arm; The test tray area further includes at least one first test tray, at least one second test tray and at least one third test tray, wherein the at least one first test tray is used to place memory chips to be screened for the first time, the at least one second test tray is used to place memory chips to be downgraded and retested, and the at least one third test tray is used to place memory chips to be eliminated; The pre-test parameters are set according to the memory chips with specific speeds selected by the user, and the pre-test parameters need to be higher than the selected specific speeds.

2. The memory chip overclocking test module according to claim 1, characterized in that: Whether the memory chip has passed the screening of the pre-test machine is determined by the mechanical arm through an interface of a communication device.

3. The memory chip overclocking test module according to claim 1, characterized in that: The first stage screening performed by the pre-testing machine also includes a DC parameter test and an AC parameter test.

4. A memory chip overclocking test method, applied in a two-stage memory chip test process, characterized in that it includes: A pre-test parameter is set and stored in a pre-test machine, all memory chips to be screened for the first time are placed on a test tray, a robot arm grabs one row of memory chips on the test tray and moves it to a positioning area in a positioning temporary disk, and performs positioning and adjustment of the arrangement of the memory chips; The mechanical arm moves the memory chip to the pre-test machine, and the pre-test machine powers on the memory chip for testing. The pre-test at this stage is the first stage test; After completing the first phase of testing, the robotic arm will move the memory chip to different places according to the results of the memory chip pre-test. If the memory chip passes the pre-test of the pre-test machine, the memory chip will be grabbed to a test machine for the second phase of testing. This second phase of testing is a complete chip test. If the memory chip fails the pre-test of the pre-test machine, the robotic arm will grab the memory chip back to the test disk area and wait for downgrade and re-testing. When all the test machines are executing the second phase of testing, the robotic arm will first move the memory chip that has passed the pre-test to a temporary storage area in the positioning temporary storage disk. The memory chips that have undergone the second phase of the complete chip test are tested to determine the speed of the memory chips and complete the classification of the memory chips; For the memory chips that fail the pre-test, after waiting for all memory chips to complete the first screening, new pre-test parameters are set for the pre-test machine, and the above process is repeated to perform downgrade re-testing; The process ends when all memory chips have been screened and classified.

5. The memory chip overclocking test method according to claim 4, characterized in that: The test tray area also includes at least one first test tray, at least one second test tray and at least one third test tray. The at least one first test tray is used to place memory chips ready for the first screening, the at least one second test tray is used to place memory chips waiting to be downgraded and retested, and the at least one third test tray is used to place memory chips to be eliminated.

6. The memory chip overclocking test method according to claim 4, characterized in that: The pre-test parameters are set according to the memory chips with specific speeds selected by the user, and the pre-test needs to be higher than the selected specific speed.

7. The memory chip overclocking test method according to claim 4, characterized in that: Whether the memory chip has passed the first stage test of the pre-test machine is determined by the mechanical arm through an interface of a communication device to determine whether the memory chip has passed the pre-test screening.

8. The memory chip overclocking test method according to claim 4, characterized in that: The first stage screening performed by the pre-testing machine also includes a DC parameter test and an AC parameter test.

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