Key provisioning system and method for programmable logic devices

Abstract

Systems and methods for provisioning a secure programmable logic device (PLD) are disclosed. An exemplary secure PLD provisioning system includes an external system that includes a processor and a memory and is configured to be coupled to the secure PLD via a configuration input / output (I / O) of the secure PLD. The external system is configured to generate a locked PLD including the secure PLD based at least in part on a request from a secure PLD client, wherein the request from the secure PLD client includes a client public key; and is configured to provide a secure unlock package for the locked secure PLD. The external system may also be configured to provide an authenticatable key manifest including a client programming key token and a corresponding programming public key associated with the locked secure PLD, wherein the authenticatable key manifest is signed using a programming private key generated by the locked secure PLD.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 846,365, filed on May 10, 2019, entitled “SECURE BOOT SYSTEMS AND METHODSFOR PROGRAMMABLE LOGIC DEVICES,” the entire contents of which are incorporated herein by reference.

[0003] This patent application claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 756,021, filed on November 5, 2018, entitled “ASSET MANAGEMENT SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES,” the entire contents of which are incorporated herein by reference.

[0004] This patent application claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 756,001, filed on November 5, 2018, entitled “KEY PROVISIONING SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES,” the entire contents of which are incorporated herein by reference.

[0005] This patent application claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 756,015, filed on November 5, 2018, entitled “FAILURE CHARACTERIZATION SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES,” the entire contents of which are incorporated herein by reference.

[0006] This patent application claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 670,487, filed on May 11, 2018, entitled “DEVICES WITH PROGRAMMABLE LOGIC AND SECURITY FEATURES AND METHODS OF USING,” the entire contents of which are incorporated herein by reference. Technical Field

[0007] The present invention relates generally to programmable logic devices and, more particularly, to provisioning security assets to facilitate secure configuration and / or operation of such devices. Background Art

[0008] A programmable logic device (PLD) (e.g., a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a field programmable system on chip (FPSC), or other types of programmable devices) can be configured with various user designs to implement desired functions. Typically, the user design is synthesized and mapped to the configurable resources (e.g., programmable logic gates, lookup tables (LUTs), embedded hardware, or other types of resources) and interconnects available in a particular PLD. The physical layout and routing of the synthesized and mapped user design can then be determined to generate configuration data for the particular PLD.

[0009] Clients of PLDs typically devote considerable resources to developing configurations for their selected PLD types and / or capabilities, and protecting configuration data and preventing the desired operation or capabilities associated with the selected PLD and / or developed configuration from being compromised has become critical to many clients of PLDs. Therefore, there is a need in the art for systems and methods for manufacturing, protecting, distributing, and / or upgrading PLDs and PLD configurations, particularly in the context of trusted computing applications and trusted computing architectures. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A block diagram of a programmable logic device (PLD) according to an embodiment of the present disclosure is shown.

[0011] Figure 2 A block diagram showing logic blocks of a PLD according to an embodiment of the present disclosure is shown.

[0012] Figure 3 The design process of a PLD according to an embodiment of the present disclosure is shown.

[0013] Figure 4 A block diagram of a secure PLD according to an embodiment of the present disclosure is shown.

[0014] Figure 5A A block diagram of a secure PLD provisioning system according to an embodiment of the present disclosure is shown.

[0015] Figure 5B A block diagram of a secure PLD provisioning system according to an embodiment of the present disclosure is shown.

[0016] Figure 6 A block diagram of a user device including a secure PLD according to an embodiment of the present disclosure is shown.

[0017] Figure 7 A provisioning process for a locked secure PLD according to an embodiment of the present disclosure is shown.

[0018] Embodiments of the present disclosure and their advantages may be best understood by reference to the following detailed description. It should be understood that the same reference numerals are used to identify the same elements shown in one or more of the accompanying drawings, wherein the text is for illustrating embodiments of the present disclosure rather than for limiting embodiments of the present disclosure. DETAILED DESCRIPTION

[0019] The present disclosure provides systems and methods for providing a locked secure programmable logic device (PLD) for use in trusted computing applications and architectures as described herein. For example, embodiments provide systems and methods for key provisioning associated with providing a secure PLD locked to a client-defined configuration and / or operating environment. The locked secure PLD can be used to perform various security operations for a trusted platform, for example, including securely configuring and / or booting such a platform / user device, as described herein.

[0020] According to the embodiments set forth herein, a technique for safely implementing a user design in a programmable logic device (PLD) is provided. In various embodiments, a user design may be converted into a set of PLD components (e.g., configured for logic, arithmetic, or other hardware functions) and their associated interconnections available in the PLD and / or represented by a set of PLD components and their associated interconnections available in the PLD. For example, a PLD may include a plurality of programmable logic blocks (PLBs) and configurable routing resources that may be used to interconnect the PLBs and / or logic cells, each PLB including a plurality of logic cells. In some embodiments, each PLB may be implemented with between 2 and 16 or between 2 and 32 logic cells.

[0021] Typically, a PLD (e.g., FPGA) structure includes one or more routing structures and an array of similarly arranged logic cells arranged within a programmable function block (e.g., PFB and / or PLB). The purpose of the routing structure is to programmably connect the ports of the logic cells / PLBs to each other in the necessary combination to achieve the desired function. A secure PLD may include various additional "hard" engines or modules that are configured to provide operations that can be linked to the PLD structure to provide a series of security functions of a configurable trusted computing function and / or architecture. Routing flexibility and configurable function embedding can be used when synthesizing, mapping, placing and / or routing a user design into multiple PLD components. As a result of various user design optimization processes (which can result in considerable design time and cost), the user design can be implemented relatively efficiently, thereby freeing up configurable PLD components that would otherwise be occupied by additional operations and routing resources. In some embodiments, the optimized user design can be represented by a netlist that identifies various types of components provided by the PLD and their associated signals. In an embodiment that generates a netlist of a converted user design, an optimization process can be performed on such a netlist. Once optimized, such a configuration may be encrypted and signed and / or otherwise protected for distribution to secure PLDs, and such a process may include one or more key provisioning processes, as described herein.

[0022] Now referring to the accompanying drawings, Figure 1 A block diagram of a PLD 100 according to an embodiment of the present disclosure is shown. The PLD 100 (e.g., a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a field programmable system on chip (FPSC), or other types of programmable devices) generally includes input / output (I / O) blocks 102 and logic blocks 104 (e.g., also referred to as programmable logic blocks (PLBs), programmable function units (PFUs), or programmable logic cells (PLCs)). More generally, the individual elements of the PLD 100 may be referred to as a PLD fabric.

[0023] I / O blocks 102 provide I / O functionality (e.g., to support one or more I / O and / or memory interface standards) for PLD 100, while programmable logic blocks 104 provide logic functionality (e.g., LUT-based logic or logic gate array-based logic) for PLD 100. Additional I / O functionality may be provided by serializer / deserializer (SERDES) blocks 150 and physical coding sublayer (PCS) blocks 152. PLD 100 may also include hard intellectual property core (IP) blocks 160 to provide additional functionality (e.g., substantially predetermined functionality provided in hardware that may be configured with less programming than logic blocks 104).

[0024] PLD 100 may also include memory blocks 106 (e.g., EEPROM blocks, block SRAM, and / or flash memory), clock-related circuits 108 (e.g., clock sources, PLL circuits, and / or DLL circuits), and / or various routing resources 180 (e.g., interconnects and appropriate switching logic to provide paths for routing signals throughout PLD 100, such as for clock signals, data signals, or others), as appropriate. In general, as will be appreciated by those skilled in the art, the various elements of PLD 100 may be used to perform their intended functions for a desired application.

[0025] For example, some I / O blocks 102 may be used to program memory 106 or transfer information (e.g., various types of user data and / or control signals) to / from PLD 100. Other I / O blocks 102 include a first programming port (which may represent a central processing unit (CPU) port, a peripheral data port, an SPI interface, and / or a sysCONFIG programming port) and / or a second programming port such as a Joint Test Action Group (JTAG) port (e.g., by adopting a standard such as the Institute of Electrical and Electronics Engineers (IEEE) 1149.1 or 1532 standards). In various embodiments, I / O blocks 102 may be included to receive configuration data and commands (e.g., via one or more connections 140) to configure PLD 100 for its intended use and to support serial or parallel device configuration and information transfer with SERDES block 150, PCS block 152, hard IP block 160, and / or logic block 104 as appropriate.

[0026] It should be understood that the number and location of the various elements are not limiting and may depend on the desired application. For example, various elements may not be required for the desired application or design specifications (eg, for the type of programmable device selected).

[0027] Furthermore, it should be understood that the elements are shown in block form for clarity and that the various elements are typically distributed throughout PLD 100, such as in logic blocks 104, hard IP blocks 160, and routing resources (e.g., Figure 2 The various embodiments disclosed herein are not limited to programmable logic devices such as PLD 100, and may be applied to various other types of programmable devices, as will be appreciated by those skilled in the art.

[0028] External system 130 may be used to create a desired user configuration or design for PLD 100 and generate corresponding configuration data to program (e.g., configure) PLD 100. For example, system 130 may provide such configuration data to one or more I / O blocks 102, SERDES block 150, and / or other portions of PLD 100. Thus, programmable logic blocks 104, various routing resources, and any other appropriate components of PLD 100 may be configured to operate according to a user-specified application.

[0029] In the illustrated embodiment, the system 130 is implemented as a computer system. In this regard, the system 130 includes, for example, one or more processors 132, which may be configured to execute instructions, such as software instructions, provided in one or more memories 134 and / or stored in a non-transitory form in one or more non-transitory machine-readable media 136 (e.g., which may be internal or external to the system 130). For example, in some embodiments, the system 130 may run PLD configuration software, such as Lattice Diamond System Planner software available from Lattice Semiconductor Corporation, to allow a user to create a desired configuration and generate corresponding configuration data to program the PLD 100.

[0030] System 130 also includes, for example, a user interface 135 (e.g., a screen or display) for displaying information to a user, and one or more user input devices 137 (e.g., a keyboard, mouse, trackball, touch screen, and / or other devices) for receiving user commands or design entries to prepare a desired configuration of PLD 100.

[0031] Figure 2 1 shows a block diagram of a logic block 104 of a PLD 100 according to an embodiment of the present disclosure. As discussed, the PLD 100 includes a plurality of logic blocks 104 that include various components to provide logic and arithmetic functions. Figure 2In the exemplary embodiment shown, logic block 104 includes a plurality of logic cells 200 that may be interconnected internally within logic block 104 and / or externally using routing resources 180. For example, each logic cell 200 may include various components such as: a lookup table (LUT) 202, a mode logic circuit 204, a register 206 (e.g., a flip-flop or latch), and various programmable multiplexers (e.g., programmable multiplexers 212 and 214) for selecting desired signal paths between logic cells 200 and / or logic cells 200. In this example, LUT 202 accepts four inputs 220A-220D, which makes it a four-input LUT (which may be abbreviated as "4-LUT" or "LUT4") that may be programmed by configuration data of PLD 100 to implement any appropriate logic operation with four or fewer inputs. Mode logic 204 may include various logic elements and / or additional inputs, such as input 220E, to support the functionality of various modes, as described herein. In other examples, LUT 202 may have any other suitable size, with any other suitable number of inputs for a particular implementation of a PLD. In some embodiments, different sized LUTs may be provided for different logic blocks 104 and / or different logic cells 200.

[0032] In some embodiments, output signal 222 from LUT 202 and / or mode logic 204 may pass through register 206 to provide output signal 233 of logic cell 200. In various embodiments, as shown, output signal 223 from LUT 202 and / or mode logic 204 may pass directly to output 223. Depending on the configuration of multiplexers 210-214 and / or mode logic 204, output signal 222 may be temporarily stored (e.g., latched) in latch 206 according to control signal 230. In some embodiments, configuration data for PLD 100 may configure outputs 223 and / or 233 of logic cell 200 to be provided as one or more inputs of another logic cell 200 (e.g., in another logic block or the same logic block) in a hierarchical or cascade arrangement (e.g., including multiple levels) to configure a logic operation that cannot be implemented in a single logic cell 200 (e.g., a logic operation that has too many inputs to be implemented by a single LUT 202). Furthermore, logic unit 200 may be implemented with multiple outputs and / or interconnects to facilitate selectable modes of operation, as described herein.

[0033] Mode logic circuits 204 may be used in some configurations of PLD 100 to efficiently implement arithmetic operations, such as adders, subtractors, comparators, counters, or other operations, to efficiently form some extended logic operations (e.g., higher order LUTs, working with multi-bit data), to efficiently implement relatively small RAMs, and / or to allow selection between logic, arithmetic, extended logic, and / or other selectable operating modes. In this regard, mode logic circuits 204 across multiple logic cells 202 may be chained together to pass carry signals 205 and carry out signals 207, and / or other signals (e.g., output signals 222) between adjacent logic cells 202, as described herein. Figure 2 In the example of , carry signal 205 may be passed directly to mode logic circuit 204 , or may be passed to mode logic circuit 204 by configuring one or more programmable multiplexers, as described herein. In some embodiments, mode logic circuit 204 may be linked across multiple logic blocks 104 .

[0034] Figure 2 The logic unit 200 shown in FIG. 1 is merely an example, and the logic unit 200 according to different embodiments may include different combinations and arrangements of PLD components. Figure 2 A logic block 104 is shown having eight logic cells 200, but logic blocks 104 according to other embodiments may include fewer logic cells 200 or more logic cells 200. Each logic cell 200 of a logic block 104 may be used to implement a portion of a user design implemented by PLD 100. In this regard, PLD 100 may include many logic blocks 104, each of which may include logic cells 200 and / or other components that collectively implement a user design.

[0035] As further described herein, when PLD 100 is configured to implement a user design, portions of the user design may be adjusted to occupy fewer logic cells 200, fewer logic blocks 104, and / or place less of a burden on routing resources 180. Such adjustments according to various embodiments may identify certain logic, arithmetic, and / or extended logic operations to be implemented in arrangements that occupy multiple embodiments of logic cells 200 and / or logic blocks 104. As further described herein, the optimization process may route various signal connections associated with the arithmetic / logic operations described herein such that the logic, ripple arithmetic, or extended logic operations may be implemented into one or more logic cells 200 and / or logic blocks 104 to be associated with the previous arithmetic / logic operations.

[0036] Figure 3 FIG. 3 shows a design process 300 of a PLD according to an embodiment of the present disclosure. For example, Figure 3The process may be performed by system 130 running Lattice Diamond software to configure PLD 100. In some embodiments, Figure 3 The various files and information referenced in the description may be stored in one or more databases and / or other data structures, such as in memory 134, machine-readable medium 136, and / or other data structures. In various embodiments, such files and / or information may be encrypted or otherwise protected when stored and / or transmitted to PLD 100 and / or other devices or systems.

[0037] In operation 310, system 130 receives a user design that specifies desired functionality for PLD 100. For example, a user may interact with system 130 (e.g., via user input device 137 and hardware description language (HDL) code representing the design) to identify various features of the user design (e.g., high-level logic operations, hardware configuration, and / or other features). In some embodiments, the user design may be provided in a register transfer level (RTL) description (e.g., a gate-level description). System 130 may perform one or more rule checks to confirm that the user design describes a valid configuration for PLD 100. For example, system 130 may reject invalid configurations and / or request that the user provide appropriate new design information.

[0038] In operation 320, system 130 synthesizes the design to create a netlist (e.g., a synthesized RTL description) that identifies an abstract logical implementation of the user design as a plurality of logic components (e.g., also referred to as netlist components), which may include both programmable components and hard IP components of PLD 100. In some embodiments, the netlist may be stored in a local general database (NGD) file in an electronic design interchange format (EDIF).

[0039] In some embodiments, synthesizing the design into a netlist in operation 320 may involve converting (e.g., translating) a high-level description of logic operations, hardware configurations, and / or other features in the user design into a collection of PLD components (e.g., logic blocks 104, logic cells 200, and other components of PLD 100 configured to implement the logic, arithmetic, or other hardware functions of the user design) and their associated interconnections or signals. Depending on the embodiment, the converted user design may be represented as a netlist.

[0040] In some embodiments, synthesizing the design into a netlist in operation 320 may further involve performing an optimization process on the user design (e.g., the user design converted / translated into a set of PLD components and their associated interconnections or signals) to reduce propagation delays, consumption of PLD resources and routing resources, and / or optimize the performance of the PLD when configured to implement the user design. Depending on the embodiment, the optimization process may be performed on a netlist representing the converted / translated user design. Depending on the embodiment, the optimization process may represent the optimized user design in a netlist (e.g., to produce an optimized netlist).

[0041] In some embodiments, the optimization process may include optimizing certain instances of logic function operations, ripple arithmetic operations, and / or extended logic function operations that would occupy multiple configurable PLD components (e.g., logic cells 200, logic blocks 104, and / or routing resources 180) when the PLD is configured to implement the user design. For example, the optimization process may include detecting multiple modes or configurable logic cells that implement the logic function operations, ripple arithmetic operations, extended logic function operations, and / or corresponding routing resources in the user design, swapping the operation modes of the logic cells that implement the various operations to reduce the number of PLD components and / or routing resources used to implement the operations and / or reduce the propagation delay associated with the operations, and / or reprogramming the corresponding LUTs and / or mode logic to account for the swapped operation modes.

[0042] In another example, the optimization process may include detecting an extended logic function operation and / or corresponding routing resources in a user design, implementing the extended logic operation as a multi-mode or switchable logic cell with a single physical logic cell output, routing or coupling logic cell outputs of a first group of logic cells to inputs of a second group of logic cells to reduce the number of PLD components used to implement the extended logic operation and / or routing resources and / or reduce propagation delays associated with the extended logic operation, and / or programming corresponding LUTs and / or mode logic to implement the extended logic function operation using at least the first group of logic cells and the second group of logic cells.

[0043] In another example, the optimization process may include detecting multiple modes or configurable logic cells implementing logic function operations, ripple arithmetic operations, extended logic function operations, and / or corresponding routing resources in a user design, swapping operation modes of the logic cells implementing the various operations to provide programmable registers along signal paths within the PLD to reduce propagation delays associated with the signal paths, and reprogramming corresponding LUTs, mode logic, and / or other logic cell control bits / registers to account for the swapped operation modes and / or programming programmable registers to store or latch signals on the signal paths.

[0044] In operation 330, system 130 performs a mapping process that identifies components of PLD 100 that can be used to implement the user design. In this regard, system 130 may map the optimized netlist (e.g., stored in operation 320 as a result of the optimization process) to various types of components (e.g., logic blocks 104, logic cells 200, embedded hardware, and / or other portions of PLD 100) provided by PLD 100 and their associated signals (e.g., in a logical manner, but without having yet to specify placement or routing). In some embodiments, the mapping may be performed on one or more previously stored NGD files, with the mapping results stored as a physical design file (e.g., also referred to as an NCD file). In some embodiments, the mapping process may be performed as part of a synthesis process in operation 320 to produce a netlist that is mapped to the PLD components.

[0045] In operation 340, system 130 performs a placement process to assign the mapped netlist components to specific physical components residing at specific physical locations of PLD 100 (e.g., to specific logic cells 200, logic blocks 104, routing resources 180, and / or other physical components of PLD 100), and thereby determine the layout of PLD 100. In some embodiments, placement may be performed on one or more previously stored NCD files, with the placement results stored as another physical design file.

[0046] In operation 350, system 130 performs a routing process to route connections between components of PLD 100 (e.g., using routing resources 180) based on the placement layout determined in operation 340 to achieve physical interconnections between the placed components. In some embodiments, routing may be performed on one or more previously stored NCD files, with the routing results stored as another physical design file.

[0047] In various embodiments, routing the connections in operation 350 may further involve performing an optimization process on the user design to reduce propagation delays, consumption of PLD resources and / or routing resources, and / or to optimize performance of the PLD when configured to implement the user design. In some embodiments, the optimization process may be performed on a physical design file representing the converted / translated user design, and the optimization process may represent the optimized user design in the physical design file (e.g., to generate an optimized physical design file).

[0048] In some embodiments, the optimization process may include optimizing certain instances of logic function operations, ripple arithmetic operations, and / or extended logic function operations that would occupy multiple configurable PLD components (e.g., logic cells 200, logic blocks 104, and / or routing resources 180) when the PLD is configured to implement the user design. For example, the optimization process may include detecting multiple modes or configurable logic cells that implement the logic function operations, ripple arithmetic operations, extended logic function operations, and / or corresponding routing resources in the user design, swapping the operation modes of the logic cells that implement the various operations to reduce the number of PLD components and / or routing resources used to implement the operations and / or reduce the propagation delay associated with the operations, and / or reprogramming the corresponding LUTs and / or mode logic to account for the swapped operation modes.

[0049] In another example, the optimization process may include detecting an extended logic function operation and / or corresponding routing resources in a user design, implementing the extended logic operation as a multi-mode or switchable logic cell with a single physical logic cell output, routing or coupling logic cell outputs of a first group of logic cells to inputs of a second group of logic cells to reduce the number of PLD components used to implement the extended logic operation and / or routing resources and / or reduce propagation delays associated with the extended logic operation, and / or programming corresponding LUTs and / or mode logic to implement the extended logic function operation using at least the first group of logic cells and the second group of logic cells.

[0050] In another example, the optimization process may include detecting multiple modes or configurable logic cells implementing logic function operations, ripple arithmetic operations, extended logic function operations, and / or corresponding routing resources in a user design, swapping operation modes of the logic cells implementing the various operations to provide programmable registers along signal paths within the PLD to reduce propagation delays associated with the signal paths, and reprogramming corresponding LUTs, mode logic, and / or other logic cell control bits / registers to account for the swapped operation modes and / or programming programmable registers to store or latch signals on the signal paths.

[0051] Changes in routing can be propagated back to previous operations, such as synthesis, mapping, and / or placement, to further optimize various aspects of the user's design.

[0052] Thus, after operation 350, one or more physical design files may be provided that specify the user design after it has been synthesized (e.g., converted and optimized), mapped, placed, and routed (e.g., further optimized) for PLD 100 (e.g., by combining the results of the corresponding previous operations). In operation 360, system 130 generates configuration data for the synthesized, mapped, placed, and routed user design. In various embodiments, such configuration data may be encrypted and / or otherwise protected as part of such generation process, as described more fully herein. In operation 370, system 130 configures PLD 100 with the configuration data by, for example, loading a configuration data bitstream (e.g., a "configuration") into PLD 100 via connection 140. For example, such a configuration may be provided in an encrypted, signed, or unprotected / unauthenticated form, and PLD 100 may be configured to treat secure configurations and unprotected configurations differently, as described herein.

[0053] Figure 4 FIG. 4 is a block diagram of a secure PLD 410 according to an embodiment of the present disclosure. In various embodiments, the secure PLD 410 may be composed of a Figure 1 100, but with additional configurable and / or hard IP elements configured to facilitate operation of secure PLD 410 in trusted computing applications and / or architectures, as described herein. In particular, secure PLD 410 may include: PLD structure 400, linked to security engine 420 via various buses; configuration engine 440; non-volatile memory (NVM) 450; programmable I / O 404 and / or other integrated circuit (IC) modules 480, all of which are implemented on a single IC, as shown. In general, PLD structure 400 may be implemented with any of the various elements described with respect to PLD 100, and may be implemented using methods similar to those described with respect to PLD 100. Figure 3 The PLD structure 400 may be configured to generate and program the PLD structure 400 according to the desired configuration using the design process of the process 300 described above. More specifically, the secure PLD 400 may be configured to use a PLD structure 400 prior to programming the PLD structure 400 according to the received configuration. Figure 4 The various hard IP elements identified in the example may be used to receive, decrypt, authenticate and / or verify the received configuration.

[0054] Security engine 420 may be implemented as a hard IP resource that is configured to provide various security functions for use by PLD structure 400 and / or configuration engine 440. Figure 4In the illustrated embodiment, the security engine 420 includes a device ID 422 (e.g., a 64-bit unique and device-specific ID), a true random number generator 424, a secure hash algorithm (SHA) service 426 (e.g., SHA256, SHA-2, and / or SHA-3 services), an advanced encryption standard (AES) service 428 (e.g., AES128 / 256 encryption / decryption service), a public key / private key pair generator (P / PKG) 430, an elliptic curve digital signature algorithm (ECDSA) authentication service 432 (e.g., ECDSA256 service), and / or other security services 434. Also as shown in FIG. Figure 4 As shown, the security engine 420 may be communicatively linked to the PLD fabric 400 via the tethered bus 406 and to the configuration engine 440 via the secure bus 446. In general, the tethered bus 406 may be configured to allow the PLD fabric 400 to access a limited set of security functions hosted by the security engine 420 and / or to access such security functions in a limited manner, such as not allowing configuration of any one or all of the security functions hosted by the security engine 420, not allowing access to the device ID 422, and / or not allowing access to the private key of the public key / private key pair generated by the P / PKG 430. In contrast, the secure bus 446 may be configured to allow the configuration engine 440 to access and / or modify all security functions, data, and / or configurations of the security engine 420. In general, either or both of the tethered bus 406 and the secure bus 446 may be configured to provide encrypted and / or otherwise secure communications between the security engine 420 and other elements of the secure PLD 410.

[0055] Configuration engine 440 may be implemented as a hard IP resource configured to manage configuration of and / or communications between various elements of secure PLD 410. For example, configuration engine 440 may be configured to receive an encrypted / secure configuration of PLD structure 400 from external system 130 / machine-readable medium 136 via configuration I / O 448, authenticate and / or decrypt such configuration using security functions of security engine 420, store the authenticated and / or decrypted configuration in NVM 450, soft or hard lock a portion of NVM 450 corresponding to the stored configuration, mark the stored configuration as authenticated and / or verified bootable, and / or program PLD structure 400 according to the authenticated, decrypted, verified, and / or locked configuration, as described herein. In further embodiments, configuration engine 440 may be configured to configure at least a portion of programmable I / O 404 (eg, enable and / or disable at least a portion of programmable I / O 404) via configuration port 444, as shown.

[0056] More generally, configuration engine 440 may be configured to manage or control configuration of elements of secure PLD 410, lock states of elements of secure PLD 410, booting of PLD structure 400, and flow control of the entire secure PLD 410. For example, configuration engine 440 may be configured to, for example, soft lock or unlock or hard lock any one or portion of buses 408, 442, 443, 446, and / or soft lock or unlock or hard lock any portion or sector of NVM 450. In a default unlock configuration, buses 408, 442, and 446 may be implemented as a secure bus that is functionally similar to secure bus 446. External access bus 443 of configuration I / O 448 may be implemented according to one or more of JTAG, I2C, SPI, and / or other external access buses or protocols, for example, configured to provide lockable / unlockable access to and / or from external system 130 / machine-readable medium 136. In certain embodiments, the security bus 408 may be implemented according to a wishbone bus / interface.

[0057] NVM 450 may be implemented as a hard IP resource configured to provide secure non-volatile storage of data for facilitating secure operation of secure PLD 410. For example, NVM 450 may include a lock policy 460 corresponding to a memory location in NVM 460 that indicates a lock status of data stored in NVM 450. The contents of lock policy 460 may be transferred to a shadow register within configuration engine 440 upon power-up of secure PLD 410, e.g., to allow such contents to be dynamically modified by configuration engine 440 and / or PLD fabric 400 based on a set / lock status in lock policy 460. In general, the lock status of a particular resource indicates read, write / program, and / or erase access to that resource relative to PLD fabric 400, configuration I / O 448 / external access bus 443, and / or other elements of secure PLD 410.

[0058] As described herein, a "soft" lockout refers to a read, write, and / or erase access state of a bus / port or memory location in NVM 450 that can be programmatically enabled or disabled by PLD structure 400 and / or across external access bus 443 to granularly allow or disallow read, write, and / or erase access to the corresponding resource. A "hard" lockout refers to a read, write, and / or erase access state of a bus / port or memory location in NVM 450 that can be programmatically enabled via external access bus 443, but cannot be enabled or disabled by PLD structure 400 and cannot be disabled via external access bus 443. In various embodiments, assertion of a hard lockout is generally unidirectional and eliminates the ability of PLD structure 400 and / or external access bus 443 to further modify the lockout state of all secure resources within secure PLD 410. In some embodiments, such a locking scheme may be implemented with four bits for each resource (eg, a bus port or a memory sector within NVM 450), one bit each for hard lock enable, read lock enable, write lock enable, and erase lock enable.

[0059] like Figure 4As shown in the illustrated embodiment, NVM 450 may include a plurality of differentiated lockable sectors, each of which may have its own lock state. Such lockable sectors may include, for example, a first configuration image sector 452, a second configuration image sector 454, a manufacturer-specified trim sector 456, a device key sector 458 (e.g., an AES key sector and a separate public key / key pair sector), a lock policy sector 460, a user flash memory (UFM) sector 462, and / or other defined secure storage sectors 464, as shown. In some embodiments, UFM sector 462 may be further differentiated into sub-sectors, each of which may have its own lock state. Lock policy sector 460 may store the lock state of each sector of NVM 450, for example, including its own lock state. For example, the first configuration image sector 452 and the second configuration image sector 454 may each store a configuration of the PLD structure 400, and may further be tagged with a version and / or date and pre-authenticated, for example, to allow them to be selected (e.g., based on the version or date) and used to program the PLD structure without performing an authentication process. The trim sector 456 may be used to store manufacturer trim and / or other data specific to a particular secure PLD 410, such as a modifiable client-specific order part number and a generated client ID number derived from the device ID 422 as described herein. The device key sector 458 may be used to store encryption / decryption keys, public / private keys, and / or other security keys specific to a particular secure PLD 410. The lock policy sector 460 may be configured to store the lock status of resources of the NVM 450, the configuration engine 440, the configuration I / O 448, and / or other elements of the secure PLD 410. UFM sector 462 may be used to store user data that is generally accessible by PLD structure 400, such as configuration or application-specific security keys, certificates, and / or other secure user data. Other secure storage sectors 464 may be used to store other device-specific secure data. Any one or more individual elements, portions, or sectors of NVM 450 may be implemented, for example, as configurable memory or one-time programmable (OTP) memory, as described herein.

[0060] Programmable I / O 404 may be implemented as at least partially configurable resources configured to provide or support a communication link between PLD structure 400 and an external controller, memory, and / or other device, such as across bus 402 (e.g., a bus configured to link portions of PLD structure 400 to programmable I / O 404). In some embodiments, bus 402 and / or programmable I / O 404 may be integrated with PLD structure 400. Configuration I / O 448 may be implemented as a hard IP resource configured to support one or more external bus interfaces and / or protocols 449 to support communications with external systems 130 / machine-readable media 136, as described herein. In some embodiments, configuration I / O 448 and / or bus 443 may be integrated with configuration engine 440. More generally, in Figure 4 One or more elements of the secure PLD 410 shown as separate in FIG. 4 may be integrated with and / or within each other. Other IC modules 480 may be implemented as hard and / or configurable IP resources that are configured to facilitate the operation of the secure PLD 410.

[0061] Figure 5A FIG. 5 is a block diagram of a secure PLD provisioning system 500 according to an embodiment of the present disclosure. For example, one or more elements of the provisioning system 500 may be configured to perform operations related to Figure 7 Describe at least part of the provisioning process. Figure 5A In the illustrated embodiment, the secure PLD provisioning system 500 includes a secure PLD client 510 and a secure PLD manufacturer 520 configured to communicate with each other via a communication link 512 and a communication network 514. In general, the communication link 512 may be implemented by one or more wired and / or wireless communication links configured to support data communications to and from the communication network 514, and the communication network 514 may be implemented by one or more local area networks and / or wide area networks configured to generally support data communications (e.g., an Internet service provider, a cellular network, and / or the Internet). Each of the remaining elements of the secure PLD provisioning system 500 represents an entity in the manufacturing and delivery chain of, for example, the secure PLD 410, and may be generally implemented by a network communication device, each of which is similar in scope to the secure PLD 410. Figure 1 The secure PLD provisioning system 500 is configured to communicate across the communication link 512 and the communication network 514. In various embodiments, the secure PLD provisioning system 500 may be configured to provision keys and / or other secure communication elements and / or mechanisms for secure PLDs similar to the secure PLD 410.

[0062] like Figure 5A As shown, the secure PLD client 510 and the secure PLD manufacturer 520 can be considered trusted entities within the provisioning system 500, while all other elements of the provisioning system 500 can be considered untrusted entities, such that the client and / or manufacturer's software and / or hardware should generally be protected or otherwise secured from unwanted access or manipulation by the downstream client 550 and / or the optional secure PLD programmer 530 and user device assembler 540. For example, in a general operation, the secure PLD client 510 requests one or more secure PLDs 410 from the secure PLD manufacturer 520 and generates a proprietary configuration to be programmed into the PLD structure 400 of the secure PLD 410. The secure PLD manufacturer 520 prepares the requested one or more secure PLDs 410 by manufacturing individual ICs and programming them with a security mechanism (e.g., locking them) to inhibit further programming by configurations not provided by the secure PLD client 510 and / or the secure PLD manufacturer 520. The secure PLD client 510 may provide the device-specific encryption configuration to an optional secure PLD programmer 530, and the secure PLD manufacturer 520 may provide the locked secure PLD 410 to the secure PLD programmer 530, such that the secure PLD programmer 530 can only program each locked secure PLD 410 with its device-specific encryption configuration, and such that the secure PLD programmer 530 cannot easily determine the unencrypted contents of the device-specific encryption configuration.

[0063] The secure PLD programmer 530 may deliver the programmed and locked secure PLD 410 to an optional user device assembler 540 (e.g., a motherboard assembler, a smartphone assembler, and / or other user device / embedded device assembler / manufacturer), which integrates the programmed and locked secure PLD 410 with the user device and provides the integrated user device to a downstream client 550, all without the secure PLD programmer 530 and the downstream client 550 being able to determine the unencrypted contents of the device-specific cryptographic configuration or reprogram the locked secure PLD with an alternate configuration. The secure PLD client 510 may then audit the programmed and locked secure PLD 410 in the corresponding user device at the downstream client 550 without revealing the unencrypted contents of the device-specific cryptographic configuration or unlocking the secure PLD 410. Although in Figure 5A 5. Although shown as separate entities in FIG. 5, secure PLD programmer 530 and user device assembler 530 may be combined together and / or separately integrated with secure PLD client 510, secure PLD manufacturer 520, and / or downstream client 550.

[0064] Figure 5BFIG. 5 is a block diagram of a secure PLD provisioning system 502 according to an embodiment of the present disclosure. For example, one or more elements of the provisioning system 502 may be configured to perform operations related to Figure 7 In one embodiment, the secure PLD provisioning system 502 may correspond substantially to Figure 5A More generally, a system similar to or including elements of the secure PLD provisioning system 502 may be used to implement a secure PLD manufacturer 520. Figure 5A Any one or more of the elements of secure PLD provisioning system 500 as shown.

[0065] exist Figure 5B In the illustrated embodiment, the secure PLD provisioning system 502 includes a secure PLD locking system 522 configured to lock and / or redirect a plurality of secure PLDs 410 (e.g., unlocked / blank secure PLDs 410 and / or previously locked secure PLDs 410 intended for redirection to a different secure PLD client or request) from a secure PLD inventory 524 based on requests issued by secure PLD clients 510. Once locked by the secure PLD locking system 522, the locked secure PLDs may be programmed with a configuration provided by the secure PLD client 510, such as by the locking system 522 or more generally by a secure PLD programmer 530, as described herein. In various embodiments, the secure PLD locking system 522 may include a hardened security module (HSM) 526 configured to receive a client public key from the secure PLD client 510, for example, via the non-secure communication link 512, and control the external system 130 via the secure communication link 527 to lock the secure PLD 410 provided via the device delivery link 525 (e.g., a mechanical and / or electronic delivery link configured to retrieve the secure PLD 420 from the PLD inventory / storage area 524 and interface the configuration I / O 448 of the secure PLD 410 with the external system 130 via the external bus interface 449). The locked secure PLD 410 may then be physically delivered to the secure PLD programmer 530 via a similar device delivery link 528. For example, the HSM 526 may be generally implemented similarly to the external system 130, but placed in a secure factory location with monitored and limited physical access to eliminate the risk of external manipulation and / or monitoring of the HSM 526. In some embodiments, external system 130 and HSM 526 and / or their functionality may be integrated into a single external system 130 .

[0066] In general operation, the secure PLD client 510 may provide a request for a plurality of locked secure PLDs 410 to the HSM 526, the request including a client public key of a client public key / private key pair (e.g., generated within the secure PLD client 510, such as generated by its own HSM). The HSM 526 may generate a client-specific programming public key / private key pair (e.g., for encrypting, decrypting, and / or authenticating a configuration for a locked secure PLD 410, such as locking the secure PLD 410 and unlocking the secure PLD 410 for programming) and a programming secret (e.g., a 256-bit random number to further authenticate the provided configuration), and provide the programming private key, programming secret, and factory public key to the external system 130 for loading into a blank or unlocked secure PLD 410 and locking the blank or unlocked secure PLD 410. For example, the HSM 526 may be configured to locally generate a factory public key / private key pair and / or retrieve such a factory key from the memory 134, and such a factory key may be factory-specific and / or client-specific. Configuration engine 440 may receive a device-specific tracking ID (e.g., which may identify a manufacturing lot, wafer, and wafer location corresponding to the manufacturing process of secure PLD 410), a programming private key, a programming secret, a factory public key, and an initial programming image (IPI) configuration of PLD structure 400, which may all be stored in one or more sectors of NVM 450 to lock secure PLD 410.

[0067] The configuration engine 440 may then store the tracking ID in the MFG trim 456 of the NVM 450 and / or in the device ID 422 of the security engine 420, and generate a device unique seed by appending a random number (e.g., generated by the TRNG 424) to the end of the tracking ID, and such device unique seed may be stored in the MFG trim 456 and / or used for seed generation of a device public / private key pair (e.g., generated by the P / PKG 430 of the security engine 420), which may be stored in the device key sector 458 of the NVM 450. The configuration engine 440 may then provide the resulting device public key and tracking ID to the external system 130, which may relay the device public key and tracking ID to the HSM 526 to be added to the locked PLD inventory, which includes a line item for each locked secure PLD 410 requested by the secure PLD client 510, wherein each line item includes a device-specific tracking ID and a device public key. The HSM 526 may then encrypt and sign the programming secret using the client public key and the programming private key, and may provide the resulting encrypted programming packet to the secure PLD client 510 along with the programming public key (e.g., to help generate an encrypted and signed configuration of the PLD structure 400 of the secure PLD 410). Once all locked secure PLD 410 entries requested by the secure PLD client 510 are complete, the HSM 526 may sign the locked PLD manifest using the programming private key and provide the signed locked PLD manifest to the secure PLD client 510, which may then use the locked PLD manifest, the programming secret, and the programming public key to manage the programming of the locked secure PLD 410 by the secure PLD programmer 530, as described herein.

[0068] In some embodiments, the HSM 526 may be configured to generate a client programming key token corresponding to a particular secure PLD client 510 and / or a particular request for a locked secure PLD 410 received from a secure PLD client 510. Such a client programming key token may be used to reference (e.g., within a client database stored in the HSM 526) all information stored about the secure PLD client 510 and / or a request for a locked secure PLD 410 received from a secure PLD client 510. Such stored information may include a programming public / private key pair, a programming secret, a factory public / private key pair, a locked PLD inventory, and / or other information or subsets of information associated with the operation of the secure PLD provisioning system 502 and / or 500. In embodiments where the PLD inventory 524 includes one or more pre-locked secure PLDs 410 for redirection (e.g., locked to a different secure PLD client or a different secure PLD request), the HSM 526 may be configured to retrieve information used to lock the locked secure PLD using a previous client programming key token, provide new information to the secure PLD 410 signed using a previous factory private key (e.g., via the external system 130), and provide a redirect command to the secure PLD 410 (e.g., to be executed by the secure PLD 410), wherein the redirect command is executed by the PLD fabric 400 and / or the configuration engine 440 to authenticate the new information with a previous factory public key stored in the NVM 450 and replace the previous information (e.g., a device public / private key pair, a programming private key, a programming secret, a factory public key, and / or an IPI) stored in the NVM 450 with the corresponding new or updated information.

[0069] Figure 6A block diagram of a user device 610 including a secure PLD 410 according to an embodiment of the present disclosure is shown. In one embodiment, the secure PLD 410 may be configured to provide a secure boot mechanism for the user device 610 (e.g., a motherboard, a smart phone, and / or other user / embedded device). For example, when the user device 610 is powered on, the secure PLD 410 may be configured to use the P / PKG 430 of the security engine 420 to generate a temporary public key / private key pair and provide the temporary public key and a controller boot loader 662 (e.g., which may be pre-authenticated and / or stored in the UFM 462 of the NVM 450) to the controller 620 via a bus 604 (e.g., a bus supported by the programmable I / O 404). The execution engine 624 of the controller 620 may be configured to execute the controller boot loader 662 upon receiving the controller boot loader 662 from the secure PLD 410, and the secure PLD 410 may configure the execution engine 624 to generate a temporary session key (e.g., using a power-on RAM value derived from a power-on state of the volatile memory (VM) 612), to encrypt the temporary session key using a temporary public key and a cryptographic salt provided by the secure PLD 410, and to provide the resulting first encrypted packet to the secure PLD 410 via the bus 604.

[0070] The security PLD 410 may be configured to extract a temporary session key (e.g., using a temporary private key) from a first encrypted packet provided by the controller 620 to encrypt the controller application image decryptor 663 using the session key, and provide the resulting second encrypted packet to the controller 620 via the bus 604. The execution engine 624 of the controller 620 may be configured to extract the controller application image decryptor 663 from the second encrypted packet upon receiving the second encrypted packet from the security PLD 410, and the security PLD 410 may configure the execution engine 624 to retrieve, authenticate, and decrypt the controller application image 632 stored in the NVM 630 (e.g., via the buses 602 and 604), store the authenticated and decrypted controller application image 632 in the VM 622, and execute the authenticated and decrypted controller application image 632. In addition, the security PLD 410 and the controller 620 may be configured to register a secure communication path with each other.

[0071] In another embodiment, the security PLD 410 may be configured to use the controller 620 to verify the configuration of the PLD structure 400 used to program the security PLD 410. For example, the security PLD 410 may be configured to use the P / PKG 430 of the security engine 420 to generate a temporary public / private key pair and provide the temporary public key to the controller 620. The execution engine 624 of the controller 620 may be configured to generate a temporary session key, encrypt the temporary session key using the temporary public key and a cryptographic salt provided by the security PLD 410, and provide the resulting third encrypted packet to the security PLD 410 via the bus 604. The controller 620 may also be configured to use the session key to encrypt a request to extract identification data from one or more configuration images stored, for example, in the NVM 450 of the security PLD 410, and send the resulting fourth encrypted packet to the security PLD 410 via the bus 604.

[0072] The secure PLD 410 may be configured to extract the temporary session key from the third encrypted packet provided by the controller 620, extract a request from the fourth encrypted packet using the temporary session key to extract the requested identification data from one or more configuration images stored in the NVM 450 of the secure PLD 410, encrypt the requested identification data using the temporary session key, and provide the resulting fifth encrypted packet to the controller 620 via the bus 604. Upon receipt, the controller 620 may be configured to verify the version, release date, and / or other characteristics of the one or more configuration images stored in the NVM 450 by comparing with a database of versions, release dates, and / or other characteristics of the one or more configuration images stored in the NVM 450 that resides in the user device 610 (e.g., in the NVM 630 or VM 622) and / or that is accessible or retrieved from a network (e.g., the communications network 514, via other user device modules 680, which may include a network interface device). In further alternative embodiments, secure PLD 410 may replace controller 620 and be used to control the operation of user device 600 .

[0073] Figure 7 FIG. 2 shows a provisioning process for a locked secure PLD according to an embodiment of the present disclosure. In some embodiments, Figure 7 The operations may be implemented as software instructions by Figures 1 to 6 The corresponding electronic devices, modules and / or structures shown are associated with one or more logic devices. More generally, Figure 7The operations of the process 700 may be implemented with any combination of software instructions and / or electronic hardware (e.g., inductors, capacitors, amplifiers, actuators, or other analog and / or digital components). It should be understood that any step, sub-step, sub-process, or block of the process 700 may be different from Figure 7 For example, in other embodiments, one or more blocks may be omitted from process 700, and other blocks may be included. In addition, block inputs, block outputs, various sensor signals, sensor information, calibration parameters, and / or other operating parameters may be stored in one or more memories before moving to subsequent portions of process 700. Although reference is made to Figures 1 to 7 The process 700 is described with reference to systems, devices, and elements of the present invention, but the process 700 may be performed by other systems, devices, and elements, and include different selections of electronic systems, devices, elements, components, and / or arrangements. At the start of the process 700, for example, various system parameters may be populated by previous executions of processes similar to the process 700, or may be initialized to zero and / or one or more values ​​corresponding to typical, stored, and / or learned values ​​derived from past operations of the process 700, as described herein.

[0074] In block 710, the logic device receives a request for a locked PLD. For example, a network communication device (e.g., external system 130, HSM 526) of a secure PLD manufacturer 520 may be configured to receive a request for a locked secure PLD 410 from a network communication device (e.g., external system 130, HSM 526) of a secure PLD client 510. For example, such a request may be sent over a communication link 512 and / or over a communication network 514, and may include a client public key of a corresponding client public key / private key pair, as well as the number of the device being requested and any specific model or other identification information associated with the particular desired secure PLD 410.

[0075] In block 720, the logic device generates a locked PLD. For example, the secure PLD manufacturer 520 may be configured to generate a locked secure PLD 410. In some embodiments, the secure PLD manufacturer 520 may use an IC manufacturing system to manufacture the secure PLD 410, which may include, for example, programming or storing or otherwise embedding the device ID 422 in the security engine 420 and / or MFG trim 456 of the NVM 450. The secure PLD manufacturer 520 may also use an external system 130 to lock the secure PLD 410, as described herein. In one embodiment, the secure PLD locking system 522 of the secure PLD manufacturer 520 may be configured to assign a client ID to the secure PLD client 510 and / or the request received in block 710, which may then be combined with the device ID 422 and / or a device order part number (e.g., generated at manufacturing time) to provide a client-specific order part number that may be used to reference or identify the secure PLD 410, for example, in an unencrypted database stored in the HSM 526.

[0076] The HSM 526 may also be configured to generate a client programming key token corresponding to the client public key in the secure PLD client 510 and / or the request received in block 710 by generating a corresponding random and unique client programming key token and / or client-specific order part number and referencing all stored information associated with generating a locked secure PLD referencing such a token or number. The HSM 526 may also be configured to generate a programming public / private key pair and a programming secret, all of which may be specific to the secure PLD client 510 and / or the request received in block 710, all of which may be stored in the HSM 526. The HSM 526 may also be configured to generate a factory public / private key pair, which may be specific to the secure PLD manufacturer 520, the secure PLD client 510, and / or the request received in block 710, which may also be stored in the HSM 526.

[0077] For example, the HSM 526 may be configured to provide the factory public key, programming private key, and programming secret to the external system 130 for programming / locking the secure PLD 410, and receive the device-specific tracking ID and the device public key in response. The HSM 526 may also be configured to encrypt and sign the programming secret using the client public key and the programming private key, and the resulting encrypted programming packet may be provided to the secure PLD client 510 along with the programming public key (e.g., to help the secure PLD client 510 generate an encrypted and signed configuration of the PLD structure 400 for the secure PLD 410). The secure PLD 410 may be configured to use the TRNG 424 of the security engine 420 to generate a device unique seed based on the tracking ID stored in the MFG trim 456 and / or the device ID 422, and to use the device unique seed of the security engine 420 and / or the P / PKG 430 to generate a device public key / private key pair, all of which are specific to the secure PLD 410, and all of which may be stored in the NVM 450 (e.g., along with a programming private key, programming secret, factory public key, and / or IPI configuration provided by the external system 130 and / or the HSM 526).

[0078] In another embodiment, the HSM 526 may be configured to retrieve the programming private key, programming secret, and device public key from a securely stored database using the client programming key token and provide them to the external system 130. The external system 130 may then be configured to use the programming private key, programming secret, and / or device public key to provide an IPI configuration to the secure PLD 410 and program the PLD structure 400 using the IPI. This programming may constitute an unsecure write operation and therefore may require a secure environment (e.g., occurring entirely within the secure PLD manufacturer 520). In a further embodiment, the HSM 526 may be configured to receive a locked PLD manifest entry including a tracking ID corresponding to the secure PLD 410 and a corresponding device public key from the external system 130, generate a complete locked PLD manifest corresponding to the request received in block 710, sign the locked PLD manifest with the programming private key, and provide the signed locked PLD manifest to the secure PLD client 510.

[0079] In other embodiments, it may be useful to redirect an already programmed and locked secure PLD to a different client or application (e.g., using a different programming key pair, programming secret, and public device key). Typically, there is no need to reprogram an already programmed IPI (e.g., the same IPI configuration of PLD structure 400 may be used). For example, HSM 526 may be configured to use a client programming key token and / or tracking ID to retrieve the previous information used to lock secure PLD 410 (e.g., the original programming private key, programming secret, and device public key stored in HSM 526). The HSM 526 may then be configured to use the external system 130 to provide the new information to the secure PLD 410 signed with the previous factory private key and to provide a redirect command to the secure PLD 410 (e.g., to be executed by the secure PLD 410), where the redirect command may be executed by the PLD fabric 400 and / or configuration engine 440 to authenticate the new information with the previous factory public key stored in the NVM 450 and replace the previous information (e.g., a device public / private key pair, a programming private key, a programming secret, a factory public key, and / or an IPI) stored in the NVM 450 with the corresponding new or updated or redirected information, as described herein.

[0080] In block 730, the logic device provides a secure unlock package for the locked PLD. For example, the HSM 526 of the secure PLD manufacturer 520 may be configured to provide a secure unlock package for the locked secure PLD 410 generated in block 720 to the secure PLD client 510. In one embodiment, the HSM 526 may be configured to provide the encrypted programming packet, programming public key, and / or client programming key token generated in block 720 to the secure PLD client 510. The secure PLD client 510 may use such information to generate a protected configuration of the secure PLD 410, as locked in block 720.

[0081] In block 740, the logic device provides a verifiable list identifying the locked PLD. For example, the secure PLD manufacturer 520 may be configured to provide a verifiable list of locked PLDs identifying the locked secure PLDs 410 generated in block 720. In one embodiment, the HSM 526 may be configured to generate a list of tracking IDs and device public keys (e.g., a list of device public keys referenced by the tracking IDs), to sign the locked PLD list using the programming private key generated in block 720, and to provide the signed locked PLD list to the secure PLD client 510. The secure PLD client 510 may use such information to audit the selection of deployed and / or locked secure PLDs 410.

[0082] In block 750, the logic device generates a protected configuration for the locked PLD. For example, the external system 130 of the secure PLD client 510 may be configured to generate a protected configuration for the locked secure PLD 410 generated in block 720. In one embodiment, the external system 130 may be configured to generate a protected configuration for the locked secure PLD 410 using a method similar to that described in reference to FIG. Figure 3 The process 300 discussed above is used to generate an unprotected configuration of the PLD structure 400 of the secure PLD 410. Such a configuration may include, for example, an application bitstream / configuration to be primarily loaded into and configure the PLD structure 400, and a feature bitstream / configuration to be primarily loaded into and configure the lock policy sector 460, the UFM sector 462, and / or other defined secure storage sectors 464. Such a feature bitstream / configuration may include security keys, functions, and / or other features that may be executed and / or otherwise used by the configuration engine 440 to implement any of the processes described herein.

[0083] In various embodiments, the external system 130 and / or the HSM 526 of the secure PLD client 510 may be configured to generate an application public / private key pair, an application encryption key (e.g., an AES encryption key), and a programming group public / private key pair. The external system 130 may be configured to sign the application and feature configuration using the application private key, and to encrypt the signed application and feature configuration using the application encryption key. The external system 130 may also be configured to generate a programming key digest by signing a combination / list of the application public key, the application encryption key, and the programming secret (e.g., extracted from the encrypted programming group of the secure unlock package provided in block 730) and the application private key, deriving an encryption key based on the programming public key and the programming group private key (e.g., using an elliptic curve Diffie-Hellman key derivation function), encrypting the signed combination of the keys using the derived encryption key, and combining the encrypted and signed key combination with the programming group public key (e.g., appending the programming group public key to the encrypted and signed key combination) to create a programming key digest. External system 130 may also be configured to sign the locked PLD manifest (e.g., received in block 740) with the group private key for authenticated delivery to downstream secure PLD programmer 530, user device assembler 540, and / or downstream client 550. External system 130 may be configured to generate a protected configuration for secure PLD 410 by combining the encrypted application and feature configurations with the programming key digest to create a single protected information packet.

[0084] In block 760, the logic device provides the locked PLD to the configuration programmer. For example, secure PLD manufacturer 520 may be configured to provide the locked secure PLD 410 generated in block 720 to secure PLD programmer 530, as described herein.

[0085] In block 770, the logic device programs the locked PLD according to the protected configuration. For example, the external device 130 of the secure PLD programmer 530 may be configured to program the locked secure PLD 410 generated in block 720 according to the protected configuration generated in block 750 and provided by the secure PLD client 510. In one embodiment, the external system 130 of the secure PLD programmer 530 may be configured to provide the protected configuration / packet generated in block 750 to the secure PLD 410, and the secure PLD 410 may be configured to boot according to the IPI provided to the secure PLD 410 in block 720. The secure PLD 410 may then verify the protected configuration and program elements of the secure PLD 410, including portions of the PLD structure 400 and the NVM 450, through one or more buses of the secure PLD 410. More specifically, security PLD 410 may be configured to decrypt the encryption key in the programming key digest using the programming private key stored in NVM 450 in block 720 and the group public key generated in block 750. In block 720, security PLD 410 may also be configured to authenticate the decrypted key digest with the application public key and verify that the programming secret in the programming key digest matches the programming secret stored in NVM 450. If both checks pass, security PLD 410 may store the application public key and the application encryption key from the key digest in NVM 450.

[0086] Once the application public key and the application encryption key from the key digest are stored in NVM 450, the secure PLD 410 can then decrypt the application and feature configuration and authenticate the decrypted application and feature configuration. For example, the application and feature configuration can be programmed into the secure PLD 410 only if the bitstream is successfully decrypted and authenticated using the application encryption key and the application public key. In the event that the application configuration is successfully authenticated, the secure PLD 410 can be configured to program / store the application configuration into one of the configuration image sectors 452 or 454, set the pre-authentication bit for the appropriate image, erase the IPI from the PLD structure 400, and / or program the PLD structure 400 according to the stored application configuration. The feature configuration can be programmed into one or more portions of the NVM 450. Other security checks to be performed before programming the secure PLD 410 can include verifying the locked PLD list, checking for a tracking ID match within the locked PLD list, and / or other security checks, as described herein.

[0087] In block 780 , the logic device assembles the user device including the locked and programmed PLD. For example, the pick and place system of the user device assembler 540 may be configured to assemble the user device 610 including the locked secure PLD 410 generated in block 720 and programmed in block 770 .

[0088] In block 790, the logic device audits the locked and programmed PLDs based on the authenticatable list. For example, the secure PLD client 510 may be configured to audit the locked secure PLD generated in block 720 and programmed in block 770 based on the authenticatable locked PLD list provided in block 740. In one embodiment, the secure PLD client 510 or the external system 130 of the downstream client 550 may be configured to authenticate the locked PLD list provided by the secure PLD manufacturer 520 or the secure PLD client 510 in block 740, query the secure PLD 410 for its tracking ID and / or device public key, and compare with the tracking ID and device public key in the locked PLD list, and challenge the secure PLD 410 using the device public key, such as by encrypting a random number using the device public key, providing the resulting encrypted packet to the secure PLD 410 in a device key challenge, and comparing the returned result with the original random number (e.g., a matching result indicates a successful audit of the operational secure PLD 410). In some embodiments, such an audit may occur before erasing the IPI configuration in block 770. A successful audit indicates that the security PLD 410 is functionally locked.

[0089] Thus, by employing the systems and methods described herein, embodiments of the present disclosure are able to provide flexible and secure key provisioning and configuration of secure PLDs across client orders of secure PLDs. A protected configuration of one client cannot be used to program another client's personalized secure PLD or a blank secure PLD. The protected configuration can be programmed within the system or using an external device. Application keys can only be decrypted within the secure PLD. Clients can use key manifests to prevent device and / or application spoofing or overbuilding. In various embodiments, programming keys and manifests are managed by the security engine 420 of the secure PLD 410.

[0090] Where applicable, hardware, software, or a combination of hardware and software may be used to implement the various embodiments provided by the present disclosure. In addition, where applicable, the various hardware components and / or software components set forth herein may be combined into composite components comprising software, hardware, and / or both, without departing from the spirit of the present disclosure. Where applicable, the various hardware components and / or software components set forth herein may be separated into subcomponents comprising software, hardware, or both, without departing from the spirit of the present disclosure. In addition, where applicable, it is conceivable that software components may be implemented as hardware components, and vice versa.

[0091] Software according to the present disclosure, such as non-transitory instructions, program code and / or data, can be stored on one or more non-transitory machine-readable media. It is also contemplated that the software identified herein can be implemented using one or more general-purpose or special-purpose computers and / or computer systems, which are networked and / or otherwise. Where applicable, the order of the various steps described herein can be changed, combined into composite steps, and / or separated into sub-steps to provide the features described herein.

[0092] The above embodiments illustrate but do not limit the present invention. It should also be understood that many modifications and variations are possible based on the principles of the present invention. Therefore, the scope of the present invention is limited only by the following claims.

Claims

1. A secure programmable logic device (PLD) supply system, comprising: an external system comprising a processor and a memory and configured to be coupled to the security PLD via a configuration input / output I / O of the security PLD, wherein the memory comprises machine-readable instructions which, when executed by the processor of the external system, are adapted to cause the external system to perform a computer-implemented method comprising: generating a locking PLD including the secure PLD based at least in part on a request from a secure PLD client, wherein the request from the secure PLD client includes a client public key; and Providing a secure unlocking package for a locked secure PLD; and Wherein generating the locking PLD comprises: providing the client public key in the request from the secure PLD client to a hardened security module HSM coupled to the external system, wherein the HSM is configured to generate a client programming key token, a programming public / private key pair, and a programming secret in response to receiving the client public key; receiving the programming private key, the programming secret, and an encrypted programming packet from the HSM, wherein the encrypted programming packet comprises the programming secret encrypted using the client public key and signed using the programming private key, and wherein the secure unlocking package comprises the encrypted programming packet; and The secure PLD is provided with the programming private key and the programming secret.

2. The system of claim 1 , wherein generating the locked PLD comprises: The client programming key token corresponding to the request by or from the secure PLD client is generated by providing the client public key in the request to the HSM coupled to the external system and receiving a client programming key token generated by the HSM.

3. The system of claim 1 , wherein providing the locked secure PLD with the secure unlocking package comprises: providing to the secure PLD client an encrypted programming packet generated by the HSM coupled to the external system, wherein the encrypted programming packet includes a programming secret generated by the HSM, the programming secret encrypted by the HSM using the client public key and signed by the HSM using a programming private key generated by the HSM; as well as The secure PLD client is provided with a programming public key generated by the HSM.

4. The system of claim 1, wherein the computer-implemented method further comprises: A certifiable locked PLD manifest is provided, the certifiable locked PLD manifest including a tracking ID and a corresponding device public key associated with the locked secure PLD, wherein the certifiable locked PLD manifest is signed using a programming private key generated by the HSM coupled to the external system.

5. The system of claim 1 , wherein generating the locked PLD comprises: providing a client programming key token to the HSM coupled to the external system; receiving a programming private key and a programming secret from the HSM and receiving a device public key from the secure PLD; Providing an initial programming image IPI configuration to the secure PLD; as well as A PLD structure of the secure PLD is programmed according to the IPI configuration.

6. The system according to claim 1, wherein: The computer-implemented method further comprises: generating or receiving a protected configuration of the locked secure PLD; and programming the locked secure PLD according to the protected configuration; The protected configuration includes an application configuration and a feature configuration, and a programming key digest, each of which is signed by an application private key associated with the secure PLD client and encrypted by an application encryption key associated with the secure PLD client, and the programming key digest includes an encrypted and signed combination of an application public key, the application encryption key and a programming secret, and the programming secret is generated by the HSM coupled to the external system.

7. The system of claim 1, further comprising: The secure PLD, wherein the secure PLD comprises: a plurality of programmable logic blocks (PLBs) arranged in a PLD structure of the secure PLD; a configuration engine configured to program the PLD structure according to a configuration image stored in a non-volatile memory (NVM) of the secure PLD and / or coupled to the configuration engine through the configuration input / output (I / O); and a security engine configured to provide a plurality of security functions for the PLD structure and / or the configuration engine, wherein the secure PLD is configured to execute a method implemented by the secure PLD, the method implemented by the secure PLD comprising: booting according to an initial programming image IPI configuration stored in the NVM and programmed into the PLD structure; receiving a protected configuration via the configuration I / O, wherein the protected configuration includes an application configuration and a feature configuration, and a programming key digest, each application configuration and feature configuration being signed by an application private key associated with a secure PLD client of the secure PLD and encrypted by an application encryption key associated with the secure PLD client, the programming key digest comprising an encrypted and signed combination of an application public key, the application encryption key, and a programming secret generated by the HSM coupled to the external system; decrypting and authenticating the programming key digest using a programming private key stored in the NVM and a decrypted application public key; verifying that the programming secret from the programming key digest matches a programming secret stored in the NVM; decrypting and authenticating the application configuration and the feature configuration using the application encryption key and the application public key from the key digest; erasing the IPI configuration from the PLD structure; and The PLD structure is programmed according to the decrypted and authenticated application configuration, and one or more portions of the NVM are programmed according to the decrypted and authenticated feature configuration.

8. A secure programmable logic device (PLD) supply system, comprising: A security PLD, wherein the security PLD comprises: a plurality of programmable logic blocks (PLBs) arranged in a PLD structure of the security PLD; a configuration engine configured to program the PLD structure according to a configuration image stored in a non-volatile memory (NVM) of the security PLD and / or coupled to the configuration engine through a configuration input / output (I / O) of the security PLD; and a security engine configured to provide a plurality of security functions for the PLD structure and / or the configuration engine, wherein the security PLD is configured to perform a computer-implemented method, the computer-implemented method comprising: booting according to an initial programming image IPI configuration stored in the NVM and programmed into the PLD structure; receiving a protected configuration via the configuration I / O, wherein the protected configuration includes an application configuration and a feature configuration, and a programming key digest, each of the application configuration and the feature configuration being signed by an application private key associated with a secure PLD client of the secure PLD and encrypted by an application encryption key associated with the secure PLD client, the programming key digest comprising an encrypted and signed combination of an application public key, the application encryption key, and a programming secret, the programming secret being generated by a hardened security module HSM; decrypting and authenticating the programming key digest using a programming private key stored in the NVM and a decrypted application public key; decrypting and authenticating the application configuration and the feature configuration using the application encryption key and the application public key from the key digest; and The PLD structure is programmed according to the decrypted and authenticated application configuration, and one or more portions of the NVM are programmed according to the decrypted and authenticated feature configuration.

9. The system according to claim 8, further comprising: an external system comprising a processor and a memory, and the external system is configured to be coupled to the secure PLD via the configuration input / output I / O, wherein the memory comprises machine-readable instructions, which when executed by the processor of the external system are suitable for causing the external system to perform a computer-implemented method, the computer-implemented method comprising: authenticating a list of authentically locked PLDs identifying the secure PLD and corresponding device public keys using a programming public key associated with the secure PLD; querying the secure PLD for the device public key and comparing the query response to a corresponding device public key in a list of authenticated locked PLDs; and The secure PLD is challenged by providing the secure PLD with a random number encrypted according to the device public key, and a returned challenge response is compared with the random number.

10. A method for provisioning a secure programmable logic device (PLD), comprising: generating a locking PLD including a secure PLD based at least in part on a request from a secure PLD client, wherein the request from the secure PLD client includes a client public key, and wherein the secure PLD includes a configuration input / output I / O configured to couple to an external system and / or a machine-readable memory; Provides a secure unlocking package for locked secure PLDs and Wherein generating the locking PLD comprises: providing the client public key in the request from the secure PLD client to a hardened security module HSM coupled to the external system, wherein the HSM is configured to generate a client programming key token, a programming public / private key pair, and a programming secret in response to receiving the client public key; receiving the programming private key, the programming secret, and an encrypted programming packet from the HSM, wherein the encrypted programming packet comprises the programming secret encrypted using the client public key and signed using the programming private key, and wherein the secure unlocking package comprises the encrypted programming packet; and The secure PLD is provided with the programming private key and the programming secret.

11. The method of claim 10, wherein generating the locked PLD comprises: The client programming key token corresponding to the request by or from the secure PLD client is generated by providing the client public key in the request to the HSM coupled to the external system and receiving a client programming key token generated by the HSM.

12. The method of claim 10, wherein generating the locked PLD comprises: receiving, by the HSM coupled to the external system, the client public key in the request from the secure PLD client, wherein the HSM is configured to generate a programming public / private key pair and a programming secret in response to receiving the client public key; as well as An encrypted programming packet is generated by the HSM, wherein the encrypted programming packet includes the programming secret encrypted using the client public key and signed using the programming private key.

13. The method of claim 12, wherein the HSM is configured to generate a client programming key token in response to receiving the client public key, and wherein generating the locking PLD comprises: receiving a device public key generated by the secure PLD; as well as The device public key, the programming public / private key pair, and the programming secret from the secure PLD are stored in a database referenced by the client programming key token.

14. The method of claim 12, wherein the secure PLD is configured to generate a device public key / private key pair in response to receiving a tracking ID from the external system, and wherein generating the locking PLD comprises: The device public key / private key pair is stored in non-volatile memory NVM of the secure PLD.

15. The method of claim 10, wherein providing the locked secure PLD with the secure unlocking packet comprises: providing to the secure PLD client an encrypted programming packet generated by the HSM coupled to the external system, wherein the encrypted programming packet includes a programming secret generated by the HSM, the programming secret encrypted by the HSM using the client public key and signed by the HSM using a programming private key generated by the HSM; as well as The secure PLD client is provided with a programming public key generated by the HSM.

16. The method according to claim 10, further comprising: A certifiable locked PLD manifest is provided, the certifiable locked PLD manifest including a tracking ID and a corresponding device public key associated with the locked secure PLD, wherein the certifiable locked PLD manifest is signed using a programming private key generated by the HSM coupled to the external system.

17. The method of claim 10, wherein generating the locked PLD comprises: providing a client programming key token to the HSM coupled to the external system; receiving a programming private key and a programming secret from the HSM and receiving a device public key from the secure PLD; Providing an initial programming image IPI configuration to the secure PLD; as well as A PLD structure of the secure PLD is programmed according to the IPI configuration.

18. The method according to claim 10, further comprising: generating or receiving a protected configuration of the locked secure PLD; as well as programming the locked secure PLD according to the protected configuration; The protected configuration includes an application configuration and a feature configuration, and a programming key digest, each of which is signed by an application private key associated with the secure PLD client and encrypted by an application encryption key associated with the secure PLD client, and the programming key digest includes an encrypted and signed combination of an application public key, an application encryption key and a programming secret, and the programming secret is generated by the HSM coupled to the external system.

19. The method according to claim 10, further comprising: receiving, by the secure PLD through the configuration I / O, a protected configuration, wherein the protected configuration includes an application configuration and a feature configuration, and a programming key digest, each of the application configuration and the feature configuration being encrypted by an application encryption key associated with the secure PLD client, the programming key digest comprising an encrypted and signed combination of an application public key, the application encryption key, and a programming secret; decrypting and authenticating the programming key digest using a programming private key stored in a non-volatile memory NVM of the PLD and a decrypted application public key; decrypting and authenticating the application configuration and the feature configuration using the application encryption key and the application public key from the key digest; as well as A PLD structure of the secure PLD is programmed according to the decrypted and authenticated application configuration, and one or more portions of the NVM are programmed according to the decrypted and authenticated feature configuration.

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