Electromagnetic stirring variable frequency power supply fault shutdown protection method and device

Abstract

The present invention provides a method and device for fault shutdown protection of an electromagnetic stirring variable frequency power supply. The electromagnetic stirring variable frequency power supply comprises an AC contactor, a three-phase bridge rectifier, and a three-phase full-bridge inverter connected in sequence. Each bridge arm of the three-phase full-bridge inverter is provided with two first and second IGBTs connected in series in the same direction and located in the upper and lower bridge arms, respectively. The first and second IGBTs of the i-th bridge arm are interconnected to form the inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, where i = 1, 2, or 3. The fault shutdown protection method comprises: if the electromagnetic stirring variable frequency power supply suffers any of a short circuit fault, an overcurrent fault, or an overvoltage fault, providing a first electrical level to the control terminal of each first IGBT and providing a second electrical level to the control terminal of each second IGBT, wherein the first electrical level and the second electrical level are respectively a high level and a low level, or respectively a low level and a high level.

Description

Technical Field

[0001] The present invention relates to a method for protecting a variable frequency power supply from abnormal shutdown in the event of a fault, and in particular to a method and device for protecting a variable frequency power supply dedicated for electromagnetic stirring with heavy inductive loads such as an electromagnetic stirrer from emergency shutdown such as short circuit, overcurrent, overvoltage, etc. Background Art

[0002] The variable frequency power supply for electromagnetic stirring belongs to the field of frequency converter. The main circuit topology is as follows Figure 1 As shown in the figure, the topology is the same as the main circuit topology of the general voltage-type inverter, both of which adopt the AC-DC-AC main circuit topology (uncontrolled rectification of diodes is adopted at the front end, and three full-bridge-arm IGBTs are used for inverter at the back end).

[0003] For the failure of electromagnetic stirring variable frequency power supply:

[0004] (1) Short circuit fault means that the IGBT digital driver or driver core detects the voltage V between the collector and emitter of the IGBT. CE Exceeding a certain threshold;

[0005] (2) Overcurrent fault refers to the electromagnetic stirrer load being short-circuited between phases or short-circuited to ground;

[0006] (3) Overvoltage fault refers to the voltage across the capacitor in the energy storage capacitor unit of the electromagnetic stirring variable frequency power supply exceeding the preset voltage threshold.

[0007] The electromagnetic stirrer load requires a two-phase or three-phase low-frequency (1-16Hz) AC current of several hundred amperes or even thousands of amperes to power it. Because the electromagnetic stirrer needs to flow such a large current, it generates huge heat in the electromagnetic stirrer coil. Therefore, the coil cooling in the electromagnetic stirrer generally adopts water circulation cooling. Although the stirrer coil requires pure water cooling, it is often difficult to meet the requirements of highly pure water on site. The water impurities and heavy metal content in the water are still relatively high, which often causes emergency failures such as overcurrent in the electromagnetic stirrer power supply. Moreover, the electromagnetic stirrer is a heavy inductive load. Although it is cooled by low The electromagnetic stirring frequency conversion power supply works with a high-frequency AC power supply, but the power factor is still not high, only about 30%. The electromagnetic stirring frequency conversion power supply does not go through the soft shutdown process when it is shut down due to an emergency fault. After the emergency shutdown, the electromagnetic stirrer will feed back the energy in the inductance of the coil to the electrolytic capacitor. When feeding back energy, in order to prevent the electrolytic capacitor from overvoltage and breakdown and damaging the IGBT power device and electrolytic capacitor, the main circuit adds an energy consumption loop. When the voltage of the DC bus energy storage electrolytic capacitor reaches a certain value, IGBT7 is turned on, and the energy of the electrolytic capacitor forms a loop through the resistor R3 and IGBT7. The main circuit of the traditional electromagnetic stirring frequency conversion power supply is as follows Figure 1 shown.

[0008] As an inductive load, when the electromagnetic stirrer frequency conversion power supply has an emergency fault, the frequency conversion power supply stops outputting immediately, and there is no soft shutdown process like normal shutdown. At the same time, the energy stored in the coil of the electromagnetic stirrer needs a discharge circuit to release the energy in the coil. The traditional method is to block all IGBTs in the upper and lower bridge arms of the inverter part. In this way, the energy in the coil can only be discharged from the anti-parallel diode of the IGBT to charge the electrolytic capacitor. When the voltage value in the electrolytic capacitor reaches the set overvoltage threshold, the discharge IGBT7 is turned on to allow the energy in the electrolytic capacitor to be consumed in the resistor R3. The heating of the resistor causes huge heat release. Long-term and frequent heat release can easily cause the temperature in the frequency conversion power supply cabinet to rise, seriously reducing the normal life of the main electronic components in the frequency conversion power supply cabinet, and because of the increase The addition of discharge IGBT and discharge resistor will also increase the volume of the variable frequency power supply, making the structural design more difficult. In addition, a heat dissipation system needs to be added for the discharge resistor, which increases the complexity of the heat dissipation system of the variable frequency power supply. Another method that does not require the use of additional discharge resistor R3 and discharge IGBT7 is to use PWM rectification. When the electrolytic capacitor reaches the overvoltage threshold, the front-end PWM rectification part is operated in the active inverter state to feed the energy in the electrolytic capacitor back to the grid. Although this method does not require discharge resistors and discharge IGBTs, there is no heat release and increases the difficulty of structural design. However, it is necessary to add line inductors L_a, L_b, and L_c at the incoming line end of the main power supply and replace the uncontrolled rectification diode with a PWM rectification IGBT, which greatly increases the hardware cost and complexity of the system. Figure 2 shown.

[0009] When the electromagnetic stirring frequency conversion power supply shuts down due to an emergency fault, if all the IGBTs in the inverter part are blocked and turned off, the energy stored in the electromagnetic stirrer will be fed back to the frequency conversion power supply from the freewheeling diodes of the IGBTs in the inverter part. At this time, the electromagnetic stirrer is no longer a load of the frequency conversion power supply, but will become a three-phase power supply for the electromagnetic stirring frequency conversion, and will be rectified uncontrolled through the freewheeling diodes of the IGBTs. Assuming that at the moment of shutdown due to an emergency fault, the phase difference between the U and V phases of the electromagnetic stirrer is the largest, and the U phase voltage U_u is greater than the V phase voltage U_v, then the main circuit of the rectifier circuit is Figure 3 The circuit shown,

[0010] U U'- V' = R_u*i_u' + V F1 + V DC-Link +V F4 + R_v*i_v' (Formula 1)

[0011] R_u is the equivalent resistance of the U-phase coil, i_u' is the current of the U-phase coil, R_v is the equivalent resistance of the V-phase coil, i_v' is the current of the V-phase coil, V F1is the freewheeling diode voltage drop of IGBT1, V F4 is the freewheeling diode voltage drop of IGBT4, V DC-Link is the voltage value on the DC bus electrolytic capacitor. From the above formula, it can be seen that the two-phase voltage U of the electromagnetic stirrer UV is U'- V' Greater than the DC bus voltage, especially at the moment of emergency shutdown, i_u' and i_v' currents are the largest, so at this time U U'- V' The voltage difference is the largest. A large voltage difference between UV will exceed the rated withstand voltage of the stirrer, which will damage the inter-turn withstand voltage between turns in the stirrer coil and the insulation of the coil to the casing, causing a short circuit in the electromagnetic stirrer. Summary of the Invention

[0012] The problem to be solved by the present invention is to provide a method and device for protecting an electromagnetic stirring frequency conversion power supply from failure, in order to solve the problem that shutting down all IGBTs when a fault occurs in an existing electromagnetic stirring frequency conversion power supply may damage the electromagnetic stirrer.

[0013] To solve the above technical problems, the technical solution adopted by the present invention is: a fault shutdown protection method for an electromagnetic stirring variable frequency power supply, wherein the electromagnetic stirring variable frequency power supply includes an AC contactor, a three-phase full-bridge rectifier, and a three-phase full-bridge inverter connected in sequence, each bridge arm of the three-phase full-bridge inverter is provided with two first IGBTs and second IGBTs connected in series in the same direction and located in the upper bridge arm and the lower bridge arm, respectively, the first IGBT and the second IGBT of the i-th bridge arm are interconnected to form the inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, i=1,2,3;

[0014] It is characterized in that the fault shutdown protection method includes: if any one of the short circuit fault, overcurrent fault and overvoltage fault occurs in the electromagnetic stirring frequency conversion power supply, a first level is provided to the control end of each first IGBT, and a second level is provided to the control end of each second IGBT, and the first level and the second level are respectively a high level and a low level or respectively a low level and a high level.

[0015] In the present invention, when any one of a short circuit fault, an overcurrent fault, and an overvoltage fault occurs, only the upper bridge arm is turned off (all first IGBTs are turned off and all second IGBTs are turned on) or only the lower bridge arm is turned off (all first IGBTs are turned on and all second IGBTs are turned off), thereby significantly reducing overvoltage between the three phases U, V, and W in the electromagnetic stirrer, especially in emergency faults, and avoiding overvoltage between the turns of the electromagnetic stirrer coil.

[0016] In the above technical solution, the operation of providing the first level to the control terminal of each first IGBT and the operation of providing the second level to the control terminal of each second IGBT is performed earlier than the operation of disconnecting the AC contactor.

[0017] In the present invention, by delaying the operation of disconnecting the AC contactor, the incoming AC contactor can be disconnected under light load in the event of an emergency fault, eliminating the possibility of the contacts of the AC contactor sticking, and greatly increasing the service life of the AC contactor.

[0018] In the above technical solution, the fault shutdown protection method further includes: disconnecting the AC contactor before the shutdown time of the water circulation cooling system used for the electromagnetic stirrer. Because the electromagnetic stirrer has its own water circulation cooling system, the existing electromagnetic stirrer water circulation system can be used to dissipate energy in the electromagnetic stirrer (especially the coil). Only the water circulation cooling system needs to be controlled to shut down later, thereby greatly improving the adaptability of the electromagnetic stirrer power supply to the environment.

[0019] The present invention also provides an electromagnetic stirring variable frequency power supply fault shutdown protection device, the electromagnetic stirring variable frequency power supply comprising an AC contactor, a three-phase bridge rectifier, and a three-phase full-bridge inverter connected in sequence, each bridge arm of the three-phase full-bridge inverter being provided with two first IGBTs and second IGBTs connected in series in the same direction and located in the upper bridge arm and the lower bridge arm, respectively, the first IGBT and the second IGBT of the i-th bridge arm being interconnected to form the inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, where i=1, 2, 3, and the electromagnetic stirring variable frequency power supply further comprising a controller having three pulse width modulation signal output terminals;

[0020] It is characterized in that the fault shutdown protection device includes a first logic gate circuit, three second logic gate circuits, and three inverters Uc1, Uc2, ..., Uc3;

[0021] The output end of the short-circuit fault detection circuit and / or the output end of the overcurrent fault detection circuit and / or the output end of the overvoltage fault detection circuit of the electromagnetic stirring variable frequency power supply are respectively electrically connected to the input end of the first logic gate circuit, the output end of the first logic gate circuit and the ith pulse width modulation signal output end of the controller are respectively electrically connected to the two input ends of the ith second logic gate circuit, the output end of the ith second logic gate circuit is electrically connected to the first IGBT control end of the ith bridge arm or the second IGBT control end of the ith bridge arm, the output end of the ith second logic gate circuit is electrically connected to the second IGBT control end of the ith bridge arm or the first IGBT control end of the ith bridge arm through the ith inverter Uc i Electrical connection;

[0022] The structure of the first logic gate circuit is such that: when no short circuit fault, overcurrent fault, or overvoltage fault occurs, the first logic gate circuit outputs a first level; otherwise, the first logic gate circuit outputs a second level;

[0023] The structure of the second logic gate circuit is such that: when no short circuit fault, overcurrent fault, or overvoltage fault occurs, the output level state of the i-th second logic gate circuit is the same as the level state of the i-th pulse width modulation signal of the controller; otherwise, each second logic gate circuit outputs a second level, and the first level and the second level are respectively a high level and a low level or respectively a low level and a high level.

[0024] In the present invention, when any one of a short circuit fault, an overcurrent fault, and an overvoltage fault occurs, the first logic gate circuit outputs a second level, and the second level is output through the i-th second logic gate circuit. Since the output end of the i-th second logic gate circuit is electrically connected to the first IGBT control end or the second IGBT control end of the i-th bridge arm, and the output end of the i-th second logic gate circuit is electrically connected to the second IGBT control end or the first IGBT control end of the i-th bridge arm through the i-th inverter Uc i The first IGBT control terminal and the second IGBT control terminal are electrically connected, so that opposite voltage levels can be provided to the first IGBT control terminal, thereby turning off only the upper bridge arm (all first IGBTs are turned off, all second IGBTs are turned on) or only the lower bridge arm (all first IGBTs are turned on, all second IGBTs are turned off), thereby significantly reducing the overvoltage between the three phases U, V, and W in the electromagnetic stirrer, especially in emergency failures, and avoiding overvoltage between the turns of the electromagnetic stirrer coil.

[0025] Furthermore, the fault shutdown protection device also includes a third logic gate circuit, the output end of the first logic gate circuit and an IO interface end of the controller are respectively electrically connected to the two input ends of the third logic gate circuit, the output end of the third logic gate circuit is electrically connected to the control end of the AC contactor, and the structure of the third logic gate circuit is such that: if the first logic gate circuit outputs the first level, the coil of the AC contactor is in an energized state, otherwise it is in a de-energized state.

[0026] In the present invention, by providing a third logic gate circuit, when no short-circuit fault, overcurrent fault, or overvoltage fault occurs, the coil of the AC contactor is energized and the corresponding three-phase switches of the AC contactor are all closed. When any one of the faults occurs, the coil of the AC contactor is de-energized and the corresponding three-phase switches of the AC contactor are all disconnected. Since the AC contactor is a mechanical switch, and the first logic gate circuit and the second logic gate circuit on the path used for each IGBT control are both electronic circuits, and the IGBT is an electronic switch, the present invention utilizes different turn-off or disconnection delay times for the electronic switch and the mechanical switch to achieve the goal of disconnecting the incoming main contactor (AC contactor) under light load in the event of an emergency fault, eliminating the possibility of the main contactor contacts disconnecting under heavy load and causing arcing and sticking, which can greatly increase the service life of the main contactor.

[0027] Furthermore, the fault shutdown protection device also includes a relay, the two ends of the coil of the relay are respectively electrically connected to the output end of the third logic gate circuit and the ground, a pair of normally open contacts of the relay are respectively electrically connected to one end of the AC contactor coil and the positive end of the AC contactor power supply, and the other end of the AC contactor coil is electrically connected to the negative end of the AC contactor power supply.

[0028] In the present invention, since the third logic gate circuit is generally powered by low voltage DC and the AC contactor is generally powered by AC, the output level of the third logic gate circuit is used to control the on / off of the AC contactor through the relay coil.

[0029] Furthermore, the first logic gate circuit, the i-th second logic gate circuit, and the third logic gate circuit are logic AND gate Un1, logic AND gate Ua, respectively. i , logic AND gate Un2; or

[0030] The first logic gate circuit and the i-th second logic gate circuit are respectively a logic NAND gate Un3 and a logic OR gate Ub i The third logic gate circuit includes a logic AND gate Un4 and an inverter Un5. The output end of the logic NAND gate Un3 is electrically connected to an input end of the logic AND gate Un4 through the inverter Un5. An IO interface end of the controller is electrically connected to the other input end of the logic AND gate Un4. The output end of the logic AND gate Un4 is the output end of the third logic gate circuit.

[0031] Furthermore, the structures of the short-circuit fault detection circuit, the overcurrent fault detection circuit, and the overvoltage fault detection circuit are such that:

[0032] When a short circuit fault occurs, the level output by the short circuit fault detection circuit, the level output by the overcurrent fault detection circuit when an overcurrent fault occurs, and the level output by the overvoltage fault detection circuit when an overvoltage fault occurs are all the first level or the second level; when no short circuit fault occurs, the level output by the short circuit fault detection circuit, the level output by the overcurrent fault detection circuit when no overcurrent fault occurs, and the level output by the overvoltage fault detection circuit when no overvoltage fault occurs are all the second level or the first level.

[0033] Furthermore, the overcurrent fault detection circuit includes three overcurrent fault detection units, the i-th overcurrent fault detection unit includes a current measuring device U101-i, a current / voltage conversion unit U102-i, a voltage absolute value unit U103-i, an analog switch U105-i, and an integration circuit U106-i for measuring the output current of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, the current measuring device U101-i, the current / voltage conversion unit U102-i, and the voltage absolute value unit U103-i are electrically connected in sequence, the two connection ends of the analog switch U105-i are respectively electrically connected to the output end of the voltage absolute value unit U103-i and the input end of the integration circuit U106-i, and the output end of the integration circuit U106-i is connected to the inverter U107-i;

[0034] Each overcurrent fault detection unit further includes a first voltage comparison unit, the output end of the current / voltage conversion unit U102-i or the output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit, the output end of the first voltage comparison unit of the i-th overcurrent fault detection unit is electrically connected to the selection end of the analog switch U105-i, and the structure of the first voltage comparison unit of the i-th overcurrent fault detection unit is such that: when the output value of the current / voltage conversion unit U102-i is not less than the preset negative threshold voltage V- and not greater than the preset positive threshold voltage V+, the first voltage comparison unit of the i-th overcurrent fault detection unit outputs a low level; otherwise, the first voltage comparison unit of the i-th overcurrent fault detection unit outputs a high level, and the absolute values ​​of V+ and V- are equal;

[0035] The output end of the inverter U107 - i is electrically connected to the i-th input end of the AND gate circuit U108 , and the output end of the AND gate circuit U108 is the output end of the overcurrent fault detection circuit; i=1, 2, 3.

[0036] In the present invention, if the current detected by the current measuring device U101-i of a particular overcurrent fault detection unit continuously exceeds a set threshold value for a certain period of time, the first voltage comparison unit outputs a high level, causing the analog switch U105-i to remain closed for a certain period of time, thereby causing the integration circuit U106-i to continue integrating. When the integration circuit output exceeds the threshold, the inverter U107-i flips, allowing the presence of a short circuit fault to be determined based on the level collected by the level acquisition unit. If the current detected by the current measuring device U101-i is only an abnormal value that lasts for a very short period of time, the analog switch U105-i is closed for only a short period of time and then opened again. The integration circuit output cannot accumulate to a level that causes the inverter U107-i to flip, resulting in no change in the output of the inverter U107-i, thus avoiding misjudgment. The short-circuit fault detection circuit of the present invention is implemented using an analog circuit. There is no need to send the collected current data to a microprocessor for real-time comparison and judgment, and there is no need to increase the task burden of the microprocessor. Moreover, due to the use of an integral circuit, occasional external interference will not cause incorrect judgment due to the output of the voltage comparator.

[0037] Further, the output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit, and the first voltage comparison unit of the i-th overcurrent fault detection unit includes a voltage comparator U1041-i, and the non-inverting input end and the inverting input end of the voltage comparator U1041-i are electrically connected to the output end of the voltage absolute value unit U103-i and the first reference voltage end Vref1, respectively, and the voltage value of the first reference voltage end Vref1 is equal to V+; or

[0038] The output end of the current / voltage conversion unit U102-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit. The first voltage comparison unit of the i-th overcurrent fault detection unit includes a voltage comparator U1041-i, a voltage comparator U1042-i, and a logic OR gate U1043-i. The non-inverting input end of the voltage comparator U1041-i, the inverting input end of the voltage comparator U1042-i, the output end of the current / voltage conversion unit U102-i, and the input end of the voltage absolute value unit U103-i are electrically connected to each other. The inverting input end of the voltage comparator U1041-i The phase input terminal and the non-phase input terminal of the voltage comparator U1042-i are electrically connected to the first reference voltage terminal Vref1 and the second reference voltage terminal Vref2 respectively. The voltage value of the first reference voltage terminal Vref1 and the voltage value of the second reference voltage terminal Vref2 are equal to V+ and V- respectively. The output terminal of the voltage comparator U1041-i and the output terminal of the voltage comparator U1042-i are connected to the two input terminals of the logic OR gate U1043-i respectively. The output terminal of the logic OR gate U1043-i is the output terminal of the first voltage comparison unit of the i-th overcurrent fault detection unit.

[0039] Furthermore, the electromagnetic stirring variable frequency power supply includes an electrolytic capacitor module connected between the two ends of the bridge arm;

[0040] The overvoltage fault detection circuit includes a voltage sensor U1091 and a voltage comparator U1092. The positive input terminal and the negative input terminal of the voltage sensor U1091 are electrically connected to the two ends of the electrolytic capacitor module respectively. The inverting input terminal and the non-inverting input terminal of the comparator U1092 are electrically connected to the output terminal of the voltage sensor U1091 and the third reference voltage terminal Vref3 respectively. The output terminal of the voltage comparator U1092 is the output terminal of the overvoltage fault detection circuit.

[0041] Since the electrolytic capacitor is located in the strong current part, that is, the overvoltage fault detection circuit is mainly located in the strong current part, and the first logic gate circuit starts from the weak current part, the voltage sensor can achieve input and output isolation, thereby preventing the noise of the strong current signal from interfering with the subsequent weak current part.

[0042] Furthermore, the IGBTs of the three-phase full-bridge inverter are defined as IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6;

[0043] The short-circuit fault detection circuit includes 6 short-circuit fault detection units, 6 first isolation transmission units, and an AND gate circuit U112, wherein the input and output ends of the first isolation transmission units are not grounded.

[0044] The jth short-circuit fault detection unit includes a comparator U1101 j, current source U1102 j , reference voltage source U1103 j 、Capacitor C1101 j , diode D1101 j ;

[0045] The comparator U1101 j Inverting input terminal, capacitor C1101 j One end, current source U1102 j Anode, diode D1101 j The positive electrodes are electrically connected to each other, diode D1101 j Negative electrode and IGBT j The collector of the current source U1102 is electrically connected to j Negative electrode and IGBT j The supply voltage terminal VCC j Electrical connection;

[0046] The comparator U1101 j The non-inverting input terminal and the reference voltage source U1103 j Positive electrical connection;

[0047] The reference voltage source U1103 j Negative electrode, capacitor C1101 j The other end is connected to the IGBT j The emitter is electrically connected;

[0048] The comparator U1101 j The output end is the output end of the j-th short-circuit fault detection unit;

[0049] The output end of the j-th short-circuit fault detection unit is connected to the j-th first isolation transmission unit U1104. j Connected to the j-th input terminal of the AND gate circuit U112, the output terminal of the AND gate circuit U112 is the output terminal of the short-circuit fault detection circuit; j=1, 2, ..., 6.

[0050] By testing IGBT j VCE j Voltage to detect IGBT j Is it short-circuited? j When not short-circuited, the collector voltage does not exceed the threshold VCC j , at this time diode D1101 j is turned on, at this time capacitor C1101 j Only charged to the saturation conduction voltage drop of the IGBT and the diode D1101 j The sum of the forward conduction voltage drop, the saturation conduction voltage drop of the IGBT, and the diode D1101 jThe sum of the forward conduction voltage drops is less than the reference voltage source U1103 j The positive voltage, that is, the comparator U1101 j The voltage at the non-inverting input terminal is greater than the voltage at the inverting input terminal, and the output terminal outputs a high level. j When short-circuited, the collector voltage exceeds the threshold VCC j , at this time diode D1101 j Cut-off, at this time the capacitor C1101 j is charged to a voltage greater than the reference voltage source U1103 j The voltage value of comparator U1101 j When the voltage at the non-inverting input is lower than the voltage at the inverting input, the comparator outputs a low level. Since the IGBTs are located in the high-voltage section, meaning the short-circuit fault detection circuit is primarily located in the high-voltage section, and the first logic gate circuit and its subsequent sections are located in the low-voltage section, the first isolation transmission unit is provided to prevent noise from the high-voltage signal from interfering with the subsequent low-voltage section.

[0051] The advantages and positive effects of the present invention are:

[0052] 1. Use the same fault signal at the same time to control the electronic switch and the mechanical switch. Use the different shutdown or disconnection delay times of the electronic switch and the mechanical switch to achieve the goal of disconnecting the incoming main contactor under light load in the event of an emergency fault. This prevents the possibility of electric arcing and sticking caused by disconnection of the main contactor under heavy load, which can greatly extend the service life of the main contactor.

[0053] 2. The solution proposed by the present invention can significantly reduce the overvoltage between the three phases U, V, and W in the electromagnetic stirrer, especially in the event of an emergency fault, avoid the overvoltage between the turns of the electromagnetic stirrer coil, and also prevent the overvoltage of the energy storage capacitor of the variable frequency power supply caused by the coil energy feedback of the electrolytic capacitor in the event of an emergency fault;

[0054] 3. The energy in the electromagnetic stirrer coil is consumed by the electromagnetic stirrer's own internal resistance R_u, R_v, and R_w. Since the electromagnetic stirrer itself is designed with a complete water circulation cooling system, the original electromagnetic stirrer water circulation system is used for heat dissipation. In terms of control, it is only necessary to control the water circulation cooling system to shut down later. The present invention greatly improves the adaptability of the electromagnetic stirring power supply to the environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0056] Figure 1 This is the main circuit diagram of the traditional electromagnetic stirring variable frequency power supply;

[0057] Figure 2 This is the main circuit topology diagram of the PWM rectified electromagnetic stirring variable frequency power supply in the prior art;

[0058] Figure 3 This is a schematic diagram of the main energy feedback circuit of the electromagnetic stirrer in the prior art, which blocks the six IGBTs in the inverter part in the event of an emergency fault;

[0059] FIG4 (a) is a feedback loop when all upper-arm IGBTs are turned off and all lower-arm IGBTs are turned on according to an embodiment of the present invention;

[0060] FIG4( b ) is a feedback loop when all upper-arm IGBTs are turned on and all lower-arm IGBTs are turned off according to an embodiment of the present invention;

[0061] Figure 5 This is a schematic diagram of the circuit connection structure of a first implementation of the first logic gate circuit, three second logic gate circuits, a third logic gate circuit, a relay, and an AC contactor in an embodiment of the present invention;

[0062] Figure 6 This is a schematic diagram of a circuit connection structure of a second implementation of the first logic gate circuit, three second logic gate circuits, a third logic gate circuit, a relay, and an AC contactor according to an embodiment of the present invention;

[0063] Figure 7 This is a schematic diagram of the circuit connection structure of the first implementation of three inverters and three IGBT control terminals in an embodiment of the present invention;

[0064] Figure 8 2 is a schematic diagram of a circuit connection structure of a second implementation mode of three inverters and three IGBT control terminals according to an embodiment of the present invention;

[0065] Figure 9 1 is a circuit structure diagram of a first implementation manner of the i-th overcurrent fault detection unit excluding the AND gate circuit U108 according to an embodiment of the present invention;

[0066] Figure 10 1 is a circuit structure diagram of a second implementation manner of the i-th overcurrent fault detection unit that does not include the AND gate circuit U108 according to an embodiment of the present invention;

[0067] Figure 11 1 is a schematic diagram of the circuit connection structure of the AND gate circuit U108;

[0068] Figure 12This is a waveform diagram of a variable frequency power supply according to an embodiment of the present invention that stops outputting for about 200ms and then the main contactor disconnects;

[0069] Figure 13 1 is a schematic diagram of the circuit structure of an overvoltage fault detection circuit according to an embodiment of the present invention;

[0070] Figure 14 1 is a schematic diagram of the circuit structure of a short-circuit fault detection circuit according to an embodiment of the present invention that does not include the AND gate circuit U112;

[0071] Figure 15 1 is a schematic diagram of the circuit structure of the AND gate circuit U112 in the short-circuit fault detection circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0072] The following will be combined with the drawings of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0073] The present invention provides a fault shutdown protection method for an electromagnetic stirring variable frequency power supply. The electromagnetic stirring variable frequency power supply includes an AC contactor 20, a three-phase full-bridge rectifier 30, and a three-phase full-bridge inverter 40 connected in sequence. The full-bridge inverter 40 has three full-bridge inverter bridge arms. Each bridge arm is provided with two first IGBTs and second IGBTs connected in series in the same direction and located in the upper bridge arm and the lower bridge arm, respectively. The position where the first IGBT and the second IGBT of the i-th bridge arm are connected to each other forms the inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, where i=1, 2, and 3.

[0074] The fault shutdown protection method includes: if any one of a short circuit fault, an overcurrent fault, and an overvoltage fault occurs in the electromagnetic stirring variable frequency power supply, a first level is provided to the control end of each first IGBT, and a second level is provided to the control end of each second IGBT, wherein the first level and the second level are respectively a high level and a low level or respectively a low level and a high level.

[0075] In the present invention, a voltage greater than 3.5V is defined as a high level, and a voltage less than 1.5V is defined as a low level.

[0076] The fault shutdown protection method further includes: providing a first level to the control terminal of each first IGBT and providing a second level to the control terminal of each second IGBT before performing the operation of disconnecting the AC contactor 20 .

[0077] In a preferred embodiment, the fault shutdown protection method further includes: disconnecting the AC contactor 20 earlier than the shutdown time of the water circulation cooling system used for electromagnetic stirring. Preferably, the water circulation cooling system is shut down 3 minutes to 10 minutes after disconnecting the AC contactor 20.

[0078] The present invention also provides an electromagnetic stirring variable frequency power supply fault shutdown protection device, the electromagnetic stirring variable frequency power supply comprising an AC contactor 20, a three-phase full-bridge rectifier 30, and a three-phase full-bridge inverter 40 connected in sequence, the three-phase full-bridge inverter 40 having three full-bridge inverter bridge arms, each bridge arm being provided with two first IGBTs and second IGBTs connected in series in the same direction and located in the upper bridge arm and the lower bridge arm, respectively, the first IGBT and the second IGBT of the i-th bridge arm being interconnected to form the inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, i=1,2,3, the electromagnetic stirring variable frequency power supply further comprising a controller 10 having three pulse width modulation signal output terminals;

[0079] It is characterized in that the fault shutdown protection device includes a first logic gate circuit, three second logic gate circuits, and three inverters Uc1, Uc2, ..., Uc3;

[0080] The output end of the short-circuit fault detection circuit 400 and / or the output end of the overcurrent fault detection circuit 500 and / or the output end of the overvoltage fault detection circuit 600 of the electromagnetic stirring variable frequency power supply are electrically connected to the input end of the first logic gate circuit respectively, the output end of the first logic gate circuit and the ith pulse width modulation signal output end of the controller 10 are electrically connected to the two input ends of the ith second logic gate circuit respectively, the output end of the ith second logic gate circuit is electrically connected to the first IGBT control end or the second IGBT control end of the ith bridge arm, the output end of the ith second logic gate circuit is electrically connected to the second IGBT control end or the first IGBT control end of the ith bridge arm through the ith inverter Uc i Electrical connection;

[0081] The structure of the first logic gate circuit is such that: when no short circuit fault, overcurrent fault, or overvoltage fault occurs, the first logic gate circuit outputs a first level; otherwise, the first logic gate circuit outputs a second level;

[0082] The structure of the second logic gate circuit is such that: when no short circuit fault, overcurrent fault, or overvoltage fault occurs, the output level of the i-th second logic gate circuit is the same as the i-th pulse width modulation signal level of the controller 10; otherwise, each second logic gate circuit outputs a second level, and the first level and the second level are respectively a high level and a low level or respectively a low level and a high level.

[0083] The fault shutdown protection device also includes a third logic gate circuit. The output of the first logic gate circuit and an IO interface of the controller are electrically connected to two corresponding inputs of the third logic gate circuit. The output of the third logic gate circuit is electrically connected to the control terminal of the AC contactor. The structure of the third logic gate circuit is such that: if the first logic gate circuit outputs a first electrical level (i.e., when no short-circuit fault, overcurrent fault, or overvoltage fault has occurred), the coil of the AC contactor 20 is energized; otherwise, the coil of the AC contactor 20 is de-energized. When the coil of the AC contactor 20 is energized, all three phase switches are in a closed state. When the coil of the AC contactor 20 is in a de-energized state, all three phase switches are in a closed state. When the coil of the AC contactor 20 is energized, all three phase switches are in a de-energized state.

[0084] The fault shutdown protection device also includes a relay 50. The two ends of the coil of the relay 50 are electrically connected to the output end of the third logic gate circuit and the ground, respectively. A pair of normally open contacts of the relay 50 are electrically connected to one end of the coil of the AC contactor 20 and the positive terminal of the power supply of the AC contactor 20, respectively. The other end of the coil of the AC contactor 20 is electrically connected to the negative terminal of the power supply of the AC contactor 20. The power supply of the AC contactor 20 can be electrically connected to 220V AC or 380V AC.

[0085] The first logic gate circuit, the i-th second logic gate circuit, and the third logic gate circuit are logic AND gate Un1, logic AND gate Ua respectively. i , logic AND gate Un2; or

[0086] The first logic gate circuit and the i-th second logic gate circuit are respectively a logic NAND gate Un3 and a logic OR gate Ub i The third logic gate circuit includes a logic AND gate Un4 and an inverter Un5. The output end of the logic NAND gate Un3 is electrically connected to an input end of the logic AND gate Un4 through the inverter Un5. An IO interface end of the controller 10 is electrically connected to the other input end of the logic AND gate Un4. The output end of the logic AND gate Un4 is the output end of the third logic gate circuit.

[0087] When the first logic gate circuit is a logic AND gate or a logic NAND gate, the input ends of the first logic gate circuit that are not connected to the output end of the short circuit fault detection circuit 400, the output end of the overcurrent fault detection circuit 500, and the output end of the overvoltage fault detection circuit 600 can all be electrically connected to a high level.

[0088] The structures of the short-circuit fault detection circuit 400, the overcurrent fault detection circuit 500, and the overvoltage fault detection circuit 600 are such that:

[0089] When a short circuit fault occurs, the level output by the short circuit fault detection circuit 400, the level output by the overcurrent fault detection circuit 500 when an overcurrent fault occurs, and the level output by the overvoltage fault detection circuit 600 when an overvoltage fault occurs are all the first level or the second level; when no short circuit fault occurs, the level output by the short circuit fault detection circuit 400, the level output by the overcurrent fault detection circuit 500 when no overcurrent fault occurs, and the level output by the overvoltage fault detection circuit 600 when no overvoltage fault occurs are all the second level or the first level.

[0090] The present invention relates to protective measures taken after a fault occurs in an electromagnetic stirring power supply. When an emergency fault occurs in the electromagnetic stirring dedicated variable frequency power supply, the pulse is blocked and all the upper bridge arm IGBTs are deliberately turned off and all the lower bridge arm IGBTs are turned on, or all the upper bridge arm IGBTs are turned on and all the lower bridge arm IGBTs are turned off; taking the case where all the lower arm IGBTs are turned on as an example, a circuit as shown in Figure 4 (a) is formed.

[0091] U U'- V' = R_u*i_u' + V ce_IGBT2 +V F4 + R_v*i_v' (Formula 2)

[0092] R_u is the equivalent resistance of the U-phase coil, i_u' is the current of the U-phase coil, R_v is the equivalent resistance of the V-phase coil, i_v' is the current of the V-phase coil, V ce_IGBT2 is the saturation conduction voltage drop of IGBT2, V F4 is the freewheeling diode voltage drop of IGBT4,

[0093] When all the upper-arm IGBTs are turned on and all the lower-arm IGBTs are turned off, the feedback loop is shown in Figure 4(b).

[0094] U U'- V' = R_u*i_u' +V F1 + V ce_IGBT3 + R_v*i_v' (Formula 3)

[0095] R_u is the equivalent resistance of the U-phase coil, i_u' is the current of the U-phase coil, R_v is the equivalent resistance of the V-phase coil, i_v' is the current of the V-phase coil, V F1 is the freewheeling diode voltage drop of IGBT1, V ce_IGBT3 is the saturation conduction voltage drop of IGBT3.

[0096] Comparing Formula 2 and Formula 3 with Formula 1 respectively, it can be seen that in the technical solution of the present invention, when only the upper bridge arm is turned off (all first IGBTs are turned off and all second IGBTs are turned on) or only the lower bridge arm is turned off (all first IGBTs are turned on and all second IGBTs are turned off), the voltage between the U and V phases does not include the voltage value across the DC bus electrolytic capacitor module 60 in the formula when all bridge arms are turned off. Therefore, the technical solution of the present invention significantly reduces the voltage between each of the three phases U, V, and W in the electromagnetic stirrer, especially during an emergency fault, and avoids overvoltage between the turns of the electromagnetic stirrer coil.

[0097] KM1 is an AC contactor, KM2 is a relay, and when the KM2 relay contacts are disconnected and the KM1 coil loses power, the three contacts of KM1 are disconnected, that is, the contacts of KM2 are used to control the power on and off of the coil of the KM1 AC contactor.

[0098] While blocking the pulse, the main contactor KM1 (AC contactor 20) at the front end of Figure 4 (a) and Figure 4 (b) is also disconnected, and disconnected from the main power supply to prevent secondary accidents. Because the logic gate circuit is used to block the IGBT drive pulse to turn off the IGBT, the IGBT drive shutdown delay and the stop of the electromagnetic stirring frequency conversion power supply output are generally only about 10 us, which is a very short time and very fast. However, the contactor KM1 is a mechanical contact switch, and the contact disconnection delay is generally about 200ms. Therefore, when the contactor is disconnected, the upper bridge arm IGBT or lower bridge arm IGBT drive pulse of the electromagnetic stirrer frequency conversion power supply has been completely blocked, and the electromagnetic stirrer frequency conversion power supply has stopped working. At this time, the contactor is disconnected under a very light load, which can greatly improve the service life of the contactor. The actual effect is as follows: Figure 12 shown.

[0099] from Figure 12 It can be seen that channel 1 is the average value of the absolute value of the current flowing through the contactor, and channel 2 is the inverter voltage waveform output of the variable frequency power supply. Figure 12 In the figure, it's clear that the average absolute value of the current is much higher when the VFD is outputting inverter voltage. When the VFD stops outputting after a pulse is blocked (the upper arm is off and the lower arm is on, or the lower arm is off and the upper arm is on), the average absolute value of the current flowing through the contactor (Channel 1) immediately decreases. After approximately 100 milliseconds, the main contactor opens, and no current flows through it. When the main contactor is disconnected, the absolute value of the current flowing through it (Channel 1) is very low.

[0100] Take K=3 as an example, Figure 5The first embodiment of the first logic gate circuit, K second logic gate circuits, a third logic gate circuit, a relay, and an AC contactor: the logic chip Un1 is a three-group three-input AND gate chip from NXP, model NXP's 74HC11D chip. The third, fourth, and fifth pins of the three input pins of chip Un1 are respectively connected to emergency fault signals such as "short circuit fault", "overcurrent fault", and "overvoltage fault". When there is no fault, the logic levels of "short circuit fault", "overcurrent fault", and "overvoltage fault" are all high, and the sixth pin of Un1 outputs a high level. The controller 10 can be a microprocessor chip, which can be a single-chip microcomputer, ARM, or DSP chip. The microprocessor's output comparison channels TIM_CH_1, TIM_CH_2, and TIM_CH_3 are used to output three SPWM waveforms, U, V, and W, respectively, where the voltage phase angle waveform of the U phase is , the voltage phase angle waveform of phase V is , the voltage phase angle waveform of phase W is The three output pulse signals are SPWM_U, SPWM_V, and SPWM_W, which are connected to one input terminal of Ua1, Ua2, and Ua3 respectively. The sixth pin of Un1 is the "fault signal" output pin, which is connected to the other input terminal of Ua1, Ua2, and Ua3 respectively. Ua1, Ua2, and Ua3 can be logic AND gate chips, and the model can be NXP's 74HC1G08GV. In this way, when the "short circuit fault", "overcurrent fault", and "overvoltage fault" are all normal, chip Un1 outputs a high level. The logic level state of the output pins of chips Ua1, Ua2, and Ua3 is mainly controlled by the logic state of their respective second input terminals (that is, the output signal of Un1); the outputs of Ua1, Ua2, and Ua3 are divided into two SPWM signals by hardware. Because the electromagnetic stirring frequency conversion power supply has a voltage source main circuit topology, in order to prevent the IGBT of the upper and lower bridge arms of the inverter bridge arm from being directly connected, a dead time needs to be added between the upper and lower bridge arms. Diode D101, resistor R104, capacitor C101, and diode D102, resistor R105, and capacitor C102 generate the dead time for phase U. The dead time generation circuits for phases V and W are identical. Ud1, Ud2, ..., and Ud6 represent six sets of open-drain output chips. These chips can be implemented using a single chip, such as the NXP 74AHCT07APW. To improve the IGBT driver's immunity to interference, all six outputs of the six open-drain output chips are pulled up to a 15V power supply. When any one of the three faults "short circuit fault", "overcurrent fault" and "overvoltage fault" has a fault alarm, that is, when any one of the fault signals of "short circuit fault", "overcurrent fault" and "overvoltage fault" is low, the output of Un1 is low, so that Ua1, Ua2 and Ua3 all output low. In this way, when any one of the three faults "short circuit fault", "overcurrent fault" and "overvoltage fault" occurs, SPWM_IGBT1, SPWM_IGBT3 and SPWM_IGBT5 all remain at low level, and SPWM_IGBT2, SPWM_IGBT4 and SPWM_IGBT6 all remain at high level. SPWM_IGBT1, SPWM_IGBT2, SPWM_IGBT3, SPWM_IGBT4, SPWM_IGBT5 and SPWM_IGBT6 are connected to Figure 1-Figure 5IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6 are connected to the IGBTs in the lower bridge arm of the inverter bridge arm, so that all the IGBTs in the upper bridge arm are turned on. One I / O port of the microprocessor outputs to one input terminal of Un2, and the "fault signal" output by Un1 is connected to the other input terminal of Un2. When the "fault signal" output by Un1 is high, the level of the output pin of Un2 is mainly controlled by the I / O pin of the microprocessor. When the I / O port of the microprocessor outputs a high level, Un2 outputs a high level, so that relay KM2 is energized, and the contacts of relay KM2 are closed to control the coil of the main contactor KM1 to be energized. When the I / O port of the microprocessor outputs a low level or any of the three input pins of Un1 are input at a low level, Un2 outputs a low level, relay KM2 is de-energized, and the contacts of relay KM2 are opened to control the coil of the main contactor KM1 to be de-energized.

[0101] Figure 6 The second embodiment of the first logic gate circuit, K second logic gate circuits, a third logic gate circuit, a relay, and an AC contactor: the logic chip Un3 is a three-group three-input NAND gate chip from NXP, model NXP's 74HC10D chip. The third, fourth, and fifth pins of the three input pins of chip Un3 are respectively connected to emergency fault signals such as "short circuit fault", "overcurrent fault", and "overvoltage fault". When there is no fault, the logic levels of "short circuit fault", "overcurrent fault", and "overvoltage fault" are all high, and the sixth pin of Un3 outputs a low level. The controller 10 can be a microprocessor chip, which can be a single-chip microcomputer, ARM, or DSP chip. The output comparison channels TIM_CH_1, TIM_CH_2, and TIM_CH_3 of the microprocessor are used to output three SPWM waveforms, U, V, and W, respectively, where the voltage phase angle waveform of the U phase is , the voltage phase angle waveform of phase V is , the voltage phase angle waveform of phase W is The three output pulse signals are SPWM_U, SPWM_V, and SPWM_W, which are connected to one input end of Ub1, Ub2, and Ub3 respectively. The sixth pin of Un3 is the "fault signal" output pin, which is connected to the other input end of Ub1, Ub2, and Ub3 respectively. Ub1, Ub2, and Ub3 are logic OR gate chips. In this way, when the "short circuit fault", "overcurrent fault", and "overvoltage fault" are all normal, the output of Un3 chip is low level, then the logic level state of the output pin of the chip Ub1, Ub2, and Ub3 is mainly controlled by the logic state of their respective second input ends; the output of Ub1, Ub2, and Ub3 is divided into two SPWM signals by hardware. Because the electromagnetic stirring frequency conversion power supply is a voltage source main circuit topology, in order to prevent the IGBT of the upper and lower bridge arms of the inverter bridge arm from being directly connected, a dead time needs to be added between the upper and lower bridge arms. Diode D101, resistor R104, capacitor C101, and diode D102, resistor R105, and capacitor C102 generate the dead time for phase U. The dead time generation circuits for phases V and W are identical. Ud1, Ud2, ..., and Ud6 represent six sets of open-drain output chips. These chips can be implemented using a single chip, such as the NXP 74AHCT07APW. To improve the IGBT driver's immunity to interference, all six outputs of the six open-drain output chips are pulled up to a 15V power supply. When any one of the three faults "short circuit fault", "overcurrent fault" and "overvoltage fault" has a fault alarm, that is, when any one of the fault signals of "short circuit fault", "overcurrent fault" and "overvoltage fault" is low, the output of Un3 is high, so that Ub1, Ub2 and Ub3 all output high. In this way, when any one of the three faults "short circuit fault", "overcurrent fault" and "overvoltage fault" occurs, SPWM_IGBT1, SPWM_IGBT3 and SPWM_IGBT5 all remain at a high level, and SPWM_IGBT2, SPWM_IGBT4 and SPWM_IGBT6 all remain at a low level. SPWM_IGBT1, SPWM_IGBT2, SPWM_IGBT3, SPWM_IGBT4, SPWM_IGBT5 and SPWM_IGBT6 are driven as follows: Figure 1-Figure 5The IGBTs at corresponding positions among IGBT1, IGBT2, IGBT3, IGBT4, IGBT5 and IGBT6 are turned on, so that all the upper arm IGBTs in the inverter bridge arm are turned on and all the lower arm IGBTs are turned off. An I / O port of the microprocessor outputs to an input terminal of Un4, and the "fault signal" output by Un3 is connected to the other input terminal of Un4 after passing through the NOT gate Un5. When the "fault signal" output by Un3 is low, the output of Un3 is high, so the level of the output pin of Un4 is mainly controlled by the I / O pin of the microprocessor. When the I / O port of the microprocessor outputs high, Un4 outputs high, so that relay KM2 is energized, and the contacts of relay KM2 are closed to control the coil of the main contactor KM1 to be energized. When the I / O port of the microprocessor outputs low or any one or more of the input pins of Un3 are low, Un3 outputs high, Un5 outputs low, Un4 outputs low, relay KM2 loses power, and the contacts of relay KM2 are disconnected to control the coil of the main contactor KM1 to lose power.

[0102] like Figure 7 Schematic diagram of the circuit connection structure of the first embodiment of K inverters and K IGBT control terminals: the output terminal of the i-th second logic gate circuit is electrically connected to the first IGBT control terminal of the i-th bridge arm, and the output terminal of the i-th second logic gate circuit is electrically connected to the second IGBT control terminal of the i-th bridge arm through the i-th inverter Uc i Electrical connection.

[0103] like Figure 8 Schematic diagram of the circuit connection structure of the second embodiment of K inverters and K IGBT control terminals: the output terminal of the i-th second logic gate circuit is electrically connected to the second IGBT control terminal of the i-th bridge arm, and the output terminal of the i-th second logic gate circuit is electrically connected to the first IGBT control terminal of the i-th bridge arm through the i-th inverter Uc i Electrical connection.

[0104] The electromagnetic stirring variable frequency power supply includes an electrolytic capacitor module 60 connected between the two ends of the bridge arm.

[0105] like Figure 9 、 Figure 11As shown, in a first embodiment of the overcurrent fault detection circuit 500, the overcurrent fault detection circuit 500 includes three overcurrent fault detection units, 3 is the number of inverter full-bridge arms of the electromagnetic stirring variable-frequency power supply, the i-th overcurrent fault detection unit includes a current measuring device U101-i, a current / voltage conversion unit U102-i, a voltage absolute value unit U103-i, an analog switch U105-i, and an integration circuit U106-i for measuring the i-phase output current of the electromagnetic stirring variable-frequency power supply, the current measuring device U101-i, the current / voltage conversion unit U102-i, and the voltage absolute value unit U103-i are electrically connected in sequence, the two connection ends of the analog switch U105-i are respectively electrically connected to the output end of the voltage absolute value unit U103-i and the input end of the integration circuit U106-i, and the output end of the integration circuit U106-i is connected to the inverter U107-i;

[0106] Each overcurrent fault detection unit further includes a first voltage comparison unit, the output end of the current / voltage conversion unit U102-i or the output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit, the output end of the first voltage comparison unit of the i-th overcurrent fault detection unit is electrically connected to the selection end of the analog switch U105-i, and the structure of the first voltage comparison unit of the i-th overcurrent fault detection unit is such that: when the output value of the current / voltage conversion unit U102-i is not less than the preset negative threshold voltage V- and not greater than the preset positive threshold voltage V+, the first voltage comparison unit of the i-th overcurrent fault detection unit outputs a low level; otherwise, the first voltage comparison unit of the i-th overcurrent fault detection unit outputs a high level, and the absolute values ​​of V+ and V- are equal;

[0107] The output terminal of the inverter U107 - i is electrically connected to the i-th input terminal of the AND gate circuit U108 , and the output terminal of the AND gate circuit U108 is the output terminal of the overcurrent fault detection circuit 500 ; i=1, 2, 3.

[0108] The output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit. The first voltage comparison unit of the i-th overcurrent fault detection unit includes a voltage comparator U1041-i. The non-inverting input end and the inverting input end of the voltage comparator U1041-i are electrically connected to the output end of the voltage absolute value unit U103-i and the first reference voltage end Vref1, respectively. The voltage value of the first reference voltage end Vref1 is equal to V+.

[0109] The electromagnetic stirring variable frequency power supply includes a three-phase full-bridge rectifier 30, a three-phase full-bridge inverter 40 electrically connected to the output end of the three-phase full-bridge rectifier 30, and a pulse width modulation signal generating unit having 6 pulse width modulation signal output ends. The three-phase full-bridge inverter 40 has three bridge arms, each of which is provided with two IGBTs connected in series in the same direction. The pulse width modulation signal generating unit and the level acquisition unit are independently provided or the level acquisition unit is integrated in the pulse width modulation signal generating unit.

[0110] The current measuring device U101-i may be a current transformer. The current / voltage conversion unit U102-i may be a proportional amplification unit. The voltage absolute value unit U103-i may be a dual-op-amp full-wave rectifier circuit. The integration circuit U106-i may be a common-mode integration circuit. The i-th overcurrent fault detection unit may include a pull-down resistor R9-i disposed between the input terminal of the integration circuit U106-i and ground. The i-th overcurrent fault detection unit may include a pull-down resistor R12-i disposed between the output terminal of the integration circuit U106-i and ground.

[0111] In one embodiment, the current / voltage conversion unit U102-i includes an operational amplifier U1-i and a resistor R1-i. The non-inverting input terminal of the operational amplifier U1-i is electrically connected to one end of the current transformer and the ground. The inverting input terminal of the operational amplifier U1-i, the other end of the current transformer, and one end of the resistor R1-i are electrically connected to each other. The output terminal of the operational amplifier U1-i is electrically connected to the other end of the resistor R1-i. The output terminal of the operational amplifier U1-i is the output terminal of the current / voltage conversion unit U102-i.

[0112] In one embodiment, the full-wave rectifier circuit of the i-th overcurrent fault detection unit includes an operational amplifier U2-i, an operational amplifier U3-i, a Schottky diode D4-i, a resistor R2-i, a resistor R3-i, a resistor R4-i, a resistor R5-i, a resistor R6-i, a seventh resistor R7-i, and a resistor R8-i. One end of each resistor R2-i and one end of each resistor R4-i are electrically connected to the output end of the current / voltage conversion unit U102-i (preferably the output end of the operational amplifier U1-i). The inverting input terminal of the operational amplifier U2-i, the other end of the resistor R2-i, the second end of the Schottky diode D4-i, and one end of the resistor R5-i are electrically connected to each other. The non-inverting input terminal of the operational amplifier U2-i is grounded through the resistor R3-i. The output terminal of the operational amplifier U2-i and the third end of the Schottky diode D4-i are electrically connected to each other. The first end of the Schottky diode D4-i, the other end of the resistor R5-i, and one end of the resistor R6-i are electrically connected to each other. The inverting input terminal of the operational amplifier U3-i, the other end of the resistor R6-i, the other end of the resistor R4-i, and one end of the resistor R8-i are electrically connected to each other. The non-inverting input terminal of the operational amplifier U3-i is grounded through the resistor R7-i. The output terminal of the operational amplifier U3-i and the other end of the resistor R8-i are electrically connected to each other. The output terminal of the operational amplifier U3-i is the output terminal of the full-wave rectifier unit.

[0113] The inverting input terminal of the voltage comparator U1041-i is electrically connected to the first reference voltage terminal Vref1. The output terminal of the voltage absolute value unit U103-i, the non-inverting input terminal of the voltage comparator U1041-i, and one connection terminal of the analog switch U105-i are electrically connected to each other. The output terminal of the voltage comparator U1041-i and the selection terminal of the analog switch U105-i are electrically connected to each other. The other connection terminal of the analog switch U105-i is electrically connected to the input terminal of the integration circuit U106-i.

[0114] The integrating circuit U106-i includes an operational amplifier U6-i, a resistor R9-i, a resistor R10-i, a resistor R11-i, a resistor R12-i, a capacitor C1-i, and a capacitor C2-i.

[0115] The inverting input terminal of the operational amplifier U6-i, one end of the resistor R11-i, and one end of the capacitor C2-i are electrically connected to each other. The non-inverting input terminal of the operational amplifier U6-i, one end of the resistor R10-i, and one end of the capacitor C1-i are electrically connected to each other. The output terminal of the operational amplifier U6-i, the other end of the capacitor C2-i, and one end of R12-i are electrically connected to each other. One end of the resistor R9-i is electrically connected to the other end of the resistor R10-i, serving as the input terminal of the integration circuit U106-i. The output terminal of the integration circuit U106-i is the output terminal of the operational amplifier U6-i. The other ends of the resistors R9-i, R11-i, R12-i, and C1-i are all grounded. Pull-down resistor R12-i is used to release the charge stored in the integration capacitor C2-i of the integration circuit U106-i when the analog switch is not turned on.

[0116] In a preferred embodiment, R1-i can be 1.538Ω, R2-i, R3-i, R4-i, and R5-i can each be 10kΩ, R6-i can be 5kΩ, R7-i, R8-i, and R9-i can each be 10kΩ, R10-i, R11-i, and R12-i can each be 1kΩ, and C1-i and C2-i can each be 4500pF. D3-i and D4-i can be BAT54S. U105-i can be 74AHC1G66. The pulse width modulation signal generating unit can be a controller 10. Controller 10 can be an MCU, a DSP, or an FPGA.

[0117] The voltage of the first reference voltage terminal Vref1 is preferably 2.5 V. The voltage of the second reference voltage terminal Vref2 is preferably -2.5 V.

[0118] Both the first and second type short circuits will exceed the rated current. The first type short circuit is generally a direct connection between the bridge arms, such as Figure 2 As shown in (a), the loop inductance is generally below 100nH and the current rate rises quickly; the second type of short circuit is generally a phase-to-phase short circuit, such as Figure 2The loop inductance shown in (b) is generally above the μH level, and the current rise rate is much slower than that of a Class I short circuit. Because the Class I short-circuit current flows only through the IGBTs in the upper and lower bridge arms, it does not flow through the U, V, and W three-phase output power cables. The current detection in the Class II short-circuit detection circuit does not detect the current there, so the Class II short-circuit circuit does not provide protection. When a Class II short-circuit occurs, the current level of the Class II short-circuit protection does not reach the threshold of the Class I short-circuit protection, so the Class I short-circuit protection does not function. Thus, the Class I and Class II short-circuit protections operate independently and do not conflict with each other. In a Class II short circuit, due to the load, the larger the inductance L, the slower the current change rate under the same voltage and time. Therefore, cable inductance can significantly affect the current rise rate. In this application, negative values ​​are inverted to positive values ​​through full-wave rectification. For example, a peak value of -3V is inverted to +3V after full-wave rectification. In the present application, if the current exceeds 150% of the rated current and remains in this state for several μs, it means that it is not a short-term false alarm signal.

[0119] If interference causes the voltage at the positive input of U1041-i to briefly exceed 2.5V, causing the output of U1041-i to be high, and then becomes less than 2.5V before the integration time is reached, in order to avoid continued integration based on the result of this short integration during the next re-integration, thereby causing misjudgment, the circuit is added with resistor R12-i. If this happens, after U105-i is turned off, the pull-down resistor R9-i keeps the input of the integration circuit U106-i at a certain level, and the voltage accumulated in the capacitor C2-i will be released and consumed through R12-i.

[0120] Table 1 Maximum ratings in the FF1400R12IP4 datasheet

[0121]

[0122] The electromagnetic stirrer generally requires an effective current of 400A~1000A low-frequency current. In this embodiment, the load of the electromagnetic stirrer for square and round billets with an AC effective value of 600A is used as an example. In the main circuit structure of the electromagnetic stirring power supply shown in the present invention, IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6 are Infineon's 1400A1200V IGBT with model FF1400R12IP4. The nominal rated current of the general IGBT is the peak current that can be used continuously and normally for a long time under a junction temperature of 175°C. When it is at 2 times the rated peak current, it can only last for 1ms. In addition, the normal shutdown current of the general IGBT should not exceed twice the rated current of the IGBT. For the IGBT model FF1400R12IP4, the normal shutdown current generally does not exceed 2800A. It can only last for about 10μs at 4-5 times the rated peak current, and a soft shutdown method is generally adopted when shutting down at 4-5 times the rated current. The above shows that the greater the peak current flowing through the IGBT, the shorter the IGBT's operating time. Table 1 shows the detailed parameters in the FF1400R12IP4 datasheet.

[0123] Current sensors, current transmitters, shunts, and current transformers can all detect AC currents ranging from a few amperes to tens of thousands of amperes. However, in the embodiment of the present invention, because it is necessary to detect a current of 2-3 times the rated current (the rated current effective value is 600A) during a Class II short-circuit fault, if a current sensor is used, it is necessary to select a current sensor that can measure a rated current peak value of about 2500A (600×1.414×3=2545). Firstly, the price is expensive, which increases the cost; secondly, when there is no short-circuit fault, the peak-to-peak value of a current sensor with a peak value of 2500A is ±850A (600×1.414=85 0A) is too wasteful; thirdly, a current sensor with a peak value of 2500A is huge and inconvenient for structural installation and layout; the current transmitter has a response time of milliseconds and is not suitable for places with fast response such as detecting short-circuit current; the shunt will cause huge energy loss while detecting current, resulting in reduced conversion efficiency, and the weak current detection part needs to be in direct contact with the strong current, which greatly interferes with the control system; therefore, this embodiment uses a current transformer with a rated current of 4000A, using the LM-0.5 through-type current transformer of Zhejiang Zhengtai Company (LM-0.5 current ratio is N=4000:5=800, and the rated output capacity is 30VA).

[0124] During the design, we determined that when the current exceeds 150% of the rated load current, it is considered to have reached the "Class II short circuit" short-circuit overcurrent fault threshold, that is, the Class II short-circuit current starting threshold is I=600×1.414×1.5=1272A (600×1.414 is the peak value of the 600A effective value, corresponding to the above output current exceeding 150% of the rated output current). The accuracy of the general current transformer is about 2-3%. Therefore, during the design, it is considered that when the current flowing through the IGBT reaches a peak of 1300A, the IGBT reaches the "Class II short circuit" fault detection threshold. V-ref is calculated according to the following formula V-ref=(1300 / 800)×1.538=2.5V (where 800 is the current transformer's current transmission ratio of 4000:5, and 1.538Ω is Figure 4, Figure 5 resistance of resistor R1-i);

[0125] In the fault detection circuit of the present invention, the current signal output by the current transformer is converted into a voltage signal by the resistor R1, for example Figure 9 As shown in the figure, when the peak value of the current flowing into the current transformer reaches 1300A at time T1 (point A), a voltage of V=(1300 / 800)×1.538=2.5V is generated across the resistor R1-i, or the peak value of the current flowing into the current transformer is -1300A. After calculation, Ui =(-1300 / 800)×1.538=-2.5V. Then, the peak-to-peak value of the sine wave of ±2.5V (such as Figure 8 Channel 3) outputs a positive waveform with peak-to-peak values ​​of 2.5V and 0V at the output of op amp U3-i through the full-wave rectifier circuit (such as Figure 8 As shown in channel 1). Compare the voltage output by the operational amplifier U3-i with the reference voltage Vref1 = 2.5V. When the input current is greater than 1300A during the time T1-T2, the absolute peak value of the voltage across the resistor R1-i will be greater than 2.5V, that is, the peak value of the output of the operational amplifier U3-i will also be greater than 2.5V. At this time, the comparator U1041-i outputs a high level, and the high level output of the comparator U1041-i is connected to the enable terminal of the digital switch device U105-i. At this time, the digital switch is turned on. At this time, the output of the operational amplifier U3-i is connected to the non-inverting input terminal of the operational amplifier U6-i through the resistor R10-i. If the output value of the operational amplifier U3 is always greater than 2.5V during the time T1-T2, it means that the current value detected by the current transformer is always greater than 1300A. After the time T1-T2, the output of the operational amplifier U6-i will reach (Take: R10-i resistance value = R11-i resistance value, C1-i capacitance value = C2-i capacitance value, where R is the resistance value of R10-i or R11-i, and C is the capacitance value of C2-i or C1-i). When the resistance value of resistor R and the capacitance value of capacitor C are constant, when the integral is greater than a certain threshold, i.e. Greater than V TH，high ×R×C, that is Greater than the inverter input V TH，high At the minimum threshold, U107-i flips its level and outputs a low level, indicating that the electromagnetic stirring variable frequency power supply has indeed reached a Class II short circuit condition. Controller 10 detects a low level and deems the electromagnetic stirring variable frequency power supply to have reached a Class II short circuit fault. U108 can be a three-input AND gate logic chip, such as the NXP 74HC11D. If any U107-i outputs a low level, U108 also outputs a low level, directly blocking the IGBT in the inverter section of the electromagnetic stirring variable frequency power supply.

[0126] When U105-i is enabled, the voltage of VO3-i is equal to the voltage of U6in-i.

[0127]

[0128]

[0129] Because the operational amplifier has negative feedback, the non-inverting terminal is equal to the inverting terminal V-=V+;

[0130]

[0131] Then perform the inverse transformation and get .

[0132] When the digital switch U105-i is not enabled, for the integration circuit, the non-inverting input of the operational amplifier U6-i is pulled down to GND by R9-i, that is, VO3=VIN=0V. According to the above formula, VO6=0V, and the logic chip U107-i outputs a high level;

[0133] Here is an example calculation:

[0134] In the first case, when the electromagnetic stirrer variable frequency power supply adopts a three-phase 500VAC power supply as the input voltage, the DC bus voltage is V after AC-DC rectification and filtering. DC-Link =700VDC, assuming Figure 2 In (b), the phases between U and V are short-circuited, and the inductance of the power cable in the U and V short-circuit loop is taken as the minimum value L=5μH. Using the formula , one microsecond time current increment △I=700V×1μs / 5μH=140A, assuming that within 5μs V DC-Link =700VDC is a constant value, and after 5 microseconds the current increment △I=5×140A=700A, such as Figure 9As shown, at time T1, when the detection current reaches 1300A, the Class II short-circuit integrator circuit is activated. At this point, VO3-i = 2.5V. Five microseconds later, at time T2, the current reaches I = 1300A + ΔI = 2000A. At time t2, VO3-i is 3.845V. We assume R10 = R11 = 1000Ω, and the capacitance values ​​of C1-i and C2-i are both 4500pF. When the current reaches 1300A at time T1, a Class II short circuit occurs, activating the integrator circuit. Five microseconds later, at time T2, the integrator circuit reaches its threshold, with VO6-i reaching 3.525V. U107-i is the logic chip, an NXP 74HC04D. VO6 is the output voltage of integrator circuit U106-i.

[0135]

[0136] VO6 reaches the high level minimum threshold voltage V of U107-i (74HC04D is powered by 5V voltage) TH，high =3.5V(V TH，high is the minimum high-level input threshold voltage of the 74HC04D chip). At this time, the logic chip U107-i outputs a low level. The integral form diagram is as follows Figure 9 shown.

[0137] In the second case, when the electromagnetic stirrer variable frequency power supply adopts a three-phase 500VAC power supply as the input voltage, the DC bus voltage is V after AC-DC rectification and filtering. DC-Link =700VDC, still assuming Figure 2 In (b), the phases U and V are short-circuited. We take the minimum inductance of the power cable of the U and V short-circuit loop as L=35μH, and use the formula , one microsecond time current increment △I=700V×1μs / 35μH=20A, assuming that within 6.2μs V DC-Link =700VDC is a constant value, and after 6.2 microseconds the current increment △I=6.2×20A=124A, such as Figure 9As shown, at time T1, when the detection current reaches 1300A, the Class II short-circuit integrator circuit is activated. At this point, VO3-i = 2.5V. 6.2 microseconds later, at time T2, the current reaches I = 1300A + ΔI = 1424A. At time t2, VO3-i is 2.737V. We assume R10 = R11 = 1000Ω, and the capacitance values ​​of C1-i and C2-i are both 4500pF. When the current reaches 1300A at time T1, a Class II short circuit occurs, activating the integrator circuit. 6.2 microseconds later, at time T2, the integrator circuit reaches its threshold, with VO6-i reaching 3.608V. U107-i is the logic chip, an NXP 74HC04D. VO6 is the output voltage of integrator circuit U106-i.

[0138]

[0139] VO6 reaches the high level minimum threshold voltage V of U107-i (74HC04D is powered by 5V voltage) TH，high =3.5V(V TH，high is the minimum high-level input threshold voltage of the 74HC04D chip). At this time, the logic chip U107-i outputs a low level. The integral form diagram is as follows Figure 9 shown.

[0140] When the formula The larger the L value is, the slower and smaller the current change rate △I is within 1us, which reflects Figure 9 The smaller the slope of the rise from A to B, the longer the integration time required to reach the protection threshold. The smaller the L value is, the faster the current change rate △I is within 1us, so the reflection is Figure 9 The greater the slope of the rise from A to B, the shorter the integration time required to reach the protection threshold.

[0141] When a type II short circuit fault occurs, the type II short circuit integration circuit is started, and after a certain period of time integration, when VO6 reaches the threshold, the logic chip U107-i outputs a low level, which directly blocks the inverter SPWM pulse modulation wave of the electromagnetic stirrer variable frequency power supply, and the electromagnetic stirrer variable frequency power supply stops working, because at this time the IGBT is at the maximum I c =2000A hard shutdown condition, IGBT shutdown current is the rated normal shutdown current I c =848A (600A×1.414=848A) is more than twice, but at this time, I c=2000A does not reach the 4-5 times rated current condition required for the desaturation state of Class I protection. The IGBT digital driver or IGBT driver core does not start the soft shutdown process. The IGBT driver or IGBT driver core shuts down at normal speed. The IGBT generates a turn-off spike voltage L×di / dt under 2000A, which is more than twice the turn-off spike voltage V when turned off under rated 848A (600×1.414=848A). DC-Link is 700VDC (the off time is the same, and the current change rate di is more than twice the normal off current).

[0142] Therefore, this scheme only verifies When the inductance L is the smallest but the turn-off current is the largest, that is, when the second-class short-circuit loop L=5uH, the IGBT in the electromagnetic stirrer dedicated variable frequency power supply is turned off under 2000A conditions, and the turn-off peak voltage L×di / dt and V DC-Link The sum of the peak voltage and the DC bus voltage is not enough to break down the IGBT (the voltage between the collector and emitter of the IGBT is less than 1200V). In this embodiment, an existing electromagnetic stirring dedicated frequency conversion power supply module is used for testing, and a single pulse experiment is used to test the size of the turn-off peak voltage. According to the experiment, the sum of the peak voltage and the DC bus voltage generated when the IGBT in the electromagnetic stirring frequency conversion power supply is turned off under 2000A conditions is only 1040V at most, which is significantly lower than the IGBT rated at 1200V in the embodiment; therefore, the "Class II short-circuit" detection device can not only reliably and effectively detect the electromagnetic stirrer load short-circuit fault, but also ensure that the IGBT is reliably turned off under safe current and voltage conditions.

[0143] In the embodiment, U1-i, U2-i, U3-i, and U6-i are operational amplifiers, and the model may be OPA810IDT of TI; U1041-i and U1042-i are high-speed comparator chips, and the model may be TLV3502AID of TI.

[0144] The technical effects of the present invention include:

[0145] 1. This solution requires a small number of components, all of which are general-purpose electronic components, so the hardware cost of this solution is very low;

[0146] 2. In this solution, except for the current transformer, all other components are SMD packaged components, so only a small amount of physical space is required;

[0147] 3. In this solution, no resources of the microcontroller need to be occupied before a Class II short-circuit fault occurs, which greatly improves the reliability of the control system;

[0148] 4. This solution uses a hardware integration circuit to detect Class II short-circuit faults in the form of fault signal accumulation. Compared with a single threshold comparison, it can greatly improve the robustness and accuracy of detection in the harsh electromagnetic interference environment where the electromagnetic stirring variable frequency power supply is located.

[0149] 5. In this scheme, the faster the current rise rate during a Class II short circuit, the shorter the time required to reach the Class II short circuit threshold. The slower the current rise rate during a Class II short circuit, the longer the time required to reach the Class II short circuit threshold. This is very consistent with the IGBT's own life characteristics mentioned above, that is, when the Class II short circuit protection plays a protective role, the current flowing through the IGBT is large and the duration is short, and the current flowing through the IGBT is small and the duration is long.

[0150] In the present invention, a voltage greater than 3.5V is defined as a high level, and a voltage less than 1.5V is defined as a low level.

[0151] like Figure 10 As shown, the difference between the second embodiment of the overcurrent fault detection circuit 500 and the first embodiment is that the output terminal of the current / voltage conversion unit U102-i is electrically connected to the input terminal of the first voltage comparison unit of the i-th overcurrent fault detection unit, and the first voltage comparison unit of the i-th overcurrent fault detection unit includes a voltage comparator U1041-i, a voltage comparator U1042-i, and a logic OR gate U1043-i. The non-inverting input terminal of the voltage comparator U1041-i, the inverting input terminal of the voltage comparator U1042-i, the output terminal of the current / voltage conversion unit U102-i, and the input terminal of the voltage absolute value unit U103-i are electrically connected to each other. The inverting input terminal of the voltage comparator U1041-i and the non-inverting input terminal of the voltage comparator U1042-i are electrically connected to the first reference voltage terminal Vref1 and the second reference voltage terminal Vref2 respectively, the voltage value of the first reference voltage terminal Vref1 and the voltage value of the second reference voltage terminal Vref2 are equal to V+ and V- respectively, the output terminal of the voltage comparator U1041-i and the output terminal of the voltage comparator U1042-i are connected to the two input terminals of the logic OR gate U1043-i respectively, and the output terminal of the logic OR gate U1043-i is the output terminal of the first voltage comparison unit of the i-th overcurrent fault detection unit.

[0152] Figure 13Schematic diagram of an embodiment of an overvoltage fault detection circuit 600. The positive input terminal L+ and negative input terminal L- of voltage sensor U1091 are electrically connected to the two ends of electrolytic capacitor module 60, respectively. The output terminal of voltage sensor U1091 is electrically connected to the inverting input terminal of comparator U1092. The non-inverting input terminal of voltage comparator U1092 is connected to the third reference voltage terminal Vref3. The output terminal of voltage comparator U1092 is the output terminal of overvoltage fault detection circuit 600, which is used to output an overvoltage fault signal. When the DC bus voltage exceeds a certain threshold, the output voltage of voltage sensor U1091 output terminal Vout also exceeds a certain threshold V-ref. In this case, comparator U1092 outputs a low level, indicating a voltage fault protection signal. The voltage sensor U1091 can be of model NCV1-1200V.

[0153] The IGBTs defining the three-phase full-bridge inverter 40 are IGBT1 , IGBT2 , IGBT3 , IGBT4 , IGBT5 , and IGBT6 .

[0154] like Figure 14 As shown, the short-circuit fault detection circuit 400 includes 6 short-circuit fault detection units, 6 first isolation transmission units, and an AND gate circuit U112; the j-th short-circuit fault detection unit includes a comparator U1101 j , current source U1102 j , reference voltage source U1103 j 、Capacitor C1101 j , diode D1101 j ; The comparator U1101 j Inverting input terminal, capacitor C1101 j One end, current source U1102 j Anode, diode D1101 j The positive electrodes are electrically connected to each other, diode D1101 j Negative electrode and IGBT j The collector of the current source U1102 is electrically connected to j Negative electrode and IGBT j The supply voltage terminal VCC j Electrical connection: the comparator U1101 j The non-inverting input terminal and the reference voltage source U1103 j Positive electrode electrical connection; the reference voltage source U1103 j Negative electrode, capacitor C1101 j The other end is connected to the IGBT j The emitter of the comparator U1101 is electrically connected to jThe output end is the output end of the j-th short-circuit fault detection unit; the output end of the j-th short-circuit fault detection unit is respectively transmitted through the j-th first isolation transmission unit U1104 j Connected to the j-th input terminal of the AND gate circuit U112, the output terminal of the AND gate circuit U112 is the output terminal of the short-circuit fault detection circuit 400; j=1, 2, . . . , 6.

[0155] like Figure 14 As shown, the jth first isolation transmission unit U1104 j Preferably, it is an optically coupled isolation transmission unit.

[0156] like Figure 14-15 As shown, when the IGBT j When the first type of short circuit protection is reached, the IGBT j Entering the desaturated conduction state, the IGBT j The voltage between the collector and emitter VCE j Reaching the DC bus voltage, IGBT in the above figure j The collector voltage is higher than VCC j Voltage value, at this time IGBT j Power supply terminal VCC j Capacitor C1101 through a constant current source j During charging, always keep capacitor C1101 j The voltage is charged to VCC j During the charging process, once the capacitor C1101 j The voltage of the comparator is greater than VREF, and the comparator outputs a low level. When the IGBT is saturated and turned on, the voltage VCE between the collector and emitter of the IGBT is j Only about 2-3V, then the capacitor C1101 j The upper voltage is VCE j The sum of the voltage and the diode's forward voltage drop of 0.7V is smaller than the VREF value, so the comparator outputs a high level.

[0157] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other.

[0158] The embodiments of the present invention are described in detail above, but the contents are only preferred embodiments of the present invention and cannot be considered to limit the scope of implementation of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the scope of this patent. After reading this invention, modifications of various equivalent forms of the present invention by those skilled in the art fall within the scope defined by the claims attached to this application. In the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

Claims

1. A fault shutdown protection device for an electromagnetic stirring variable frequency power supply, the electromagnetic stirring variable frequency power supply comprising an AC contactor (20), a three-phase full-bridge rectifier (30), and a three-phase full-bridge inverter (40) connected in sequence, each bridge arm of the three-phase full-bridge inverter (40) being provided with two first IGBTs and second IGBTs connected in series in the same direction and located at an upper bridge arm and a lower bridge arm, respectively, the first IGBT and the second IGBT of the i-th bridge arm being connected to each other to form an inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, i=1,2,3, the electromagnetic stirring variable frequency power supply further comprising a controller (10) having three pulse width modulation signal output terminals; It is characterized by: The fault shutdown protection device includes a first logic gate circuit, three second logic gate circuits, and three inverters Uc1, Uc2, and Uc3; The output end of the short-circuit fault detection circuit (400) and / or the output end of the overcurrent fault detection circuit (500) and / or the output end of the overvoltage fault detection circuit (600) of the electromagnetic stirring variable frequency power supply are electrically connected to the input end of the first logic gate circuit respectively, and the output end of the first logic gate circuit and the ith pulse width modulation signal output end of the controller (10) are electrically connected to the two input ends of the ith second logic gate circuit respectively; The output end of the i-th second logic gate circuit is electrically connected to the first IGBT control end of the i-th bridge arm, and the output end of the i-th second logic gate circuit is electrically connected to the second IGBT control end of the i-th bridge arm through the i-th inverter Uc i or, the output end of the i-th second logic gate circuit is electrically connected to the second IGBT control end of the i-th bridge arm, and the output end of the i-th second logic gate circuit is electrically connected to the first IGBT control end of the i-th bridge arm through the i-th inverter Uc i Electrical connection; The structure of the first logic gate circuit is such that: when no short circuit fault, overcurrent fault, or overvoltage fault occurs, the first logic gate circuit outputs a first level; otherwise, the first logic gate circuit outputs a second level; The structure of the second logic gate circuit is such that: when a short circuit fault, an overcurrent fault, or an overvoltage fault does not occur, the output level state of the i-th second logic gate circuit is the same as the level state of the i-th pulse width modulation signal of the controller (10); otherwise, each second logic gate circuit outputs a second level, wherein the first level and the second level are respectively a high level and a low level or respectively a low level and a high level; The fault shutdown protection device further includes a third logic gate circuit, wherein the output end of the first logic gate circuit and an IO interface end of the controller are electrically connected to two input ends of the third logic gate circuit respectively, and the output end of the third logic gate circuit is electrically connected to the control end of the AC contactor. The structure of the third logic gate circuit is such that: if the first logic gate circuit outputs a first level, the coil of the AC contactor (20) is in an energized state, otherwise it is in a de-energized state; The overcurrent fault detection circuit (500) comprises three overcurrent fault detection units, the i-th overcurrent fault detection unit comprising a current measuring device U101-i, a current / voltage conversion unit U102-i, a voltage absolute value unit U103-i, an analog switch U105-i, and an integration circuit U106-i for measuring the output current of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, the current measuring device U101-i, the current / voltage conversion unit U102-i, and the voltage absolute value unit U103-i being electrically connected in sequence, the two connection ends of the analog switch U105-i being electrically connected to the output end of the voltage absolute value unit U103-i and the input end of the integration circuit U106-i respectively, and the output end of the integration circuit U106-i being connected to an inverter U107-i; Each overcurrent fault detection unit further includes a first voltage comparison unit, the output end of the current / voltage conversion unit U102-i or the output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit, the output end of the first voltage comparison unit of the i-th overcurrent fault detection unit is electrically connected to the selection end of the analog switch U105-i, and the structure of the first voltage comparison unit of the i-th overcurrent fault detection unit is such that: when the output value of the current / voltage conversion unit U102-i is not less than the preset negative threshold voltage V- and not greater than the preset positive threshold voltage V+, the first voltage comparison unit of the i-th overcurrent fault detection unit outputs a low level; otherwise, the first voltage comparison unit of the i-th overcurrent fault detection unit outputs a high level, and the absolute values ​​of V+ and V- are equal; The output end of the inverter U107-i is electrically connected to the i-th input end of the AND gate circuit U108, and the output end of the AND gate circuit U108 is the output end of the overcurrent fault detection circuit (500); i=1, 2, 3; The i-th overcurrent fault detection unit includes a pull-down resistor R12-i disposed between the output terminal of the integration circuit U106-i and ground; the pull-down resistor R12-i is used to release the electricity stored in the integration capacitor of the integration circuit U106-i when the analog switch U105-i is not turned on.

2. The electromagnetic stirring variable frequency power supply fault shutdown protection device according to claim 1, characterized in that: The fault shutdown protection device further includes a relay (50), wherein two ends of a coil of the relay (50) are electrically connected to an output end of a third logic gate circuit and a ground, respectively; a pair of normally open contacts of the relay (50) are electrically connected to one end of a coil of the AC contactor (20) and a positive end of a power supply of the AC contactor (20), respectively; and the other end of the coil of the AC contactor (20) is electrically connected to a negative end of a power supply of the AC contactor (20).

3. The electromagnetic stirring variable frequency power supply fault shutdown protection device according to claim 1, characterized in that: The first logic gate circuit, the i-th second logic gate circuit, and the third logic gate circuit are logic AND gate Un1, logic AND gate Ua respectively. i , logic AND gate Un2; or The first logic gate circuit and the i-th second logic gate circuit are respectively a logic NAND gate Un3 and a logic OR gate Ub i The third logic gate circuit includes a logic AND gate Un4 and an inverter Un5. The output end of the logic NAND gate Un3 is electrically connected to an input end of the logic AND gate Un4 through the inverter Un5. An IO interface end of the controller (10) is electrically connected to the other input end of the logic AND gate Un4. The output end of the logic AND gate Un4 is the output end of the third logic gate circuit.

4. The electromagnetic stirring variable frequency power supply fault shutdown protection device according to claim 1, characterized in that: The structures of the short-circuit fault detection circuit (400), the overcurrent fault detection circuit (500), and the overvoltage fault detection circuit (600) are such that: When a short circuit fault occurs, the level output by the short circuit fault detection circuit (400), the level output by the overcurrent fault detection circuit (500) when an overcurrent fault occurs, and the level output by the overvoltage fault detection circuit (600) when an overvoltage fault occurs are all the first level or the second level; when no short circuit fault occurs, the level output by the short circuit fault detection circuit (400), the level output by the overcurrent fault detection circuit (500) when no overcurrent fault occurs, and the level output by the overvoltage fault detection circuit (600) when no overvoltage fault occurs are all the second level or the first level.

5. The electromagnetic stirring variable frequency power supply fault shutdown protection device according to claim 1, characterized in that: The output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit, and the first voltage comparison unit of the i-th overcurrent fault detection unit includes a voltage comparator U1041-i, and the non-inverting input end and the inverting input end of the voltage comparator U1041-i are electrically connected to the output end of the voltage absolute value unit U103-i and the first reference voltage end Vref1, respectively, and the voltage value of the first reference voltage end Vref1 is equal to V+; or The output end of the current / voltage conversion unit U102-i is electrically connected to the input end of the first voltage comparison unit of the i-th overcurrent fault detection unit. The first voltage comparison unit of the i-th overcurrent fault detection unit includes a voltage comparator U1041-i, a voltage comparator U1042-i, and a logic OR gate U1043-i. The non-inverting input end of the voltage comparator U1041-i, the inverting input end of the voltage comparator U1042-i, the output end of the current / voltage conversion unit U102-i, and the input end of the voltage absolute value unit U103-i are electrically connected to each other. The inverting input end of the voltage comparator U1041-i The phase input terminal and the non-phase input terminal of the voltage comparator U1042-i are electrically connected to the first reference voltage terminal Vref1 and the second reference voltage terminal Vref2 respectively. The voltage value of the first reference voltage terminal Vref1 and the voltage value of the second reference voltage terminal Vref2 are equal to V+ and V- respectively. The output terminal of the voltage comparator U1041-i and the output terminal of the voltage comparator U1042-i are connected to the two input terminals of the logic OR gate U1043-i respectively. The output terminal of the logic OR gate U1043-i is the output terminal of the first voltage comparison unit of the i-th overcurrent fault detection unit.

6. The electromagnetic stirring variable frequency power supply fault shutdown protection device according to any one of claims 1 to 4, characterized in that: The electromagnetic stirring variable frequency power supply comprises an electrolytic capacitor module (60) connected between the two ends of the bridge arm; The overvoltage fault detection circuit (600) comprises a voltage sensor U1091 and a voltage comparator U1092; the positive input terminal and the negative input terminal of the voltage sensor U1091 are electrically connected to the two ends of the electrolytic capacitor module (60), respectively; the inverting input terminal and the non-inverting input terminal of the comparator U1092 are electrically connected to the output terminal of the voltage sensor U1091 and the third reference voltage terminal Vref3, respectively; and the output terminal of the voltage comparator U1092 is the output terminal of the overvoltage fault detection circuit (600).

7. The electromagnetic stirring variable frequency power supply fault shutdown protection device according to any one of claims 1 to 4, characterized in that: The IGBTs of the three-phase full-bridge inverter (40) are defined as IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6; The short-circuit fault detection circuit (400) comprises six short-circuit fault detection units, six first isolation transmission units, and an AND gate circuit U112, wherein the input and output ends of the first isolation transmission units are not grounded. The jth short circuit fault detection unit includes a comparator U1101 j , current source U1102 j , reference voltage source U1103 j 、Capacitor C1101 j , diode D1101 j ; The comparator U1101 j Inverting input terminal, capacitor C1101 j One end, current source U1102 j Anode, diode D1101 j The positive electrodes are electrically connected to each other, diode D1101 j Negative electrode and IGBT j The collector of the current source U1102 is electrically connected to j Negative electrode and IGBT j The supply voltage terminal VCC j Electrical connection; The comparator U1101 j The non-inverting input terminal and the reference voltage source U1103 j Positive electrical connection; The reference voltage source U1103 j Negative electrode, capacitor C1101 j The other end is connected to the IGBT j The emitter is electrically connected; The comparator U1101 j The output end is the output end of the j-th short-circuit fault detection unit; The output end of the j-th short-circuit fault detection unit is connected to the j-th first isolation transmission unit U1104. j Connected to the j-th input terminal of the AND gate circuit U112, the output terminal of the AND gate circuit U112 is the output terminal of the short-circuit fault detection circuit (400); j=1, 2, ..., 6.

8. A method for protecting an electromagnetic stirring variable frequency power supply from a fault shutdown using the electromagnetic stirring variable frequency power supply fault shutdown protection device according to any one of claims 1 to 7, wherein the electromagnetic stirring variable frequency power supply comprises an AC contactor (20), a three-phase full-bridge rectifier (30), and a three-phase full-bridge inverter (40) connected in sequence, wherein each bridge arm of the three-phase full-bridge inverter (40) is provided with two first IGBTs and second IGBTs connected in series in the same direction and located in the upper bridge arm and the lower bridge arm, respectively, and the first IGBT and the second IGBT of the i-th bridge arm are connected to each other to form the inverter output of the i-th bridge arm of the electromagnetic stirring variable frequency power supply, where i=1, 2, 3; It is characterized in that The fault shutdown protection method comprises: if any one of a short circuit fault, an overcurrent fault, and an overvoltage fault occurs in the electromagnetic stirring variable frequency power supply, a first level is provided to the control end of each first IGBT, and a second level is provided to the control end of each second IGBT, wherein the first level and the second level are respectively a high level and a low level or respectively a low level and a high level; the operation of providing the first level to the control end of each first IGBT and providing the second level to the control end of each second IGBT is performed earlier than the operation of disconnecting the AC contactor (20).

9. The electromagnetic stirring variable frequency power supply fault shutdown protection method according to claim 8, characterized in that: The fault shutdown protection method further comprises: disconnecting the operation of the AC contactor (20) earlier than the shutdown time of the water circulation cooling system used for electromagnetic stirring.

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