Electronic packaging and method of manufacturing the same
By designing the retaining and removal zone structure of the cladding layer in the semiconductor package, embedding conductive columns and optical communication components, and integrating the photoelectric part with the laser part, the impact of the grinding process on the communication chip and signal attenuation problems are solved. Improves the suitability and scalability of the package.
Patent Information
- Application Number
- CN201910856970.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-08-30
- Filing Date
- 2019-09-11
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2039-09-11
AI Technical Summary
The existing semiconductor packages are sensitive to the transmission function of the communication chip during the grinding process, and the signal attenuation and crosstalk problems caused by copper data channels are difficult to effectively solve. The existing design requires large power, complexity and cable volume loss, which is limited. and insufficient scalability.
Design an electronic package to embed conductive columns and optical communication elements through the retaining and removal zone structure of the cladding layer to avoid the impact of grinding, and integrate the photoelectric part and the laser part into a single element to reduce the radiated electromagnetic energy. Signal attenuation and crosstalk for improved suitability and scalability.
It effectively avoids the impact of the grinding process on optical communication components, reduces signal attenuation and crosstalk, improves the suitability and scalability of the package, and reduces design complexity and power requirements.
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Figure CN112447654B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor packaging technology, in particular to an electronic packaging component and a manufacturing method thereof. Background Art
[0002] With the booming development of the electronics industry, electronic products are gradually moving towards multi-function and high performance. In order to meet the packaging needs of miniaturization of electronic packaging, wafer level packaging (WLP) technology has been developed.
[0003] Figures 1A to 1E It is a cross-sectional schematic diagram of a conventional method for manufacturing a semiconductor package 1 using wafer-level packaging technology.
[0004] like Figure 1A As shown, a thermal release layer 100 is formed on a carrier 10 .
[0005] Next, a plurality of communication chips 11 are placed on the thermal release adhesive layer 100 . The communication chips 11 have an active surface 11a and an inactive surface 11b opposite to each other. Each active surface 11a has a plurality of electrode pads 110 , and each communication chip 11 is adhered to the thermal release adhesive layer 100 with its active surface 11a .
[0006] like Figure 1B As shown, a packaging glue 14 is formed on the thermal release glue layer 100 to cover the communication chip 11 .
[0007] like Figure 1C As shown, the thermal release adhesive layer 100 is hardened by baking, and then the thermal release adhesive layer 100 and the carrier 10 are removed to expose the active surface 11 a of the communication chip 11 .
[0008] like Figure 1D As shown, a circuit structure 16 is formed on the active surface 11a of the encapsulant 14 and the communication chip 11, so that the circuit structure 16 is electrically connected to the electrode pad 110. Next, an insulating protection layer 18 is formed on the circuit structure 16, and the insulating protection layer 18 exposes a portion of the surface of the circuit structure 16 for bonding with a conductive element 17 such as a solder ball.
[0009] like Figure 1E As shown, along Figure 1D The cutting path L shown is used for performing a singulation process to obtain a plurality of semiconductor packages 1 .
[0010] However, in the conventional method of manufacturing the semiconductor package 1, when the semiconductor package 1 is used in a network switch, since the communication chip 11 is highly sensitive to external environmental stress, during the grinding process, the grinding force may affect the transmission function of the communication chip 11, resulting in a defective semiconductor package 1.
[0011] As data networks scale to meet ever-increasing bandwidth requirements, the disadvantages of copper data channels (such as the lines of the line structure 16) become increasingly apparent, such as signal attenuation and crosstalk caused by radiated electromagnetic energy between the communication chips 11.
[0012] In addition, although the industry can mitigate signal attenuation and crosstalk through designs such as equalization, coding and shielding, such designs require considerable power, complexity and cable volume loss, and only improve applicability in local areas and have limited scalability.
[0013] Therefore, how to overcome the various shortcomings of the prior art is indeed a technical problem that all walks of life are eager to solve. Summary of the invention
[0014] In view of the above-mentioned defects of the prior art, the present invention provides an electronic package and a method for manufacturing the same, wherein the package layer is designed with a removal area to prevent the grinding process or the packaging material from affecting the function of the optical communication element.
[0015] The electronic package of the present invention includes: a coating layer having a first surface and a second surface opposite to each other and side surfaces adjacent to the first and second surfaces; a first electronic component embedded in the coating layer; a plurality of conductive pillars embedded in the coating layer; a circuit structure formed on the first surface of the coating layer and electrically connecting the conductive pillars and the first electronic component; and an optical communication component disposed on the circuit structure and electrically connected to the circuit structure, wherein the optical communication component has a photoelectric part and a laser part.
[0016] The aforementioned electronic package further includes a circuit portion, which is formed on the second surface of the covering layer and electrically connected to the conductive column.
[0017] The present invention also provides a method for manufacturing an electronic package, which includes: covering a first electronic component and a plurality of conductive pillars via a coating layer, wherein the coating layer has a first surface and a second surface opposite to each other, and defines an adjacent reserved area and a removed area, the reserved area includes the first electronic component and a portion of the conductive pillar, and the removed area includes a portion of the conductive pillar; forming a circuit structure on the first surface of the coating layer, and electrically connecting the circuit structure to the conductive pillar and the first electronic component; forming a circuit portion on the second surface of the coating layer, and electrically connecting the circuit portion to the conductive pillar; removing the removed area and the circuit structure and circuit portion thereon, so that the coating layer is formed with a side surface adjacent to the first and second surfaces; and arranging an optical communication element on the circuit structure, and electrically connecting the optical communication element to the circuit structure, wherein the optical communication element has a photoelectric portion and a laser portion.
[0018] In the aforementioned manufacturing method, the plurality of conductive pillars surround the first electronic component before the removal area is removed.
[0019] In the aforementioned electronic package and its manufacturing method, the first electronic component combines and electrically connects a plurality of conductors.
[0020] In the aforementioned electronic package and its manufacturing method, the optoelectronic part converts the optical signal into an electrical signal, and the laser part converts the electrical signal into another optical signal and emits the other optical signal. For example, the optical communication element is electrically connected to the circuit structure via a plurality of conductive bumps, and the plurality of conductive bumps are located outside the laser part. Furthermore, it also includes encapsulating the plurality of conductive bumps with a packaging material, and the packaging material is not formed on the laser part.
[0021] In the aforementioned electronic package and its manufacturing method, the optical communication element protrudes from the side surface of the coating layer to serve as a connecting section.
[0022] The aforementioned electronic package and its manufacturing method further include forming a plurality of conductive elements on the circuit portion.
[0023] The aforementioned electronic package and its manufacturing method further include arranging a bearing structure on the second surface of the covering layer. For example, it also includes arranging a second electronic component on the bearing structure.
[0024] As can be seen from the above, the electronic package and its manufacturing method of the present invention are mainly formed by first forming the coating layer and then setting the optical communication element to avoid the grinding process affecting the optical communication element, and by removing the removal area and the circuit structure and circuit portion thereon, the optical communication element can effectively protrude from the side of the coating layer, thereby preventing the packaging material used in subsequent processes from adhering to the connecting section, so that the packaging material will not affect the optical signal transmission of the connecting section.
[0025] In addition, by integrating the optoelectronic part and the laser part into a single optical communication element, signal attenuation and crosstalk caused by the radiated electromagnetic energy between the optoelectronic part and the laser part when they are separately configured can be avoided, and the overall applicability and scalability of the electronic package can be improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figures 1A to 1E A cross-sectional schematic diagram of a conventional method for manufacturing a semiconductor package;
[0027] Figures 2A to 2F is a cross-sectional schematic diagram of a method for manufacturing an electronic package of the present invention;
[0028] Figure 2A 'for Figure 2A A partial top view of a
[0029] Figure 2F 'for Figure 2F A schematic bottom view of a partial cross section of
[0030] Figure 3 FIG. 4 is a cross-sectional schematic diagram of another embodiment of the electronic package of the present invention.
[0031] Description of Reference Numerals
[0032] 1 semiconductor package 10 carrier
[0033] 100 thermal release adhesive layer 11 communication chip
[0034] 11a, 21a Active surface 11b, 21b Non-active surface
[0035] 110,210 electrode pad 14 packaging colloid
[0036] 16,20 Circuit structure 17,24 Conductive element
[0037] 18 Insulation protection layer 2,3 Electronic packaging
[0038] 200,91 Insulation layer 201 Line redistribution layer
[0039] 202 electrical contact pad 21 first electronic component
[0040] 211 protective film 212 bonding layer
[0041] 22 conductor 22a end surface
[0042] 23 conductive pillars 23a, 23b end surfaces
[0043] 240 circuit part 25 coating layer
[0044] 25a first surface 25b second surface
[0045] 25c Side 26 Optical communication components
[0046] 26a Photoelectric unit 26b Laser unit
[0047] 260 connecting section 27,320,330 conductive bump
[0048] 270 Under-bump metal layer 29 Packaging material
[0049] 30 bearing structure 30a upper surface
[0050] 30b lower surface 300 external pad
[0051] 31 Primer 32 Second electronic component
[0052] 33 third electronic component 34 heat sink
[0053] 340 heat sink 341 support foot
[0054] 35 heat dissipation layer 36 adhesive layer
[0055] 9 Carrying board 9b Metal layer
[0056] 90 Release layer A Reserved area
[0057] C Removal area L Cutting path. DETAILED DESCRIPTION
[0058] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.
[0059] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size should still fall within the scope of the technical contents disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "upper", "lower", "first", "second", and "one" quoted in this specification are only used for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.
[0060] Figures 2A to 2F It is a cross-sectional schematic diagram of a method for manufacturing an electronic package 2 of the present invention.
[0061] like Figure 2A As shown, a plurality of conductive pillars 23 are formed on a carrier board 9 , and at least one first electronic component 21 is disposed on the carrier board 9 , wherein the first electronic component 21 is combined with and electrically connected to a plurality of conductive bodies 22 .
[0062] In this embodiment, the carrier plate 9 is, for example, a plate of a semiconductor material (such as silicon or glass), on which a release layer 90, a metal layer 9b such as titanium / copper, and an insulating layer 91 such as a dielectric material or a solder resist are sequentially formed by, for example, coating, so that the conductive column 23 is arranged on the insulating layer 91.
[0063] In addition, the material forming the conductive column 23 is a metal material such as copper or a solder material, and the conductor 22 is a spherical shape such as a conductive line, a solder ball, or a columnar shape of a metal material such as a copper column, a solder bump, or a stud conductive part made by a wire bonding machine, but is not limited thereto.
[0064] Furthermore, the first electronic component 21 is an active component, a passive component or a combination of the two, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. In the present embodiment, the first electronic component 21 is a semiconductor chip acting as a driver, which has an active surface 21a and an inactive surface 21b opposite to each other. The first electronic component 21 is fixed to the insulating layer 91 with its inactive surface 21b via a bonding layer 212, and the active surface 21a has a plurality of electrode pads 210 and a protective film 211 such as a passivation material, and the conductor 22 is located in the protective film 211.
[0065] In addition, the plurality of conductive pillars 23 surround the first electronic element 21. Figure 2A 'shown.
[0066] like Figure 2B As shown, a coating layer 25 is formed on the insulating layer 91 of the carrier board 9 so that the coating layer 25 covers the first electronic component 21, the conductor 22 and the conductive column 23, wherein the coating layer 25 has a first surface 25a and a second surface 25b opposite to each other, and the coating layer 25 is bonded to the insulating layer 91 of the carrier board 9 with its second surface 25b, and the protective film 211, the end surface 22a of the conductor 22 and the end surface 23a of the conductive column 23 are exposed on the first surface 25a of the coating layer 25.
[0067] In this embodiment, the cladding layer 25 defines a reserved area A and a removed area C adjacent to each other, and the reserved area A includes the first electronic component 21 and a portion of the conductive pillar 23 , while the removed area C includes a portion of the conductive pillar 23 .
[0068] In addition, the coating layer 25 is an insulating material, such as polyimide (PI), dry film, packaging colloid or molding compound such as epoxy. For example, the coating layer 25 can be formed on the insulating layer 91 by liquid compound, injection, lamination or compression molding.
[0069] Furthermore, through the flattening process, the first surface 25a of the cladding layer 25 is made flush with the protection film 211, the end surface 23a of the conductive column 23, and the end surface 22a of the conductor 22, so that the end surface 23a of the conductive column 23 and the end surface 22a of the conductor 22 are exposed on the first surface 25a of the cladding layer 25. For example, the flattening process removes part of the material of the protection film 211, part of the material of the conductive column 23, part of the material of the conductor 22, and part of the material of the cladding layer 25 by grinding.
[0070] In addition, the other end surface 23 b of the conductive column 23 is also flush with the second surface 25 b of the cladding layer 25 .
[0071] like Figure 2C As shown, a circuit structure 20 is formed on the first surface 25 a of the cladding layer 25 , and the circuit structure 20 is electrically connected to the conductive pillar 23 and the conductor 22 .
[0072] In this embodiment, the circuit structure 20 includes a plurality of insulating layers 200 and a plurality of redistribution layers (RDL) 201 disposed on the insulating layers 200. The outermost insulating layer 200 can be used as a solder mask, and the outermost redistribution layer 201 is exposed on the solder mask to serve as an electrical contact pad 202. Alternatively, the circuit structure 20 may include only a single insulating layer 200 and a single redistribution layer 201.
[0073] In addition, the material forming the circuit redistribution layer 201 is copper, and the material forming the insulating layer 200 is a dielectric material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), etc., or a solder mask such as green paint and ink.
[0074] like Figure 2D As shown, the carrier plate 9 and the release layer 90 and the metal layer 9 b thereon are removed, and the insulating layer 91 is retained. A circuit portion 240 is then formed on the insulating layer 91 to electrically connect the conductive pillars 23 .
[0075] In this embodiment, the insulating layer 91 is formed with a plurality of openings by laser, so that the end surface 23b of the conductive pillar 23 and a portion of the second surface 25b of the cladding layer 25 are exposed in the openings for bonding the circuit portion 240. For example, the circuit portion 240 is an under-bump metal layer (UBM) for bonding conductive elements such as a plurality of solder bumps or solder balls in a subsequent process; or, the circuit portion can be formed on the insulating layer 91 by an RDL process for bonding the conductive element or UBM in a subsequent process. It should be understood that there are many types of circuit portions 240, and there is no particular limitation.
[0076] In addition, by providing a carrier plate 9 with an insulating layer 91, the insulating layer 91 can be used to form the circuit portion 240 after removing the carrier plate 9, so there is no need to arrange a dielectric layer, thereby saving process time and process steps, thereby achieving the purpose of reducing process costs.
[0077] like Figure 2E As shown, the removal area C and the circuit structure 20 , the insulating layer 91 and the circuit portion 240 thereon are removed, so that the cladding layer 25 is formed with a side surface 25 c adjacent to the first surface and the second surface.
[0078] like Figure 2F As shown, at least one optical communication element 26 is disposed on the circuit structure 20 so that the optical communication element 26 protrudes from the side surface 25c of the cladding layer 25, wherein the protruding portion of the optical communication element 26 serves as a connecting section 260 to connect to a bus (such as an optical fiber) having a wiring arrangement, and a conductive element 24 such as a plurality of solder bumps or solder balls is combined on the circuit portion 240.
[0079] In this embodiment, the optical communication element 26 is a multifunctional integrated chip, which has a photoelectric part 26a such as a photodiode to convert an optical signal into an electrical signal, and a laser part 26b such as a laser diode. Figure 2F 'As shown, the electrical signal is converted into an optical signal and an optical signal such as a laser signal is emitted.
[0080] In addition, the optical communication element 26 is electrically connected to the electrical contact pad 202 via a plurality of conductive bumps 27 such as solder bumps, copper bumps or other conductive bumps. In this embodiment, an under bump metallurgy (UBM) 270 may be formed on the electrical contact pad 202 to facilitate the bonding of the conductive bumps 27.
[0081] Furthermore, a packaging material 29 such as a primer may be formed between the circuit structure 20 and the optical communication element 26 to cover the conductive bumps 27 .
[0082] In addition, if Figure 2F ', which corresponds to Figure 2F In the partial cross-sectional bottom view FF of , the plurality of conductive bumps 27 are located outside the laser portion 26 b, and the packaging material 29 is not formed on the laser portion 26 b, so the packaging material 29 will not affect the optical signal transmission of the laser portion 26 b.
[0083] Therefore, during the operation of the electronic package 2, the driver (the first electronic component 21) drives the optical communication component 26 to make the connecting section 260 of the optical communication component 26 receive an optical signal from an optical fiber (not shown), and then convert the optical signal into an electrical signal via the optoelectronic component 26a. Then, the electrical signal is converted into another optical signal via the circuit structure 20 and the laser component 26b, so that the laser component 26b emits another optical signal such as a laser signal to a target device (not shown).
[0084] Therefore, when the electronic package 2 is used in a network switch, the optical communication element 26 has a high sensitivity to external environmental stress due to the laser portion 26b. Therefore, the manufacturing method of the present invention first grinds the coating layer 25 (such as Figure 2B As shown), the optical communication element 26 is then arranged (as shown Figure 2F As shown), the optical communication element 26 is prevented from being affected by the grinding process.
[0085] In addition, the manufacturing method of the present invention defines the removal area C through the coating layer 25, so that after removing the removal area C and the circuit structure 20, the insulating layer 91 and the circuit portion 240 thereon, the connecting section 260 of the optical communication element 26 can effectively protrude from the side 25c of the coating layer 25, thereby preventing the packaging material 29 used in subsequent processes from adhering to the connecting section 260, so that the packaging material 29 will not affect the optical signal transmission of the connecting section 260.
[0086] In addition, by integrating the optoelectronic portion 26a and the laser portion 26b into a single optical communication element 26, signal attenuation and crosstalk caused by the radiation electromagnetic energy between the optoelectronic portion 26a and the laser portion 26b when they are separately configured can be avoided, and the overall applicability and scalability of the electronic package 2 can be improved.
[0087] Furthermore, since there is no need to use existing equalization, coding and shielding designs, there will not be considerable power, complexity and cable volume loss.
[0088] Further, if Figure 3 As shown, the conductive element 24 can be placed on a supporting structure 30 to form another electronic package 3 .
[0089] In the present embodiment, the supporting structure 30 is in the form of a substrate having an upper surface 30a and a lower surface 30b opposite to each other, so that the electronic package 2 is disposed on the upper surface 30a of the supporting structure 30. For example, the supporting structure 30 is a packaging substrate having a core layer and a circuit structure or a coreless circuit structure, and the circuit structure includes at least one insulating layer and at least one circuit layer combined with the insulating layer, such as at least one fan-out type redistribution layer (RDL). It should be understood that the supporting structure 30 may also be other plates, such as a lead frame, a wafer, or other carriers with metal routing, etc., and is not limited to the above.
[0090] In addition, the conductive element 24 is electrically connected to the supporting structure 30 , and the conductive element 24 is coated with a primer 31 .
[0091] Furthermore, at least one second electronic component 32 , a third electronic component 33 and / or a heat sink 34 may be disposed on the supporting structure 30 according to functional requirements.
[0092] The second electronic component 32 is disposed on the upper surface 30a of the supporting structure 30, and the second electronic component 32 is, for example, an active component, a passive component, a packaging structure or a combination thereof, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. In the present embodiment, the second electronic component 32 is a semiconductor chip, which can be disposed on the circuit layer of the supporting structure 30 in a flip chip manner via a plurality of conductive bumps 320 such as solder materials, metal pillars or others and electrically connected to the circuit layer, and the conductive bumps 320 are coated with a primer 31; or, the second electronic component 32 can be electrically connected to the circuit layer of the supporting structure 30 in a wire bonding manner via a plurality of welding wires; or, the second electronic component 32 can directly contact the circuit layer of the supporting structure 30. It should be understood that there are many ways for the second electronic component 32 to be electrically connected to the supporting structure 30, and it is not limited to the above.
[0093] On the other hand, based on functional requirements, the second electronic component 32 can be configured with at least one set of clock and data recovery circuits (CDR) corresponding to the optical communication component 26 to provide serial communication technology such as SERializer / DESerializer (SERDES) for signal recovery or removal of the clock to serve as a high-bandwidth transmission point (I / O).
[0094] The third electronic component 33 is disposed on the lower surface 30b of the supporting structure 30, and the third electronic component 33 is, for example, an active component, a passive component, a packaging structure or a combination thereof, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. In the present embodiment, the third electronic component 33 is a semiconductor chip, which can be disposed on the circuit layer of the supporting structure 30 in a flip chip manner via a plurality of conductive bumps 330 such as solder materials, metal pillars or others and electrically connected to the circuit layer, and the conductive bumps 330 are coated with a primer 31; or, the third electronic component 33 can be electrically connected to the circuit layer of the supporting structure 30 in a wire bonding manner via a plurality of welding wires; or, the third electronic component 33 can directly contact the circuit layer of the supporting structure 30. It should be understood that there are many ways for the third electronic component 33 to be electrically connected to the supporting structure 30, and they are not limited to the above.
[0095] On the other hand, based on functional requirements, the third electronic component 33 may be configured with a power management integrated circuit (Power Management IC) to manage power for the main system.
[0096] The heat sink 34 is connected to the second electronic component 32 via the heat sink layer 35, wherein the heat sink layer 35 is a thermal interface material (TIM), such as a high thermal conductivity metal adhesive. The heat sink 34 has a heat sink 340 and at least one support leg 341 disposed on the lower side of the heat sink 340. The heat sink 340 is a heat sink type and contacts the heat sink layer 35 at the lower side, and the support leg 341 is connected to the upper surface 30a of the supporting structure 30 via an adhesive layer 36.
[0097] The present invention also provides an electronic package 2 , 3 , which includes: a coating layer 25 , at least one first electronic component 21 , a plurality of conductive pillars 23 , a circuit structure 20 and at least one optical communication component 26 .
[0098] The coating layer 25 has a first surface 25a and a second surface 25b opposite to each other and a side surface 25c adjacent to the first and second surfaces 25a and 25b.
[0099] The first electronic component 21 is embedded in the coating layer 25 , and a plurality of conductors 22 are combined and electrically connected to the first electronic component 21 , wherein the conductors 22 are embedded in the protective film 211 , and the end faces 22 a of the conductors 22 are exposed on the first surface 25 a of the protective film 211 .
[0100] The conductive pillar 23 is embedded in the cladding layer 25 , and the end surface 23 a of the conductive pillar 23 is exposed on the first surface 25 a of the cladding layer 25 .
[0101] The circuit structure 20 is disposed on the first surface 25 a of the cladding layer 25 and electrically connects the conductive pillar 23 and the conductor 22 .
[0102] The optical communication element 26 is disposed on the circuit structure 20 and electrically connected to the circuit structure 20 , wherein the optical communication element 26 has a photoelectric portion 26 a and a laser portion 26 b .
[0103] In one embodiment, the optoelectronic part 26a converts the optical signal into an electrical signal, and the laser part 26b converts the electrical signal into another optical signal and emits the other optical signal. For example, the optical communication element 26 is electrically connected to the circuit structure 20 via a plurality of conductive bumps 27, and the plurality of conductive bumps 27 are located outside the laser part 26b. Further, the plurality of conductive bumps 27 may be encapsulated by a packaging material 29, and the packaging material 29 is not formed on the laser part 26b.
[0104] In one embodiment, the optical communication element 26 protrudes from the side surface 25 c of the cladding layer 25 .
[0105] In one embodiment, the electronic package 2, 3 further includes a circuit portion 240 formed on the second surface 25b of the cladding layer 25 and electrically connected to the conductive pillar 23. Furthermore, a plurality of conductive elements 24 formed on the circuit portion 240 may be included.
[0106] In one embodiment, the electronic package 3 further includes a supporting structure 30 disposed on the second surface 25 b of the covering layer 25 . Further, the electronic package 3 may include at least one second electronic component 32 disposed on the supporting structure 30 .
[0107] In summary, the electronic package and its manufacturing method of the present invention has a removal area designed on the coating layer to prevent the grinding process or the packaging material from affecting the function of the optical communication element, so the present invention is beneficial to the operation of the optical communication element.
[0108] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.
Claims
1. An electronic package, characterized in that: include: A cladding layer having a first surface and a second surface opposite to each other and a side surface adjacent to the first surface and the second surface; a first electronic component embedded in the coating layer; a plurality of conductive pillars embedded in the cladding layer; A circuit structure formed on the first surface of the cladding layer and electrically connecting the conductive pillar and the first electronic element; as well as An optical communication element, which is disposed on the circuit structure and protrudes from the side of the cladding layer and is electrically connected to the circuit structure, wherein the optical communication element is a multifunctional integrated chip integrating an optoelectronic part and a laser part, and the protruding part of the optical communication element serves as a connecting section; The encapsulating layer is defined with a reserved area and a removed area adjacent to each other, the reserved area includes the first electronic component and a portion of the conductive column and the circuit structure is formed thereon, the removed area includes a portion of the conductive column and the circuit structure is formed thereon, and the side surface is formed by removing the removed area and the circuit structure thereon.
2. The electronic package according to claim 1, characterized in that: The first electronic component combines and electrically connects a plurality of conductors.
3. The electronic package according to claim 1, characterized in that: The optoelectronic part converts the optical signal into an electrical signal, and the laser part converts the electrical signal into another optical signal and emits the another optical signal.
4. The electronic package according to claim 3, characterized in that: The optical communication element is electrically connected to the circuit structure via a plurality of conductive bumps, and the plurality of conductive bumps are located outside the laser portion.
5. The electronic package according to claim 4, characterized in that: The electronic package also includes a packaging material covering the plurality of conductive bumps, which is not formed on the laser portion.
6. The electronic package according to claim 1, characterized in that: The electronic package also includes a circuit portion formed on the second surface of the covering layer and electrically connected to the conductive column.
7. The electronic package according to claim 6, characterized in that: The electronic package also includes a plurality of conductive elements formed on the circuit portion.
8. The electronic package according to claim 1, characterized in that: The electronic package also includes a supporting structure disposed on the second surface of the covering layer.
9. The electronic package according to claim 8, characterized in that: The electronic package also includes a second electronic component disposed on the carrier structure.
10. A method for manufacturing an electronic package, characterized in that: The method includes: The first electronic component and the plurality of conductive pillars are covered by a covering layer, wherein the covering layer has a first surface and a second surface opposite to each other, and defines a reserved area and a removed area adjacent to each other, the reserved area includes the first electronic component and a portion of the conductive pillars, and the removed area includes a portion of the conductive pillars; Forming a circuit structure on the first surface of the cladding layer, and making the circuit structure electrically connect the conductive pillar and the first electronic element; forming a circuit portion on the second surface of the cladding layer, and electrically connecting the circuit portion to the conductive column; Removing the removal area and the circuit structure and circuit portion thereon, so that the cladding layer is formed with a side surface adjacent to the first surface and the second surface; and An optical communication element is arranged on the circuit structure and protrudes from the side of the cladding layer, and the optical communication element is electrically connected to the circuit structure, wherein the optical communication element is a multifunctional integrated chip integrating the optoelectronic part and the laser part, and the protruding part of the optical communication element serves as a connecting section.
11. The method for manufacturing an electronic package according to claim 10, characterized in that: The first electronic component combines and electrically connects a plurality of conductors.
12. The method for manufacturing an electronic package according to claim 10, characterized in that: The plurality of conductive pillars surround the first electronic component before the removal area is removed.
13. The method for manufacturing an electronic package according to claim 10, characterized in that: The optoelectronic part converts the optical signal into an electrical signal, and the laser part converts the electrical signal into another optical signal and emits the another optical signal.
14. The method for manufacturing an electronic package according to claim 13, characterized in that: The optical communication element is electrically connected to the circuit structure via a plurality of conductive bumps, and the plurality of conductive bumps are located outside the laser portion.
15. The method for manufacturing an electronic package according to claim 14, characterized in that: The manufacturing method further comprises wrapping the plurality of conductive bumps with a packaging material, and the packaging material is not formed on the laser part.
16. The method for manufacturing an electronic package according to claim 10, characterized in that: The manufacturing method further includes forming a plurality of conductive elements on the circuit portion.
17. The method for manufacturing an electronic package according to claim 10, characterized in that: The manufacturing method also includes arranging a bearing structure on the second surface of the covering layer.
18. The method for manufacturing an electronic package according to claim 17, characterized in that: The method further comprises arranging a second electronic component on the supporting structure.
