Transparent display device

Abstract

The present application discloses a transparent display device including a display panel having a first region serving as an emissive region and a second region serving as a transmissive region. The display panel includes a first substrate and a second substrate facing each other. The first substrate includes an insulating layer having an aperture formed by removing at least a portion of the thickness of the insulating layer in the second region. The second substrate includes a transparent spacer positioned in the second region and drawn into the aperture.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2019-0116763 filed on September 23, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a transparent display device. Background Art

[0004] Various display devices that are smaller and lighter than cathode ray tubes are being developed. Examples of display devices include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), organic light emitting display devices (OLEDs), and the like.

[0005] Among these flat panel display devices, OLEDs are self-luminous display devices that emit light by exciting organic compounds. Compared to LCDs, OLEDs do not require a backlight. Therefore, OLEDs have the advantages of a thin profile, light weight, and a simpler manufacturing process. Furthermore, OLEDs have become widely used because they can be manufactured at low temperatures, have a fast response time of 1ms or less, and are characterized by low power consumption, wide viewing angles, and high contrast.

[0006] OLEDs include organic light-emitting diodes (OLEDs), which convert electrical energy into light. These diodes include an anode, a cathode, and an organic emissive layer disposed between the anode and cathode. Holes and electrons are injected from the anode and cathode, respectively, and recombine in the emissive layer to form excitons. The OLED displays images by emitting light when the excitons fall from an excited state to a ground state.

[0007] Recently, research on transparent display devices has been actively underway. A transparent display device refers to a display device that enables a user in front of a display panel to recognize visual information displayed on the display panel and objects located on the rear surface of the display panel. To this end, the transparent display device includes an emissive region in which a driving element is provided to display an input image, and a transmissive region that transmits external light. Summary of the Invention

[0008] An object of the present disclosure is to provide a transparent display device that is easy to align.

[0009] According to one aspect of the present disclosure, a transparent display device includes a display panel including a first region serving as an emissive region and a second region serving as a transmissive region. The display panel includes a first substrate and a second substrate facing each other. The first substrate includes an insulating layer having an opening formed by removing at least a portion of the thickness of the insulating layer in the second region. The second substrate includes a transparent spacer positioned in the second region and drawn into the opening.

[0010] The cross-section of the transparent spacer may include a first top side in contact with the second substrate and a first bottom side facing the first top side. Furthermore, the cross-section of the transparent spacer may include a first right side connecting one side of the first top side and one side of the first bottom side, and a first left side connecting the other side of the first top side and the other side of the first bottom side. The cross-section of the opening may include a second bottom side facing the first bottom side and a second right side extending from one end of the second bottom side and facing the first right side. Furthermore, the cross-section of the opening may include a second left side extending from the other end of the second bottom side and facing the first left side.

[0011] The inner angle between the first bottom side and the first right side may be a right angle or an obtuse angle.In addition, the inner angle between the second bottom side and the second right side may correspond to the inner angle between the first bottom side and the first right side.

[0012] The inner angle between the first bottom side and the first left side may be a right angle or an obtuse angle.In addition, the inner angle between the second bottom side and the second left side may correspond to the inner angle between the first bottom side and the first left side.

[0013] The first region may include a first sub-region and a second sub-region positioned adjacent to each other, wherein the second region is disposed between the first sub-region and the second sub-region. The first substrate may include a first electrode, the first electrode may include a first sub-electrode disposed only in the first sub-region and a second sub-electrode disposed only in the second sub-region. The first substrate may further include an organic emission layer, the organic emission layer covering the first sub-electrode and the second sub-electrode, and being disposed on the second sub-region, the second region, and the first sub-region and extending over the second sub-region, the second region, and the first sub-region. The first substrate may further include a second electrode, the second electrode covering the organic emission layer, and being disposed on the second sub-region, the second region, and the first sub-region and extending over the second sub-region, the second region, and the first sub-region.

[0014] A portion of the organic emission layer and a portion of the second electrode may remain inside the opening.

[0015] The opening may penetrate the insulating layer, and a portion of the organic emission layer and a portion of the second electrode may remain inside the opening.

[0016] The opening may penetrate the insulating layer, and the organic emission layer and the second electrode may be removed from the inside of the opening and the first substrate may be exposed.

[0017] The transparent spacer may be in direct contact with the first substrate inside the opening.

[0018] The display panel may include pixels disposed in the first region, and a transparent spacer may be located between each pair of pixels adjacent to each other.

[0019] The display panel may include pixels disposed in a first region, and the transparent spacer may be selectively located between adjacent pixels only in a predetermined region.

[0020] The display panel may include pixels disposed in the first region, and the transparent spacer may be located between a plurality of pairs of pixels adjacent to each other and integrally extend between the plurality of pairs of pixels.

[0021] The transparent spacer may include frit powder.

[0022] The transparent display device may further include a dam on edges of the first substrate and the second substrate, and the dam may include frit powder.

[0023] According to another aspect of the present disclosure, a transparent display device includes: a display panel, the display panel including an emission area and a transmission area, wherein the display panel includes a transistor array substrate and a color filter substrate facing each other, wherein the transistor array substrate includes an insulating layer having an opening, and the opening is formed by removing at least a portion of the insulating layer in the transmission area, wherein the color filter substrate includes a transparent spacer located in the transmission area and accommodated in the opening, and wherein a shape of the transparent spacer corresponds to a shape of the opening.

[0024] According to the present disclosure, the transmissive region is disposed outside the emissive region, thereby providing a transparent display device.

[0025] According to the present disclosure, the combination of the transparent spacer and the opening makes it possible to minimize misalignment problems that may occur when the first substrate and the second substrate are bonded to each other.

[0026] According to the present disclosure, a transparent spacer can stably maintain the cell gap between the first and second substrates. Therefore, a filler layer for maintaining the cell gap between the first and second substrates can be omitted. Consequently, device degradation caused by outgassing that may occur when forming the filler layer can be suppressed.

[0027] According to the present disclosure, the transparent spacer can suppress sagging of the second substrate in a processing environment and / or a use environment, thereby suppressing degradation of optical properties caused by shape deformation of the second substrate.

[0028] According to the present disclosure, a transparent spacer having a predetermined transmittance is provided in the transmission area, and therefore, there is no need to allocate a separate space for forming the spacer. Therefore, the transmission area can be ensured and the degree of freedom of design can also be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood through the following detailed description taken in conjunction with the accompanying drawings, in which:

[0030] Figure 1 is a schematic block diagram of a transparent display device;

[0031] Figure 2 schematically illustrates a circuit configuration of a sub-pixel;

[0032] Figure 3 An example of a detailed circuit configuration of a sub-pixel is shown;

[0033] Figure 4 is a cross-sectional view schematically showing a display device according to a comparative embodiment;

[0034] Figure 5 shows a process of forming a display device according to a comparative embodiment in a chronological manner;

[0035] Figure 6 Schematically illustrates a portion of a display panel according to a first embodiment of the present disclosure;

[0036] Figure 7 According to the first embodiment Figure 6 A cross-sectional view taken along line II';

[0037] Figure 8A 、 Figure 8B 、 Figure 8C 、 Figure 9A and Figure 9B Examples of shapes showing transparent spacers and openings;

[0038] Figure 10A and Figure 10B shows examples of locations where transparent spacers and openings are formed;

[0039] Figure 11 is a cross-sectional view schematically showing a structural example of a transistor and an organic light emitting diode on a first substrate; and

[0040] Figure 12 is a cross-sectional view schematically showing a display panel according to a second embodiment of the present disclosure. DETAILED DESCRIPTION

[0041] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. Throughout the specification, the same reference numerals represent substantially the same elements. In addition, in the following description, detailed descriptions of known technologies or configurations related to the present disclosure may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. In the following embodiments, the same components are described in the first embodiment, and the descriptions of such components may be omitted in other embodiments.

[0042] The terms "first", "second", etc. may be used to describe various components, but these components are not limited by such terms. These terms are only used to distinguish one component from other components.

[0043] Figure 1 is a schematic block diagram of a transparent display device. Figure 2 The circuit configuration of a sub-pixel is schematically shown. Figure 3 An example of a detailed circuit configuration of a sub-pixel is shown.

[0044] like Figure 1 As shown in , the transparent display device includes an image processor 110 , a timing controller 120 , a data driver 130 , a scan driver 140 , and a display panel 150 .

[0045] The image processor 110 outputs a data enable signal DE along with a data signal DATA provided from the outside. In addition to the data enable signal DE, the image processor 110 may also output at least one of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal, but illustration of these signals will be omitted for ease of explanation.

[0046] The timing controller 120 receives a data signal DATA along with driving signals including a data enable signal DE or a vertical synchronization signal, a horizontal synchronization signal, and a clock signal from the image processor 110. Based on the driving signals, the timing controller 120 outputs a gate timing control signal GDC for controlling the operation timing of the scan driver 140 and a data timing control signal DDC for controlling the operation timing of the data driver 130.

[0047] In response to the data timing control signal DDC provided by the timing controller 120, the data driver 130 samples and latches the data signal DATA provided by the timing controller 120. The data driver 130 then converts the signal into a gamma reference voltage and outputs the signal. The data driver 130 outputs the data signal DATA through the data lines DL1 to DLn. The data driver 130 may be configured in the form of an integrated circuit (IC).

[0048] The scan driver 140 outputs a scan signal in response to a gate timing control signal GDC provided from the timing controller 120. The scan driver 140 outputs the scan signal through the gate lines GL1 to GLm. The scan driver 140 may be configured in the form of an integrated circuit (IC) or may be provided on the display panel 150 in a gate-in-panel (GIP) scheme.

[0049] The display panel 150 displays an image in response to a data signal DATA and a scan signal respectively supplied from the data driver 130 and the scan driver 140. The display panel 150 includes sub-pixels SP that operate to display an image.

[0050] like Figure 2 As shown in FIG, each sub-pixel SP includes a switching transistor SW, a driving transistor DR, a capacitor Cst, a compensation circuit CC, and an organic light emitting diode OLED.

[0051] In response to a scan signal supplied via the first gate line GL1, the switching transistor SW performs a switching operation to allow a data signal supplied via the data line DL1 to be stored as a data voltage in the capacitor Cst. The drive transistor DR operates in accordance with the data voltage stored in the capacitor Cst to allow a drive current to flow between the power line EVDD (high potential voltage) and the cathode power line EVSS (low potential voltage). The organic light emitting diode OLED operates in accordance with the drive current formed by the drive transistor DR to emit light.

[0052] The compensation circuit CC is a circuit added inside a subpixel to compensate for the threshold voltage of the drive transistor DR. The compensation circuit CC includes at least one transistor. The compensation circuit CC has various configurations depending on the external compensation method. An example of this will be described below.

[0053] like Figure 3 As shown in FIG, the compensation circuit CC includes a sensing transistor ST and a sensing line VREF (or a reference line). The sensing transistor ST is connected between the source electrode of the drive transistor DR and the anode electrode of the organic light emitting diode OLED (hereinafter referred to as a "sensing node"). The sensing transistor ST operates to provide an initialization voltage (or sensing voltage) received via the sensing line VREF to the sensing node of the drive transistor DR. Otherwise, the sensing transistor ST operates to sense the voltage or current of the sensing node of the drive transistor DR or the voltage or current of the sensing line VREF.

[0054] The switching transistor SW includes a drain electrode connected to the first data line DL1 and a source electrode connected to the gate electrode of the drive transistor DR. The drive transistor DR includes a drain electrode connected to the power line EVDD and a source electrode connected to the anode electrode of the organic light emitting diode OLED. The capacitor Cst includes a first capacitor electrode connected to the gate electrode of the drive transistor DR and a second capacitor electrode connected to the anode electrode of the organic light emitting diode OLED. The organic light emitting diode OLED includes an anode electrode connected to the source electrode of the drive transistor DR and a cathode electrode connected to the second power line EVSS. The sensing transistor ST includes a drain electrode connected to the sensing line VREF and a source electrode connected to the source electrode of the drive transistor DR and the anode electrode of the organic light emitting diode OLED, which serve as a sensing node. In the above description, the transistor is implemented as an n-type transistor, but is not limited to this.

[0055] Depending on the external compensation algorithm (or the configuration of the compensation circuit), the operating time of the sensing transistor ST may be similar / the same as or different from the operating time of the switching transistor SW. For example, the gate electrode of the switching transistor SW may be connected to the first gate line GL1, and the gate electrode of the sensing transistor ST may be connected to the second gate line GL2. In this case, the scan signal Scan is sent to the first gate line GL1, and the sensing signal Sense is sent to the second gate line GL2. In another example, the first gate line GL1 connected to the gate electrode of the switching transistor SW and the second gate line GL2 connected to the gate electrode of the sensing transistor ST may be connected to be shared.

[0056] The sensing line VREF can be connected to a data driver. In this case, the data driver can sense the sensing node of each sub-pixel in real time, during the non-display time of the image or during the Nth frame (N is an integer equal to or greater than 1), and generate a sensing result. At the same time, the switching transistor SW and the sensing transistor ST can be turned on at the same time. In this case, the sensing operation through the sensing line VREF and the data output operation of the output data signal can be separated (differentiated) based on the time division scheme of the data driver.

[0057] Furthermore, the compensation target based on the sensing result can be a digital data signal, an analog data signal, a gamma voltage, etc. Furthermore, a compensation circuit that generates a compensation signal (or compensation voltage) based on the sensing result can be provided within the data driver or within the timing controller. Furthermore, the compensation circuit can be implemented as a separate circuit.

[0058] Figure 3An example of a sub-pixel having a 3T (transistor) 1C (capacitor) structure is shown, which includes a switching transistor SW, a drive transistor DR, a capacitor Cst, an organic light-emitting diode OLED, and a sensing transistor ST. However, if a compensation circuit CC is added, the sub-pixel can be configured to have a 3T2C, 4T2C, 5T1C, or 6T2C structure. Hereinafter, for ease of explanation, an example of a sub-pixel having a 3T1C structure will be described.

[0059] <Comparative Embodiments>

[0060] Figure 4 is a cross-sectional view schematically showing a display device according to a comparative embodiment. Figure 5 A process of forming the display device according to the comparative embodiment is shown in a time-series manner.

[0061] Reference Figure 4 A transparent display device according to a comparative embodiment includes a display panel including a first substrate SUB1 and a second substrate SUB2 facing each other. The first substrate SUB1 and the second substrate SUB2 may be joined to each other using a dam portion DAM. The dam portion DAM may be on edges of the first substrate SUB1 and the second substrate SUB2. The dam portion DAM may function to secure the first substrate SUB1 and the second substrate SUB2 and maintain a predetermined bonding distance between the first substrate SUB1 and the second substrate SUB2. The dam portion DAM may be a sealant, but is not limited thereto.

[0062] The first substrate SUB1 may be a transistor array substrate. The first substrate SUB1 may include sub-pixels, each having an organic light-emitting diode (OLED). Each sub-pixel may also include at least one transistor for driving the organic light-emitting diode (OLED). The organic light-emitting diode (OLED) may include a first electrode E1, a second electrode E2, and an organic emission layer (OL) disposed between the first and second electrodes E1 and E2. The first substrate SUB1 may also include a capping layer (CAL) covering the sub-pixels. The capping layer (CAL) may be formed on the second electrode (E2). The capping layer (CAL) may provide color viewing angle compensation.

[0063] The second substrate SUB2 may be a color filter substrate. The second substrate SUB2 may serve as an encapsulation substrate. A black matrix BM and a color filter CF may be formed on the second substrate SUB2. The black matrix BM may suppress color mixing defects between adjacent sub-pixels. The black matrix BM may be configured to expose the emission region.

[0064] The color filter CF may include red (R), blue (B), and green (G) color filters CF. The red (R), blue (B), and green (G) color filters CF may be assigned to corresponding red (R), blue (B), and green (G) sub-pixels, respectively. The red (R), blue (B), and green (G) color filters CF may be divided by a black matrix BM.

[0065] The filler layer FL is interposed between the first substrate SUB1 and the second substrate SUB2 and includes a plurality of fillers. The filler layer FL may be provided to maintain a cell gap between the first substrate SUB1 and the second substrate SUB2.

[0066] Further references Figure 5 , the display panel can be formed by the following process. The display panel forming process may include first to fifth steps S100, S200, S300, S400 and S500. However, the forming process can also be divided into more steps, and other steps can be added thereto.

[0067] The first step S100 may be a step of preparing a first substrate SUB1 on which transistors T and organic light-emitting diodes OLE have been formed, and a second substrate SUB2 on which a black matrix BM and color filters CF have been formed. The second step S200 may be a step of applying a filler to the second substrate SUB2 and applying a dam material to the edges. The third step S300 may be a step of bonding the first substrate SUB1 and the second substrate SUB2 to each other. The fourth step S400 may be a step of forming a dam DAM by UV curing the dam material. The fifth step S500 may be a step of forming a filler layer FL by thermal curing the filler.

[0068] The display device of the comparative embodiment formed through the above-described process may have the following problems.

[0069] First, misalignment may occur. Specifically, the bonding step in the third step S300 can be performed after the step of aligning the first substrate SUB1 and the second substrate SUB2. In the alignment step, an alignment key or the like can be used. However, in the third step S300, the filler and dam material placed between the first substrate SUB1 and the second substrate SUB2 have not yet been solidified and have mobility. Therefore, during the transfer to the chamber for performing the third step S300 and the fourth step S400, the mobility of the filler and the dam material may cause misalignment. Such misalignment may occur due to process variations during the bonding step using the bonding device in the third step S300.

[0070] If misalignment occurs, the optical properties may deteriorate, which leads to deterioration in the image quality of the transparent display device. In addition, in this case, the sizes of the emission area and the transmission area may vary depending on the position, and therefore, the transparent display device may have difficulty performing its own functions.

[0071] Furthermore, sagging of the second substrate SUB2 may occur. Specifically, in the third step S300, the central portion of the second substrate SUB2 may sag, and as a result, the second substrate SUB2 may deform, which can be a problem, particularly in large-area display devices. In this case, depending on the location, the shape deformation may lead to degradation of optical properties. Furthermore, sagging of the second substrate SUB2 may push foreign matter f remaining between the first substrate SUB1 and the second substrate SUB2 toward the organic light-emitting diode OLE. In this case, the foreign matter f becomes a problem because it may cause a short circuit between the first electrode E1 and the second electrode E2 in the organic light-emitting diode OLE.

[0072] Furthermore, outgassing generated during the formation of the filler layer FL may cause degradation of components. Specifically, a filler may be placed between the first substrate SUB1 and the second substrate SUB2 to maintain a cell gap between the first and second substrates SUB1 and SUB2. In this case, the filler layer is formed by curing the filler, and outgassing generated during this process may cause degradation of components.

[0073] <First embodiment>

[0074] Figure 6 A portion of a display panel according to a first embodiment of the present disclosure is schematically shown. Figure 7 According to the first embodiment Figure 6 A cross-sectional view taken along line II'. Figure 8A 、 Figure 8B 、 Figure 8C 、 Figure 9A and Figure 9B Examples of shapes of transparent spacers and openings are shown.

[0075] Reference Figure 6 The transparent display device according to the present disclosure includes a display panel 150 including pixels P. The pixels P may be arranged in a matrix in a first direction (eg, X-axis direction) and a second direction (eg, Y-axis direction) crossing each other, but may not be limited thereto.

[0076] The display panel 150 may include a first area EA and a second area TA. Each second area TA may be disposed between adjacent first areas EA. For example, the first areas EA and the second areas TA may be sequentially alternately disposed in the first direction as shown in the figure. However, the present disclosure is not limited thereto. The first areas EA and the second areas TA may also be sequentially alternately disposed in the second direction. In addition, the second area TA may also be defined as an area outside the first area EA.

[0077] Each first area EA can be defined as an area that emits light for displaying an input image. The first area EA may correspond to an area where pixels P are provided. Each pixel P includes sub-pixels. The pixel P may include red (R), green (G), blue (B), and white (W) sub-pixels, but may not be limited thereto. Hereinafter, for ease of explanation, an example of a pixel P including red (R), green (G), blue (B), and white (W) sub-pixels will be described. Each sub-pixel may include an organic light emitting diode and a circuit unit electrically connected to the organic light emitting diode. The circuit unit may include at least one transistor and at least one capacitor. The first area EA may be referred to as an emission area.

[0078] The transparent display device according to the preferred embodiment of the present disclosure may be implemented as a top emission type. Therefore, most of the area where the pixels P are provided may be allocated as the first area EA.

[0079] Each second area TA can be defined as an area that transmits external light so that a user can recognize an object on the rear surface of the transparent display device. Alternatively, the second area TA can be defined as an area outside the first area EA where no signal lines are located. However, if the signal lines are formed of a transparent material and have a predetermined degree of transparency, the area where the signal lines are located can also be designated as a second area TA. The second area TA can be referred to as a transmissive area.

[0080] A transparent spacer TS may be located in the second area TA. The transparent spacer TS may be located between adjacent pixels P. For example, the transparent spacer TS may be located between adjacent pixels P in the first direction. As will be described later, the transparent spacer TS may be used for alignment when the first substrate SUB1 and the second substrate SUB2 are bonded to each other and for maintaining a cell gap between the first substrate SUB1 and the second substrate SUB2.

[0081] Reference Figure 7, the display panel 150 includes a first substrate SUB1 and a second substrate SUB2 facing the first substrate SUB1. The display panel 150 may include a first area EA and a second area TA. The first area EA may include a first sub-area (e.g., a 1-1 area EA1-1) and a second sub-area (e.g., a 1-2 area EA1-2) disposed adjacent to each other, wherein the second area TA is disposed between the 1-1 area EA1-1 and the 1-2 area EA1-2. In the 1-1 area EA1-1, the first sub-pixel SP1 included in the first pixel P1 may be positioned. In the 1-2 area EA1-2, the second sub-pixel SP2 included in the second pixel P2 may be positioned.

[0082] The first substrate SUB1 may be a transistor array substrate and may include transistors T1 and T2 and organic light emitting diodes OLE1 and OLE2.

[0083] The first subpixel SP1 includes a first transistor T1 formed on a first substrate SUB1 and a first organic light-emitting diode OLE1 electrically connected to the first transistor T1. The first transistor T1 can have any of various structures, such as a top-gate structure, a bottom-gate structure, and a dual-gate structure. The first organic light-emitting diode OLE1 includes a first sub-electrode of the first electrode (e.g., the 1-1 electrode E1-1), a second electrode E2, and an organic emission layer OL disposed between the 1-1 electrode E1-1 and the second electrode E2.

[0084] The second sub-pixel SP2 includes a second transistor T2 formed on the first substrate SUB1 and a second organic light emitting diode OLE2 electrically connected to the second transistor T2. The second transistor T2 may have the same structure as the first transistor T1. The second organic light emitting diode OLE2 includes a second sub-electrode of the first electrode (e.g., the 1-2 electrode E1-2), a second electrode E2, and an organic emission layer OL disposed between the 1-2 electrode E1-2 and the second electrode E2.

[0085] The organic emission layer OL and the second electrode E2 may be widely formed to cover a plurality of pixels P. For example, a first subpixel SP1 of a first pixel P1 and a second subpixel SP2 of a second pixel P2 may share the organic emission layer OL and the second electrode E2.

[0086] More specifically, the first transistor T1 and the second transistor T2 may be located on the first substrate SUB 1. The first transistor T1 may be located in the 1-1 area EA1-1, and the second transistor T2 may be located in the 1-2 area EA1-2.

[0087] A passivation layer PAS may be positioned on the first and second transistors T1 and T2. The passivation layer PAS protects the first and second transistors T1 and T2 and may be a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or a multilayer thereof.

[0088] The planarization layer OC is located on the passivation layer PAS. The planarization layer OC reduces a step of an underlying structure and may be formed of an organic material such as photo acryl, polyimide, benzocyclobutene series resin, and acrylate series resin.

[0089] The first organic light emitting diode OLE1 and the second organic light emitting diode OLE2 may be located on the planarization layer OC. More specifically, the 1-1 electrode E1-1 and the 1-2 electrode E1-2 may be located on the planarization layer OC. The 1-1 electrode E1-1 may be located in the 1-1 region EA1-1, and the 1-2 electrode E1-2 may be located in the 1-2 region EA1-2.

[0090] Each of the 1-1 electrode E1-1 and the 1-2 electrode E1-2 may include a reflective layer and function as a reflective electrode. The reflective layer may be formed of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), or an alloy thereof, or may be formed of APC (silver / palladium / copper alloy). Each of the 1-1 electrode E1-1 and the 1-2 electrode E1-2 may be formed of a multilayer including a reflective layer.

[0091] The 1-1 electrode E1-1 may be electrically connected to the first transistor T1 through a first pixel contact hole PH1 penetrating the passivation layer PAS and the planarization layer OC. The 1-2 electrode E1-2 may be electrically connected to the second transistor T2 through a second pixel contact hole PH2 penetrating the passivation layer PAS and the planarization layer OC.

[0092] The bank layer BN is located on the first substrate SUB1, on which the 1-1 electrode E1-1 and the 1-2 electrode E1-2 are formed. The bank layer BN includes an opening through which the majority of the 1-1 electrode E1-1 and the 1-2 electrode E1-2 are exposed. The bank layer BN can be formed from an organic material such as polyimide, a benzocyclobutene resin, and an acrylate. The bank layer BN can be provided to expose the central portions of the 1-1 electrode E1-1 and the 1-2 electrode E1-2 and to cover the side ends of the 1-1 electrode E1-1 and the 1-2 electrode E1-2.

[0093] To ensure a predetermined transmittance of the second area TA, at least some of the insulating layers formed in the second area TA may be removed. For example, as shown in the figure, the planarization layer OC and the bank layer BN may be removed from at least a portion of the second area TA. Although not shown in the figures, at least one of the buffer layer, the interlayer insulating layer IN, and the passivation layer PAS may be removed from at least a portion of the second area TA. However, it should be noted that the insulating layers may be removed under conditions that can suppress short circuits of electrodes and / or signal lines disposed in the second area TA. The holes OH prepared by removing the insulating layers in the second area TA may be referred to as open holes OH.

[0094] The organic emission layer OL is located on the 1-1 electrode E1-1 and the 1-2 electrode E1-2 exposed by the bank layer BN. The organic emission layer OL can be extensively formed on the entire surface of the first substrate SUB1. For example, the organic emission layer OL can extend and form a single body over the 1-1 region EA1-1, the second region TA, and the 1-2 region EA1-2.

[0095] The organic emission layer OL is a layer in which electrons and holes combine to emit light and includes an emission layer EML (not shown). The organic emission layer OL may further include any one or more of a hole injection layer HIL, a hole transport layer HTL, an electron transport layer ETL, and an electron injection layer EIL (not shown). The emission layer EML may be configured to emit white light. In this case, each sub-pixel SP may be combined with a corresponding color filter to realize red (R), green (G), blue (B), or white (W).

[0096] The second electrode E2 is located on the organic emission layer OL. The second electrode E2 can be widely formed on the entire surface of the first substrate SUB1. For example, the second electrode E2 can extend and form a whole on the 1-1 area EA1-1, the second area TA, and the 1-2 area EA1-2. The second electrode E2 can be formed of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO). Alternatively, the second electrode E2 can be formed of a material thin enough to transmit light, such as magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or an alloy thereof.

[0097] The second substrate SUB2 may be a color filter substrate. The second substrate SUB2 may serve as an encapsulation substrate. The second substrate SUB2 may include a black matrix BM and a color filter CF. The black matrix BM may suppress color mixing defects between adjacent sub-pixels. The black matrix BM may be configured to expose the emission region.

[0098] The color filter CF may be disposed in the 1-1 region EA1-1 and the 1-2 region EA1-2. The color filter CF may include a first color filter CF1 disposed in the 1-1 region EA1-1 and a second color filter CF2 disposed in the 1-2 region EA1-2. The order in which the black matrix BM and the color filter CF are laminated on the second substrate SUB2 may be varied. That is, the color filter CF may be formed after the black matrix BM is formed, or the black matrix BM may be formed after the color filter CF is formed. The black matrix BM may suppress color mixing defects between adjacent sub-pixels.

[0099] The color filter CF may include red (R), blue (B), and green (G) color filters CF. The red (R), blue (B), and green (G) color filters CF may be assigned to corresponding red (R), blue (B), and green (G) sub-pixels, respectively. The red (R), blue (B), and green (G) color filters CF may be divided by a black matrix BM.

[0100] Although not shown in the drawings, a color filter CF may be formed on the first substrate SUB1. That is, the color filter CF may be located on the second electrode E2 included in the organic light emitting diode OLE on the first substrate SUB1. In this case, the distance between the color filter CF and the organic emission layer OL can be reduced. Therefore, the viewing angle can be increased, and a sufficient aperture ratio can be ensured.

[0101] A transparent spacer TS may be located on the second substrate SUB2. The transparent spacer TS may be disposed in the second area TA. The transparent spacer TS may be formed of a transparent material having a predetermined transmittance. For example, the transparent spacer TS may be formed of an organic material such as photoacrylic, polyimide, benzocyclobutene resin, or acrylate resin. Since the transparent spacer TS is formed of a transparent material, a decrease in transmittance of the second area TA can be minimized. That is, even if the transparent spacer TS is disposed in the second area TA, sufficient transmittance can be ensured.

[0102] The transparent spacer TS may have a shape that protrudes toward the first substrate SUB1. The transparent spacer TS may be inserted into the inner space within the opening OH. The shape of the transparent spacer TS may correspond to the shape of the opening OH. For example, the transparent spacer TS may have an inverted tapered cross-section, while the opening OH may have a tapered cross-section. As another example, the transparent spacer TS may have a rectangular or square cross-section, and the opening OH may have a corresponding rectangular or square cross-section.

[0103] Reference Figure 8A 、 Figure 8B 、 Figure 8C 、 Figure 9A and Figure 9B, a transparent spacer TS may be formed on the second substrate SUB2. A cross-section of the transparent spacer TS may include a first top side TS1, a first bottom side BS1, a first right side RS1, and a first left side LS1 that determine an outward form. The first top side TS1 may be fixed to the second substrate SUB2. The first top side TS1 may be in direct contact with the second substrate SUB2. The first bottom side BS1 may face the first top side TS1. The first right side RS1 may connect one side of the first bottom side BS1 and one side of the first top side TS1. The first left side LS1 may connect the other side of the first bottom side BS1 and the other side of the first top side TS1.

[0104] The cross-section of the opening OH may include a second bottom side BS2 and a second right side RS2 extending from one side of the second bottom side BS2 toward the second substrate SUB2. Furthermore, the cross-section of the opening OH may include a second left side LS2 extending from the other side of the second bottom side BS2 toward the second substrate SUB2. The transparent spacer TS may be drawn into the internal space IS formed by the second bottom side BS2, the second right side RS2, and the second left side LS2.

[0105] The first bottom side BS1 and the second bottom side BS2 may face each other. The first bottom side BS1 may be in direct contact with the second bottom side BS2. The first right side RS1 and the second right side RS2 may face each other. The first right side RS1 may be in direct contact with the second right side RS2. The first left side LS1 and the second left side LS2 may face each other. The first left side LS1 may be in direct contact with the second left side LS2.

[0106] The interior angle θ2 between the first bottom side BS1 and the first right side RS1 can be a right angle or an obtuse angle. Correspondingly, the interior angle θ2′ between the second bottom side BS2 and the second right side RS2 can be a right angle or an obtuse angle. The interior angle θ1 between the first bottom side BS1 and the first left side LS1 can be a right angle or an obtuse angle. Correspondingly, the interior angle θ1′ between the second bottom side BS2 and the second left side LS2 can be a right angle or an obtuse angle.

[0107] The openings OH may be formed by patterning the insulating layer IN on the first substrate. Figure 8A As shown in FIG, the opening OH may be formed by removing a portion of the insulating layer IN from the second area TA. For example, the bank layer BN ( Figure 7 ) and planarization layer OC( Figure 7 ) is patterned to prepare the opening OH. A portion of the organic emission layer OL and a portion of the second electrode E2 may remain inside the opening OH. In this case, the first substrate SUB1, a portion of the insulating layer IN, the organic emission layer OL, and the second electrode E2 may be sequentially located in the second area TA.

[0108] like Figure 8B As shown in , the opening OH can be formed by completely removing the insulating layer IN from the second area TA. For example, the opening OH can be prepared by patterning the entire insulating layer IN located in the second area TA. A portion of the organic emission layer OL and a portion of the second electrode E2 can remain inside the opening OH. In this case, the first substrate SUB1, the organic emission layer OL, and the second electrode E2 can be sequentially located in the second area TA.

[0109] like Figure 8C As shown in , the opening OH can be formed by completely removing the insulating layer IN from the second area TA. For example, the opening OH can be prepared by patterning the entire insulating layer IN located in the second area TA, and the opening OH can expose the first substrate SUB1. Figure 8B Unlike the structure shown in FIG, the organic emission layer OL and the second electrode E2 located in the second area TA can be removed from the inside of the opening OH. In this case, the transparent spacer TS can be in direct contact with the first substrate SUB1 in the second area TA. In this article, the transparent spacer TS can include low-melting-point glass, such as glass frit powder, and can therefore be fixed to the first substrate SUB1 by fusion bonding.

[0110] Herein, the organic emission layer OL is formed and connected as a whole in the entire region except the opening OH, and thus can maintain continuity. In addition, the second electrode E2 is formed and connected as a whole in the entire region except the opening OH, and thus can maintain continuity.

[0111] The transparent spacer TS is drawn into the opening OH so that its movement can be restricted or constrained within a predetermined range. That is, the transparent spacer TS is fixed to the second substrate SUB2, and the insulating layer IN including the opening OH is fixed to the first substrate SUB1. Therefore, due to the combination of the transparent spacer TS and the opening OH, the movement of the second substrate SUB2 can be restricted by the first substrate SUB1, and vice versa.

[0112] The transparent spacer TS and the opening OH can be used for alignment when the first and second substrates SUB1 and SUB2 are bonded together. Specifically, when the first and second substrates SUB1 and SUB2 are bonded together, the transparent spacer TS formed on the second substrate SUB2 and the opening OH formed in the first substrate SUB1 can guide the bonding position. In the transparent display device according to the first embodiment of the present disclosure, the transparent spacer TS and the opening OH are formed. Therefore, misalignment that occurs when the first and second substrates SUB1 and SUB2 are bonded together can be effectively suppressed.

[0113] Furthermore, the transparent spacer TS can help maintain a stable cell gap between the first and second substrates SUB1 and SUB2. Therefore, in a preferred embodiment of the present disclosure, a filler layer between the first and second substrates SUB1 and SUB2 can be omitted. This can suppress device degradation caused by outgassing that may occur when forming the filler layer.

[0114] Furthermore, the transparent spacer TS can suppress sagging of the second substrate SUB2. Therefore, in the exemplary embodiment of the present disclosure, degradation of optical properties caused by deformation of the second substrate SUB2 can be suppressed. Furthermore, a short circuit between the first electrode E1 and the second electrode E2 in the organic light emitting diode OLE, which may occur when foreign matter remaining in the second substrate SUB2 moves due to deformation of the second substrate SUB2, can be suppressed.

[0115] Figure 10A and Figure 10B Examples of positions where transparent spacers and openings are formed are shown.

[0116] In an embodiment, Figure 6 As shown in , each transparent spacer TS may be disposed between two adjacent pixels P. For example, a plurality of transparent spacers TS may be disposed in the second direction in the second area TA. Herein, each of the plurality of transparent spacers TS may be disposed between pairs of pixels P adjacent to each other in the first direction.

[0117] In another embodiment, Figure 10A As shown in , each transparent spacer TS can be selectively disposed between two adjacent pixels P. For example, the transparent spacer TS can be disposed in the second area TA in the second direction. Herein, each of the plurality of transparent spacers TS can be selectively disposed only in a predetermined area between pairs of pixels P adjacent to each other in the first direction.

[0118] In another embodiment, Figure 10B As shown in , each transparent spacer TS may be disposed between two adjacent pixels P. For example, each transparent spacer TS may extend in the second direction in the second area TA. In this document, each transparent spacer TS may be located between multiple pairs of pixels P adjacent to each other in the first direction and extend between the multiple pairs of pixels P.

[0119] Figure 11 is a cross-sectional view schematically showing a structural example of a transistor and an organic light emitting diode on a first substrate.

[0120] A light shielding layer LS is located on the first substrate SUB1. This layer blocks externally incident light and suppresses the generation of photoelectric current in the transistor. A buffer layer BUF is located on this layer. This layer protects the thin film transistors to be formed in subsequent processes from impurities, such as alkali ions, that flow from the light shielding layer LS. This layer BUF can be silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof.

[0121] The semiconductor layer A of the drive transistor DR is located on the buffer layer BUF, and the capacitor lower electrode LCst is positioned separately from the semiconductor layer A. The semiconductor layer A and the capacitor lower electrode LCst can be formed of a silicon semiconductor or an oxide semiconductor. The silicon semiconductor can include amorphous silicon or crystallized polysilicon. The semiconductor layer A includes a drain region and a source region, each containing p-type or n-type impurities, and also includes a channel between the drain region and the source region. The capacitor lower electrode LCst can also be doped with impurities and become conductive.

[0122] The gate insulating layer GI may be located on the semiconductor layer A and the capacitor lower electrode LCst. The gate insulating layer GI may be silicon oxide (SiOx), silicon nitride (SiNx) or a multilayer thereof. At a specific region of the gate insulating layer GI on the semiconductor layer A, that is, at a position corresponding to the channel when impurities are injected, a gate electrode G is positioned. The gate electrode G is formed by any one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or an alloy thereof. In addition, the gate electrode G may be a multilayer formed by any one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or an alloy thereof. For example, the gate electrode G may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.

[0123] An interlayer insulating layer ILD that insulates the gate electrode G is located on the gate electrode G. The interlayer insulating layer ILD may be silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof. The source electrode S and the drain electrode D are located on the interlayer insulating layer ILD. The source electrode S and the drain electrode D are connected to the semiconductor layer A through contact holes, and the source region of the semiconductor layer A is exposed through the contact holes. Each of the source electrode S and the drain electrode D may be formed as a single layer or multiple layers. If each of the source electrode S and the drain electrode D is formed as a single layer, it may be formed from any one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. If each of the source electrode S and the drain electrode D is formed as a multilayer, it may be formed as a double layer of molybdenum / aluminum-neodymium or a triple layer of titanium / aluminum / titanium, molybdenum / aluminum / molybdenum, or molybdenum / aluminum-neodymium / molybdenum. Therefore, the driving transistor DR is configured to include a semiconductor layer A, a gate electrode G, a source electrode S, and a drain electrode D. In addition, the capacitor Cst is configured to include a capacitor lower electrode LCst and a source electrode S serving as a capacitor upper electrode.

[0124] A passivation layer PAS is located on the first substrate SUB1 including the driving transistor DR and the capacitor Cst. A planarization layer OC is located on the passivation layer PAS. A pixel contact hole PH is located in a portion of the planarization layer OC, through which the passivation layer PAS is exposed to expose the source electrode S.

[0125] The organic light-emitting diode (OLED) OLE is located on the planarization layer (OC). The organic light-emitting diode (OLED) OLE includes a first electrode (E1) and a second electrode (E2) facing each other, and an organic emission layer (OL) disposed between the first electrode (E1) and the second electrode (E2). The first electrode (E1) may be an anode, and the second electrode (E2) may be a cathode, but the present invention is not limited thereto. The first electrode (E1) may be connected to the source electrode (S) via a pixel contact hole (PH).

[0126] <Second embodiment>

[0127] Figure 12 is a cross-sectional view schematically showing a display panel according to a second embodiment of the present disclosure. In the second embodiment of the present disclosure, detailed descriptions of components identical to or corresponding to those of the above-described first embodiment will be omitted.

[0128] Reference Figure 12A transparent display device according to a second embodiment includes a display panel including a first substrate SUB1 and a second substrate SUB2 facing each other. The display panel may include a first area EA and a second area TA. The first substrate SUB1 and the second substrate SUB2 may be joined to each other using a dam portion DAM. The dam portion DAM may be provided on edges of the first substrate SUB1 and the second substrate SUB2. In other words, the dam portion DAM may be provided along the edges of the first substrate SUB1 and the second substrate SUB2.

[0129] The first substrate SUB1 may be a transistor array substrate. The first substrate SUB1 may include sub-pixels each having a transistor and an organic light emitting diode. In each second area TA, an opening OH may be prepared between adjacent sub-pixels by patterning the insulating layer.

[0130] The second substrate SUB2 may be a color filter substrate. The second substrate SUB2 may be used as an encapsulation substrate. The second substrate SUB2 may include a transparent spacer TS. The transparent spacer TS may be drawn into the opening OH.

[0131] The transparent spacer TS may include low-melting-point glass, such as glass frit powder. The transparent spacer TS may also include an adhesive for fixing the glass frit powder to the second substrate SUB2. The transparent spacer TS may be bonded to the second substrate SUB2 by laser melting bonding.

[0132] The opening OH can be formed to expose the first substrate SUB1 in a predetermined area. In this case, the transparent spacer TS can be in direct contact with the first substrate SUB1. That is, the bottom surface of the transparent spacer TS can be in direct contact with the top surface of the first substrate SUB1. The transparent spacer TS can also be bonded to the first substrate SUB1 by laser fusion bonding. In this way, if the first substrate SUB1 and the second substrate SUB2 are fusion-bonded to each other using glass frit powder, the penetration of moisture and oxygen from the outside can be suppressed. This is because the glass frit powder has pores smaller than water molecules and oxygen molecules, and the glass frit powder is the same type of medium as the first substrate SUB1 and the second substrate SUB2. Therefore, the transparent spacer TS can limit or delay the movement of moisture and oxygen between adjacent pixels. In a preferred embodiment of the present disclosure, glass frit sealing (frit sealing) can be used, using an infrared laser to locally melt the glass frit powder at high temperature and fusion-bond the first substrate SUB1 and the second substrate SUB2. To this end, a glass material can be selected for the first substrate SUB1 and the second substrate SUB2.

[0133] The dam portion DAM may include glass frit powder and an adhesive for securing the glass frit powder to the first and second substrates SUB1 and SUB2. The transparent spacer TS may be bonded to the first and second substrates SUB1 and SUB2 by laser fusion bonding. The fusion-bonded glass frit powder has lower moisture permeability and lower air permeability than UV-curable resins, and thus can effectively block external moisture and oxygen.

[0134] Those skilled in the art will appreciate that various changes and modifications may be applicable without departing from the technical concept of the present disclosure. Therefore, the technical scope of the present disclosure is not limited to the detailed description of the specification, but should be defined by the appended claims.

Claims

1. A transparent display device, comprising: A display panel including a first region as an emissive region and a second region as a transmissive region, The display panel includes a first substrate and a second substrate facing each other. The first substrate includes an insulating layer having a plurality of openings, each opening being formed by removing at least a portion of the thickness of the insulating layer in the second region. The second substrate includes a color filter and a black matrix located in the first region and a plurality of transparent spacers located in the second region and drawn into the plurality of openings, respectively; and The plurality of transparent spacers are spaced apart from each other, and each of the spaced apart transparent spacers includes a portion disposed between the first substrate and the second substrate, and Each of the spaced-apart transparent spacers is located in the second region to be disposed between the color filters.

2. The transparent display device according to claim 1, wherein: The transparent spacer has a cross-section including: a first top side in contact with the second substrate; a first bottom side facing the first top side; a first right side connecting one side of the first top side and one side of the first bottom side; as well as a first left side connecting the other side of the first top side and the other side of the first bottom side, and The opening has a cross-section including: a second bottom side facing the first bottom side; a second right side extending from one end of the second bottom side and facing the first right side; and A second left side extends from the other end of the second bottom side and faces the first left side.

3. The transparent display device according to claim 2, wherein: The inner angle between the first bottom side and the first right side is a right angle or an obtuse angle, and An inner angle between the second bottom side and the second right side corresponds to an inner angle between the first bottom side and the first right side.

4. The transparent display device according to claim 2, wherein: The interior angle between the first bottom side and the first left side is a right angle or an obtuse angle, and An inner angle between the second bottom side and the second left side corresponds to an inner angle between the first bottom side and the first left side.

5. The transparent display device according to claim 1, wherein: The first region includes a first sub-region and a second sub-region positioned adjacent to each other, wherein the second region is interposed between the first sub-region and the second sub-region, and the first substrate includes: a first electrode, the first electrode including a first sub-electrode disposed only in the first sub-region and a second sub-electrode disposed only in the second sub-region; an organic emission layer, the organic emission layer covering the first sub-electrode and the second sub-electrode, and the organic emission layer is disposed on the second sub-region, the second region, and the first sub-region and extends over the second sub-region, the second region, and the first sub-region; and A second electrode covers the organic emission layer and is disposed on the second sub-region, the second region, and the first sub-region and extends over the second sub-region, the second region, and the first sub-region.

6. The transparent display device according to claim 5, wherein: A portion of the organic emission layer and a portion of the second electrode are disposed inside the opening.

7. The transparent display device according to claim 5, wherein: The opening penetrates the insulating layer, and a portion of the organic emission layer and a portion of the second electrode remain inside the opening.

8. The transparent display device according to claim 1, wherein: The first region includes a first sub-region and a second sub-region positioned adjacent to each other, wherein the second region is interposed between the first sub-region and the second sub-region, and the first substrate includes: a first electrode, the first electrode including a first sub-electrode disposed only in the first sub-region and a second sub-electrode disposed only in the second sub-region; an organic emission layer, the organic emission layer covering the first sub-electrode and the second sub-electrode, and the organic emission layer is disposed on the second sub-region and the first sub-region and extends over the second sub-region and the first sub-region; and a second electrode, the second electrode covering the organic emission layer, and the second electrode is disposed on the second sub-region and the first sub-region and extends on the second sub-region and the first sub-region, and The opening penetrates the insulating layer, and the organic emission layer and the second electrode are removed from the inside of the opening and the first substrate is exposed.

9. The transparent display device according to claim 8, wherein: The transparent spacer is in direct contact with the first substrate inside the opening.

10. The transparent display device according to claim 1, wherein: The display panel includes pixels disposed in the first area, and the transparent spacer is located between each pair of pixels adjacent to each other.

11. The transparent display device according to claim 1, wherein: The display panel includes pixels disposed in the first area, and the transparent spacer is selectively located between pixels adjacent to each other only in a predetermined area.

12. The transparent display device according to claim 1, wherein: The display panel includes pixels arranged in the first area, and The transparent spacer is located between a plurality of pairs of pixels adjacent to each other and integrally extends between the plurality of pairs of pixels.

13. The transparent display device according to claim 1, wherein: The transparent spacer includes glass frit powder.

14. The transparent display device according to claim 1, further comprising: Weir portions located on edges of the first substrate and the second substrate, The dam portion includes glass frit powder.

15. The transparent display device according to claim 14, wherein: The dam portion further includes an adhesive for fixing the glass frit powder to the first substrate and the second substrate.

16. A transparent display device, comprising: A display panel comprising an emission area and a transmission area, The display panel includes a transistor array substrate and a color filter substrate facing each other. The transistor array substrate includes an insulating layer having a plurality of openings, each opening being formed by removing at least a portion of the insulating layer in the transmission region. The color filter substrate includes a color filter and a black matrix located in the emission area, and a plurality of transparent spacers located in the transmission area and respectively accommodated in the plurality of openings. Wherein, the shape of the transparent spacer corresponds to the shape of the opening, and wherein the plurality of transparent spacers are spaced apart from each other, and each of the spaced apart transparent spacers includes a portion disposed between the transistor array substrate and the color filter substrate, and Each of the spaced-apart transparent spacers is located in the transmissive region to be disposed between the color filters.

17. The transparent display device according to claim 16, wherein: The transparent spacer has a shape protruding toward the transistor array substrate, and at least a portion of the transparent spacer is inserted into an inner space inside the opening.

18. The transparent display device according to claim 16, wherein: The transparent spacer is in contact with the transistor array substrate inside the opening.

19. The transparent display device according to claim 16, wherein: The transparent spacer has a cross-section including: a first top side in contact with the color filter substrate; a first bottom side facing the first top side; a first right side connecting one side of the first top side and one side of the first bottom side; as well as a first left side connecting the other side of the first top side and the other side of the first bottom side, and The opening has a cross-section including: a second bottom side facing the first bottom side; a second right side extending from one end of the second bottom side and facing the first right side; and A second left side extends from the other end of the second bottom side and faces the first left side.

20. The transparent display device according to claim 19, wherein: an inner angle between the second bottom side and the second right side corresponds to an inner angle between the first bottom side and the first right side, and An inner angle between the second bottom side and the second left side corresponds to an inner angle between the first bottom side and the first left side.

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