Amplifier and method for controlling the same

Abstract

The present invention discloses an amplifier and a method for controlling the amplifier, wherein the amplifier comprises: a digital-to-analog conversion circuit for performing digital-to-analog conversion on a digital input signal to generate an analog input signal; an analog signal processing circuit coupled to the digital-to-analog conversion circuit for generating a first processing signal according to the analog input signal and a feedback signal; a digital signal processing circuit for processing the digital input signal to generate a second processing signal; a signal detector for detecting the strength of the digital input signal to generate a mode selection signal; and a driving stage coupled to the analog signal processing circuit, wherein the digital signal processing circuit and the signal detector are used to receive one of the first processing signal and the second processing signal with reference to the mode selection signal to generate an output signal, wherein the feedback signal is generated according to the output signal. The implementation of the embodiments of the present invention can make the amplifier always have sufficient power efficiency.

Description

Technical Field

[0001] The present disclosure relates generally to the field of amplifier technology, and more particularly, to an amplifier and a method for controlling an amplifier. Background Art

[0002] Class D amplifiers are usually applied to audio systems to generate output audio signals to drive speakers. Class D amplifiers usually have a closed-loop design, that is, the output signal also serves as a feedback signal for the loop filter input into the Class D amplifier. Class D amplifiers with a closed-loop design have the following advantages: excellent Power Supply Rejection Ratio (PSRR) and left / right channel crosstalk, better pulse-width modulation (PWM) clock jitter immunity, larger dead-time and lower gate driver slew rate, and superior Total Harmonic Distortion (THD), but Class D amplifiers with a closed-loop design have disadvantages such as large quiescent current.

[0003] In addition, due to the static power of the analog circuit module, the efficiency of the closed-loop Class D amplifier is seriously reduced at small input / output power. For example, when the output power of the Class D amplifier is 2.0 milliwatts (mW), the efficiency can be 90%; when the output power of the Class D amplifier is 0.1mW, the efficiency may drop to 10%. In some applications, such as mobile phones, users can turn on the speaker or use headphones or headsets to listen to music. For users who use speakers with higher output power, the closed-loop Class D amplifier may work well, but if the output power is small, the efficiency may be reduced. Summary of the invention

[0004] The present invention therefore provides an amplifier and a method for controlling the amplifier to solve the above problems.

[0005] The amplifier provided by the present invention includes: a digital-to-analog conversion circuit (DAC) for performing digital-to-analog conversion on a digital input signal to generate an analog input signal; an analog signal processing circuit coupled to the DAC and used to generate a first processing signal based on the analog input signal and a feedback signal; a digital signal processing circuit for processing the digital input signal to generate a second processing signal; a signal detector for detecting the strength of the digital input signal to generate a mode selection signal; and a driving stage coupled to the analog signal processing circuit, the digital signal processing circuit and the signal detector for receiving one of the first processing signal and the second processing signal with reference to the mode selection signal to generate an output signal, wherein the feedback signal is generated based on the output signal.

[0006] The method for controlling an amplifier provided by the present invention comprises the following steps: detecting the strength of a digital input signal to generate a mode selection signal indicating a closed-loop mode or an open-loop mode; when the mode selection signal indicates the closed-loop mode: performing a digital-to-analog conversion operation on the digital input signal to generate an analog input signal; starting an analog signal processing circuit to receive the analog input signal and a feedback signal to generate a first processing signal; and using a driver stage to receive the first processing signal to generate an output signal, wherein the feedback signal is generated based on the output signal; and when the mode selection signal indicates the open-loop mode: starting a digital signal processing circuit to receive the digital input signal to generate a second processing signal; and using the driver stage to receive the second processing signal to generate the output signal.

[0007] The implementation of the technical solution of the present invention can ensure that the amplifier always has sufficient power efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a diagram showing an amplifier 100 according to one embodiment of the present invention.

[0009] Figure 2 is a diagram showing a detailed structure of the amplifier 100 according to one embodiment of the present invention.

[0010] Figure 3 is a diagram showing an amplifier 300 according to one embodiment of the present invention.

[0011] Figure 4 is a diagram showing a detailed structure of the amplifier 300 according to one embodiment of the present invention.

[0012] Figure 5 is a flow chart of a method for controlling an amplifier according to one embodiment of the present invention. DETAILED DESCRIPTION

[0013] Certain words are used in the specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use differences in names as a way to distinguish components, but use differences in the functions of components as the criteria for distinction. "Including" and "including" mentioned throughout the specification and claims are open-ended terms, so they should be interpreted as "including but not limited to". "Substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and basically achieve the technical effect. In addition, the term "coupled" includes any direct and indirect electrical connection means. Therefore, if the text describes a first device coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. The following is a preferred way to implement the present invention, the purpose of which is to illustrate the spirit of the present invention rather than to limit the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the definition of the attached claims.

[0014] The following description is the best embodiment of the present invention. These descriptions are used to illustrate the general principles of the present invention and should not be used to limit the present invention. The scope of protection of the present invention should be determined based on the claims of the present invention.

[0015] Figure 1 1 is a diagram showing an amplifier 100 according to an embodiment of the present invention. Figure 1 As shown, the amplifier 100 includes a digital-to-analog conversion circuit (DAC) 110, an analog signal processing circuit 120, a digital signal processing circuit 130, a signal detector 140, a driver stage 150, and a feedback circuit (in this embodiment, a resistor R is used as a feedback circuit). In this embodiment, the amplifier 100 may be a class D amplifier built into an electronic device capable of providing an audio output, and the amplifier 100 may be configured to receive a digital input signal (audio signal) Din to generate an output signal Vout to drive a speaker or earphone or headphone.

[0016] In the operation of the amplifier 100, the DAC 110 receives the digital input signal Din and performs a digital-to-analog conversion operation on the digital input signal Din to generate an analog input signal Vin, and the analog signal processing circuit 120 processes the analog input signal Vin and the feedback signal VFB to generate a first processed signal V1 to the driver stage 150. The digital signal processing circuit 130 receives the digital input signal Din and processes the digital input signal Din to generate a second processed signal V2. In addition, the signal detector 140 detects the strength of the digital input signal Din to generate a mode selection signal Vs, wherein the mode selection signal Vs is used to indicate a closed-loop mode or an open-loop mode of the amplifier 100. In this embodiment, since the digital input signal Din is an audio signal, the signal detector 140 can obtain the volume of the audio signal from the digital data to be used as the strength of the digital input signal Din. In addition, when the signal detector 140 detects that the digital input signal Din has a larger strength (for example, the strength is greater than the threshold), the mode selection signal Vs indicates a closed-loop mode; when the signal detector 140 detects that the digital input signal Din has a smaller strength (for example, the strength is less than the threshold), the mode selection signal Vs indicates an open-loop mode.

[0017] Then, the driver stage 150 selects one of the first processing signal V1 and the second processing signal V2 with reference to the mode selection signal Vs to generate the output signal Vout. In this embodiment, when the mode selection signal Vs indicates the closed-loop mode, the DAC110 and the analog signal processing circuit 120 are enabled, so that the analog signal processing circuit 120 generates the first processing signal V1, and the driver stage 150 receives the first processing signal V1 to generate the output signal Vout. At the same time, the digital signal processing circuit 130 can be turned off to reduce power consumption. When the mode selection signal Vs indicates the open-loop mode, the digital signal processing circuit 130 is enabled to generate the second processing signal V2, and the driver stage 150 receives the second processing signal V2 to generate the output signal Vout. At the same time, the analog signal processing circuit 120 can be turned off to reduce power consumption.

[0018] In the present embodiment, the analog signal processing circuit 120 has a closed-loop design, that is, the feedback signal VFB generated by the output signal Vout is used to compensate the analog input signal Vin, so when the mode selection signal Vs indicates the closed-loop mode, the performance of the output signal Vout is better and the amplifier 100 has good total harmonic distortion. In addition, when the output signal Vout transmits a large output power, the efficiency of the class D amplifier is good, so the amplifier 100 can work well. When the mode selection signal Vs indicates the open-loop mode, the digital signal processing circuit 130 generates the second processing signal V2 by using the digital input signal Din without using any feedback signal obtained from the output signal Vout, so the quiescent current of the driver stage 150 is small. This means that the amplifier 100 can have better efficiency under smaller output power conditions. Therefore, by controlling the amplifier 100 to operate in a closed-loop mode or an open-loop mode based on the strength of the digital input signal Din (i.e., the power of the output signal Vout), the amplifier 100 can always have good power efficiency at the entire output power level.

[0019] Figure 2 1 is a diagram showing a detailed structure of an amplifier 100 according to an embodiment of the present invention. Figure 2 As shown, the analog signal processing circuit 120 includes a loop filter 222 and a PWM generation circuit including two comparators 224 and 226. The driver stage 150 includes two multiplexers 252 and 254, a gate driver 256 and an output stage including P-type transistors MP1, MP2 and N-type transistors MN1, MN2. The digital signal processing circuit 130 is implemented by a digital PWM generation circuit 230. Note that Figure 2 The amplifier 100 shown has a differential structure, that is, the analog input signal Vin, the first processed signal V1, the second processed signal V2, the feedback signal VFB and the output signal Vout are all differential signals.

[0020] In the operation of the analog signal processing circuit 120, the loop filter 222 may include a plurality of integrators configured to filter the analog input signal Vin to generate a filtered signal, and each of the comparators 224 and 226 compares the filtered signal with the sawtooth signal to generate a PWM signal as the first processing signal V1. In the operation of the digital PWM generation circuit 230, the digital PWM generation circuit 230 may generate digital data using a sigma-delta modulator, and then compare the digital data with triangular reference data using a digital comparator to generate a PWM signal as the second processing signal V2. In the operation of the driving stage 150, each of the multiplexers 252 and 254 refers to the mode selection signal Vs to select one of the first processing signal V1 and the second processing signal V2. The gate driver 256 receives the first processing signal V1 or the second processing signal V2 to drive the output stage to generate the output signal Vout.

[0021] Note that the components within the analog signal processing circuit 120, the digital PWM generation circuit 230, and the driver stage 150 are only for illustration purposes. As long as the analog signal processing circuit 120 and the digital PWM generation circuit 230 can generate a PWM signal for the driver stage 150, and the driver stage 150 can select one of the first processing signal V1 and the second processing signal V2 for generating the output signal Vout with reference to the mode selection signal Vs, the internal circuit design can be determined by an engineer.

[0022] Figure 3 FIG. 3 is a diagram showing an amplifier 300 according to an embodiment of the present invention. Figure 3 As shown, the amplifier 300 includes a DAC 310, an analog signal processing circuit 320, a digital signal processing circuit 330, a signal detector 340, a driver stage 350, an initialization circuit 360, and a feedback circuit (in this embodiment, the resistor R serves as the feedback circuit). In this embodiment, the amplifier 300 may be a class D amplifier built into an electronic device capable of providing an audio output, and the amplifier 300 may be configured to receive a digital input signal (audio signal) Din to generate an output signal for driving a speaker, earphone, or headphone.

[0023] In the operation of the amplifier 300, the DAC 310 receives the digital input signal Din and performs a digital-to-analog conversion operation on the digital input signal Din to generate an analog input signal Vin, and the analog signal processing circuit 320 processes the analog input signal Vin and the feedback signal VFB to generate a first processed signal V1 to the driver stage 350. The digital signal processing circuit 330 receives the digital input signal Din and processes the digital input signal Din to generate a second processed signal V2. In addition, the signal detector 340 detects the strength of the digital input signal Din to generate a mode selection signal Vs, wherein the mode selection signal Vs is used to indicate the closed-loop mode or the open-loop mode of the amplifier 300. In this embodiment, because the digital input signal Din is an audio signal, the signal detector 340 can obtain the volume of the audio signal from the digital data to be used as the strength of the digital input signal Din. In addition, when the signal detector 340 detects that the digital input signal Din has a large strength (for example, the strength is greater than the threshold), the mode selection signal Vs indicates a closed-loop mode; when the signal detector 340 detects that the digital input signal Din has a small strength (for example, the strength is less than the threshold), the mode selection signal Vs indicates an open-loop mode.

[0024] Then, the driver stage 350 selects one of the first processing signal V1 and the second processing signal V2 with reference to the mode selection signal Vs to generate the output signal Vout. In this embodiment, when the mode selection signal Vs indicates the closed loop mode, the DAC 310 and the analog signal processing circuit 320 are activated, so that the analog signal processing circuit 320 generates the first processing signal V1, and the driver stage 350 receives the first processing signal V1 to generate the output signal Vout. At the same time, the digital signal processing circuit 330 can be turned off to reduce power consumption. When the mode selection signal Vs indicates the open loop mode, the digital signal processing circuit is activated to generate the second processing signal V2, and the driver stage 350 receives the second processing signal V2 to generate the output signal Vout. At the same time, the analog signal processing circuit 320 can be turned off to reduce power consumption.

[0025] In this embodiment, the analog signal processing circuit 320 has a closed-loop design, that is, the feedback signal VFB generated by the output signal Vout is used to compensate the analog input signal Vin, so when the mode selection signal Vs indicates a closed-loop mode, the performance of the output signal Vout is better, because the amplifier 300 has good total harmonic distortion. In addition, when the output signal Vout has a high power, the efficiency of the class D amplifier 300 is relatively good. When the mode selection signal Vs indicates an open-loop mode, the digital signal processing circuit 330 generates a second processing signal V2 by using the digital input signal Din, at which time the analog signal processing circuit 320 will be turned off, and the amplifier 300 will have less quiescent current and higher efficiency.

[0026] In addition, since the analog signal processing circuit 320 with a closed-loop design requires more settling time to generate a stable first processing signal, otherwise the amplifier 300 may have a switching glitch when the mode selection signal Vs is switched from the open-loop mode to the closed-loop mode. In order to reduce this switching glitch problem, before the amplifier 300 is actually switched to the closed-loop mode, the initialization circuit 360 is started to initialize the analog signal processing circuit 320. Specifically, assuming that the amplifier 300 operates in the open-loop mode and the analog signal processing circuit 320 is turned off, if the signal detector 340 detects that the intensity of the digital input signal Din becomes larger (that is, the power of the output signal Vout becomes larger after a period of time), first, the analog signal processing circuit 320 is controlled to start (for example, by the signal detector 340 or other circuits), and the signal detector 340 can generate a control signal Vc to start the initialization circuit 360 to initialize the analog signal processing circuit 320, for example, the initialization circuit 360 generates a feedback signal VFB' to the input terminal of the analog signal processing circuit 320 to initialize the analog signal processing circuit 320. After the analog signal processing circuit 320 is initialized, the signal detector 340 starts to generate the mode selection signal Vs indicating the closed-loop mode, so that the driving stage 350 receives the stable signal V1 to generate the output signal Vout.

[0027] In view of this, by controlling the amplifier 300 to operate in the closed-loop mode or the open-loop mode based on the strength of the digital input signal Din (i.e., the power of the output signal Vout), the amplifier 300 can always have sufficient power efficiency. In addition, by providing an initialization circuit 360 to initialize the analog signal processing circuit 320 before the mode selection signal Vs is switched from the open-loop mode to the closed-loop mode, the switching glitch problem can be improved.

[0028] Figure 4 3 is a diagram showing a detailed structure of an amplifier 300 according to an embodiment of the present invention. Figure 4 As shown, the analog signal processing circuit 320 includes a loop filter 422 and a PWM generation circuit including two comparators 424 and 426, and the driving stage 350 includes two multiplexers 452 and 454, a gate driver 456 and an output stage including P-type transistors MP1, MP2 and N-type transistors MN1, MN2. The digital signal processing circuit 330 is implemented by the digital PWM generation circuit 430. The initialization circuit 360 includes an auxiliary gate driver 462 and another output stage including P-type transistors MP3, MP4 and N-type transistors MN3, MN4, an output resistor R1 and a feedback circuit (in this embodiment, two resistors R are used as a feedback circuit). Note that Figure 4The amplifier 300 shown in FIG. 3 has a differential structure, that is, the analog input signal Vin, the first processed signal V1, the second processed signal V2, the feedback signal VFB, the feedback signal VFB′ and the output signal Vout are all differential signals.

[0029] In the operation of the analog signal processing circuit 320, the loop filter 422 may include a plurality of integrators configured to filter the analog input signal Vin to generate a filtered signal, and each of the comparators 424 and 426 compares the filtered signal with the sawtooth signal to generate a PWM signal as the first processing signal V1. In the operation of the digital PWM generation circuit 430, the digital PWM generation circuit 430 may generate digital data using a sigma-delta modulator, and compare the digital data with a triangular reference data using a digital comparator to generate a PWM signal as the second processing signal V2. In the operation of the driver stage 350, each of the multiplexers 452 and 454 refers to the mode selection signal Vs to select one of the first processing signal V1 and the second processing signal V2. The gate driver 456 receives the first processing signal V1 or the second processing signal V2 to drive the output stage (MP1, MN1, MP2 and MN2) to generate the output signal Vout. In the operation of the initialization circuit 360 , the auxiliary gate driver 462 receives the first processing signal V1 to drive another output stage ( MP3 , MN3 , MP4 , and MN4 ) to generate the feedback signal VFB′.

[0030] Note that the internal components of the analog signal processing circuit 320, the digital PWM generating circuit 430, the driving stage 350, and the initialization circuit 360 are for illustration purposes only. As long as the analog signal processing circuit 320 and the digital PWM generating circuit 430 can generate a PWM signal to the driving stage 350, the driving stage 350 can refer to the mode selection signal Vs to select one of the first processing signal V1 and the second processing signal V2 to generate the output signal Vout, and the initialization circuit 360 can receive the first signal V1 to generate the feedback signal VFB' to initialize the analog signal processing circuit 320, the internal circuit design can be determined by an engineer.

[0031] Figure 5 is a flow chart of a method for controlling an amplifier according to an embodiment of the present invention. Figure 1-5 And the above description, the relevant process is described as follows:

[0032] Step 500: The process starts.

[0033] Step 502: Detect the strength of the digital input signal to generate a mode selection signal indicating a closed loop mode or an open loop mode. When the mode selection signal indicates the closed loop mode, the process proceeds to step 504; when the mode selection signal indicates the open loop mode, the process proceeds to step 510.

[0034] Step 504: Start the DAC to perform digital-to-analog conversion on the digital input signal to generate an analog input signal.

[0035] Step 506: Start the analog signal processing circuit to receive the analog input signal and the feedback signal to generate a first processed signal.

[0036] Step 508: Use a driver stage to receive the first processed signal to generate an output signal.

[0037] Step 510: Start the digital signal processing circuit to receive the digital input signal to generate a second processed signal.

[0038] Those skilled in the art will readily observe that various modifications and variations can be made to the apparatus and methods while maintaining the teachings of the present invention.Therefore, the above disclosure should be interpreted as being limited only by the appended claims.

Claims

1. An amplifier, characterized in that: include: A digital-to-analog conversion circuit, used for performing digital-to-analog conversion on a digital input signal to generate an analog input signal; a signal detector, configured to detect the strength of the digital input signal to generate a mode selection signal; an analog signal processing circuit, coupled to the digital-to-analog conversion circuit, for generating a first processing signal according to the analog input signal and a feedback signal when the mode selection signal indicates a closed-loop mode; a digital signal processing circuit for processing the digital input signal to generate a second processed signal when the mode selection signal indicates an open loop mode; an initialization circuit, configured to generate another feedback signal to an input terminal of the analog signal processing circuit according to the first processing signal previously generated by the analog signal processing circuit before the mode selection signal switches from indicating the open-loop mode to indicating the closed-loop mode, so as to initialize the analog signal processing circuit; and a driver stage coupled to the analog signal processing circuit, the digital signal processing circuit and the signal detector, for receiving the first processing signal to generate an output signal when the mode selection signal indicates the closed-loop mode, and receiving the second processing signal to generate an output signal when the mode selection signal indicates the open-loop mode, wherein the feedback signal is generated according to the output signal previously generated by the driver stage; The signal detector generates the mode selection signal indicating the closed-loop mode after the analog signal processing circuit is initialized.

2. The amplifier according to claim 1, characterized in that When the mode selection signal indicates the closed-loop mode, the analog signal processing circuit uses the feedback signal to compensate the analog input signal to generate the first processed signal, and the driver stage receives the first processed signal to generate the output signal; When the mode selection signal indicates the open-loop mode, the digital signal processing circuit processes the digital input signal to generate the second processed signal, and the driver stage receives the second processed signal to generate the output signal.

3. The amplifier according to claim 2, characterized in that When the mode selection signal indicates the open loop mode, the analog signal processing circuit is turned off.

4. The amplifier according to claim 2, characterized in that When the mode selection signal indicates the closed loop mode, the digital signal processing circuit is turned off.

5. The amplifier according to claim 1, characterized in that The analog signal processing circuit comprises: a loop filter for filtering the analog input signal to generate a filtered signal; and a pulse width modulation generating circuit, used for receiving the filtered signal to generate a pulse width modulation signal as the first processed signal; The digital signal processing circuit includes a digital pulse width modulation generating circuit, and the digital pulse width modulation generating circuit is used to receive the digital input signal to generate another pulse width modulation signal used as the second processing signal.

6. The amplifier according to claim 1, characterized in that The amplifier is a class D amplifier and the digital input signal is an audio signal.

7. A method for controlling an amplifier, characterized in that The following steps are involved: The start signal detector detects the strength of the digital input signal to generate a mode selection signal indicating a closed loop mode or an open loop mode; When the mode selection signal indicates the closed loop mode: Starting the digital-to-analog conversion circuit to perform a digital-to-analog conversion operation on the digital input signal to generate an analog input signal; Starting the analog signal processing circuit to receive the analog input signal and the feedback signal to generate a first processing signal; and receiving the first processed signal using a driver stage to generate an output signal, wherein the feedback signal is generated based on an output signal previously generated by the driver stage; and When the mode selection signal indicates the open loop mode: Starting the digital signal processing circuit to receive the digital input signal to generate a second processed signal; and The driving stage is used to receive the second processing signal to generate the output signal; wherein, before the mode selection signal switches from indicating the open-loop mode to indicating the closed-loop mode, an initialization circuit is used to generate another feedback signal to the input terminal of the analog signal processing circuit according to the first processing signal previously generated by the analog signal processing circuit, so as to initialize the analog signal processing circuit; The signal detector generates the mode selection signal indicating the closed-loop mode after the analog signal processing circuit is initialized.

8. The method according to claim 7, characterized in that Also includes: When the mode selection signal indicates the open loop mode, the analog signal processing circuit is turned off.

9. The method according to claim 7, characterized in that Also includes: When the mode selection signal indicates the closed-loop mode, the digital signal processing circuit is turned off.

10. The method according to claim 7, characterized in that Each of the first processed signal and the second processed signal is a pulse width modulated signal.

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