Semiconductor device and method for manufacturing the same

Abstract

The manufacturing method of the present invention is used to manufacture a semiconductor device, which includes: a first component having a first connection portion and a side extending in a straight line; a second component having a second connection portion; and an adhesive layer disposed between the first component and the second component. The manufacturing method of the present invention includes: a stacking step of preparing a stacked body formed by stacking the first component, the adhesive layer, and the second component in sequence; and a crimping step of irradiating the stacked body with a laser for heating while applying a pressing force to the stacked body in a thickness direction. In the crimping step, the stacked body is irradiated with laser in such a manner that a laser irradiation portion, a laser non-irradiation portion, and a laser irradiation portion are formed in sequence from the peripheral portion of one end of the side of the first component toward the peripheral portion of the other end.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same. Background Art

[0002] In the past, wire bonding was widely used to connect semiconductor chips to substrates. Wire bonding is a method of connecting semiconductor chips and substrates using fine metal wires such as gold wires. In response to the demand for high functionality, high integration, and high speed of semiconductor devices, a method called flip chip connection (FC connection) is becoming more and more popular. FC connection is a method of directly connecting the semiconductor chip and the substrate by forming a conductive protrusion called a bump on the semiconductor chip or substrate.

[0003] As methods of FC connection, there are known methods of metal bonding using solder, tin, gold, silver, copper, etc.; methods of metal bonding by applying ultrasonic vibration; and methods of maintaining mechanical contact by the shrinkage force of resin, etc. Among these methods, the method of metal bonding using solder, tin, gold, silver, copper, etc. is generally used from the viewpoint of reliability of the connection part.

[0004] As a method of connecting a semiconductor chip and a substrate, a COB (Chip On Board) type connection method is known. COB is a type of FC connection. In addition, CoC (Chip On Chip) connecting a semiconductor chip to a semiconductor chip and CoW (Chip On Wefer) connecting a semiconductor chip to a semiconductor wafer having bumps or wiring are also classified as FC connections. Patent document 1 discloses a method for bonding a semiconductor wafer.

[0005] Previous technical literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2008-294382 Summary of the invention

[0008] Technical issues to be solved by the invention

[0009] As described above, there is a strong demand for high functionality of semiconductor devices (hereinafter referred to as "packages" depending on the circumstances). Specifically, there is a demand for thinning, miniaturization, an increase in the number of pins (bumps and / or lines), and a narrowing of the pitch or gap. As technologies for making packages that require further miniaturization, thinning, and high functionality, technologies such as chip stacking packages, POP (Package On Package), and TSV (Through Silicon Via) that multi-stage the above-mentioned connection methods have also begun to become popular. These technologies configure the components in a three-dimensional shape rather than a planar shape, so that the package can be made smaller, and are also effective in improving the performance and noise reduction of semiconductor devices, reducing the mounting area, and saving power, and are attracting much attention as the next generation of circuit technology.

[0010] From the perspective of low cost and high productivity, there is a tendency to narrow the spacing between semiconductor chips during package assembly. By reducing the spacing between adjacent semiconductor chips, a large number of semiconductor chips can be mounted on a substrate or a wafer, thereby achieving low cost. In addition, by reducing the spacing between adjacent semiconductor chips, different types of semiconductor chips can be assembled in a small range, thereby achieving high-density installation.

[0011] When the semiconductor chip is crimped to a substrate or a semiconductor wafer via an adhesive layer to ensure connection, the shape of the adhesive layer is usually the same square or rectangular as the semiconductor chip. After the crimping process, the portion of the resin material constituting the adhesive layer that protrudes from the semiconductor chip is called a fillet. During crimping, the resin material flows in a circular shape, so the fillet of the corner of the semiconductor chip becomes smaller than the fillet of the side portion of the semiconductor chip. The fillet on the corner of the semiconductor chip (the end of the side of the semiconductor chip) is called the coverage.

[0012] In the case where there is no fillet (adhesive) on the corners of the semiconductor chip, there is a tendency for the reliability of the semiconductor device to decrease. In order to ensure coverage, it is considered to increase the fluidity of the adhesive, or to set the conditions during crimping to high load or high temperature. However, even if the coverage can be ensured by these methods, on the other hand, the fillet on the side of the semiconductor chip becomes larger, and low-cost and high-density installation becomes difficult. In other words, it is difficult to take into account both reducing the fillet on the side of the semiconductor chip and ensuring coverage.

[0013] An object of the present invention is to provide a semiconductor device having a small rounded corner on the side of a semiconductor chip and capable of ensuring coverage, and a method for manufacturing the same.

[0014] Means for solving technical problems

[0015] The manufacturing method involved in the present invention is used to manufacture a semiconductor device, which comprises: a first component having a first connecting portion and a side extending in a straight line; a second component having a second connecting portion; and an adhesive layer arranged between the first component and the second component, the first connecting portion and the second connecting portion being electrically connected.

[0016] The manufacturing method involved in the first embodiment of the present invention includes: a stacking step, preparing a stacked body formed by stacking a first component, an adhesive layer and a second component in sequence; and a crimping step, irradiating the stacked body with a laser for heating while applying a pressing force to the stacked body in the thickness direction. In the crimping step, the stacked body is irradiated with laser in a manner that a laser irradiated portion, a laser non-irradiated portion and a laser irradiated portion are formed in sequence from the peripheral portion of one end of the side of the first component toward the peripheral portion of the other end.

[0017] According to the manufacturing method involved in the first embodiment, the corners of a first component (for example, a square or rectangular semiconductor chip) having edges extending in a straight line are set as laser irradiation portions, and the portion between the corners is set as laser non-irradiation portions, thereby enabling local heating of the corners by laser, ensuring coverage of the corners of the first component, and suppressing rounding on the edges of the first component.

[0018] The manufacturing method involved in the second embodiment of the present invention includes: a stacking step, preparing a stacked body formed by stacking a first component, an adhesive layer and a second component in sequence; and a crimping step, applying heat to the stacked body while applying a pressing force to the stacked body in a thickness direction, wherein the first component is a semiconductor chip having a square or rectangular shape, and in the crimping step, heat is applied to the stacked body in a manner that satisfies the following condition 1.

[0019] <Condition 1>

[0020] When the side of the semiconductor chip is divided into three equal parts into a total of nine areas, and the area including a corner of the semiconductor chip among the nine areas is set as area 1, and the areas arranged from area 1 along the peripheral part of the semiconductor chip are set as areas 2 to 8, the difference (Tc-Ts) between the average temperature Tc of the outer surface of the semiconductor chip in the center of each area 1, 3, 5, and 7 and the average temperature Ts of the outer surface of the semiconductor chip in the center of each area 2, 4, 6, and 8 is greater than 15°C.

[0021] According to the manufacturing method involved in the second embodiment, by locally increasing the temperature of the corners (regions 1, 3, 5, 7) of the semiconductor chip, the coverage of the corners of the first component can be ensured, and the rounding of the edges of the first component can be suppressed. In addition, in the manufacturing method involved in the second embodiment, when the stack is heated by laser irradiation, regions 2, 4, 6, and 8 may be laser non-irradiated portions or may not be laser non-irradiated portions. For example, regions 2, 4, 6, and 8 may be irradiated with laser irradiation having less energy than regions 1, 3, 5, and 7.

[0022] From the viewpoint of ensuring coverage at a higher height and suppressing rounding, it is preferred that heat be applied to the laminated body in the pressure-bonding step of the production method according to the second aspect so as to further satisfy the following condition 2.

[0023] <Condition 2>

[0024] The area including the center of the semiconductor chip in the above nine areas is set as area 9, and the difference (Ts-T9) between the average temperature Ts of the outer surface of the semiconductor chip in the center of each area 2, 4, 6, and 8 and the temperature T9 of the outer surface of the semiconductor chip in the center of area 9 is greater than 5°C.

[0025] In the present invention, specific examples of the second member include a circuit board, a semiconductor chip, and a semiconductor wafer.

[0026] From the viewpoint of suppressing the generation of voids, the adhesive layer may contain, for example, a thermosetting resin and a curing agent having a weight average molecular weight of less than 10000, or a polymer component having a weight average molecular weight of 10000 or more. From the viewpoint of improving the efficiency of the pressure-bonding step, the adhesive layer is preferably a film-like adhesive.

[0027] The present invention provides a semiconductor device manufactured by the above manufacturing method. In the semiconductor device of the present invention, the rounded corners on the sides of the semiconductor chip are short and the coverage can be ensured. Due to these characteristics, high-density mounting can be achieved and excellent reliability is achieved.

[0028] Effects of the Invention

[0029] According to the present invention, a semiconductor device having a small rounded corner on the side of a semiconductor chip and capable of ensuring coverage and a method for manufacturing the same can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a cross-sectional view schematically showing one embodiment of a semiconductor device according to the present invention.

[0031] Figure 2 middle, Figure 2(a) is a cross-sectional view schematically showing a state where preparations for the crimping process are complete. Figure 2 (b) is a cross-sectional view schematically showing a stacked body in which a semiconductor chip, an adhesive layer, and a substrate are stacked in this order. Figure 2 (c) is a cross-sectional view schematically showing a state where a pressure-bonding step is performed on the laminated body.

[0032] Figure 3 This is a plan view schematically showing an example of a region where a laminate is irradiated with laser light in a pressure-bonding step.

[0033] Figure 4 This is a plan view schematically showing an example of a state in which the adhesive layer protrudes from the semiconductor chip after the pressure-bonding step.

[0034] Figure 5 FIG. 1 is a cross-sectional view schematically showing an example of a semiconductor device manufactured using the TSV technology.

[0035] Figure 6 middle, Figure 6 (a) is a top view schematically showing the irradiation pattern of the laser light in Example 1 and Comparative Example 1, Figure 6 (b) is a plan view schematically showing the irradiation pattern of the laser light in Example 2 and Comparative Example 2.

[0036] Figure 7 It is a plan view schematically showing the irradiation pattern of the laser light in Example 3 and Example 4. DETAILED DESCRIPTION

[0037] Hereinafter, embodiments of the present invention will be described with reference to the drawings as appropriate. In addition, the present invention is not limited to the following embodiments.

[0038] <Semiconductor device and method for manufacturing the same>

[0039] Figure 1 The semiconductor device 50 shown includes: a semiconductor chip 10 (first component) having a copper column 10a and a solder bump 10b (first connection portion); a substrate 20 (second component) having a circuit 20a (second connection portion); and an adhesive layer 30, which is arranged between the semiconductor chip 10 and the substrate 20, and the solder bump 10b is electrically connected to the circuit 20a. The solder bump 10b includes, for example, a tin-silver alloy. In the circuit 20a, for example, gold plating is applied to the surface. By heating to a temperature higher than the melting point of the solder, the solder bump 10b and the circuit 20a can be connected.

[0040] refer to Figure 2 (a)~ Figure 2 (c) A method for manufacturing the semiconductor device 50 will be described. The semiconductor device 50 is manufactured, for example, through the following steps.

[0041] A chip manufacturing process with adhesive for preparing a chip having an adhesive layer 30 formed on the surface of the semiconductor chip 10 on which the copper pillars 10a and the solder bumps 10b are formed (see Figure 2 (a)).

[0042] A stacking step of preparing a stacked body 40 in which the semiconductor chip 10, the adhesive layer 30, and the substrate 20 are stacked in this order (see Figure 2 (b)).

[0043] A pressure bonding step of irradiating the laminate 40 with a laser beam L for heating while applying a pressing force F to the laminate 40 in the thickness direction (see Figure 2 (c)).

[0044] A curing step of heating the laminated body 40 after the pressure-bonding step.

[0045] (Process of manufacturing chip with adhesive)

[0046] The manufacturing process of the chip with adhesive is a process for manufacturing a chip (chip with adhesive) having a semiconductor chip 10 and an adhesive layer 30 formed in a manner such as a copper pillar 10a covering the semiconductor chip 10. From the perspective of operability, it is preferred to prepare a film-like adhesive in advance and manufacture the chip with adhesive through a process of laminating it on an object. Lamination can be performed by hot pressing, roller lamination, vacuum lamination, etc. The size and thickness of the adhesive layer 30 can be appropriately set according to the size of the semiconductor chip 10 and the bump height, etc. In addition, the chip with adhesive can be manufactured by attaching a film-like adhesive cut to the size of the semiconductor chip 10 to the semiconductor chip, or by attaching a film-like adhesive to a semiconductor wafer formed with a circuit, etc., and then singulating it by cutting to manufacture the chip with adhesive. In addition, in the case of manufacturing the chip with adhesive by cutting, the semiconductor chip 10 and the adhesive layer 30 become the same shape and size.

[0047] (Lamination process)

[0048] The lamination step is a step of preparing a laminated body 40 formed by laminating the semiconductor chip 10, the adhesive layer 30, and the substrate 20 in this order. After the chip with adhesive and the substrate 20 are aligned, the chip with adhesive and the substrate 20 are temporarily pressed together to produce the laminated body 40. A general pressing device can be used for the temporary pressing.

[0049] (Crimp process)

[0050] Figure 3This is a top view schematically showing the area where the laminate is irradiated with laser light in the crimping process. In this embodiment, a laser welding machine capable of independently irradiating a total of 36 areas with a heating laser is used. As an example of a laser welding machine having such performance, the FDB250 manufactured by SHIBUYA CORPORATION can be cited. Figure 3 In the figure, among a total of 36 regions, the hatched circles indicate the regions irradiated with laser light, and the white circles indicate the regions not irradiated with laser light.

[0051] like Figure 3 As shown, in the crimping process, the stacked body 40 is irradiated with laser light in such a manner that the laser irradiation portion A1, the laser non-irradiation portion A2, and the laser irradiation portion A1 are formed in sequence from the peripheral portion (one corner portion C) of one end Sa of the side S of the semiconductor chip 10 toward the peripheral portion (another corner portion C) of the other end Sb. The remaining three sides S of the semiconductor chip 10 are also irradiated with laser light in such a manner that the laser irradiation portion A1, the laser non-irradiation portion A2, and the laser irradiation portion A1 are formed in sequence from one end toward the other end. Figure 3 As shown, the side of the semiconductor chip 10 is divided into three equal parts, and divided into a total of nine areas. Among the nine areas, the area including a corner of the semiconductor chip 10 is set as area 1, and the areas arranged from area 1 along the peripheral part of the semiconductor chip 10 are set as areas 2 to 8. In this embodiment, laser L is selectively irradiated to areas 1, 3, 5, and 7, and laser is not irradiated to areas 2, 4, 6, 8 and area 9 including the center of the semiconductor chip 10. That is, areas 1, 3, 5, and 7 are laser irradiated parts A1, and areas 2, 4, 6, 8, and 9 are laser non-irradiated parts A2. In addition, as long as the adhesive layer 30 can be heated by irradiating the stack 40 with laser L, the outer surface of the semiconductor chip 10 can be directly irradiated with laser, and the plate (not shown) used to apply a pressing force F to the semiconductor chip 10 can also be irradiated with laser.

[0052] In the present embodiment, the difference (Tc-Ts) between the average temperature Tc of the outer surface of the semiconductor chip 10 in each center of regions 1, 3, 5, and 7 and the average temperature Ts of the outer surface of the semiconductor chip 10 in each center of regions 2, 4, 6, and 8 is preferably 15°C or more. Tc-Ts being 15°C or more means that the temperature of the region heated to include the corner of the semiconductor chip 10 is locally higher than that of other regions. In the crimping process, by performing such heating, the fillet on the side S of the semiconductor chip 10 can be shortened and the coverage can be ensured. Tc-Ts can be 15 to 30°C.

[0053] In the present embodiment, the temperature difference (Ts-T9) between the average temperature Ts of the outer surface of the semiconductor chip 10 in each center portion of the regions 2, 4, 6, and 8 and the temperature T9 of the outer surface of the semiconductor chip 10 in the center portion of the region 9 may be 5°C or more. Ts-T9 being 5°C or more means that the regions 2, 4, 6, and 8 of the semiconductor chip 10 are heated to be higher than the region 9. That is, in the compression bonding process of the present embodiment, heating may be performed in a manner that satisfies the conditions of Tc>Ts>T9 and the temperature difference (Tc-Ts) is 15°C or more and the temperature difference (Ts-T9) is 5°C or more. In addition, the temperature difference (Ts-T9) may range from 5 to 40°C.

[0054] When the crimping process is performed using a general crimping device having a crimping tool surface that can be heated, the crimping tool surface is brought into contact with the surface of the stack 40, and the crimping tool surface is heated while a pressing force F is applied to the stack 40. The crimping tool surface is usually designed so that its surface temperature is as uniform as possible. For example, if the size of the semiconductor chip is about 30 mm × 30 mm, the temperature deviation of the surface of the semiconductor chip during crimping is usually less than 15°C. If the stack 40 is uniformly heated to perform the crimping process, there is a tendency for the fillet width in the central portion of the edge of the semiconductor chip to be large and the coverage to be insufficient. In addition, if the heating temperature is increased or the pressing force is increased in order to ensure the coverage, the fillet width on the edge of the semiconductor chip becomes larger.

[0055] In contrast, according to the present embodiment, by intentionally applying a temperature distribution to the crimping tool surface, it is possible to suppress the fillet width and ensure coverage. As described above, by locally heating the regions 1, 3, 5, and 7 of the semiconductor chip to a high temperature, the flow of the adhesive layer 30 located at the corners C of the semiconductor chip 10 can be increased, and the coverage can be ensured. On the other hand, by relatively lowering the heating temperature of the regions 2, 4, 6, and 8 of the semiconductor chip 10, the flow of the adhesive layer 30 near the center of the side S of the semiconductor chip 10 can be relatively suppressed, and the fillet on the side S can be reduced. By setting the difference (Ts-T9) between the average temperature Ts of the regions 2, 4, 6, and 8 and the temperature T9 of the region 9 to 5°C or more, there is a tendency for the heating rate of the entire semiconductor chip to become faster. By increasing the heating rate, it is easy to locally heat a specific region of the semiconductor chip, so it is easier to suppress the fillet while ensuring coverage. In addition, by increasing the heating rate, the time for the solder to melt becomes longer, so it is easy to connect. As a result, a semiconductor device with excellent reliability can be manufactured in a short time.

[0056] Figure 4 It is a plan view schematically showing a state where the adhesive layer 30 protrudes from the semiconductor chip 10 . Figure 4 Width W shown FThe maximum width of the fillet on the side S of the semiconductor chip 10 is measured for the four sides S of the semiconductor chip 10 , and the average value thereof is defined as the fillet width on the side of the semiconductor chip 10 . Figure 4 The widths W1 and w2 shown are the widths (μm) of the fillets at a position 200 μm from the corner C of the semiconductor chip 10. The widths W1 and w2 are measured for each of the four corners C of the semiconductor chip 10, and the average of the eight values ​​is defined as the coverage (μm) of the semiconductor chip 10.

[0057] The fillet width depends on the size and thickness of the semiconductor chip 10 and the supply amount of the bottom filler (including liquid and film). Regarding the fillet width, if there is no problem with reliability, the smaller the better. For example, in the case of crimping the semiconductor chip on a wafer and in the case of crimping the semiconductor chip on a substrate, the fillet is preferably less than half of the distance between the semiconductor chips. The fillet width is preferably 50 to 200 μm, and more preferably 50 to 150 μm. The coverage range of the semiconductor chip 10 is preferably 5 to 100 μm, and more preferably 10 to 100 μm. If the coverage range is 10 μm or more, there is a tendency to further improve the reliability of the semiconductor device 50. The coverage index (dimensionless) is calculated by dividing the fillet width by the coverage range. The coverage index is, for example, 0.1 to 1, and can be 0.2 to 0.5. If the coverage index is 0.1 or more, there is a tendency to fully improve the reliability of the semiconductor device 50.

[0058] (Curing process)

[0059] The curing step is a step of heating the laminated body 40 after the pressure bonding step. From the viewpoint of reducing voids, this step is preferably performed in a pressurized atmosphere using a pressurized oven or a pressurized reflow device. The heating temperature is, for example, 130 to 200° C. The pressure is, for example, 0.1 to 1 MPa.

[0060] In this embodiment, a case where a laser welding machine is used in the crimping process to heat the chip 10 so that Tc-Ts becomes 15°C or higher is exemplified, but a crimping device other than a laser welding machine may be used as long as Tc-Ts becomes 15°C or higher. For example, a crimping tool having a convex portion at a position corresponding to the corner C may be used so that the temperature is easily transferred only to the corner C of the semiconductor chip 10. Alternatively, a crimping tool may be used in which the region corresponding to the corner C of the semiconductor chip 10 is partially made of a material with high thermal conductivity, or a crimping tool may be used in which the portion other than the region is made of a material with low thermal conductivity.

[0061] In this embodiment, the case where regions 2, 4, 6, and 8 are set as laser non-irradiated areas is exemplified, but regions 2, 4, 6, and 8 may be irradiated with laser as long as Tc-Ts can be made 15° C. or higher (see Examples 3 and 4).

[0062] In this embodiment, a semiconductor device 50 having a connection portion between a semiconductor chip 10 and a substrate 20 is exemplified, but a method of connecting a semiconductor chip to another semiconductor chip or a method of connecting a semiconductor chip to a semiconductor wafer may also be used. Furthermore, the connection portion is not limited to a metal connection using a bump and a circuit, but may also be a metal connection using bumps and bumps.

[0063] The compression bonding process according to the present embodiment can be applied to a semiconductor device manufactured by, for example, TSV (Through-Silicon Via) technology. Figure 5 It is a cross-sectional view schematically showing an example of a semiconductor device manufactured by TSV technology. The semiconductor device 70 shown in the figure comprises: three semiconductor chips 11, 12, 13, which are flip-chip connected and stacked via an adhesive layer 30; and an intermediary part 60, which is connected to the semiconductor chip 13 via the adhesive layer 30. In addition, the semiconductor chips 11, 12, 13 have through-electrode parts 11a, 12a, 13a. According to the semiconductor device 70 of this structure, signals can also be exchanged from the back side of the semiconductor chip. Since the line can pass vertically in the semiconductor chip, the semiconductor chips or the chip and the intermediary part can be connected in the shortest and most flexible way. The crimping process involved in this embodiment can be applied to the manufacture of stacked chips including semiconductor chips 11, 12, 13, and can also be applied to the crimping of stacked chips and the intermediary part 60.

[0064] Hereinafter, a semiconductor chip, a substrate, an adhesive layer, and the like used in the method for manufacturing a semiconductor device according to the present embodiment will be described.

[0065] The semiconductor chip has a straight-line extending side, for example, a square or rectangular shape. The length of one side of the semiconductor chip is, for example, 0.1 to 300 mm, and can be 5 to 150 mm. There is no particular limitation on the semiconductor constituting the semiconductor chip, and examples include semiconductors of elements such as silicon and germanium, and semiconductors of compounds such as gallium arsenide and indium phosphide.

[0066] The semiconductor chip can have a conductive protrusion called a bump. The bump contains gold, silver, copper, solder, tin, nickel, etc. as main components. These metals can be used alone or in combination of two or more. And, a structure formed by stacking these metals can be formed. In addition, the main component of the solder is, for example, an alloy of tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, etc. And, the bump can be formed on a circuit substrate connected to the semiconductor chip, etc. As the metal constituting the bump, copper and solder are preferred from the viewpoint of low cost, and solder is further preferred from the viewpoint of connection reliability and suppression of warping.

[0067] Semiconductor chips and circuit substrates can have a conductive surface called a pad. The pad contains gold, silver, copper, solder, tin, nickel, etc. as main components. These metals can be used alone or in combination of two or more. And, a structure formed by stacking these metals can be formed. In addition, the main component of the solder is, for example, an alloy of tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, etc. And, as the metal constituting the pad, gold and solder are preferred from the viewpoint of connection reliability.

[0068] The circuit substrate is not particularly limited as long as it is a general circuit substrate, and examples thereof include a substrate in which a circuit pattern is formed on an insulating substrate by etching, a substrate in which a circuit pattern is formed by printing a conductive material on the surface of an insulating substrate, etc. The insulating substrate is made of a resin material such as glass epoxy, polyester, ceramic, epoxy, bismaleimide triazine, polyimide, etc.

[0069] A metal layer may be formed on the surface of the circuit pattern. The metal layer contains gold, silver, copper, solder, tin, nickel, etc. as main components. These metals may be used alone or in combination of two or more. Furthermore, a structure in which these metals are stacked may be formed. As the metal constituting the metal layer, copper and solder are preferred from the viewpoint of low cost, and solder is further preferred from the viewpoint of connection reliability and suppression of warping.

[0070] The semiconductor device may include the above-mentioned bump-bump connection portion, bump-pad connection portion, or bump-line connection portion.

[0071] The adhesive layer preferably has excellent heat resistance so that it can be crimped at a temperature of 200°C or more. By crimping at a temperature of 200°C or more, metals such as solder can be melted. From the viewpoint of suppressing the generation of pores, the adhesive layer contains a resin component with a weight average molecular weight of less than 10,000. The adhesive layer may also contain a polymer component with a weight average molecular weight of more than 10,000. From the viewpoint of the efficiency of the crimping process, the adhesive layer is preferably a film-like adhesive. In addition, the "weight average molecular weight" referred to herein refers to the value measured in terms of polystyrene using a high performance liquid chromatograph (C-R4A manufactured by Shimadzu Corporation).

[0072] (a) Resin component with a weight average molecular weight of less than 10,000

[0073] As the resin component having a weight average molecular weight of less than 10,000 (hereinafter referred to as component (a)), epoxy resin and acrylic resin can be cited. Component (a) is preferably a thermosetting resin, and in this case, the adhesive layer preferably contains (b) a curing agent. Resin components with relatively small molecular weights decompose when heated and become the cause of pores, so from the viewpoint of heat resistance, it is preferably reacted with a curing agent.

[0074] The epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule, and for example, bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, cresol novolac type, phenol aralkyl type, biphenyl type, triphenylmethane type, dicyclopentadiene type, and various multifunctional epoxy resins can be used. These can be used alone or in combination of two or more.

[0075] The content of the epoxy resin is, for example, 10 to 50 parts by mass relative to 100 parts by mass of the total mass of the adhesive layer. When the content of the epoxy resin is 10 parts by mass or more, the flow of the resin after curing can be easily controlled, while when the content is 50 parts by mass or less, warping of the package can be suppressed.

[0076] There is no particular limitation on the acrylic resin as long as it has one or more acryloyl groups in the molecule, and for example, bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, cresol novolac type, phenol aralkyl type, biphenyl type, triphenylmethane type, dicyclopentadiene type, fluorene type, adamantane type, and various multifunctional acrylics can be used. One type of these can be used alone or two or more types can be used simultaneously.

[0077] The content of the acrylic resin is preferably 10 to 50 parts by mass, more preferably 15 to 40 parts by mass, relative to 100 parts by mass of the total mass of the adhesive layer. When the content of the acrylic resin is 10 parts by mass or more, the flow of the resin after curing can be easily controlled, while when it is 50 parts by mass or less, warping of the package can be suppressed.

[0078] The acrylic resin is preferably solid at room temperature (25°C). In the solid state, pores are less likely to form than in the liquid state, and the adhesive layer before curing (stage B) has low viscosity (adhesion) and excellent handling properties. The number of functional groups of the acryloyl group is preferably 3 or less. By having the number of functional groups of the acryloyl group be 3 or less, sufficient curing can be performed in a short time, and a sufficiently high curing reaction rate can be achieved.

[0079] (b) Curing agent

[0080] Examples of the curing agent include phenol resin-based curing agents, acid anhydride-based curing agents, amine-based curing agents, imidazole-based curing agents, phosphine-based curing agents, azo compounds, and organic peroxides.

[0081] (Phenolic resin curing agent)

[0082] As the phenolic resin curing agent, there is no particular limitation as long as it has two or more phenolic hydroxyl groups in the molecule, and for example, phenol novolac, cresol novolac, phenol aralkyl resin, cresol naphthol formaldehyde polycondensate, triphenylmethane type polyfunctional phenol and various polyfunctional phenolic resins can be used. They can be used alone or as a mixture of two or more.

[0083] From the viewpoint of good curability, adhesion and storage stability, the equivalent ratio (phenolic hydroxyl group / epoxy group, molar ratio) of the phenolic resin curing agent to the epoxy resin is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, and further preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, there is a tendency that the curability is improved and the adhesion is improved, and if it is 1.5 or less, there is a tendency that unreacted phenolic hydroxyl groups do not remain excessively, the water absorption is suppressed to a low level, and the insulation reliability is improved.

[0084] (Anhydride curing agent)

[0085] As the acid anhydride curing agent, for example, methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride and ethylene glycol dianhydrotrimellitate can be used, which can be used alone or as a mixture of two or more.

[0086] From the viewpoint of good curability, adhesion and storage stability, the equivalent ratio (anhydride group / epoxy group, molar ratio) of the anhydride curing agent to the epoxy resin is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, and further preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, there is a tendency that the curability is improved and the adhesion is improved, and if it is 1.5 or less, there is a tendency that unreacted anhydride does not remain excessively, the water absorption is suppressed to a low level, and the insulation reliability is improved.

[0087] (Amine curing agent)

[0088] As an amine curing agent, for example, dicyandiamide can be used. From the viewpoint of good curability, adhesion and storage stability, the equivalent ratio (amine / epoxy group, molar ratio) of the amine curing agent to the epoxy resin is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, and further preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, there is a tendency that the curability is improved and the adhesion is improved, and if it is 1.5 or less, there is a tendency that the unreacted amine does not remain excessively, and the insulation reliability is improved.

[0089] (Imidazole curing agent)

[0090] Examples of the imidazole curing agent include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric-triazine, 2,4-diamino-6- [2'-Undecylimidazolyl-(1')]-ethyl-symmetric-triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-symmetric-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole and adducts of epoxy resins and imidazoles. Among them, 1-cyanoethyl-2-undecyl imidazole, 1-cyano-2-phenyl imidazole, 1-cyanoethyl-2-undecyl imidazole trimellitate, 1-cyanoethyl-2-phenyl imidazole trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric-triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-symmetric-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole are preferred from the viewpoint of excellent curability, storage stability and connection reliability. These can be used alone or in combination of two or more. Furthermore, these may be microencapsulated to form a latent curing agent.

[0091] The content of the imidazole curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, relative to 100 parts by mass of the epoxy resin. If the content of the imidazole curing agent is 0.1 parts by mass or more, there is a tendency for the curability to be improved, and if it is 20 parts by mass or less, there is a tendency that the adhesive composition will not cure before the metal bonding is formed, and poor connection is less likely to occur.

[0092] (Phosphine-based curing agent)

[0093] Examples of the phosphine-based curing agent include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetrakis(4-methylphenyl)borate, and tetraphenylphosphonium(4-fluorophenyl)borate.

[0094] The content of the phosphine curing agent is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass, relative to 100 parts by mass of the epoxy resin. If the content of the phosphine curing agent is 0.1 parts by mass or more, the curability tends to be improved, and if it is 10 parts by mass or less, the adhesive composition does not cure before the metal bond is formed, and poor connection tends to be less likely to occur.

[0095] Phenolic resin curing agents, acid anhydride curing agents and amine curing agents can be used alone or in combination of two or more. Imidazole curing agents and phosphine curing agents can be used alone or in combination with phenolic resin curing agents, acid anhydride curing agents or amine curing agents.

[0096] (Organic Peroxide)

[0097] As organic peroxide, for example, ketone peroxide, peroxyketal, hydroperoxide, dialkyl peroxide, diacyl peroxide, peroxycarbonate, peroxyester can be mentioned. From the viewpoint of storage stability, hydroperoxide, dialkyl peroxide, peroxyester are preferred. And, from the viewpoint of heat resistance, hydroperoxide and dialkyl peroxide are preferred. They can be used alone or in combination of two or more.

[0098] The content of the peroxide is preferably 0.5 to 10% by mass, more preferably 1 to 5% by mass, relative to the mass of the acrylic resin. When the content of the peroxide is 0.5% by mass or more, the curing reaction is easily carried out sufficiently, while when the content of the peroxide is 10% by mass or less, it is possible to sufficiently suppress the shortening of the molecular chain or the reduction in reliability due to the residual unreacted groups.

[0099] In addition, about the combination of epoxy resin, acrylic resin and curing agent, as long as curing is carried out, there is no particular restriction, but from the viewpoint of handling property, storage stability and curing property, as the curing agent used together with epoxy resin, preferably phenol and imidazole, acid anhydride and imidazole, amine and imidazole or imidazole is used alone. If connected in a short time, productivity is improved, so it is more preferred to use imidazole with excellent rapid curing property alone. If cured in a short time, the volatilization of low molecular components etc. can be suppressed, so the generation of pores can be further suppressed. From the viewpoint of handling property and storage stability, as the curing agent used together with acrylic resin, preferably organic peroxide is used.

[0100] (c) a polymer component having a weight average molecular weight of 10,000 or more

[0101] As the polymer component (hereinafter referred to as " (c) component ") with a weight-average molecular weight of more than 10000, epoxy resin, phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate resin, acrylic resin, polyester resin, polyethylene resin, polyethersulfone resin, polyetherimide resin, polyvinyl acetal resin, polyurethane resin, acrylic rubber, bismaleimide resin etc. can be enumerated. Among them, epoxy resin, phenoxy resin, polyimide resin, acrylic resin, acrylic rubber, bismaleimide resin with excellent heat resistance and film formation are more preferably used. They can be used alone or in combination of two or more, or can be used as two or more copolymers.

[0102] The mass ratio of component (c) to epoxy resin is not particularly limited, but when the amount of component (c) in the adhesive layer is set to 100 parts by mass, the mass of epoxy resin is preferably 1 to 500 parts by mass, more preferably 5 to 400 parts by mass, and further preferably 10 to 300 parts by mass. When the amount of epoxy resin is more than 1 part by mass, sufficient adhesion is easily ensured, and when the amount of epoxy resin is less than 500 parts by mass, sufficient film formation and film formation are easily ensured. In addition, the epoxy resin mentioned here is a curing component having a glycidyl group and a molecular weight of less than 10,000.

[0103] The mass ratio of component (c) to acrylic resin is not particularly limited, but when the amount of component (c) in the adhesive layer is 100 parts by mass, the mass of acrylic resin is preferably 1 to 1000 parts by mass, more preferably 5 to 500 parts by mass, and further preferably 10 to 500 parts by mass. When the amount of acrylic resin is 1 part by mass or more, sufficient adhesive force can be easily ensured, and when the amount of acrylic resin is 1000 parts by mass or less, sufficient film formability can be easily ensured.

[0104] From the viewpoint of excellent adhesion of the adhesive layer to the substrate and the semiconductor chip, the glass transition temperature (Tg) of the (c) component is preferably 50 to 200°C. By having the Tg of the (c) component being above 50°C, the adhesion (viscosity) of the adhesive layer can be fully improved, and the handling property is excellent. On the other hand, by having the Tg of the (c) component being below 200°C, it is easy to bury the bumps formed on the semiconductor chip, or the electrodes or circuit patterns formed on the substrate, etc. into the adhesive layer, and the generation of pores can be suppressed. In addition, the Tg of the adhesive layer refers to the value measured using DSC (DSC-7 manufactured by PerkinElmer Co., Ltd.) under the conditions of a sample amount of 10 mg, a heating rate of 10°C / min, and a measurement atmosphere of air.

[0105] As described above, the weight average molecular weight of component (c) is 10,000 or more in terms of polystyrene, but is preferably 30,000 or more from the viewpoint of achieving good film formability alone. When the weight average molecular weight of component (c) is 10,000 or more, sufficient film formability is easily achieved.

[0106] The adhesive layer may also contain a flux. The flux is a compound that shows flux activity (activity to remove oxides or impurities). Examples of the flux include nitrogen-containing compounds with unshared electron pairs such as imidazoles and amines, carboxylic acids, phenols, and alcohols. In addition, compared with alcohols, etc., organic acids show strong flux activity and improved connectivity. Among organic acids, carboxylic acids are preferably used. Since carboxylic acids react with epoxy resins, they have the advantage of leaving a sufficiently small amount in the adhesive layer. From the viewpoint of heat resistance, the carboxylic acid as a flux is preferably solid. From the viewpoint of stability and handling, the melting point of the flux is preferably 70 to 150°C.

[0107] The adhesive layer may also contain an insulating filler. By adding a filler to the adhesive layer, the viscosity and the physical properties of the cured product can be controlled, and the generation of pores when connecting semiconductor chips to each other or between the semiconductor chip and the substrate can be suppressed, and the moisture absorption rate can be suppressed. As an insulating filler, inorganic fillers, whiskers and resin fillers can be cited. In addition, from the viewpoint of insulation reliability, the adhesive layer preferably does not contain a conductive metal filler (for example, silver particles and solder particles).

[0108] As an inorganic filler, for example, glass, silica, alumina, titanium oxide, carbon black, mica and boron nitride can be mentioned. Among them, silica, alumina, titanium oxide and boron nitride are preferred, and silica, alumina and boron nitride are more preferred. As whiskers, for example, aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride can be mentioned. As a resin filler, for example, polyurethane, polyimide, methyl methacrylate resin, methyl methacrylate-butadiene-styrene copolymer resin (MBS) can be mentioned. These fillers can be used alone or in combination of two or more. Compared with inorganic fillers, resin fillers can give the adhesive layer flexibility in a high temperature environment (for example, 260°C), so it can help to improve reflow resistance. Flexibility is improved, thereby also improving film formation.

[0109] From the viewpoint of improving dispersibility or adhesion, a filler subjected to surface treatment can be used. By subjecting the filler to surface treatment, the physical properties of the filler can be appropriately adjusted. As surface treatment, glycidyl (epoxy), amine, benzene, aniline, acrylic (methacrylic) or ethylene treatments can be cited. From the viewpoint of dispersibility, fluidity and adhesion, glycidyl, aniline and acrylic (methacrylic) are preferred. From the viewpoint of storage stability, benzene and acrylic (methacrylic) are further preferred. From the viewpoint of ease of surface treatment, silane treatments such as epoxysilane, aminosilane and acrylic silane are preferred.

[0110] From the viewpoint of preventing biting during connection of flip chips, the average particle size of the filler is preferably 1.5 μm or less, and from the viewpoint of visual recognition (transparency), it is more preferably 1.0 μm or less. The "average particle size" referred to herein refers to the value obtained by analyzing MEK (methyl ethyl ketone) as a solvent using a laser diffraction particle size distribution measuring device.

[0111] Based on the mass of the solid component of the adhesive layer, the content of the filler is preferably 30 to 90% by mass, and more preferably 40 to 80% by mass. When the content of the filler is 30% by mass or more, sufficient heat dissipation is easily achieved, pores can be formed, and the moisture absorption rate can be reduced. On the other hand, when the content of the filler is 90% by mass or less, the viscosity can be suppressed from becoming too high, sufficiently high fluidity can be ensured, and the bite (capture) of the filler in the connecting portion can be fully suppressed.

[0112] The adhesive layer may also contain additives such as ion trappers, antioxidants, silane coupling agents, titanium coupling agents, and leveling agents. They may be used alone or in combination of two or more. The content of these additives may be appropriately adjusted to demonstrate the effects of each additive.

[0113] As mentioned above, from the viewpoint of operability, it is preferred to prepare a film-like adhesive in advance when making a chip with an adhesive. The film-like adhesive can be made in the following manner. That is, the varnish is prepared by adding the above-mentioned components to an organic solvent and stirring or kneading the mixed solution. After applying the varnish on the substrate film to which the demoulding process has been implemented, the organic solvent is reduced by heating, thereby forming a film-like adhesive on the substrate film. The coating of the varnish can be implemented using, for example, a blade coater, a roller coater, an applicator, a die coater or a comma coater.

[0114] The substrate film is not particularly limited as long as it has heat resistance that can withstand the heating conditions for volatilizing the organic solvent, and examples thereof include polyester film, polypropylene film, polyethylene terephthalate film, polyimide film, polyetherimide film, polyether naphthalate film, and methylpentene film. The substrate film is not limited to a single-layer film made of these films, and may be a multilayer film made of two or more materials.

[0115] Specifically, the conditions for volatilizing the organic solvent from the varnish are preferably heating at 50 to 200° C. for 0.1 to 90 minutes. The content of the organic solvent is preferably reduced to 1.5% by mass or less if it does not affect the generation of voids or viscosity adjustment after mounting.

[0116] When manufacturing chips with adhesive by dicing a semiconductor wafer having an adhesive layer formed on the surface, for example, a varnish film may be formed on the surface of the semiconductor wafer by spin coating and then heated to reduce the solvent.

[0117] Example

[0118] Hereinafter, the present invention will be described based on examples. However, the present invention is not limited to the following examples.

[0119] <Example 1>

[0120] (Preparation of varnish for forming adhesive layer)

[0121] The varnish was prepared by mixing the following compounds in the ratio shown in Table 1 and performing vacuum degassing. In addition, as a solvent, MEK was used.

[0122] (1) Thermosetting resin (epoxy resin) with a weight average molecular weight of less than 10,000

[0123] · A polyfunctional solid epoxy having a trisphenol methane skeleton (manufactured by Mitsubishi Chemical Corporation, EP1032H60 (hereinafter referred to as "EP1032"), weight average molecular weight: 800 to 2000)

[0124] Bisphenol F type liquid epoxy (manufactured by Mitsubishi Chemical Corporation, YL983U (hereinafter referred to as "YL983"), molecular weight: about 336)

[0125] Flexible semi-solid epoxy (Mitsubishi Chemical Corporation, YL7175-1000 (hereinafter referred to as "YL7175"), weight average molecular weight: 1000 to 5000)

[0126] (2) Curing agent

[0127] ·2,4-Diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric-triazine isocyanuric acid adduct (2MAOK-PW manufactured by SHIKOKU CHEMICALS CORPORATION (hereinafter referred to as "2MAOK"))

[0128] (3) A polymer component having a weight average molecular weight of 10,000 or more

[0129] Phenoxy resin (Tohto Kasei Industrial Co., Ltd., ZX1356-2 (hereinafter referred to as "ZX1356"), Tg: about 71°C, weight average molecular weight: about 63,000)

[0130] (4) Flux (carboxylic acid)

[0131] Glutaric acid (manufactured by Aldrich, melting point: about 98°C)

[0132] (5) Resin filler

[0133] Organic filler (manufactured by Rohm and Haas Company, EXL-2655: core-shell type organic fine particles)

[0134] (6) Inorganic fillers

[0135] Silica filler (Admatechs, SE2050, average particle size: 0.5 μm)

[0136] Nano-silica filler treated with methacrylic acid (Admatechs, YA050C-SM (hereinafter referred to as "SM nano-silica"), average particle size: about 50 nm)

[0137] [Table 1]

[0138]

[0139]

[0140] (Manufacturing of film adhesive)

[0141] The varnish was applied to a 50 μm thick polyethylene terephthalate film (TEIJIN FILM SOLUTIONS LIMITED, trade name: Teijin Tetoron Film A-63) that had been subjected to a surface release treatment, and a film-like adhesive having a thickness of 45 μm was obtained through a drying process.

[0142] (Manufacturing of semiconductor devices)

[0143] A semiconductor chip with solder bumps (WALTS-TEG CC80 (product name), manufactured by WALTS CO., LTD.) was prepared as a first member. The structure of this semiconductor chip is as follows.

[0144] Chip size: 7.3mm×7.3mm×0.05mm

[0145] Bump height: about 45μm (total height of copper pillar and solder)

[0146] Number of bumps: 1048 pins

[0147] Bump pitch: 80μm

[0148] The prepared film-like adhesive was cut into the same size as the semiconductor chip (7.3 mm × 7.3 mm) to obtain an adhesive sheet. The adhesive sheet was laminated on the surface of the semiconductor chip (the side on which the solder was formed). The lamination was performed using a vacuum laminator V130 (Nikko-Materials Co., Ltd.) under the conditions of 80°C / 0.5 MPa / 60 s.

[0149] A semiconductor chip (WALTS-TEG IP80, manufactured by WALTS CO., LTD.) was prepared as a second member. The structure of this semiconductor chip is as follows.

[0150] Chip size: 10mm×10mm×0.1mm

[0151] Metal forming the connection part: Ni / Au

[0152] A semiconductor chip with solder bumps was mounted on the side of the semiconductor chip (second component) where the connection portion was formed, so that the side was in contact with the adhesive sheet. Then, a temporary crimping process was performed using a crimping device (FCB3, manufactured by Panasonic Corporation), and then a crimping process was performed using a laser welding machine (FDB250, manufactured by SHIBUYA CORPORATION). The temporary crimping process was performed under the conditions of 80°C / 25N / 1s. The crimping process was performed under the following conditions.

[0153] ·Crimp pressure: 30N

[0154] ·Crimp time: 1 second

[0155] Laser irradiation pattern: Figure 6 (a) (Areas 1, 3, 5, and 7 are irradiated with laser light.)

[0156] Laser irradiation time: 1 second

[0157] Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 1, 3, 5, and 7: 235°C

[0158] Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 2, 4, 6, and 8: 205°C

[0159] Temperature T9 of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of region 9: 204°C

[0160] Temperature difference (Tc-Ts): 30℃

[0161] Temperature difference (Ts-T9): 1℃

[0162] After the pressure bonding step, a curing step was performed using a pressurized oven device (VSU28, manufactured by Shinapex Co. Ltd.) under the conditions of 175° C. / 10 min / 0.4 MPa and a temperature increase rate of 20° C. / min. The semiconductor device according to this example was obtained through this curing step.

[0163] <Example 2>

[0164] A semiconductor device was produced in the same manner as in Example 1 except that the pressure bonding step was performed under the following conditions.

[0165] ·Crimp pressure: 30N

[0166] ·Crimp time: 3 seconds

[0167] Laser irradiation pattern: Figure 6 (a) (Laser light with a weaker intensity than that in Example 1 was irradiated.)

[0168] Laser irradiation time: 3 seconds

[0169] Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 1, 3, 5, and 7: 225°C

[0170] Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 2, 4, 6, and 8: 200°C

[0171] Temperature T9 of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of region 9: 200°C

[0172] Temperature difference (Tc-Ts): 25℃

[0173] Temperature difference (Ts-T9): 0℃

[0174] <Comparative Example 1>

[0175] A semiconductor device was produced in the same manner as in Example 1 except that the pressure bonding step was performed under the following conditions.

[0176] ·Crimp pressure: 30N

[0177] ·Crimp time: 1 second

[0178] Laser irradiation pattern: Figure 6 (b) (Areas 1, 3, 5, and 7 are irradiated with laser light, and areas 2, 4, 6, and 8 are irradiated with laser light of a weaker intensity than the laser light.)

[0179] Laser irradiation time: 1 second

[0180] Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 1, 3, 5, and 7: 225°C

[0181] Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 2, 4, 6, and 8: 215°C

[0182] Temperature difference (Tc-Ts): 10℃

[0183] <Comparative Example 2>

[0184] A semiconductor device was produced in the same manner as in Example 2 except that the pressure bonding step was performed under the following conditions.

[0185] ·Crimp pressure: 30N

[0186] ·Crimp time: 3 seconds

[0187] Laser irradiation pattern: Figure 6 (b) (Laser light with a weaker intensity than that of Comparative Example 1 was irradiated.)

[0188] Laser irradiation time: 3 seconds

[0189] Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 1, 3, 5, and 7: 210°C

[0190] Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 2, 4, 6, and 8: 205°C

[0191] Temperature difference (Tc-Ts): 5℃

[0192] <Example 3>

[0193] A semiconductor device was produced in the same manner as in Example 1 except that the compression bonding step was carried out under the following conditions. After the compression bonding step, a curing step was carried out under the same conditions as in Example 1 using a pressurized oven apparatus (PCOA-01, manufactured by NTT Advanced Technology Corporation).

[0194] ·Crimp pressure: 30N

[0195] ·Crimp time: 1 second

[0196] Laser irradiation pattern: Figure 7 (Areas 1, 3, 5, and 7 were irradiated with 100% laser output, and the outer portions of areas 2, 4, 6, and 8 were irradiated with 10% laser output.)

[0197] Laser irradiation time: 1 second

[0198] Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 1, 3, 5, and 7: 240°C

[0199] Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 2, 4, 6, and 8: 211°C

[0200] Temperature T9 of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of region 9: 205°C

[0201] Temperature difference (Tc-Ts): 29℃

[0202] Temperature difference (Ts-T9): 6℃

[0203] <Example 4>

[0204] A semiconductor device was produced in the same manner as in Example 3 except that the pressure bonding step was performed under the following conditions.

[0205] ·Crimp pressure: 30N

[0206] ·Crimp time: 3 seconds

[0207] Laser irradiation pattern: Figure 7 (Laser light with a weaker intensity than that in Example 3 was irradiated.)

[0208] Laser irradiation time: 3 seconds

[0209] Average temperature Tc of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 1, 3, 5, and 7: 230°C

[0210] Average temperature Ts of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of each of regions 2, 4, 6, and 8: 205°C

[0211] Temperature T9 of the bonding tool surface (outer surface of the semiconductor chip with solder bumps) in the center of region 9: 200°C

[0212] Temperature difference (Tc-Ts): 20℃

[0213] Temperature difference (Ts-T9): 5℃

[0214] <Evaluation of semiconductor devices>

[0215] The semiconductor devices according to the examples and comparative examples were evaluated as follows.

[0216] (1) Evaluation of initial conductivity

[0217] The initial connection resistance values ​​of the semiconductor devices according to the examples and comparative examples were measured using a multimeter (R6871E, manufactured by ADVANTEST CORPORATION) to evaluate the initial conductivity. The evaluation criteria are as follows. The results are shown in Tables 2 and 3.

[0218] A: The initial connection resistance value of the peripheral part is 30~35Ω.

[0219] B: The initial connection resistance value of the peripheral part exceeds 35Ω.

[0220] (2) Evaluation of porosity generation rate

[0221] The porosity generation rate of the semiconductor device involved in the embodiment and the comparative example was evaluated by the following method. First, an ultrasonic imaging diagnostic device (Insight-300, manufactured by Insight Co., Ltd) was used to capture the appearance image of the semiconductor device involved in the embodiment and the comparative example. The image of the adhesive layer on the semiconductor chip was read using a scanner (GT-9300UF, manufactured by EPSON). The pore portion was identified by tone correction and binarization of the image using image processing software (Adobe Photoshop (registered trademark), Adobe Systems Co., Ltd.), and the proportion of the pore portion was calculated using a histogram. The evaluation criteria are as follows. The results are shown in Tables 2 and 3.

[0222] A: The ratio of the voids to the adhesive area on the semiconductor chip is 5% or less.

[0223] B: The proportion of the voids exceeds 5% based on the area of ​​the adhesive portion on the semiconductor chip.

[0224] (3) Evaluation of fillet width

[0225] The semiconductor devices involved in the embodiments and comparative examples were observed from above using a digital microscope (VHX-5000, manufactured by KEYENCE CORPORATION). Then, the maximum value of the portion (rounded corner) protruding from the square semiconductor chip was measured. The maximum value of the rounded corner width was measured for each of the four sides of the semiconductor chip, and the average value was set as the rounded corner width. The results are shown in Tables 2 and 3.

[0226] (4) Evaluation of coverage

[0227] The semiconductor devices involved in the examples and comparative examples were observed from above using a digital microscope (VHX-5000, manufactured by KEYENCE CORPORATION). Then, the width of the portion (rounded corner) protruding from the square semiconductor chip, that is, the width (coverage) of two points at a position 200 μm away from the corner of the semiconductor chip was measured (refer to Figure 4 ). The coverage of eight points in total was measured for the four corners of the semiconductor chip, and the average value was calculated. The results are shown in Tables 2 and 3. In addition, the "coverage index" described in Tables 2 and 3 is a value calculated by dividing the fillet width (average value) by the coverage (average value). "-" in the table means that it was not measured.

[0228] [Table 2]

[0229]

[0230]

[0231] [Table 3]

[0232] Example 3 Example 4 Average temperature Tc(℃) 240 230 Average temperature Ts(℃) 211 205 Temperature T9(℃) 205 200 Tc-Ts(℃) 29 25 Ts-T9(℃) 6 5 Evaluation of initial continuity A A Evaluation of porosity generation rate A A Fillet width (μm) 85 115 Coverage(μm) 21 40 Coverage Index 0.25 0.35

[0233] Industrial Applicability

[0234] According to the present invention, a semiconductor device having a small rounded corner on the side of a semiconductor chip and capable of ensuring coverage and a method for manufacturing the same can be provided.

[0235] Explanation of symbols

[0236] 1 to 9-areas, 10-semiconductor chip (first component), 10a-copper pillar (first connecting part), 10b-solder bump (first connecting part), 11 to 13-semiconductor chip, 20-substrate (second component), 20a-circuit (second connecting part), 30-adhesive layer, 40-laminated body, 50, 70-semiconductor device, 60-intermediate part (second component), A1-laser irradiated part, A2-laser non-irradiated part, C-corner, F-pressing force, L-laser, S-side, Sa-one end, Sb-the other end.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The semiconductor device comprises: A first component having a first connecting portion and having a side extending in a straight line; A second component having a second connecting portion; and an adhesive layer disposed between the first component and the second component, The first connection portion is electrically connected to the second connection portion, The method for manufacturing a semiconductor device comprises: a lamination step of preparing a laminated body in which the first component, the adhesive layer, and the second component are laminated in sequence; and The pressure bonding step includes applying heat to the laminated body while applying a pressing force to the laminated body in a thickness direction. The first component is a semiconductor chip having a square or rectangular shape, In the pressure bonding step, heat is applied to the laminated body in a manner that satisfies the following condition 1: <Condition 1> The side of the semiconductor chip is divided into three equal parts into a total of nine areas, and the area including a corner of the semiconductor chip among the nine areas is set as area 1, and the areas arranged from area 1 along the peripheral part of the semiconductor chip are set as areas 2 to 8. Then, the difference between the average temperature Tc of the outer surface of the semiconductor chip in the center of each area 1, 3, 5, and 7 and the average temperature Ts of the outer surface of the semiconductor chip in the center of each area 2, 4, 6, and 8, that is, Tc-Ts, is greater than 15°C.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: In the pressure bonding step, heat is applied to the laminated body in a manner that further satisfies the following condition 2: <Condition 2> The area including the center of the semiconductor chip among the nine areas is set as area 9, and the difference between the average temperature Ts of the outer surface of the semiconductor chip in the center of each area 2, 4, 6, and 8 and the temperature T9 of the outer surface of the semiconductor chip in the center of area 9, that is, Ts-T9, is greater than 5°C.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The second component is a component selected from the group consisting of a circuit substrate, a semiconductor chip, and a semiconductor wafer.

4. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The adhesive layer contains a thermosetting resin with a weight average molecular weight less than 10,000 and a curing agent.

5. The method for manufacturing a semiconductor device according to claim 4, wherein: The adhesive layer further contains a polymer component having a weight average molecular weight of 10,000 or more.

6. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The adhesive layer is a film-like adhesive. 7 . A semiconductor device manufactured by the method for manufacturing a semiconductor device according to claim 1 .

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