New integrated circuit failure analysis and detection method

Abstract

The embodiments of the present application relate to a novel integrated circuit failure analysis detection method. According to one embodiment of the present application, the novel integrated circuit failure analysis detection method comprises: forming a first film; placing an integrated circuit component on the first film; and forming a second film on the integrated circuit component and the first film to obtain a sealed integrated circuit component; wherein the first film and the second film enclose the entire outer surface of the integrated circuit component. According to another embodiment of the present application, a grinding method for integrated circuit component testing comprises providing a sealed integrated circuit component obtained according to the above-mentioned novel integrated circuit failure analysis detection method; and grinding in a direction toward a surface of the sealed integrated circuit component. The novel integrated circuit failure analysis detection method provided by the embodiments of the present application can effectively solve the problems encountered in conventional technologies.

Description

Technical Field

[0001] The embodiments of the present application generally relate to the semiconductor field, and more specifically, to a novel integrated circuit failure analysis detection method. Background Art

[0002] In the test of failure analysis of integrated circuit components, the integrated circuit components need to be sealed with film first. The traditional sealing process uses positioning clips or double-sided tape to fix the integrated circuit components, and then pours the colloid into the mold / container containing the fixed integrated circuit components, and lets it stand for a certain period of time to solidify the colloid. Finally, the cured glue column containing the integrated circuit components is ground to test the specific parts of the integrated circuit components. Because the use of positioning clips can easily cause the arc of the fixed part to be damaged, and the bonding surface between the integrated circuit components and the double-sided tape is small, the adhesion is not strong, and the integrated circuit components are easily dumped due to fluid impact during the pouring of the solvent.

[0003] Therefore, the existing integrated circuit failure analysis detection methods need to be further improved. Summary of the invention

[0004] One of the purposes of the embodiments of the present application is to provide a novel integrated circuit failure analysis detection method, which effectively solves certain problems in traditional technologies.

[0005] An embodiment of the present application provides a novel integrated circuit failure analysis detection method, which includes: forming a first film; placing an integrated circuit component on the first film; and forming a second film on the integrated circuit component and the first film to obtain a sealed integrated circuit component; wherein the first film and the second film enclose the entire outer surface of the integrated circuit component.

[0006] According to another embodiment of the present application, at least one of the first film and the second film is formed by curing.

[0007] According to another embodiment of the present application, the curing agent includes an amine curing agent, an acid anhydride curing agent or a latent curing agent.

[0008] According to another embodiment of the present application, the amine curing agent includes polyamides, aliphatic amines, aromatic amines, polyether amines or imidazoles; the anhydride curing agent includes aromatic anhydrides, aliphatic anhydrides or alicyclic anhydrides; the latent curing agent includes dicyandiamide, 594,596 curing agent or boron trichloride-monoethylamine complex.

[0009] According to another embodiment of the present application, at least one of the first film and the second film is composed of a resin and a curing agent, wherein the resin includes an acrylic resin or an epoxy resin, and the weight ratio of the resin to the curing agent is about 1:1 to 4:1.

[0010] According to another embodiment of the present application, the weight ratio of the acrylic resin to the curing agent is about 5:2.

[0011] According to another embodiment of the present application, the weight ratio of the epoxy resin to the curing agent is about 3:1.

[0012] According to another embodiment of the present application, at least one of the first film and the second film is made of a photocurable resin.

[0013] Another embodiment of the present application also provides a grinding method for integrated circuit component testing, which includes providing a sealed integrated circuit component obtained according to the above-mentioned sealing method; and grinding along a direction toward a surface of the sealed integrated circuit component.

[0014] Compared with the prior art, the novel integrated circuit failure analysis detection method provided in the embodiment of the present application effectively solves the problem of damage to the arc of the fixed part caused by the use of positioning clamps in the traditional method, and also avoids the problem of easy collapse of the integrated circuit component during the grinding process caused by the integrated circuit component directly attached to the base. At the same time, it can also meet the grinding needs in multiple directions and positions. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The following will briefly describe the drawings necessary for describing the embodiments of the present application or the prior art to facilitate the description of the embodiments of the present application. Obviously, the drawings described below are only some of the embodiments in the present application. For those skilled in the art, without the need for creative work, drawings of other embodiments can still be obtained based on the structures illustrated in these drawings.

[0016] Figure 1A-Figure 1C Schematic diagram of traditional integrated circuit failure analysis detection method.

[0017] Figure 2 A schematic diagram of another traditional integrated circuit failure analysis detection method.

[0018] Figure 3A-3C The present invention provides an explanation of a novel integrated circuit failure analysis detection method according to some embodiments of the present application.

[0019] Figure 4A-4B The invention provides an explanation of a novel integrated circuit failure analysis detection method for integrated circuit component testing according to some embodiments of the present application. DETAILED DESCRIPTION

[0020] In order to better understand the spirit of the embodiments of the present application, some preferred embodiments of the present application are further described below.

[0021] The embodiments of the present application will be described in detail below. In the full text of the present application specification, the same or similar components and components with the same or similar functions are represented by similar reference numerals. The embodiments of the accompanying drawings described herein are illustrative, graphical, and are used to provide a basic understanding of the present application. The embodiments of the present application should not be interpreted as limiting the present application.

[0022] As used herein, the terms "substantially," "substantially," "essentially," and "about" are used to describe and illustrate small variations. When used in conjunction with an event or circumstance, the terms may refer to instances where the event or circumstance occurred exactly as well as instances where the event or circumstance occurred very approximately. For example, when used in conjunction with a numerical value, the terms may refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two values ​​may be considered “substantially” the same if the difference between them is less than or equal to ±10% of the average of the values ​​(e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%).

[0023] In this specification, unless otherwise specified or limited, relative terms such as "central", "longitudinal", "lateral", "front", "rear", "right", "left", "inner", "outer", "lower", "higher", "horizontal", "vertical", "above", "below", "above", "below", "top", "bottom" and their derivative terms (such as "horizontally", "downwardly", "upwardly", etc.) should be interpreted as referring to the directions described in the discussion or depicted in the drawings. These relative terms are only used for convenience of description and do not require that the present application be constructed or operated in a specific direction.

[0024] In addition, sometimes amounts, ratios and other numerical values ​​are presented in range format herein. It should be understood that such range format is for convenience and brevity, and should be flexibly understood to include not only the numerical values ​​explicitly specified as range limits, but also all individual numerical values ​​or sub-ranges encompassed within the range, as if each numerical value and sub-range were explicitly specified.

[0025] Furthermore, for ease of description, “first”, “second”, “third”, etc. may be used herein to distinguish different components in one figure or a series of figures. “First”, “second”, “third”, etc. are not intended to describe the corresponding components.

[0026] Figure 1A-Figure 1C Figure 1 is a schematic diagram of the traditional integrated circuit failure analysis and detection method. Figure 1A As shown, the integrated circuit assembly 10 is erected on the base 110 of the container by using a positioning clip 112. In order to further fix the integrated circuit assembly 10, a double-sided adhesive can be used to bond its bottom to the base 110; Figure 1B As shown in the figure, pour the prepared solvent into the container and let it stand for a while to complete the solidification. Finally, after demolding, a glue column containing integrated circuit components can be obtained, such as Figure 1C The glue column 12 shown can then be ground.

[0027] When grinding the glue column 12, since it is necessary to grind the integrated circuit component 10 inside it according to different positions, for example, it can be as follows: Figure 1C Grind in the direction of arrow a.

[0028] Secondly, in the above-mentioned traditional film sealing method, the use of the positioning clip 112 cannot prevent some parts of the integrated circuit component from not being sealed, and it is easy to cause the wire arc of the part of the integrated circuit component that contacts the positioning clip to be damaged. Moreover, since the combination area between the positioning clip and the double-sided adhesive is small after the integrated circuit component is fixed by the positioning clip, the adhesion is not strong. In the process of pouring the solvent, the integrated circuit component is easily overturned due to the impact of the colloid, thereby making the integrated circuit component in the glue column 12 have a certain tilt angle relative to the side of the glue column. Therefore, the glue column 12 obtained by the above-mentioned traditional film sealing method needs to be ground in an inclined state, which makes it difficult to control the grinding of the glue column 12, and it is also difficult to implement it.

[0029] In view of the above problems, the current general solution is not to use a positioning clip to fix the integrated circuit component, but to directly use double-sided tape to fix the integrated circuit component horizontally on the mold / container base. Figure 2 FIG. 1 is a schematic diagram of another conventional sealing and grinding method for integrated circuit component testing. Figure 2As shown, since the method of fixing the integrated circuit component by the positioning clip is removed, the integrated circuit component 10 is directly attached to the mold / container base through the double-sided tape, and the bonding surface is large, which avoids the risk of the integrated circuit component tipping over due to the small bonding surface, and is easy to hold when grinding. At the same time, since the integrated circuit component is placed horizontally in the glue column, the grinding direction of the integrated circuit component is consistent with the grinding direction of the glue column, thereby meeting the multi-directional grinding position requirements of the integrated circuit component. However, due to the incomplete colloid wrapping, that is, one side of the integrated circuit component (the side attached to the double-sided tape) is exposed on the outside of the cured glue column, so that one bottom surface of the integrated circuit component cannot be completely wrapped by the colloid. In the subsequent side grinding process, the glue column needs to lie on its side for grinding. At this time, due to the drive of the grinder turntable, it is easy to cause the risk of the integrated circuit component collapsing from the glue column.

[0030] To this end, the present application proposes a novel integrated circuit failure analysis detection method. Figures 3A-3C The invention provides an explanation of a sealing and polishing method for integrated circuit component testing according to some embodiments of the present application.

[0031] like Figure 3A As shown, the integrated circuit component 20 is placed on the formed first film 210, and the second film 220 is formed on the integrated circuit component 20 and the first film 210, as shown in FIG. Figure 3B This layered curing process allows the first film 210 and the second film 220 to enclose the entire outer surface of the integrated circuit component 20, as shown in FIG. Figure 3C The glue column 22 after demoulding.

[0032] By means of the above-mentioned layered step-by-step curing method, the integrated circuit component 20 in the glue column 22 is completely wrapped by the cured colloid on all sides, thereby solving the problem that the integrated circuit component is easily collapsed due to the rotation of the turntable during the grinding process because the bottom surface of the integrated circuit component cannot be completely wrapped by the colloid.

[0033] According to some embodiments of the present application, the formation of the first film 210 or the second film 220 may include the following steps:

[0034] 1. Mix resin A and curing agent B in a certain proportion, and prepare a container to load the mixed colloid of resin A and curing agent B;

[0035] 2. Pour a portion of the mixed colloid of resin A and curing agent B into a container and let it stand for a period of time to solidify the mixed colloid to form a first film 210;

[0036] 3. Placing the integrated circuit component 20 on the first film 210;

[0037] 4. Pour the remaining mixed colloid of resin A and curing agent B into the container containing the cured first film 210 and the integrated circuit component 20, and let it stand for a period of time until the integrated circuit component 20 and the first film 210 are combined with the remaining mixed colloid of resin A and curing agent B poured in later, and complete the secondary curing to form the second film 220 covering the first film 210 and the integrated circuit component 20; and

[0038] 5. The cured integrated circuit component 20 , the first film 210 and the second film 220 are taken out from the container to obtain a sealed integrated circuit component, that is, to form a glue column 22 .

[0039] According to another embodiment of the present application, the resin A in the above step may be an acrylic resin, and the weight ratio of the resin A to the curing agent B may be about 1:1 to 4:1. Among them, the curing agent B may be a polyamide curing agent, specifically composed of the following components in the following weight ratios: about 25% benzyl alcohol, about 25% N-aminoethylpiperidin, about 25% isophorone diamine, and about 25% triethylenetetramine. When the weight ratio of the acrylic resin to the curing agent B is about 5:2, the standing time required for curing is about 10 minutes to 20 minutes at room temperature, so that the cured colloid has good clarity.

[0040] According to another embodiment of the present application, the curing agent B in the above steps includes an amine curing agent, which includes: polyamides, aliphatic amines, aromatic amines, polyether amines, imidazoles or other analogs; the curing agent B may also include an anhydride curing agent, which includes: aromatic anhydrides, aliphatic anhydrides, alicyclic anhydrides or other analogs; and the curing agent B may also include a latent curing agent, which includes: dicyandiamide, 594,596 curing agent, boron trichloride-monoethylamine complex or other analogs.

[0041] According to another embodiment of the present application, the resin A in the above step may be an epoxy resin, and the weight ratio of the resin A to the curing agent B may be about 2:1 to 4:1. Among them, the curing agent B may be a polyamide curing agent, specifically composed of the following components in the following weight ratios: about 25% benzyl alcohol, about 25% N-aminoethylpiperidin, about 25% isophorone diamine, and about 25% triethylenetetramine. When the weight ratio of the epoxy resin to the curing agent B is about 3:1, the standing time required for curing is about 4 hours at room temperature, so that the cured colloid has excellent adhesion, low viscosity, and can penetrate into small gaps / holes, so that the colloid is better combined with the integrated circuit component and the fit is increased.

[0042] According to another embodiment of the present application, the first film 210 and / or the second film 220 may also be formed using a photocurable resin. The glue column cured with the photocurable resin has high hardness, fast curing speed, high energy utilization, and the required curing time is about 30 minutes of ultraviolet light. It is simple to operate, economical, and has low volatile organic matter (VOC), which is environmentally friendly. For example, a mixed colloid of resin A and curing agent B is used to form the first film 210, and then a photocurable resin is used to form the second film 220. For another example, a photocurable resin is used to form the first film 210, and then a mixed colloid of resin A and curing agent B is used to form the second film 220.

[0043] Figure 4A and Figure 4B The invention provides an explanation of a novel integrated circuit failure analysis detection method for integrated circuit component testing according to some embodiments of the present application.

[0044] Figure 4A FIG. 2 is a side view of the glue column 22. In the layered step curing method in the embodiment of the present application, since the integrated circuit component 20 is wrapped in the glue column 22 in a flat manner, that is, the upper and lower surfaces of the integrated circuit component 20 are parallel to the upper and lower surfaces of the glue column 22. If it is necessary to grind the lower surface of the integrated circuit component 20, since the upper and lower surfaces of the integrated circuit component 20 are parallel to the surface of the first film 210 or the surface of the second film 220, it is only necessary to lay the glue column 22 flat and then grind it. Figure 4A As shown, the grinding direction b is perpendicular to the lower surface of the integrated circuit component 20. At this time, the glue column 22 is very convenient to hold for grinding.

[0045] By adopting the novel integrated circuit failure analysis detection method in the embodiment of the present application, since the integrated circuit component can be placed with reference to the grinding position when positioning, the grinding position of the glue column containing the integrated circuit component formed after the film is sealed is also easy to control, thereby realizing multi-directional and multi-position grinding requirements, such as grinding line arcs, one or two welding points, etc.

[0046] Figure 4B is a top view of the glue column 22, such as Figure 4B As shown, the glue column 22 can be ground along the entry direction d according to the grinding position c.

[0047] The layered step-by-step curing method proposed in the present application can solve the problem in the traditional technology that the positioning clamps are prone to damage the wire arcs at the fixed parts when positioning the integrated circuit components, and can avoid the risk of the integrated circuit components tipping over during the glue pouring and curing. It can also solve the problem in the current optimization method that the integrated circuit components are prone to collapse from the colloid during the grinding process due to incomplete wrapping of the integrated circuit components.

[0048] The technical content and technical features of this application have been disclosed as above, but those skilled in the art may still make various substitutions and modifications based on the teachings and disclosures of this application without departing from the spirit of this application. Therefore, the protection scope of this application should not be limited to the contents disclosed in the embodiments, but should include various substitutions and modifications that do not depart from this application, and are covered by the claims of this patent application.

Claims

1. A novel integrated circuit failure analysis detection method, comprising: forming a cured first film; placing an integrated circuit component on the first film; as well as forming a cured second film on the integrated circuit component and the first film to fix the integrated circuit component to obtain a sealed integrated circuit component; The cured first film and the cured second film enclose the entire outer surface of the integrated circuit component. 2 . The method according to claim 1 , wherein at least one of the first film and the second film consists of a resin and a curing agent.

3. The method according to claim 2, wherein the curing agent comprises an amine curing agent, an acid anhydride curing agent or a latent curing agent.

4. The method according to claim 3, wherein when the curing agent is an amine curing agent, the amine curing agent includes polyamides, aliphatic amines, aromatic amines, polyether amines or imidazoles; when the curing agent is an anhydride curing agent, the anhydride curing agent includes aromatic anhydrides, aliphatic anhydrides or alicyclic anhydrides; when the curing agent is a latent curing agent, the latent curing agent includes dicyandiamide, 594,596 curing agent or boron trichloride-monoethylamine complex. 5 . The method according to claim 2 , wherein the resin comprises acrylic resin or epoxy resin, and the weight ratio of the resin to the curing agent is 1:1 to 4:

1. The method according to claim 5 , wherein the weight ratio of the acrylic resin to the curing agent is 5:

2. 7 . The method according to claim 5 , wherein the weight ratio of the epoxy resin to the curing agent is 3:

1. The method according to claim 1 , wherein at least one of the first film and the second film is composed of a photocurable resin.

9. A grinding method for integrated circuit component testing, comprising: Providing the sealed integrated circuit component obtained by the method according to claim 1; as well as The grinding is performed along a direction toward a surface of the sealed integrated circuit component.

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