A complete design method and device for a passive rubidium atomic clock

Abstract

The present invention relates to the technical field of passive rubidium atomic clock design, and specifically, to a complete design method and device for a passive rubidium atomic clock. It includes a microcontroller, a satellite time synchronization module, a test system, a frequency drift correction module, an operation reliability monitoring module, and a big data modeling of component parameters. In the present invention, the VCXO frequency-divided signal is compared with the GPS second pulse signal to detect the frequency deviation. In addition, after the frequency output signal of the rubidium atomic frequency standard is passed through an isolation amplifier, one path is used for output, and the other path is sent to a frequency drift and stability tester to be compared with a high-stability clock signal to obtain the original frequency difference, and then the microcontroller is used to realize the control of frequency deviation correction.

Description

Technical Field

[0001] The present invention relates to the technical field of passive rubidium atomic clock design, and more specifically, to a complete design method and device for a passive rubidium atomic clock. Background Art

[0002] With the development of China's aviation field, almost every year several artificial earth satellites are launched into space. Moreover, the development of space technologies such as the launch system of artificial earth satellites, navigation, carrier rocket navigation, missile systems, wireless communication, television relay, transceiver-separated radar, and GPS has increasingly higher requirements for the long-term and short-term accuracy and stability of the frequencies and time bases used.

[0003] Due to the long-term stability of the rubidium radiation frequency, the resonance frequency of the passive rubidium atom is determined as the reference frequency by the frequency standard. The rubidium atomic frequency standard used as the frequency standard and time standard has the characteristics of low drift, high stability, radiation resistance, small volume, light weight, and low power consumption. The passive rubidium atomic clock with extremely high accuracy has a timekeeping error of no more than 1 s in 3.7 million years.

[0004] However, the 1PPS signal output by the passive rubidium atom is obtained by dividing the frequency signal of the rubidium oscillator and is synchronized with the UTC time output by GPS. However, frequency hopping may occur during the synchronization process, and frequency deviation may occur, but the deviation cannot be synchronously detected and corrected in a timely manner. Summary of the Invention

[0005] The purpose of the present invention is to provide a complete design method and device for a passive rubidium atomic clock to solve the problems raised in the above background art.

[0006] To achieve the above purpose, the present invention provides a complete design method and device for a passive rubidium atomic clock, including a microcontroller, a satellite time synchronization module, a test system, a frequency drift correction module, an operation reliability monitoring module, and a big data modeling of component parameters, where:

[0007] The microcontroller is connected to the satellite time synchronization module; the output end of the satellite time synchronization module is connected to the test system; the output end of the test system is connected to the frequency drift correction module; the output end of the frequency drift correction module is connected to the operation reliability monitoring module; the output end of the operation reliability monitoring module is connected to the big data modeling of component parameters.

[0008] As a further improvement of this technical solution, the test system includes a field strength test module and a stability test module; the input end of the field strength test module is connected to the satellite time synchronization module; the output end of the field strength test module is connected to the stability test module; both the field strength test module and the stability test module are bidirectionally connected to the microcontroller; the output end of the stability test module is connected to the frequency drift correction module.

[0009] As a further improvement of this technical solution, the satellite time synchronization module includes a temperature compensation module, a crystal oscillator module, a DDS frequency division module, a GPS receiving module, a quantum system, a phase discriminator, and a short-term stability module, where:

[0010] The input end of the crystal oscillator module is connected to the microcontroller, and the output end of the crystal oscillator module outputs a frequency signal to the DDS frequency division module and the short-term stability module through an isolation amplifier, so as to transmit the signal to the quantum system through the short-term stability module; the output end of the DDS frequency division module is connected to the phase discriminator; the output end of the phase discriminator is connected to the crystal oscillator module; the input end of the phase discriminator is connected to the GPS receiving module; the input end of the crystal oscillator module is also bidirectionally connected to the temperature compensation module.

[0011] As a further improvement of this technical solution, the short-term stability module includes a VCXO, a time correction module, a servo module, and a voltage-controlled correction module, where:

[0012] The output end of the VCXO is connected to the quantum system to form a traditional electronic circuit; the output end of the quantum system is connected to the servo module; the output end and the input end of the servo module are respectively connected to the voltage-controlled correction module and the time correction module; the output end of the voltage-controlled correction module is connected to the VCXO; the output end of the VCXO is also connected to the time correction module; the input end of the time correction module is also connected to the GPS receiving module.

[0013] As a further improvement of this technical solution, the field strength test module includes an optical field test module, a microwave field test module, a magnetic field test module, a temperature field test module, and an electric field test module.

[0014] As a further improvement of this technical solution, the frequency drift correction module includes a frequency drift stability tester, a rubidium atomic frequency standard physical system, a magnetic field constant current source drive module, and a D / A converter.

[0015] The second object of the present invention is to provide a complete design method for a passive rubidium atomic clock, including the complete passive rubidium atomic clock design device described in any one of the above, and including the following method steps:

[0016] S1. Satellite time synchronization: The GPS receiver receives the frequency signal from the GPS antenna, and performs phase discrimination on the frequency signal obtained by dividing the frequency signal generated by the crystal oscillator by 1 / 1000 through the DDS frequency divider and the frequency signal generated by the GPS receiver;

[0017] S2. Field strength test: Use the optical field test module, microwave field test module, magnetic field test module, temperature field test module, and electric field test module to detect the field strength of the atomic clock;

[0018] S3. Stability test: Evaluate the stability index of the detected frequency source, and select a signal source at the same level or higher level than the detected frequency source as the compensation detection quantity source;

[0019] S4. Frequency drift correction: Use a rubidium atomic frequency standard, assume the order of magnitude of the daily stability and daily drift, and perform correction according to the order of magnitude of the daily stability and daily drift.

[0020] As a further improvement of this technical solution, in S2, the optical field test module uses the method of optical pumping to improve the signal-to-noise ratio of the passive rubidium atomic clock. The energy level shift of the passive rubidium atom caused by the pumping light is:

[0021]

[0022]

[0023] Among them, P is the dipole moment operator; E is the complex amplitude of the time optical electric field, γ is the lifetime of the α excited state; Eα is the excited state; E i is the energy of the ground state energy level.

[0024] As a further improvement of this technical solution, in S4, the rubidium atomic frequency standard adopts the solenoid current method, and the calculation formula for the magnitude of the magnetic field generated by the current is as follows:

[0025]

[0026] Among them, n is the number of turns per unit length of the coil; I is the energized current; is the constant 10 -7 .

[0027] As a further improvement of this technical solution, the calculation formula for the number of turns per unit length of the coil is as follows:

[0028]

[0029] Among them, m is the number of turns of the magnetic field winding; r is the radius of the winding.

[0030] Compared with the prior art, the beneficial effects of the present invention are as follows: By comparing the VCXO frequency division signal with the GPS second pulse signal, the frequency deviation is detected. In addition, after the overall frequency output signal of the rubidium atomic frequency standard passes through the isolation amplifier, one path is used for output, and the other path is sent to the frequency drift and stability tester to compare with the high-stability clock signal to obtain the original frequency difference, and then the microcontroller is used to realize the control of the frequency deviation correction. Brief Description of the Drawings

[0031] Figure 1 is the overall module block diagram of the present invention;

[0032] Figure 2 Block diagram of the crystal oscillator module of the present invention;

[0033] Figure 3 Schematic diagram of the temperature compensation module circuit of the present invention (one);

[0034] Figure 4 Schematic diagram of the temperature compensation module circuit of the present invention (two);

[0035] Figure 5 Block diagram of the DDS frequency division module of the present invention;

[0036] Figure 6 Block diagram of the VCXO correction module of the present invention (one);

[0037] Figure 7 Block diagram of the VCXO correction module of the present invention (two);

[0038] Figure 8 Schematic diagram of the comparison between the VCXO frequency signal and the GPS second pulse of the present invention;

[0039] Figure 9 Block diagram of the atomic clock synchronization module of the present invention;

[0040] Figure 10 Schematic diagram of the comparison between the VCXO frequency division signal, the GPS second pulse, and the local reference source signal of the present invention (one);

[0041] Figure 11 Schematic diagram of the comparison between the VCXO frequency division signal, the GPS second pulse, and the local reference source signal of the present invention (two);

[0042] Figure 12 Schematic diagram of the VCXO frequency division signal and the local reference source signal circuit of the present invention;

[0043] Figure 13 Block diagram of the rubidium atomic frequency standard module of the present invention;

[0044] Figure 14 Detection signal function diagram of the present invention;

[0045] Figure 15 Schematic diagram of the spectral lamp circuit of the present invention;

[0046] Figure 16 Function diagram of the magnetic field and the center frequency of the present invention;

[0047] Figure 17 Schematic diagram of the servo circuit of the present invention;

[0048] Figure 18 Schematic diagram of the conversion of the high and low levels of the optical detection signal of the present invention;

[0049] Figure 19 One of the microwave power function graphs of the present invention;

[0050] Figure 20 Another microwave power function graph of the present invention;

[0051] Figure 21 Schematic diagram of the negative feedback constant current source circuit of the present invention;

[0052] Figure 22 Overall flowchart of the present invention. Detailed implementation manners

[0053] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0054] Please refer to Figures 1 - 22 , the present invention provides a technical solution:

[0055] The present invention provides a complete design method and device for a passive rubidium atomic clock, including a microcontroller, a satellite time synchronization module, a test system, a frequency drift correction module, an operation reliability monitoring module, and a big data modeling of component parameters, wherein:

[0056] Please refer to Figure 2 As shown, the microcontroller is connected to the satellite time synchronization module; the output end of the satellite time synchronization module is connected to the test system; the output end of the test system is connected to the frequency drift correction module; the output end of the frequency drift correction module is connected to the operation reliability monitoring module; the output end of the operation reliability monitoring module is connected to the big data modeling of component parameters.

[0057] In addition, the test system includes a field strength test module and a stability test module; the input end of the field strength test module is connected to the satellite time synchronization module; the output end of the field strength test module is connected to the stability test module; both the field strength test module and the stability test module are bidirectionally connected to the microcontroller; the output end of the stability test module is connected to the frequency drift correction module.

[0058] Furthermore, the satellite time synchronization module includes a temperature compensation module, a crystal oscillator module, a DDS frequency division module, a GPS receiving module, a quantum system, a phase discriminator, and a short-term stability module, wherein:

[0059] Please refer to Figure 2As shown, the input end of the crystal oscillator module is connected to the microcontroller, and the output end of the crystal oscillator module outputs the frequency signal to the DDS frequency division module and the short-term stability module through an isolation amplifier. The reference frequency signal of the DDS frequency division module can use the frequency signal generated by the crystal oscillator module itself, such as Figure 5 shown, so as to transmit the signal to the quantum system through the short-term stability module; the output end of the DDS frequency division module is connected to the phase discriminator; the output end of the phase discriminator is connected to the crystal oscillator module; the input end of the phase discriminator is connected to the GPS receiving module to form a PLL loop. The GPS receiving module preferably uses the Jupiter12 series TU35-D410-021 GPS module as the core part of the GPS receiver. This module provides a 10KHz frequency output synchronized with the 1PPS signal; the input end of the crystal oscillator module is also bidirectionally connected to the temperature compensation module.

[0060] In addition, please refer to Figure 3 shown, the bridge circuit temperature measurement in the temperature compensation module is mainly composed of two Rs with the same resistance value, a preset temperature value thermistor sensor Ro and a temperature measurement thermistor Rk, and is divided into the following two cases:

[0061] When the working environment temperature of the semiconductor device is constant, that is, the measured value of the thermistor Rk is equal to the preset value Ro, the output voltage difference between the A and B ends of the resistance bridge will be 0, and the output Uout of the entire temperature compensation output end will be 0;

[0062] When the working environment temperature of the semiconductor device changes, a certain voltage difference is formed between the A and B ends of the bridge circuit, which is transmitted to A3 through the voltage followers A1 and A2 for differential amplification. Considering that the amplified voltage difference can be effectively collected, a gain linear adjustment circuit A4 is added to the output end of the differential amplifier A3. The obtained temperature compensation voltage difference Uout is sent to the microprocessor for processing, and then acts on the varactor diode D2 connected in series with the crystal oscillator through the voltage control voltage 2. By changing the series capacitance of the crystal oscillator, the non-linear frequency drift of the crystal oscillator is compensated.

[0063] In addition, the crystal oscillator module is composed of a thermistor R1, varactor diodes D1, D2, D3 and a basic oscillation oscillator circuit. Please refer to Figure 4 shown, R1 is connected in series with the crystal oscillator in the oscillator. When the temperature changes under constant temperature control, the resistance value of the thermistor and the capacitance value of the crystal equivalent series capacitance change accordingly, so as to offset or reduce the temperature drift of the oscillation frequency.

[0064] The GPS correction signal obtained after the signals generated by the GPS receiver and the signals generated by the crystal oscillator pass through the phase discriminator, that is, the voltage-controlled voltage 1 acts on the varactor diode D1 connected in series with the crystal oscillator. By changing the series capacitance of the crystal oscillator, the non-linear frequency drift of the crystal oscillator is compensated.

[0065] The bridge differential pressure signal from the temperature compensation module, which reflects the working ambient temperature information of the peripheral components of the crystal oscillator module, is fed to the microprocessor. After processing, the voltage-controlled voltage 2 acts on the varactor diode D2 connected in series with the crystal oscillator. By changing the series capacitance of the crystal oscillator, the non-linear frequency drift of the crystal oscillator is compensated.

[0066] The quantum correction signal from the quantum system, which reflects whether the microwave frequency is aligned with the atomic ground state 0-0 transition frequency information after the 10 MHz of the crystal oscillator module is sent to the quantum system and undergoes frequency multiplication, synthesis, and microwave mixing in the atomic frequency standard circuit part. After processing, the voltage-controlled voltage 3 acts on the varactor diode D3 connected in series with the crystal oscillator. By changing the series capacitance of the crystal oscillator, the output 10 MHz signal frequency of the crystal oscillator is corrected.

[0067] Specifically, the short-term stability module includes a VCXO, a time correction module, a servo module, and a voltage-controlled correction module, where:

[0068] The output end of the VCXO is connected to the quantum system to form a traditional electronic circuit; the output end of the quantum system is connected to the servo module; the output end and the input end of the servo module are respectively connected to the voltage-controlled correction module and the time correction module; the output end of the voltage-controlled correction module is connected to the VCXO; the output end of the VCXO is also connected to the time correction module; the input end of the time correction module is also connected to the GPS receiving module.

[0069] It should be noted that when performing GPS correction, please refer to Figure 6 and Figure 7 As shown, the receiver obtains the signal sent by the GPS satellite, and after conversion and processing, obtains the second pulse signal and sends it to the time correction module. The frequency signal output by the VCXO is counted within one cycle of the second pulse to obtain the corresponding correction value and sent to the servo module, and the corresponding DC correction voltage is output through the voltage-controlled correction module and acts on the VCXO. The corresponding timing is as Figure 8When the width of the GPS second pulse gating signal shown is T and it is at a high level, after a time t1, the rising edge of the first pulse of the VCXO frequency signal enables the counter, and the counting of the VCXO frequency signal starts. When after T seconds, the low level of the GPS second pulse gating signal arrives, the counting does not stop. After a time t2, when the rising edge of the subsequent VCXO frequency signal arrives, the counter is closed. Here, the time width of the enabling signal is equal to the complete cycle number N of the VCXO frequency signal; then according to the above relevant parameters: T, t1, t2, N, the correction value of the corresponding VCXO frequency signal can be obtained according to the traditional GPS time difference comparison servo module, and the corresponding DC correction voltage is output through the voltage-controlled correction module and acts on the VCXO.

[0070] In addition, to synchronize the atomic clock to the GPS signal to form local clock synchronization, please refer to Figure 9 As shown, first, the signal obtained by dividing the VCXO by DDS, the local reference source, and the GPS second pulse are all sent to the delay array module. Here, the local reference source usually selects a high-stability H clock source, and its output signal frequency is usually 10 MHz, and the frequency of the VCXO we choose is also 10 MHz. After dividing by DDS, a frequency signal of 1 MHz is obtained. The corresponding timing of the principle of the delay array module is as Figure 10 shown.

[0071] When the preset GPS second pulse gating signal arrives at a high level, the rising edge of the first pulse of the VCXO divided-frequency signal enables the enabling terminals of counter 1 and counter 2, and they respectively count the VCXO divided-frequency signal and the local reference signal. When after T seconds, the high level of the preset GPS second pulse gating signal arrives again, at this time the two counters do not stop counting, and they are not closed until the rising edge of the subsequent VCXO divided-frequency signal arrives. Here, the time width of the enabling signal is exactly equal to the complete cycle number of the VCXO divided-frequency signal.

[0072] Let the frequency of the VCXO divided-frequency signal be Fx, and the frequency of the local reference source signal be fo. During the gating time T, the counts of the VCXO divided-frequency signal and the local reference source signal by the counter are N1 and N2 respectively. Then the frequency fx of the VCXO divided-frequency signal is related to the local reference source frequency fo and the count values N1 and N2 of the two counters. It should be noted that since the VCXO divided-frequency signal and the local reference signal have different frequencies, their phases at points A and B cannot overlap and be equal, and through the Figure 11 "Measurement diagram with phase difference" shown, where:

[0073] When the gating signal trigger pulse of the GPS second pulse arrives, wait for the rising edge of the next local reference signal. At this moment, enable the corresponding counter to perform "start counting" and "end counting" operations at points A and B. Then, there are time differences Δt1 and Δt2 between the moments when the counter is enabled at points A and B and the arrival of the next edge pulse of the local reference signal. The specific magnitude of the difference depends on the phase difference between the local reference signal and the local reference signal at moment A or B, and its magnitude is not a constant fixed phase difference relationship. This will result in different errors during each sampling. For those clock frequency sources with high stability and high frequency, a further improved measurement method is needed to determine the values of Δt1 and Δt2 to improve the measurement accuracy. At this time, we adopt the following solution:

[0074] The VCXO frequency-divided signal and the local reference signal are also respectively sent to the NOT gate array. There are N levels set in the NOT gate array, and N is an even number, including NOT gates and an AND gate. The NOT gates and the AND gate are simulated and generated by the internal FPGA chip. When moment A arrives, the VCXO frequency-divided signal will pass through 2 NOT gates, 4 NOT gates, 6 NOT gates... N NOT gates of the NOT gate array respectively, and then pass through an AND gate with the local reference source signal respectively, as Figure 12 shown;

[0075] When moment A or moment B arrives, the AND gate will only be recognized as "1" by the state 1 detection module after being "AND" operated until the high level of the local reference signal arrives: for example, when moment A arrives, since the VCXO frequency-divided signal is at a high level, that is, in the "1" state, when it passes through the logical "NOT" gate delay in Figure 7 and the high level of the local reference source signal arrives, the corresponding "AND" operation becomes "1", while the "AND" operations in N = 2 and N = 4 before are both "0"; in this way, as long as the state "1" detection module detects the N value of the "AND" operation being 1, the magnitude of Δt can be obtained. Similarly, the magnitude of Δt2 can also be obtained.

[0076] Through the obtained Δt1 and Δt2 above, and then through precise measurement to obtain the frequency correction value of the VCXO frequency-divided signal, and output the corresponding DC correction voltage through the voltage-controlled correction module to act on the VCXO.

[0077] In addition, the field strength test module includes an optical field test module, a microwave field test module, a magnetic field test module, a temperature field test module, and an electric field test module.

[0078] When a pump light pulse passes through the integrated filter resonance cell of a rubidium atomic frequency standard, the rubidium atoms in the absorption cell are concentrated on five sublevels with F = 2. Then, two coherent microwave pulses with a certain time interval are applied to the rubidium atoms, and the microwave frequency is exactly equal to the frequency of the 0-0 transition of the rubidium atom ground state. When the second microwave pulse acts, the spectral lamp is lit simultaneously. On the basis of maintaining the action of the microwave pulse, sampling optical detection is carried out by the microprocessor. After the optical detection is completed, the microwave pulse and the spectral lamp are turned off, and the quantum correction information is transmitted to the microwave interrogation signal generation circuit to complete the servo of the whole machine. Repeat this process. The timing of the whole process and the principle circuit of the pulsed pump light generation are as Figure 14 and Figure 15 shown.

[0079] In addition, for pump lights with different sizes but the same spectral line shape, the change in the difference frequency value caused by the change in the cavity temperature is different. The slope of the 70% light intensity curve is smaller than that of the 100% light intensity curve. That is, for 70% light intensity, the frequency shift caused by the change in cavity temperature is smaller than that at 100% light intensity. If the light intensity selection is further reduced (such as 50% light intensity, 30% light intensity...), a better slope light intensity will be obtained. However, due to the need to consider the signal-to-noise ratio of the system, it is impossible to select a very small light intensity. At this time, it is necessary to change the ratio and pressure of the buffer gas in the integrated filter resonance cell to obtain a light intensity with zero temperature coefficient.

[0080] A magnetic hyperfine component filter is added to the latter stage of the emission optical path of the spectral lamp, which can control the light intensity of the spectral lamp required in the above theory. At the same time, it can also improve the spectral line shape of the pump light, so that the spectral line shape of the pump light is completely symmetric around the center frequency, thereby reducing the generation of optical frequency shift.

[0081] In order to reduce the microwave power frequency shift and its negative contribution to the stability of the whole machine, we have carried out work in two aspects: reducing the microwave power frequency shift coefficient and stabilizing the microwave power. The entire microwave field test module includes two parts:

[0082] Coarse adjustment: The power value of the microwave source is directly changed by the central processor to obtain three or more values of P1, P2, and P3. In this embodiment, P1, P2, and P3 are selected. Please refer to Figure 16 shown. The central processor first controls the microwave source to output a power value P1, and the control current module acts on the magnet to obtain the magnetic field magnitude C1. At this time, the central processor controls the microwave source to change the output microwave frequency magnitude for frequency sweeping near the center frequency of the atomic ground state hyperfine structure 0-0 transition, and at the same time obtains the corresponding optical detection signal through the photoelectric detection module. In this way, the center frequency value f11 of the atomic spectral line can be obtained according to the traditional technology.

[0083] At this time, ensure that the power value P1 remains unchanged. Sequentially change the magnetic field magnitude to C2 and C3 values, and obtain the corresponding atomic spectral line center frequency values f12 and f13 according to the above method. In this way, a set of variation relationships between the magnetic field C and the center frequency f of the detection system at the microwave power value P1 can be obtained. By the same token, changing the microwave power value P to P2 and P3 will obtain multiple sets of variation relationships between C and the center frequency f.

[0084] Fine tuning: To eliminate the harmful influence of the microwave power frequency spectrum on the long-term stability of the rubidium atomic clock, a peak detector is connected after the pre-stage AC amplifier of the servo circuit. The signals output from the physical system after frequency discrimination are servo-processed to obtain the required optical detection signals, which are respectively input to operational amplifiers A1 and A3. And the optical detection signal is sent to A2 after passing through A3. A4 and A5 are voltage followers, and the voltage amplitudes at their output terminals V11 and V12 are the same as the voltages on capacitors C1 and C2. V11 and V12 are respectively sent to the inverting terminal and non-inverting terminal of A6 to complete the operation of N(V12 - V11), as Figure 17 shown.

[0085] Among them, A1 and A4 complete the detection of the maximum peak value of the optical detection signal:

[0086] When the voltage of the optical detection signal is greater than the voltage of capacitor C1, a voltage drop is generated on resistor Rf, and the current flows from left to right. According to the virtual open rule of the operational amplifier, D11 will not conduct, and at this time the charging current passes through D12 to charge C1. When the voltage of the optical detection signal is lower than the voltage of capacitor C1, a voltage drop is generated on resistor R2, and the current flows from right to left. According to the virtual open rule of the operational amplifier, D12 will not conduct, and at this time the current can only enter A1 through D11. Since the output voltage of the voltage follower A4 is the same as the voltage on capacitor C1, the diode D11 is cut off, and the capacitor cannot discharge through D11, and the voltage is protected, that is, capacitor C1 and the output V1 of A4 record the maximum peak value of the optical detection signal.

[0087] Capacitor C1 has a discharge resistor R1. The discharge time constant τ of RC is set according to the actual period of the optical detection signal. For example, if the frequency of the optical detection signal is 79 Hz, then τ can be taken as 1 s;

[0088] A3 completes the inversion of the optical detection signal:

[0089] Because a small modulation is added to the microwave interrogation signal, after the microwave interrogation signal is frequency discriminated by the physical system, both the valley value and peak value of the optical detection signal 1 are positive. During peak detection, therefore, the operational amplifier A3 is used to invert it first to obtain Figure 4 the signal output shown in 2 in the figure, and then a negative amplitude DC level Vref is superimposed to finally complete the conversion of the high and low levels of the optical detection signal, as Figure 18 shown;

[0090] A2 and A5 complete the detection of the minimum peak value of the optical detection signal:

[0091] The optical detection signal is processed by A3 and then sent to the non-inverting terminal of operational amplifier A2. The principles of A2 and A5 are the same as those of A1 and A3 described above. However, at this moment, since the optical detection signal has been processed by operational amplifier A3, A2 and A5 complete the detection of the minimum value of the optical detection signal.

[0092] A6 completes the detection of the peak value:

[0093] The high-level V11 and low-level V12 of the optical detection signal after the aforementioned processing are respectively sent into the differential amplifier A6. By adjusting the ratio of Ry to Rx, the output is (V12 - V11) * (Ry / Rx);

[0094] When the microwave power changes, both the overall frequency output by the atomic clock and the amplitude of the optical detection signal processed by the servo loop change, and they are in a proportional relationship. Please refer to Figure 19 and 20 as shown. For example: at a certain moment, due to the increase in microwave power, the overall frequency output by the atomic clock increases by Δf. After the traditional atomic clock synchronization phase discrimination, the output frequency of the voltage-controlled local oscillator will increase, generating error correction. This is the root cause of the microwave power frequency shift.

[0095] The amplitude of the optical detection signal will also increase due to the increase in microwave power. After the peak detection of the optical detection signal, V1 increases, so that (K0V0 - K1V1) decreases, which will cause the voltage-controlled voltage output to the voltage-controlled local oscillator to decrease, thereby reducing the output frequency of the voltage-controlled local oscillator for compensation. This is equivalent to generating a negative frequency offset Δf1, which acts on the positive frequency offset Δf caused by the increase in microwave power as described above. If the proportional relationship in Equation (1) is controlled well, Δf - Δf1 = 0 can be achieved, that is, the influence of the overall microwave power frequency shift is overcome.

[0096] In addition, the frequency drift correction module includes a frequency drift stability tester, a rubidium atomic frequency standard physical system, a magnetic field constant current source drive module, and a D / A converter.

[0097] Please refer to Figure 13 as shown. After the overall frequency output signal of the rubidium atomic frequency standard passes through the isolation amplifier, it is compared with the GPS second pulse signal through the VCXO frequency division signal to detect the frequency deviation. In addition, after the overall frequency output signal of the rubidium atomic frequency standard passes through the isolation amplifier, one path is used for output, and the other path is sent to the frequency drift and stability tester to be compared with the high-stability clock signal to obtain the original frequency difference. Then, the microcontroller is used to realize the control of the frequency deviation correction. This is the basis for the so-called frequency stability and drift test; the drift amount of the frequency standard is sampled and processed with a day as a cycle. Therefore, the frequency drift stability tester transmits the drift amount of the rubidium atomic frequency to the microcontroller through the RS232 port in units of days.

[0098] The ground state hyperfine 0-0 transition frequency of rubidium atoms in the integrated cell is the reference frequency f0 for frequency discrimination of the rubidium atomic frequency standard. The movement directions of rubidium atoms in the integrated filter resonance cell are disorderly. Applying a magnetic field with a fixed current magnitude and direction can play a good role in "atom splitting" and "quantization axis".

[0099] For 87 For Rb atom non-0-0 transitions, their frequencies are relatively sensitive to the magnetic field H. For 0-0 transitions, their frequency f0 is only proportional to the square of H and independent of the first power of H, and is less sensitive to the external magnetic field.

[0100] The microcontroller selects the corresponding digital set value of the D / A voltage control quantity according to the "drift quantity df - C field current quantity I" reference quantity stored in advance, and sends it to the C field constant current source drive module after passing through the D / A module. It should be noted that at this time, the correction quantity output by the microcontroller each time should be much smaller than the rubidium atomic frequency drift quantity detected by the frequency drift and stability tester, because too large a correction is very likely to cause a jump in the output frequency of the rubidium frequency standard, thus affecting the short-term frequency stability index of the whole machine. For example: for a high-precision and high-stability rubidium atomic frequency standard, assuming its daily stability and daily drift are at the level of 1E-14, then the correction quantity each time should be much smaller than 1E-14, and 5E-15 can be selected for correction.

[0101] The constant current source part itself is an independent linear negative feedback constant current source. Please refer to Figure 21 as shown:

[0102] U1 (LM350A) is a regulator, which is the core component of the constant current source. The load current passes through the sampling resistor R5 to generate a weak sampling voltage, which is amplified in-phase by the ultra-low noise operational amplifier U2. The amplified voltage signal is sent to the negative terminal of the differential amplifier composed of U3. The differential amplifier amplifies the difference between the negative terminal sampling voltage and the microprocessor-set voltage at the positive terminal, and outputs it to the adjustment terminal of the regulator to form a closed-loop feedback. If for some reason the load current increases, the voltage on the sampling resistor increases, the output voltage of the in-phase amplifier U2 becomes larger, the output voltage of the differential amplifier decreases, the voltage at the adjustment terminal of the regulator decreases, the output voltage of the regulator becomes lower, and the load current decreases, thus maintaining the dynamic stability of the load current. Vice versa. It can be seen that the microprocessor-set value at the positive terminal of the differential amplifier determines the magnitude of the load current. If the voltage at the positive terminal of U3 increases, that is, the microprocessor-set value increases, then the voltage at the adjustment terminal of the regulator increases, the output voltage of the regulator increases, the load current increases, the output of the in-phase amplifier increases, and the voltage at the negative terminal of the differential amplifier increases until the voltages at the positive and negative terminals of U3 are equal, and the system is dynamically stable again.

[0103] The sampling resistor is connected in series in the load circuit to detect the change of the load current. Therefore, the stability of the sampling resistor will directly affect the performance of the constant current source, and the sampling resistor should also have a sufficiently large power, otherwise it will also affect the performance of the constant current source or even burn out. In the actual circuit, a precision resistor made of high-power manganese copper material is selected, and the sampling amplifier U2 selects the ultra-low noise operational amplifier AD797. Since it is in the first stage of the closed-loop feedback, the influence of noise should be minimized as much as possible. The differential amplifier U3 selects the high-precision operational amplifier OP07 to provide a high-precision comparison result. D4 is used to prevent the reverse induced voltage from appearing in the circuit due to the long lead and damaging the circuit. Adding D4 can make the reverse induced voltage form a closed loop through D4, thus protecting the circuit.

[0104] The second object of this embodiment is to provide a complete design method for a passive rubidium atomic clock, including the complete design device for a passive rubidium atomic clock in any one of the above, and the following method steps:

[0105] S1. Satellite time synchronization: The GPS receiver receives the frequency signal from the GPS antenna, and performs phase discrimination on the frequency signal obtained by dividing the frequency signal generated by the crystal oscillator by 1 / 1000 through the DDS frequency divider and the frequency signal generated by the GPS receiver.

[0106] S2. Field strength test: The field strength of the atomic clock is detected by using the optical field test module, microwave field test module, magnetic field test module, temperature field test module and electric field test module.

[0107] S3. Stability test: Evaluate the stability index of the detected frequency source, and select a signal source of the same level or higher level than the detected frequency source as the compensation detection quantity source.

[0108] S4. Frequency drift correction: Use the rubidium atomic frequency standard, assume the order of magnitude of the daily stability and daily drift, and perform correction according to the order of magnitude of the daily stability and daily drift.

[0109] Further, in the S2, the optical field test module uses the method of optical pumping to improve the signal-to-noise ratio of the passive rubidium atomic clock, and the energy level shift of the pumping light on the passive rubidium atom is:

[0110]

[0111]

[0112] Among them, P is the dipole moment operator; E is the complex amplitude of the optical time electric field, γ is the lifetime of the α excited state; E α is the excited state; E i is the energy of the ground state energy level.

[0113] Since only the b-line is used to pump the passive rubidium atoms, it usually only causes the energy level shift of F = 1, mF = 0. Therefore, the relationship between the optical frequency shift and the energy level shift is as follows:

[0114] 2πhδf = -δε

[0115] In addition, if the pumping light is monochromatic light and exactly ω = ω αi , it will not cause optical frequency shift; if ω > ω αi , it will cause negative frequency shift; if ω < ω αi , it will cause positive frequency shift; if ω and ω αi differ greatly, the absolute value of the frequency shift caused is inversely proportional to |ω - ω αi |.

[0116] In an actual rubidium atomic clock, the pumping light is not monochromatic light, but a superposition of multiple spectral lines with a certain line width and line shape function. Among the frequency components within the line shape function of the pumping light spectrum, some frequency components produce positive optical frequency shift, and some other frequency components produce negative optical frequency shift. The frequency shift of the 0-0 transition caused by this non-monochromatic light is the superposition of the frequency shifts caused by many monochromatic lights. Therefore, for a rubidium atomic clock, keeping the spectral line shape of the pumping light unchanged is very important for reducing the influence of optical frequency shift on the aging drift of the frequency standard.

[0117] In addition, in S4, the rubidium atomic frequency standard adopts the solenoid current method, and the calculation formula for the magnitude of the magnetic field generated by the current is as follows:

[0118]

[0119] where n is the number of turns per unit length of the coil; I is the energized current; is a constant 10 -7 .

[0120] In addition, the calculation formula for the number of turns per unit length of the coil is as follows:

[0121]

[0122] where m is the number of turns of the magnetic field winding; r is the radius of the winding.

[0123] The above shows and describes the basic principle, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and descriptions in the specification are only preferred examples of the present invention and are not used to limit the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed. The scope of protection claimed by the present invention is defined by the appended claims and their equivalents.

Claims

1. A complete passive rubidium atomic clock design device, characterized in that: It includes a microcontroller, a satellite time synchronization module, a test system, a frequency drift correction module, an operation reliability monitoring module, and a component parameter big data modeling, where: The microcontroller is connected to the satellite time synchronization module; the output end of the satellite time synchronization module is connected to the test system; the output end of the test system is connected to the frequency drift correction module; the output end of the frequency drift correction module is connected to the operation reliability monitoring module; the output end of the operation reliability monitoring module is connected to the component parameter big data modeling; The test system includes a field strength test module and a stability test module; the input end of the field strength test module is connected to the satellite time synchronization module; the output end of the field strength test module is connected to the stability test module; both the field strength test module and the stability test module are bidirectionally connected to the microcontroller; the output end of the stability test module is connected to the frequency drift correction module; The satellite time synchronization module includes a temperature compensation module, a crystal oscillator module, a DDS frequency division module, a GPS receiving module, a quantum system, a phase detector, and a short-term stability module, where: The input end of the crystal oscillator module is connected to the microcontroller, and the output end of the crystal oscillator module outputs a frequency signal to the DDS frequency division module and the short-term stability module through an isolation amplifier, so as to transmit the signal to the quantum system through the short-term stability module; the output end of the DDS frequency division module is connected to the phase detector; the output end of the phase detector is connected to the crystal oscillator module; the input end of the phase detector is connected to the GPS receiving module; the input end of the crystal oscillator module is also bidirectionally connected to the temperature compensation module; The short-term stability module includes a VCXO, a time correction module, a servo module, and a voltage-controlled correction module, where: The output end of the VCXO is connected to the quantum system to form a traditional electronic circuit; the output end of the quantum system is connected to the servo module; the output end and the input end of the servo module are respectively connected to the voltage-controlled correction module and the time correction module; the output end of the voltage-controlled correction module is connected to the VCXO; the output end of the VCXO is also connected to the time correction module; the input end of the time correction module is also connected to the GPS receiving module; The field strength test module includes an optical field test module, a microwave field test module, a magnetic field test module, a temperature field test module, and an electric field test module; The frequency drift correction module includes a frequency drift stability tester, a rubidium atomic frequency standard physical system, a magnetic field constant current source drive module, and a D / A converter.

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