Electronic device
By designing an electrical connection structure for the cover, sensing electrodes, and grounding wire in electronic devices, the problem of damage caused by electrostatic discharge is solved, achieving effective protection against static electricity and protecting the peripheral components of electronic devices.
Patent Information
- Application Number
- CN202011190001.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-11-26
- Filing Date
- 2020-10-30
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2040-10-30
AI Technical Summary
Electronic devices are susceptible to damage in electrostatic discharge events, and existing technologies are insufficient to effectively prevent electrostatic damage to components.
A structure is designed in an electronic device, including a cover, a sensing electrode, a dummy electrode, and a ground wire. By electrically connecting the dummy electrode to the ground wire, the charge generated during the process is released, preventing charge from accumulating on the cover and avoiding electrostatic damage.
It effectively prevents electrostatic discharge from damaging electronic equipment and protects peripheral components from damage caused by sudden discharge of charge.
Smart Images

Figure CN112860097B_ABST
Abstract
Description
[0001] This application claims priority to Korean Patent Application No. 10-2019-0153451, filed on November 26, 2019, by reference in its entirety. Technical Field
[0002] This disclosure relates to an electronic device. More specifically, this disclosure relates to an electronic device for sensing external input. Background Technology
[0003] Electronic devices include items such as smartphones, computers, and televisions. These devices contain sensitive electronic components that can be damaged by electrostatic discharge events.
[0004] Electrostatic discharge (ESD) is a sudden and potentially destructive current flowing through one or more electronic components. Accumulated static electricity can penetrate the components of an electronic device, causing damage.
[0005] Damage caused by electrostatic discharge (ESD) events can render devices unusable. Therefore, there is a need in the art to reduce the likelihood of ESD damage to components of electronic devices. Summary of the Invention
[0006] This disclosure provides an electronic device with increased reliability.
[0007] An embodiment of the inventive concept provides an electronic device comprising: a substrate defining a hole, a first region surrounding the hole, a second region surrounding the first region, and a third region surrounding the second region; a cover portion disposed in the first region and including at least one cover pattern; a first sensing electrode disposed in the second region and including a first sensing pattern arranged in a first direction; a second sensing electrode disposed in the second region and including a second sensing pattern arranged in a second direction intersecting the first direction; a dummy electrode disposed in the second region and including a dummy pattern disposed between the first sensing pattern and the second sensing pattern; and a ground wire disposed in the third region and electrically connected to the cover portion through at least some of the dummy patterns.
[0008] The cover portion includes a first cover pattern surrounding a hole and a second cover pattern surrounding the first cover pattern, wherein the second cover pattern has a width smaller than that of the first cover pattern. The cover portion also includes connection patterns extending from the second cover pattern to regions overlapping with at least some of the dummy patterns. The connection patterns extend from the second cover pattern to the first cover pattern and are connected to the first cover pattern. At least some of the dummy patterns extend from a second region to a region overlapping with a grounding wire. The cover portion and the grounding wire are disposed on a first surface, and the first sensing pattern, the second sensing pattern, and the dummy patterns are disposed on a second surface different from the first surface.
[0009] The electronic device further includes an insulating layer disposed on a first surface and covering a ground wire, and a second surface being the upper surface of the insulating layer. The insulating layer is provided with a first contact hole and a second contact hole defined therethrough, some of the dummy patterns being electrically connected to the ground wire through the first contact hole, and some of the dummy patterns being electrically connected to the cover portion through the second contact hole.
[0010] The dummy electrode also includes a dummy island pattern disposed in the second region, and the dummy island pattern is electrically connected to the grounding wire. The dummy pattern includes a first dummy pattern superimposed on a portion of the cover and a second dummy pattern superimposed on the grounding wire, and the dummy island pattern is disposed between the first dummy pattern and the second dummy pattern to electrically connect the first dummy pattern and the second dummy pattern.
[0011] The second sensing electrode further includes an island pattern disposed between two adjacent second sensing patterns and electrically connected to the two second sensing patterns, and the dummy island pattern and the island pattern have the same area. The aperture includes at least one straight portion, and the ground wire is electrically connected to the cover portion through at least one dummy pattern disposed between the straight portion and the ground wire.
[0012] The second sensing electrode includes a first connecting unit, a second connecting unit spaced apart from the first connecting unit in a second direction with an aperture therebetween, a third connecting unit spaced apart from the second connecting unit in a second direction, and a fourth connecting unit spaced apart from the third connecting unit in a second direction, wherein the distance between the first connecting unit and the second connecting unit is greater than the distance between the third connecting unit and the fourth connecting unit.
[0013] The distance between the first connecting unit and the second connecting unit is greater than the distance between the second connecting unit and the third connecting unit, and the distance between the second connecting unit and the third connecting unit can be less than the distance between the third connecting unit and the fourth connecting unit.
[0014] The second sensing pattern connected to the second and third connecting units in the second sensing pattern has an area smaller than the area of the second sensing pattern connected to the third and fourth connecting units in the second sensing pattern.
[0015] The second sensing electrode further includes a connecting electrode that electrically connects two spaced-apart second sensing patterns such that an aperture is disposed between the two second sensing patterns. The connecting electrode is spaced apart from the first sensing pattern and at least one of the dummy patterns is disposed therebetween. The connecting electrode and the second sensing patterns are disposed on the same layer and include the same material as the second sensing patterns.
[0016] An embodiment of the inventive concept provides an electronic device comprising: a substrate defining a hole, a first region surrounding the hole, a second region surrounding the first region, and a third region surrounding the second region; a cover pattern disposed in the first region and surrounding the hole; a connecting pattern protruding from the cover pattern into the second region; a first dummy pattern disposed in the second region and superimposed on the connecting pattern; a second dummy pattern electrically connected to the first dummy pattern and extending from the second region into the third region; and a ground wire disposed in the third region, superimposed on the second dummy pattern, and electrically connected to the second dummy pattern.
[0017] The electronic device further includes: a dummy island pattern disposed between a first dummy pattern and a second dummy pattern; a first dummy bridging pattern connected to the dummy island pattern and the first dummy pattern; and a second dummy bridging pattern connected to the dummy island pattern and the second dummy pattern. The first dummy pattern, the second dummy pattern, and the dummy island pattern are disposed on a first surface, and the overlay pattern, the ground wire, the first dummy bridging pattern, and the second dummy bridging pattern are disposed on a second surface different from the first surface.
[0018] Multiple cover patterns are provided, including a first cover pattern and a second cover pattern. The first cover pattern has a first width, and the second cover pattern is spaced apart from the hole, such that the first cover pattern is disposed between the hole and the second cover pattern. The second cover pattern has a second width that is less than the first width. The second cover pattern is electrically connected to a ground wire, and the first cover pattern is electrically connected to a ground wire or floated.
[0019] Embodiments of the inventive concept provide a device comprising: a display module including an effective region and a peripheral region, wherein the effective region includes an aperture extending through the display module; a cover portion surrounding the aperture; a plurality of sensing electrodes disposed in the effective region; a dummy electrode disposed in the effective region; and a ground wire disposed in the peripheral region and electrically connected to the cover portion via the dummy electrode. In some cases, the dummy electrode is configured to prevent charge buildup on the cover portion. In some examples, the device may further include a camera module extending at least partially through the aperture.
[0020] As described above, the cover is electrically connected to the grounding wire. Charge generated during the process is released through the grounding wire and does not accumulate on the cover. Therefore, charge accumulation on the cover can be prevented, and damage to peripheral elements such as the first or second sensing pattern caused by a sudden discharge of static electricity can be prevented. Attached Figure Description
[0021] The above and other advantages of this disclosure will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:
[0022] Figure 1 This is a perspective view showing an electronic device according to an exemplary embodiment of the present disclosure;
[0023] Figure 2 This is an exploded perspective view showing an electronic device according to an exemplary embodiment of the present disclosure;
[0024] Figure 3 This is a plan view showing a display panel according to an exemplary embodiment of the present disclosure;
[0025] Figure 4 It is shown Figure 3 A magnified view of part AA';
[0026] Figure 5 This is a plan view illustrating an input sensor according to an exemplary embodiment of the present disclosure;
[0027] Figure 6 It is shown Figure 5 An enlarged plan view of part BB' shown in the diagram;
[0028] Figure 7A This is a cross-sectional view showing a display module according to an exemplary embodiment of the present disclosure;
[0029] Figure 7B This is a cross-sectional view showing a display module according to an exemplary embodiment of the present disclosure;
[0030] Figure 7C This is a cross-sectional view showing a display module according to an exemplary embodiment of the present disclosure;
[0031] Figure 8A It is shown Figure 6 A magnified plan view of part of CC';
[0032] Figure 8B It is along Figure 8A A sectional view taken by line I-I';
[0033] Figure 9A It is shown Figure 6 A magnified plan view of part of DD';
[0034] Figure 9B It is along Figure 9A The sectional view shown is taken by line II-II'.
[0035] Figure 10 It shows the corresponding Figure 6 Enlarged plan view of part DD';
[0036] Figure 11 It shows the corresponding Figure 6 Enlarged plan view of part DD';
[0037] Figure 12 It is shown Figure 5 A magnified plan view of part of EE';
[0038] Figure 13 This is a plan view illustrating an input sensor according to an exemplary embodiment of the present disclosure; and
[0039] Figure 14 It is shown Figure 13 A magnified plan view of part of FF'. Detailed Implementation
[0040] This disclosure relates to an electronic device. Embodiments of this disclosure provide systems and methods for preventing damage to electronic devices by avoiding the accumulation of static electricity.
[0041] According to some embodiments, an electronic device may include various electronic components, such as an input sensor for sensing external input. The components of the electronic device are electrically connected to each other via signal lines. The input sensor may include sensing electrodes for sensing external input. Additional electronic modules may include a camera, an infrared sensor, or a proximity sensor. The electronic module may be disposed below the input sensor. In some examples, the input sensor has an aperture that exposes the electronic module.
[0042] Embodiments of this disclosure present a cover electrically connected to a ground wire. Charge can be released through the ground wire instead of being guided to the cover. Therefore, charge accumulation on the cover of the electronic device can be prevented, and damage to peripheral components in the event of a sudden discharge of static electricity can be prevented.
[0043] In this disclosure, it will be understood that when an element or layer is referred to as being "on", "connected to", or "bonded to" another element or layer, the element or layer may be directly on, directly connected to, or directly bonded to the other element or layer, or there may be intermediate elements or intermediate layers.
[0044] Throughout this disclosure, the same reference numerals denote the same elements. In the accompanying drawings, for the purpose of effectively describing the technical content, the thickness, scale, and dimensions of the components may be exaggerated. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0045] It will be understood that although the terms first, second, etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or part from another. Therefore, without departing from the teachings of this disclosure, the first element, component, region, layer, or part discussed below may be named a second element, component, region, layer, or part. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are also intended to include the plural forms.
[0046] For ease of description, spatial relative terms such as “below,” “under,” “down,” “above,” “up,” etc., may be used herein to describe the relationship between one element or feature as shown in the accompanying drawings and another (other) element or feature.
[0047] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that, unless clearly defined herein, terms (such as those defined in a general dictionary) shall be interpreted as having the meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formalized sense.
[0048] It will also be understood that when the terms “comprising” and / or variations thereof are used in this specification, it indicates the presence of the stated features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or groups thereof.
[0049] The present disclosure will be described in detail below with reference to the accompanying drawings.
[0050] Figure 1 This is a perspective view showing an electronic device 1000 according to an exemplary embodiment of the present disclosure. Figure 2 This is an exploded perspective view showing an electronic device 1000 according to an exemplary embodiment of the present disclosure.
[0051] Reference Figure 1 and Figure 2 The electronic device 1000 can be a device activated in response to an electrical signal. The electronic device 1000 can be applied to large electronic articles (such as televisions and / or monitors) and small to medium-sized electronic devices (such as mobile phones, tablet computers, car navigation units, gaming units, and smartwatches). In this exemplary embodiment, a smartphone will be described as a representative example of the electronic device 1000.
[0052] Electronic device 1000 displays an image 1120 toward a third direction DR3 via a display surface 1110 substantially parallel to each of the first direction DR1 and the second direction DR2. The display surface 1110 through which the image 1120 is displayed corresponds to the front surface of electronic device 1000 and the display surface 1110 of window 1100. Hereinafter, the display surface and front surface of electronic device 1000 and the front surface of window 1100 are assigned the same reference numerals.
[0053] In this exemplary embodiment, a front (or upper) surface and a rear (or lower) surface of each component are defined relative to the direction of the displayed image 1120. The front and rear surfaces face each other on the third direction DR3. The normal direction of each of the front and rear surfaces is substantially parallel to the third direction DR3.
[0054] Electronic device 1000 includes a window 1100, a display module 1200, an electronic module 1300, and a housing 1400. In this exemplary embodiment, the window 1100 and the housing 1400 are combined with each other to provide the appearance of electronic device 1000.
[0055] Window 1100 includes an optically transparent insulating material. For example, window 1100 includes glass or plastic material. Window 1100 has a single-layer structure or a multi-layer structure. As an example, window 1100 includes a plurality of plastic films or glass substrates attached to each other by an adhesive and plastic films attached to the glass substrates by an adhesive.
[0056] Window 1100 is divided into a transmission area 1111 and a border area 1112 in the plan view. In the following description, the phrase "in the plan view" may refer to the state viewed in the third-party direction DR3. Additionally or optionally, the phrase "thickness direction" may refer to the third-party direction DR3.
[0057] The transmissive region 1111 is an optically transparent region. For example, the border region 1112 is a region with a relatively lower transmittance than the transmissive region 1111. The border region 1112 defines the shape of the transmissive region 1111. The border region 1112 is configured to be adjacent to and surround the transmissive region 1111.
[0058] The border area 1112 has a predetermined color. The border area 1112 covers the peripheral area 1212 of the display module 1200 to prevent the peripheral area 1212 from being viewed from the outside. However, this is merely exemplary, and according to an exemplary embodiment of this disclosure, the border area 1112 may be omitted from the window 1100.
[0059] In an exemplary embodiment of this disclosure, the sensor region 1130 is superimposed on the electronic module 1300, which will be described later. According to this disclosure, the sensor region 1130 is defined to be superimposed on the transmission region 1111. Therefore, a separate region for defining the sensor region 1130 in areas other than the transmission region 1111 can be omitted. Consequently, the size of the border region 1112 can be reduced.
[0060] Therefore, embodiments of the inventive concept provide a device comprising: a display module 1200 including an effective region 1211 and a peripheral region 1212, wherein the effective region 1211 includes: a predetermined hole 1220 extending through the display module 1200; and a cover portion (e.g., Figure 5 and Figure 6 The cover portion 280 surrounds the predetermined hole 1220; multiple sensing electrodes (e.g., Figure 5 The first sensing electrode 210 and the second sensing electrode 220 are disposed in the effective region 1211; a dummy electrode (e.g., Figure 6 A dummy electrode 230 is disposed in the effective area 1211; and a grounding wire (e.g., Figure 5 and Figure 6 Grounding wires 261 and 262 are disposed in the peripheral region 1212 and electrically connected to the cover 280 via a dummy electrode 230. In some cases, the dummy electrode 230 is configured to prevent charge buildup on the cover 280. In some examples, the device may also include a camera module that extends at least partially through a predetermined aperture 1220.
[0061] Figure 2 A sensor region 1130 is shown as a representative example. However, this disclosure should not be limited thereto or thereby. For example, sensor region 1130 may be defined as two or more. Additionally or alternatively, Figure 2A sensor region 1130 defined in the upper left portion of the transmission region 1111 is shown as a representative example. However, the sensor region 1130 may be defined in a portion of the transmission region 1111 (e.g., the upper right portion), at the upper center of the transmission region 1111, in the lower left portion of the transmission region 1111, or in another portion of the transmission region 1111 (e.g., the lower right portion).
[0062] The display module 1200 is disposed below the window 1100. In this disclosure, the term "below" may refer to a direction opposite to the direction in which the display module 1200 displays the image 1120. The display module 1200 displays the image 1120 and senses external input. The display module 1200 includes a display surface 1210 defining an effective area 1211 and a peripheral area 1212 therein. The effective area 1211 is activated in response to an electrical signal.
[0063] In this exemplary embodiment, the effective region 1211 is the region through which the image 1120 is displayed and the external input 2000 is sensed. The transmissive region 1111 is superimposed on at least the effective region 1211. For example, the transmissive region 1111 is superimposed on the entire surface or at least a portion of the effective region 1211. Thus, the user perceives the image 1120 or provides the external input 2000 through the transmissive region 1111.
[0064] The peripheral region 1212 is covered by the border region 1112. The peripheral region 1212 is configured to be adjacent to the active region 1211. The peripheral region 1212 surrounds the active region 1211. A driving circuit or driving line is disposed in the peripheral region 1212 to drive the active region 1211.
[0065] The display module 1200 includes a display panel 100, an input sensor 200, and a drive circuit 300.
[0066] The display panel 100 includes a configuration suitable for generating an image 1120. The image 1120 generated by the display panel 100 is displayed through the display surface 1210 and perceived by the user through the transmissive region 1111.
[0067] Input sensor 200 senses external input 2000 applied from the outside. For example, input sensor 200 senses external input 2000 applied to window 1100. External input 2000 is user input. User input can include various external inputs, such as a part of the user's body, light, heat, a pen, or pressure. In this exemplary embodiment, external input 2000 is indicated by the user's hand touching display surface 1110. However, this is merely exemplary. As mentioned above, external input 2000 can be provided in various forms. Additionally or optionally, depending on the structure of electronic device 1000, external input 2000 applied to the side surface or rear surface of electronic device 1000 can be sensed. However, external input 2000 should not be particularly limited.
[0068] The driving circuit 300 is electrically connected to the display panel 100 and the input sensor 200. The driving circuit 300 includes a first flexible film 310, a second flexible film 320, and a main circuit board 330.
[0069] The first flexible film 310 is electrically connected to the display panel 100. The first flexible film 310 connects the display panel 100 and the main circuit board 330. The first flexible film 310 is connected to a pad (or "soldering pad") (display pad) disposed in the peripheral region 1212 of the display panel 100. Additionally or optionally, the first flexible film 310 provides electrical signals to the display panel 100 to drive the display panel 100. The electrical signals are generated by the first flexible film 310 or the main circuit board 330.
[0070] The second flexible membrane 320 is electrically connected to the input sensor 200. The second flexible membrane 320 connects the input sensor 200 and the main circuit board 330. The second flexible membrane 320 is connected to a pad (sensing pad) disposed in the peripheral region 1212 of the input sensor 200. The second flexible membrane 320 provides an electrical signal to the input sensor 200 to drive the input sensor 200. The electrical signal is generated by the second flexible membrane 320 or the main circuit board 330.
[0071] The main circuit board 330 includes various driving circuits to drive the display panel 100 and the input sensor 200 or connectors to provide power. A first flexible film 310 and a second flexible film 320 are connected to the main circuit board 330. According to embodiments of this disclosure, the display panel 100 and the input sensor 200 are controlled using a single main circuit board 330. However, this example is merely exemplary. In the display module 1200 according to exemplary embodiments of this disclosure, the display panel 100 and the input sensor 200 may be connected to different main circuit boards, and one of the first flexible film 310 and the second flexible film 320 may not be connected to the main circuit board 330. However, the display panel 100 and the input sensor 200 should not be limited to the specific embodiments.
[0072] In an exemplary embodiment of this disclosure, a predetermined hole 1220 (hereinafter referred to as a "module hole") is defined in the region of the display module 1200 corresponding to the sensor region 1130. The module hole 1220 is defined in the effective region 1211 and penetrates the display module 1200. Some regions of the display panel 100 and the input sensor 200 are penetrated by the module hole 1220. For example, the module hole 1220 is defined by removing at least a portion of the components of the display panel 100 and the input sensor 200 that are configured to overlap with the sensor region 1130. When the module hole 1220 is defined in the effective region 1211, the size of the peripheral region 1212 can be reduced.
[0073] When viewed in a plan view, the electronic module 1300 is stacked with the module aperture 1220 and the sensor region 1130. The electronic module 1300 is positioned below the display module 1200. At least a portion of each electronic module 1300 is housed within the module aperture 1220. The electronic module 1300 receives external input applied to it through the sensor region 1130. Additionally or optionally, the electronic module 1300 may provide output through the sensor region 1130.
[0074] In exemplary embodiments of this disclosure, three electronic modules 1300 are shown. However, the number of electronic modules 1300 is not limited to three. Electronic modules 1300 may include a camera module. However, electronic modules 1300 are not limited to camera modules. Electronic modules 1300 may also include a light-emitting module, a light-receiving module, or a thermal sensing module.
[0075] The housing 1400 is integrated with the window 1100. The housing 1400 is integrated with the window 1100 to provide interior space. The display module 1200 and the electronic module 1300 are housed in the interior space.
[0076] The housing 1400 is made of a material with relatively high rigidity. For example, the housing 1400 includes multiple frames and / or plates made of glass, plastic, or metal materials, or combinations thereof. The housing 1400 stably protects the components of the electronic device 1000 housed in the internal space from external impacts.
[0077] Figure 3 This is a plan view showing a display panel 100 according to an exemplary embodiment of the present disclosure. Figure 4 It is shown Figure 3 A magnified view of part AA'.
[0078] Reference Figure 3 and Figure 4 The display panel 100 includes a substrate 100-1, multiple pixels 110, multiple signal lines 120, 130 and 140, a power pattern 150, and multiple display pads 160.
[0079] The substrate 100-1 includes an insulating substrate. For example, the substrate 100-1 includes a glass substrate, a plastic substrate, or a combination thereof. The substrate 100-1 may be referred to as a "display substrate".
[0080] The substrate 100-1 includes a first region 101, a second region 102, and a third region 103 defined therein. A hole 101-H is defined in the first region 101, and the first region 101 surrounds the hole 101-H. In one example, the first region 101 surrounds the hole 101-H on each side in a plane (e.g., a plane parallel to the substrate 100-1). In another example, the first region 101 surrounds the hole 101-H on at least three sides in a plane.
[0081] The second region 102 surrounds the first region 101. In one example, the second region 102 surrounds the first region 101 on each side of the plane. In another example, the second region 102 surrounds the first region 101 on at least three sides of the plane.
[0082] Additionally or optionally, the third region 103 surrounds the second region 102, and the first region 101 is adjacent to the sensor region 1130 (see reference). Figure 1 (Overlapping). In one example, the third region 103 surrounds the second region 102 on each side of the plane. In another example, the third region 103 surrounds the second region 102 on at least three sides of the plane. The second region 102 may be included in the effective region 1211 (see reference). Figure 2 The third region 103 can be included in the outer region 1212 (see reference). Figure 2 )middle.
[0083] Signal lines 120, 130, and 140 are connected to pixel 110 to transmit electrical signals to pixel 110. Figure 3 The diagram shows signal lines 120, 130, and 140, including a data line 120, a scan line 130, and a power line 140, as representative examples. However, these are merely exemplary. Signal lines 120, 130, and 140 may also include one of an initialization voltage line and an illumination control line. The signal lines should not be limited to this particular embodiment.
[0084] Pixel 110 is disposed in the second region 102. In this exemplary embodiment, an equivalent circuit diagram of pixel 110 is shown as a representative example. Pixel 110 includes a first thin-film transistor 111, a second thin-film transistor 112, a capacitor 113, and a light-emitting device 114. The first thin-film transistor 111 is a switching device that controls the on / off state of pixel 110. The first thin-film transistor 111 transmits or blocks data applied to it via data line 120 in response to a scan signal applied to it via scan line 130.
[0085] Capacitor 113 is connected to the first thin-film transistor 111 and the power line 140. Capacitor 113 is charged with an amount of charge corresponding to the difference between the data signal transmitted from the first thin-film transistor 111 and the first power signal applied to the power line 140.
[0086] The second thin-film transistor 112 is connected to the first thin-film transistor 111, the capacitor 113, and the light-emitting device 114. The second thin-film transistor 112 controls the drive current flowing through the light-emitting device 114 in response to the amount of charge charged in the capacitor 113. The on-time of the second thin-film transistor 112 is determined based on the amount of charge charged in the capacitor 113. The second thin-film transistor 112 provides a first electrical signal applied to it via the power line 140 to the light-emitting device 114.
[0087] The light-emitting device 114 generates light or controls the amount of light in response to an electrical signal. For example, the light-emitting device 114 includes an organic light-emitting device or a quantum dot light-emitting device.
[0088] The light-emitting device 114 is connected to the power terminal 115 and receives a power signal (hereinafter referred to as the "second power signal") that is different from the first power signal provided through the power line 140. A drive current corresponding to the difference between the electrical signal provided from the second thin-film transistor 112 and the second power signal flows through the light-emitting device 114, and the light-emitting device 114 generates light corresponding to the drive current. However, this is merely exemplary, and the pixel 110 may include electronic components with various configurations and arrangements. Nevertheless, the pixel 110 should not be particularly limited.
[0089] As described above, hole 101-H is within the effective region 1211 (refer to...) Figure 2 Therefore, at least some of the pixels 110 are arranged adjacent to the aperture 101-H. Some of the pixels 110 surround the aperture 101-H.
[0090] Multiple signal lines 121 and 131 connected to pixel 110 are configured to pass through the first region 101. Signal lines 121 and 131 pass through the first region 101 and connect to pixel 110. For ease of illustration, Figure 4 The first signal line 121 and the second signal line 131 connected to the signal lines of pixel 110 are shown as representative examples.
[0091] The first signal line 121 extends in the second direction DR2. The first signal line 121 is connected to pixels 110 arranged in the same column in the second direction DR2. The first signal line 121 is described as corresponding to data line 120.
[0092] Some of the pixels 110 connected to the first signal line 121 are positioned on the upper side relative to the hole 101-H. The other pixels 110 connected to the first signal line 121 are positioned on the lower side relative to the hole 101-H. Therefore, even if some pixels 110 are removed due to the formation of the hole 101-H, the pixels 110 arranged in the same column and connected to the first signal line 121 receive data signals through the same line.
[0093] The second signal line 131 extends along the first direction DR1. The second signal line 131 connects to pixels 110 arranged in the same row along the first direction DR1. The second signal line 131 is described as corresponding to scan line 130.
[0094] Some pixels 110 connected to the second signal line 131 are positioned on the left side of the second region 102 relative to the aperture 101-H. Other pixels 110 connected to the second signal line 131 are positioned on the right side of the second region 102 relative to the aperture 101-H. Therefore, even if some pixels 110 are removed due to the formation of the aperture 101-H, the pixels 110 arranged in the same row and connected to the second signal line 131 are turned on and off by substantially the same gate signal.
[0095] Refer again Figure 3 A power pattern 150 is disposed in the third region 103. The power pattern 150 is electrically connected to the power line 140. The display panel 100 includes the power pattern 150. Therefore, the display panel 100 provides a first power signal with substantially the same level to the pixel 110.
[0096] Display pad 160 includes a first pad 161 and a second pad 162. Multiple first pads 161 are provided, and each first pad 161 is connected to a data line 120. The second pad 162 is connected to a power pattern 150 and electrically connected to a power line 140. Display panel 100 provides electrical signals applied to it from the outside via display pad 160 to pixels 110. Additionally or optionally, in addition to the first pads 161 and second pads 162, display pad 160 may also include pads for receiving other electrical signals. However, display pad 160 should not be particularly limited.
[0097] Figure 5 This is a plan view showing an input sensor 200 according to an exemplary embodiment of the present disclosure. Figure 6 It is shown Figure 5 The enlarged plan view of part BB' shown.
[0098] Reference Figure 5 and Figure 6The input sensor 200 includes a substrate 100-4, a first sensing electrode 210, a second sensing electrode 220, a dummy electrode 230, a first sensing line 240, second sensing lines 251 and 252, grounding lines 261 and 262, a sensing pad 270, and a cover 280.
[0099] The substrate 100-4 includes an insulating substrate. For example, the substrate 100-4 includes a glass substrate, a plastic substrate, or a combination thereof.
[0100] The substrate 100-4 includes a first region 201, a second region 202, and a third region 203 defined therein. A hole 201-H is defined in the first region 201, and the first region 201 surrounds the hole 201-H. The second region 202 surrounds the first region 201. The third region 203 surrounds the second region 202. The first region 201 is adjacent to the sensor region 1130 (see reference). Figure 1 Overlay. The second region 202 is included in the effective region 1211 (refer to...). Figure 2 The third region 203 is included in the outer region 1212 (see reference). Figure 2 )middle.
[0101] Hole 201-H is stacked with hole 101-H, and holes 101-H and 201-H form module hole 1220 (refer to). Figure 2 ).
[0102] A first sensing electrode 210, a second sensing electrode 220, and a dummy electrode 230 are disposed in the second region 202. The input sensor 200 obtains information about an external input 2000 (see reference 2000) based on the change in capacitance between the first sensing electrode 210 and the second sensing electrode 220. Figure 1 (information).
[0103] A first sensing electrode 210 extends in a first direction DR1 and is disposed in a second direction DR2. The first sensing electrode 210 includes a first sensing pattern 211 and a connecting pattern 212. The connecting pattern 212 electrically connects two adjacent first sensing patterns 211. The first sensing pattern 211 and the connecting pattern 212 are disposed on the same layer and comprise the same material. Additionally or optionally, the first sensing pattern 211 and the connecting pattern 212 have an integral shape. The first sensing pattern 211 may be referred to as a first portion. The connecting pattern 212 may be referred to as a second portion.
[0104] The second sensing electrode 220 extends in the second direction DR2 and is arranged in the first direction DR1. The second sensing electrode 220 includes a second sensing pattern 221 and a connection unit 222. The connection unit 222 may be referred to as a connection member, a bridging unit, or a bridging component.
[0105] Each connection unit 222 includes an island pattern 222-1 and a bridging pattern 222-2. For example, each connection unit 222 includes two island patterns 222-1 and four bridging patterns 222-2.
[0106] The island pattern 222-1 is disposed on the same layer as the second sensing pattern 221 and comprises the same material as the second sensing pattern 221. Each island pattern 222-1 is surrounded by a first sensing electrode 210.
[0107] The bridging pattern 222-2 is insulated from the connecting pattern 212 and intersects with the connecting pattern 212. For example, the bridging pattern 222-2 electrically connects an island pattern 222-1 and a second sensing pattern 221 spaced apart from the island pattern 222-1.
[0108] Bypass patterns 223 are respectively and additionally connected to the second sensing pattern 221. Each bypass pattern 223 has a shorter length than each bridging pattern 222-2. The bypass pattern 223 has a lower resistance than the bridging pattern 222-2. Therefore, when an electrostatic event occurs, the static electricity concentrates at the bypass pattern 223 with the lower resistance. As a result, the bridging pattern 222-2 can be prevented from being damaged by static electricity.
[0109] A dummy electrode 230 is disposed between the first sensing electrode 210 and the second sensing electrode 220. The first sensing electrode 210 and the second sensing electrode 220 are spaced apart from each other, and the dummy electrode 230 is disposed in the gap between the first sensing electrode 210 and the second sensing electrode 220. The difference in reflectivity between the area where the first sensing electrode 210 and the second sensing electrode 220 are disposed and the area where the first sensing electrode 210 and the second sensing electrode 220 are not disposed is reduced due to the dummy electrode 230. Therefore, the first sensing electrode 210 and the second sensing electrode 220 cannot be seen. Thus, optical viewing characteristics can be improved.
[0110] The dummy electrode 230 includes multiple dummy patterns 231, 232, 233, 234, 235, 236, and 237. For example, the dummy electrode 230 includes a first dummy pattern 231, a second dummy pattern 232, a third dummy pattern 233, a fourth dummy pattern 234, a dummy island pattern 235, a first dummy bridging pattern 236, and a second dummy bridging pattern 237. Because the dummy electrode 230 includes multiple patterns that are separate from each other, touch sensitivity is increased.
[0111] The first dummy pattern 231 and the second dummy pattern 232 are configured to be adjacent to the first sensing pattern 211, and the third dummy pattern 233 and the fourth dummy pattern 234 are configured to be adjacent to the second sensing pattern 221. The dummy island pattern 235, the first dummy bridging pattern 236 and the second dummy bridging pattern 237 are electrically connected to each other.
[0112] The first sensing line 240 and the second sensing lines 251 and 252 are disposed in the third region 203. The first sensing line 240 is electrically connected to the first sensing electrode 210. The second sensing lines 251 are electrically connected to one end of the second sensing electrode 220, and the second sensing lines 252 are electrically connected to the other end of the second sensing electrode 220.
[0113] The second sensing electrode 220 has a relatively longer length than the first sensing electrode 210. Therefore, two second sensing lines 251 and 252 are electrically connected to the second sensing electrode 220, respectively. This ensures that the sensitivity of the second sensing electrode 220 is maintained uniformly. However, this is merely exemplary, and one of the second sensing lines 251 and 252 may be omitted; for example, second sensing line 252.
[0114] Grounding wires 261 and 262 are provided in the third region 203. Grounding wires 261 and 262 receive grounding voltage. For example, charge is released through grounding wires 261 and 262. Therefore, device damage due to electrostatic discharge can be prevented.
[0115] Sensing pad 270 is disposed in the third region 203. Sensing pad 270 includes a first sensing pad 271, a second sensing pad 272, a third sensing pad 273, and a fourth sensing pad 274. The first sensing pad 271 is connected to the first sensing line 240. The second sensing pad 272 is connected to the second sensing line 251. The third sensing pad 273 is connected to the second sensing line 252. The fourth sensing pad 274 is connected to ground lines 261 and 262.
[0116] A cover portion 280 is disposed around the hole 201-H. For example, the cover portion 280 is disposed in the first region 201. In an exemplary embodiment of this disclosure, the cover portion 280 is electrically connected to the ground wire 261 via a dummy electrode 230. In this case, the charge generated during the process is released through the ground wire 261 and does not accumulate on the cover portion 280. Therefore, since the charge accumulated on the cover portion 280 is released, damage to peripheral components (e.g., the first sensing pattern 211 or the second sensing pattern 221) can be prevented. Additionally or optionally, according to an exemplary embodiment of this disclosure, the cover portion 280 and the ground wire 261 are connected to each other using the dummy electrode 230.
[0117] In an exemplary embodiment of this disclosure, hole 201-H includes at least one straight portion. For example, hole 201-H includes a first straight portion and a second straight portion extending in a first direction DR1 and spaced apart from each other in a second direction DR2. Additionally or optionally, hole 201-H includes a first curved portion connecting one end of the first straight portion to one end of the second straight portion and a second curved portion connecting the other end of the first straight portion to the other end of the second straight portion. The width of hole 201-H in the first direction DR1 is greater than the width of hole 201-H in the second direction DR2. Hole 201-H may be referred to as a "wide hole".
[0118] In an exemplary embodiment of this disclosure, the cover portion 280 and the grounding wire 261 are electrically connected to each other via some of dummy patterns 231, 232, 233, 234, 235, 236, and 237, wherein the dummy patterns 231, 232, 233, 234, 235, 236, and 237 may be provided between the first straight portion and the grounding wire 261. Hereinafter, the dummy pattern that electrically connects the cover portion 280 to the grounding wire 261 is referred to as "conductor 230k". The first straight portion is defined as being closer to the third region 203 than the second straight portion.
[0119] Figure 5 The cover 280 is shown to be electrically connected to the grounding wire 261 via six wires 230k. However, the number of wires 230k should not be limited to six. The number of wires 230k can vary depending on the size and location of the hole 201-H.
[0120] Each conductor 230k includes a first dummy pattern 231, a second dummy pattern 232, a dummy island pattern 235, a first dummy bridging pattern 236, and a second dummy bridging pattern 237.
[0121] Cover portion 280 is electrically connected to first dummy pattern 231. Ground wire 261 is electrically connected to second dummy pattern 232. Second dummy pattern 232 extends in the area overlapping with ground wire 261.
[0122] A dummy island pattern 235 is disposed between the first dummy pattern 231 and the second dummy pattern 232. The dummy island pattern 235 has an area substantially the same as that of each island pattern 222-1. Additionally or optionally, the edges forming the dummy island pattern 235 include edges substantially parallel to the edges forming each island pattern 222-1.
[0123] The first dummy bridging pattern 236 is connected to the second dummy pattern 232 and the dummy island pattern 235, and the second dummy bridging pattern 237 is connected to the first dummy pattern 231 and the dummy island pattern 235.
[0124] According to an exemplary embodiment of the present disclosure, the conductors 230k are connected to each other. For example, the conductor 230k is connected to the conductive connection line 230kk. The conductive connection line 230kk overlaps with the grounding wire 261 and extends in the first direction DR1. Additionally or alternatively, according to another exemplary embodiment of the present disclosure, the conductive connection line 230kk may be omitted.
[0125] exist Figure 6 In this configuration, each conductor 230k is connected to the grounding wire 261 through a contact hole. However, this disclosure should not be limited to or construed as such. Contact holes may be additionally provided in areas overlapping with the conductive connecting wires 230kk, and the conductive connecting wires 230kk may be electrically connected to the grounding wire 261 through the contact holes.
[0126] Figure 7A This is a cross-sectional view showing a display module 1200 according to an exemplary embodiment of the present disclosure.
[0127] Reference Figure 7A The display module 1200 includes a display panel 100 and an input sensor 200.
[0128] The display panel 100 includes a substrate 100-1, a circuit layer 100-2, a display element layer 100-3, and a substrate 100-4. The circuit layer 100-2 is disposed on the substrate 100-1, the display element layer 100-3 is disposed on the circuit layer 100-2, and the substrate 100-4 is disposed on the display element layer 100-3.
[0129] An auxiliary layer 10 is disposed on the substrate 100-1 to cover the front surface of the substrate 100-1. The auxiliary layer 10 comprises an inorganic material. The auxiliary layer 10 includes a barrier layer and / or a buffer layer. Therefore, the auxiliary layer 10 prevents oxygen or moisture introduced through the substrate 100-1 from entering the pixel 110, or reduces the surface energy of the substrate 100-1, so that the pixel 110 is formed on the substrate 100-1. In some cases, the connection between the pixel 110 and the substrate 100-1 can form a stable connection.
[0130] Pixel 110 is disposed in the second region 102. In this exemplary embodiment, it is shown... Figure 3 The first thin-film transistor 111 and the light-emitting device 114 in the components of the equivalent circuit diagram of pixel 110 shown are representative examples.
[0131] The first thin-film transistor 111 includes an active region A1, a source S1, a drain D1, and a gate G1. The active region A1, the source S1, and the drain D1 are provided by a semiconductor pattern.
[0132] For example, a semiconductor pattern is disposed on auxiliary layer 10. The semiconductor pattern includes polycrystalline silicon. However, according to an embodiment, the semiconductor pattern may include amorphous silicon or metal oxide. The semiconductor pattern includes doped and undoped regions. The doped regions are doped with N-type or P-type dopant. A P-type transistor includes a doped region doped with P-type dopant. The doped regions have a higher conductivity than the undoped regions and are essentially used as electrodes or signal lines. The undoped regions essentially correspond to the active region A1 (or channel). In other words, a portion of the semiconductor pattern may be the active region A1 of the first thin-film transistor 111, another portion of the semiconductor pattern may be the source S1 or drain D1 of the first thin-film transistor 111, and other portions of the semiconductor pattern may be connection electrodes or connection signal lines.
[0133] A first insulating layer 20 is disposed on the auxiliary layer 10 to cover the active region A1, the source S1, and the drain D1. The first insulating layer 20 is an inorganic and / or organic layer and has a single-layer or multi-layer structure. The first insulating layer 20 may include at least one of alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. In this exemplary embodiment, the first insulating layer 20 has a single-layer structure of silicon oxide. The insulating layer of the circuit layer 100-2, described later, is an inorganic and / or organic layer. The insulating layer, like the first insulating layer 20, has a single-layer or multi-layer structure. The inorganic layer includes at least one of the materials described above.
[0134] Gate G1 is disposed on the first insulating layer 20. Gate G1 corresponds to a portion of the metal pattern. Gate G1 is stacked with the active region A1. Gate G1 is used as a mask in the process of doping the semiconductor pattern.
[0135] The second signal line 131 is disposed on the first insulating layer 20. Alternatively or additionally, the second signal line 131 is disposed in the first region 101.
[0136] A second insulating layer 30 is disposed on the first insulating layer 20 and covers the gate G1 and the second signal line 131. The second insulating layer 30 is an inorganic layer and / or an organic layer, and has a single-layer structure or a multi-layer structure. In this exemplary embodiment, the second insulating layer 30 has a single-layer structure of silicon oxide.
[0137] The first signal line 121 is disposed on the second insulating layer 30. Alternatively or additionally, the first signal line 121 is disposed in the first region 101.
[0138] The third insulating layer 40 is disposed on the second insulating layer 30 and covers the first signal line 121.
[0139] The light-emitting device 114 is disposed on the third insulating layer 40. The light-emitting device 114 includes a first electrode AE, a light-emitting layer EML, and a second electrode CE.
[0140] The first electrode AE is electrically connected to the first thin-film transistor 111. For example, the first electrode AE is connected via the second thin-film transistor 112 (see reference). Figure 3 It is electrically connected to the first thin-film transistor 111.
[0141] A fourth insulating layer 50 is disposed on the third insulating layer 40. The fourth insulating layer 50 comprises organic and / or inorganic materials and has a single-layer or multi-layer structure. An opening is defined through the fourth insulating layer 50, and at least a portion of the first electrode AE is exposed through the opening. The fourth insulating layer 50 may be referred to as a "pixel defining layer".
[0142] A light-emitting layer (EML) is disposed on a first electrode AE exposed through an opening. The EML includes a light-emitting material. The EML may include at least one material selected from materials that emit red, green, and blue light, respectively. The EML may include a fluorescent or phosphorescent material. The EML may include an organic or inorganic light-emitting material. The EML emits light in response to the potential difference between the first electrode AE and the second electrode CE.
[0143] The second electrode CE is disposed on the light-emitting layer EML. The second electrode CE faces the first electrode AE. The second electrode CE is commonly disposed in pixel 110. Each pixel 110 receives a common voltage (hereinafter referred to as "second electrical voltage") through the second electrode CE.
[0144] A recessed portion 170 is defined in a first region 101. The recessed portion 170 is configured to surround the edge of the module aperture 1220. The recessed portion 170 blocks the path taken by moisture or oxygen introduced through the module aperture 1220 into the pixel 110. The recessed portion 170 is defined by removing portions of the components forming the display panel 100. For example, portions of the second insulating layer 30, the third insulating layer 40, and the fourth insulating layer 50 are removed to form the recessed portion 170; however, this is merely exemplary. According to exemplary embodiments of this disclosure, the recessed portion 170 may not be provided.
[0145] A substrate 100-4 is disposed on the second electrode CE. The substrate 100-4 is spaced apart from the second electrode CE. The space 60 between the substrate 100-4 and the second electrode CE is filled with air or an inert gas. Additionally or optionally, in an exemplary embodiment of this disclosure, the space 60 may be filled with a filler, such as a silicone polymer, epoxy resin, or acrylic resin.
[0146] The substrate 100-4 is bonded to the substrate 100-1 via a sealing member 180. The sealing member 180 defines the inner surface of the module hole 1220. The sealing member 180 comprises organic materials (such as light-curable resins or lightweight plastic resins) or inorganic materials (such as glass frit seals). However, the sealing member 180 should not be limited to the specific embodiment.
[0147] The input sensor 200 includes a substrate 100-4, a plurality of conductive layers, and a plurality of insulating layers 291 and 292. In an exemplary embodiment of this disclosure, the substrate 100-4 is included in both the input sensor 200 and the display panel 100. For example, the substrate 100-4 may be an encapsulation substrate of the display panel 100, and may be a substrate on which the input sensor 200 is formed. In an exemplary embodiment of this disclosure, the substrate of the input sensor 200 may be configured as a component separate from the substrate 100-4 of the display panel 100. In this case, an adhesive layer may be additionally disposed between the substrate and the substrate 100-4 of the display panel 100.
[0148] The first conductive layer is disposed on the substrate 100-4. The first conductive layer includes a cover portion 280 and a bridging pattern 222-2 (see reference). Figure 6 ), Bypass pattern 223 (refer to) Figure 6 ), First sensing line 240 (reference) Figure 5 ), second sensing lines 251 and 252 (refer to) Figure 5 ), grounding wires 261 and 262 (refer to) Figure 5 ) and the first dummy bridging pattern 236 and the second dummy bridging pattern 237 (see reference) Figure 6 ).
[0149] The first conductive layer comprises a metallic material and has a single-layer or multi-layer structure. For example, the first conductive layer has a multi-layer structure in which titanium, aluminum, and titanium are sequentially stacked on top of each other. However, this is merely exemplary. The materials used for the first conductive layer should not be limited thereto or thereby restricted.
[0150] A laser etching process is used to form module holes 1220 passing through the display module 1200. A cover portion 280 is configured to be adjacent to the area where the module holes 1220 are formed, to cover the components disposed beneath the cover portion 280. For example, the cover portion 280 prevents the first signal line 121 and the second signal line 131 from being damaged by the laser beam.
[0151] The cover portion 280 includes a first cover pattern 281, a second cover pattern 282, a third cover pattern 283, and a fourth cover pattern 284; however, this is merely exemplary. The number of cover patterns included in the cover portion 280 can be varied.
[0152] A first insulating layer 291 covers a first conductive layer. The first insulating layer 291 comprises organic and / or inorganic materials and has a single-layer or multi-layer structure. In an exemplary embodiment of this disclosure, the first insulating layer 291 has a single-layer structure of silicon oxide.
[0153] The second conductive layer is disposed on the first insulating layer 291. The second conductive layer includes a first sensing pattern 211 and a connection pattern 212 (see reference). Figure 6 ), second sensing pattern 221 (refer to) Figure 6 Island pattern 222-1 (refer to) Figure 6 First dummy pattern 231 (refer to) Figure 6 ), Second dummy pattern 232 (refer to) Figure 6 ), Third dummy pattern 233 (refer to) Figure 6 ), Fourth dummy pattern 234 (refer to) Figure 6 ) and the fictitious island pattern 235 (refer to) Figure 6 ).
[0154] The second conductive layer comprises a transparent conductive oxide. For example, the second conductive layer comprises at least one of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), and mixtures / compounds thereof. However, the second conductive layer should not be limited to or restricted by this.
[0155] The second insulating layer 292 covers the second conductive layer. The second insulating layer 292 comprises organic and / or inorganic materials and has a single-layer or multi-layer structure. In an exemplary embodiment of this disclosure, the second insulating layer 292 has a single-layer structure of silicon oxide.
[0156] Figure 7B This is a cross-sectional view showing a display module 1200a according to an exemplary embodiment of the present disclosure.
[0157] Reference Figure 7B The display module 1200a includes a display panel 100a and an input sensor 200a.
[0158] The display panel 100a includes a substrate 100-1, a circuit layer 100-2, a display element layer 100-3, and an encapsulation layer 100-4a. The circuit layer 100-2 is disposed on the substrate 100-1, the display element layer 100-3 is disposed on the circuit layer 100-2, and the encapsulation layer 100-4a is disposed on the display element layer 100-3.
[0159] Recesses 171 and 172 are defined in the first region 101. Each of the recesses 171 and 172 may be defined as surrounding the edge of the module aperture 1220. Recesses 171 and 172 block the path taken by moisture or oxygen introduced through the module aperture 1220 into the pixel 110. The recesses 171 and 172 are defined by removing some of the components forming the display panel 100a. Figure 7B Two recessed portions 171 and 172 are shown as representative examples. However, the number of recessed portions 171 and 172 should not be limited to this or restricted by it.
[0160] The dam section 181 is located between the recessed portions 171 and 172. Figure 7B A dam section 181 is shown as a representative example. However, the number of dam sections 181 should not be limited to one. The dam section 181 has a stacked structure of predetermined insulating layers. However, the number of insulating layers forming the dam section 181 can be varied in various ways. The dam section 181 prevents the organic layer 72 described below from expanding.
[0161] An encapsulation layer 100-4a is disposed on the display element layer 100-3 and encapsulates the light-emitting device 114. Meanwhile, although not shown in the figure, a capping layer is further disposed between the second electrode CE and the encapsulation layer 100-4a to cover the second electrode CE.
[0162] Encapsulation layer 100-4a includes a first inorganic layer 71, an organic layer 72, and a second inorganic layer 73 sequentially stacked on the third-direction DR3. However, encapsulation layer 100-4a should not be limited to or restricted by this. Encapsulation layer 100-4a may also include multiple inorganic layers and multiple organic layers.
[0163] A first inorganic layer 71 covers the second electrode CE. The first inorganic layer 71 prevents external moisture or oxygen from entering the light-emitting device 114. For example, the first inorganic layer 71 includes silicon nitride, silicon oxide, or a combination thereof. The first inorganic layer 71 is formed by a chemical vapor deposition process.
[0164] An organic layer 72 is disposed on and in contact with the first inorganic layer 71. The organic layer 72 provides a flat surface on the first inorganic layer 71. Uneven shapes or particles formed on the upper surface of the first inorganic layer 71 are covered by the organic layer 72. Therefore, the influence of the surface state of the upper surface of the first inorganic layer 71 (which would be applied to the components formed on the organic layer 72) is suppressed. Additionally or optionally, the organic layer 72 relieves stress between layers in contact with each other. The organic layer 72 comprises an organic material and is formed by a solution process such as spin coating, slot coating, or inkjet printing.
[0165] A second inorganic layer 73 is disposed on the organic layer 72 to cover the organic layer 72. Compared to the first inorganic layer 71, the second inorganic layer 73 is stably formed on a relatively flat surface. The second inorganic layer 73 encapsulates moisture leaking from the organic layer 72 to prevent moisture from flowing to the outside. The second inorganic layer 73 comprises silicon nitride, silicon oxide, or a combination thereof. The second inorganic layer 73 is formed by a chemical vapor deposition process.
[0166] A cover layer 80 is disposed in the first region 101. The cover layer 80 covers the uneven surface caused by the dam portion 181 or the recessed portions 171 and 172, and defines a flat surface.
[0167] The input sensor 200a includes multiple insulating layers 290, 291, and 292 and multiple conductive layers. The insulating layers 290, 291, and 292 include a substrate insulating layer 290, a first insulating layer 291, and a second insulating layer 292.
[0168] The substrate insulating layer 290 is an inorganic layer comprising one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively or optionally, the substrate insulating layer 290 is an organic layer comprising epoxy resin, acrylic resin, or imide resin. The substrate insulating layer 290 is formed directly on the display panel 100a. The substrate insulating layer 290 has a single-layer structure or a multi-layer structure.
[0169] The first conductive layer is disposed on the substrate insulating layer 290. The first conductive layer includes a cover portion 280 and a bridging pattern 222-2 (see reference). Figure 6 ), Bypass pattern 223 (refer to) Figure 6 ), First sensing line 240 (reference) Figure 5 ), second sensing lines 251 and 252 (refer to) Figure 5 ), grounding wires 261 and 262 (refer to) Figure 5 ) and the first dummy bridging pattern 236 and the second dummy bridging pattern 237 (see reference) Figure 6 ).
[0170] The first insulating layer 291 covers the first conductive layer. Additionally or optionally, the first insulating layer 291 comprises organic and / or inorganic materials and has a single-layer or multi-layer structure.
[0171] The second conductive layer is disposed on the first insulating layer 291. The second conductive layer includes a first sensing pattern 211 and a connection pattern 212 (see reference). Figure 6 ), second sensing pattern 221 (refer to) Figure 6 Island pattern 222-1 (refer to) Figure 6 First dummy pattern 231 (refer to) Figure 6 ), Second dummy pattern 232 (refer to) Figure 6 ), Third dummy pattern 233 (refer to) Figure 6), Fourth dummy pattern 234 (refer to) Figure 6 ) and the fictitious island pattern 235 (refer to) Figure 6 ).
[0172] The second insulating layer 292 covers the second conductive layer. The second insulating layer 292 comprises organic and / or inorganic materials and has a single-layer or multi-layer structure.
[0173] Figure 7C This is a cross-sectional view showing a display module 1200b according to an exemplary embodiment of the present disclosure.
[0174] Reference Figure 7C The display module 1200b includes a display panel 100b and an input sensor 200b. Figure 7B In comparison, module hole 1220 (reference) Figure 7B It is not limited to the display panel 100b and the input sensor 200b, but defines the transmission area 1220-1.
[0175] Transmission region 1220-1 has a greater transmission capacity than the second region 102 (reference). Figure 3 The transmittance of the transmission region 1220-1 is relatively higher. The transmission region 1220-1 transmits data to the electronic module 1300 (see reference 1300) via its transmission input. Figure 2 External signals from the electronic module 1300 (see reference) Figure 2 The space of the output signal.
[0176] In this exemplary embodiment, the second electrode CE is formed to overlap with the transmissive region 1220-1. When the second electrode CE is a transmissive or transflective electrode, even though the second electrode CE overlaps with the transmissive region 1220-1, the transmissive region 1220-1 has a relatively higher transmittance than the region in which the pixel 110 is disposed.
[0177] The transmission region 1220-1 has a shape corresponding to the module hole 1220 in the plan view. For example, the transmission region 1220-1 has one of the following shapes in the plan view: circular, elliptical, polygonal, and polygonal with a curved edge on at least one side. However, the transmission region 1220-1 should not be particularly limited.
[0178] Figure 8A It is shown Figure 6 A magnified plan view of part of CC'. Figure 8B It is along Figure 8A A sectional view taken from line I-I'.
[0179] Reference Figure 6 , Figure 8A and Figure 8BThe first contact hole 291-1 is defined through the first insulating layer 291. The first contact hole 291-1 is defined in the area overlapping with the grounding wire 261.
[0180] The second dummy pattern 232 extends in the area overlapping with the grounding wire 261. Additionally or optionally, the second dummy pattern 232 is electrically connected to the grounding wire 261 via the first contact hole 291-1.
[0181] Figure 9A It is shown Figure 6 A magnified plan view of part DD'. Figure 9B It is along Figure 9A The sectional view shown is taken from line II-II'.
[0182] Reference Figure 6 , Figure 9A and Figure 9B The covering part 280 includes a first covering pattern 281, a second covering pattern 282, a third covering pattern 283, a fourth covering pattern 284, and a connecting pattern 285.
[0183] The first covering pattern 281 is closest to hole 201-H (refer to) Figure 5 The first overlay pattern 281 has a width greater than the width of each of the second overlay pattern 282, the third overlay pattern 283, and the fourth overlay pattern 284. The second overlay pattern 282 surrounds the first overlay pattern 281 and is spaced apart from the first overlay pattern 281. The third overlay pattern 283 surrounds the second overlay pattern 282. The fourth overlay pattern 284 surrounds the third overlay pattern 283.
[0184] According to an exemplary embodiment of this disclosure, some components of the cover portion 280 adjacent to the first sensing pattern 211 or the second sensing pattern 221 are electrically connected to the grounding wire 261. The charge on the components is released through the grounding wire 261. Therefore, damage to peripheral components caused by the sudden release of accumulated charge (i.e., static electricity) can be prevented.
[0185] In an exemplary embodiment of this disclosure, the connecting pattern 285 extends from the second covering pattern 282 to the area overlapping with the first dummy pattern 231. For example, the connecting pattern 285 is connected to the second covering pattern 282, the third covering pattern 283, and the fourth covering pattern 284. The connecting pattern 285, the second covering pattern 282, the third covering pattern 283, and the fourth covering pattern 284 have an integral shape.
[0186] In an exemplary embodiment of this disclosure, the connecting pattern 285 is not connected to the first covering pattern 281. Therefore, the first covering pattern 281 is floating. In an exemplary embodiment of this disclosure, the connecting pattern 285 may be connected to the third covering pattern 283 and the fourth covering pattern 284. A second contact hole 291-2 is defined through the first insulating layer 291. The second contact hole 291-2 is defined in the region overlapping with the first dummy pattern 231. The first dummy pattern 231 is electrically connected to the connecting pattern 285 through the second contact hole 291-2.
[0187] The second sensing electrode 220 also includes a connecting electrode 224. (See reference...) Figure 5 Some of the second sensing patterns 221 are spaced apart from each other in the second direction DR2, and holes 201-H are defined therebetween. Connecting electrodes 224 surround the holes 201-H to connect the spaced-apart second sensing patterns 221 defined therebetween. Connecting electrodes 224 and second sensing patterns 221 are disposed on the same layer and comprise the same material as second sensing patterns 221.
[0188] Figure 10 It shows the corresponding Figure 6 A magnified plan view of part DD'.
[0189] Reference Figure 10 ,and Figure 9A In contrast, the connecting pattern 285-1 has different features. The connecting pattern 285-1 further extends to and connects to the first covering pattern 281. Therefore, the first covering pattern 281, the second covering pattern 282, the third covering pattern 283, the fourth covering pattern 284, and the connecting pattern 285-1 have an integral shape. According to an exemplary embodiment of this disclosure, the components of the covering portion 280 are electrically connected to the grounding wire 261.
[0190] Figure 11 It shows the corresponding Figure 6 A magnified plan view of part DD'.
[0191] Reference Figure 11 The dummy pattern 238 is further disposed between the connecting electrode 224 and the first sensing pattern 211. The dummy pattern 238 is disposed between the third dummy pattern 233 and the connecting electrode 224, between the first dummy pattern 231 and the connecting electrode 224, and between the first sensing pattern 211 and the connecting electrode 224.
[0192] The connecting electrode 224 and the first sensing pattern 211 are spaced apart from each other by a dummy pattern 238. Therefore, the dummy pattern 238 prevents the connecting electrode 224 and the first sensing pattern 211 from bonding together.
[0193] Figure 12 It is shown Figure 5 A magnified plan view of part of EE'.
[0194] Reference Figure 5 and Figure 12 A second sensing electrode 220 includes a second sensing pattern 221 and a connection unit 222. The connection unit 222 includes a first connection unit 222a, a second connection unit 222b, a third connection unit 222c, and a fourth connection unit 222d.
[0195] The first connecting unit 222a and the second connecting unit 222b are spaced apart from each other in the second direction DR2, and the hole 201-H is defined therebetween. The third connecting unit 222c is spaced apart from the second connecting unit 222b in the second direction DR2. The fourth connecting unit 222d is spaced apart from the third connecting unit 222c in the second direction DR2. The first connecting unit 222a, the second connecting unit 222b, the third connecting unit 222c, and the fourth connecting unit 222d are arranged sequentially in the second direction DR2.
[0196] The first distance 222-L1 between the first connecting unit 222a and the second connecting unit 222b is greater than the second distance 222-L2 between the second connecting unit 222b and the third connecting unit 222c and the third distance 222-L3 between the third connecting unit 222c and the fourth connecting unit 222d. Additionally or optionally, the second distance 222-L2 may be smaller than the third distance 222-L3. Therefore, some sensing patterns within the sensing pattern are deformed in shape. For example, the area of the second sensing pattern 221a connected to the second connecting unit 222b and the third connecting unit 222c in the second sensing pattern 221 may be smaller than the area of the second sensing pattern 221b connected to the third connecting unit 222c and the fourth connecting unit 222d in the second sensing pattern 221.
[0197] Unlike the exemplary embodiments of this disclosure, when the connecting unit is omitted without adjusting the positions of the connecting unit and the connecting pattern to correspond to the shape of the hole 201-H, the bypass pattern 223 (see reference) is also omitted. Figure 6 As a result, the risk of electrostatic discharge (ESD) failure increases. According to an exemplary embodiment of this disclosure, the positions of the connecting unit and the connecting pattern can be adjusted to correspond to the shape of the hole 201-H. As a result, the increased risk of ESD failure can be prevented.
[0198] Figure 13 This is a plan view showing an input sensor 200-1 according to an exemplary embodiment of the present disclosure. Figure 14 It is shown Figure 13 A magnified plan view of part of FF'.
[0199] Reference Figure 13 and Figure 14 The input sensor 200-1 includes a first region 201-1, a second region 202-1, and a third region 203. An aperture 201-H1 is defined in the first region 201-1, and the first region 201-1 surrounds the aperture 201-H1. The second region 202-1 surrounds the first region 201-1. The aperture 201-H1 is configured to overlap with a region in which no connecting pattern 212 and connecting unit 222 are provided.
[0200] A cover portion 280-1 is disposed around the hole 201-H1. Additionally or optionally, the cover portion 280-1 includes a cover pattern 280a and a connecting pattern 280b. The cover pattern 280a includes at least one annular pattern. The connecting pattern 280b is electrically connected to the cover pattern 280a. For example, the connecting pattern 280b may be disposed on the same layer as the cover pattern 280a and may comprise the same material as the cover pattern 280a.
[0201] The cover 280-1 is electrically connected to the grounding wire 261 via at least one conductor 230k-1. For example, the cover 280-1 is electrically connected to the grounding wire 261 via two conductors 230k-1.
[0202] Each conductor 230k-1 includes a first dummy pattern 231-1, a second dummy pattern 232-1, a dummy island pattern 235-1, a first dummy bridging pattern 236-1, and a second dummy bridging pattern 237-1. The first dummy pattern 231-1, the second dummy pattern 232-1, and the dummy island pattern 235-1 are disposed on the same layer as the first sensing pattern 211 and the second sensing pattern 221. The first dummy bridging pattern 236-1 and the second dummy bridging pattern 237-1 are disposed on the same layer as the cover portion 280-1 and the grounding wire 261.
[0203] For example, the cover portion 280-1 and the grounding wire 261 are disposed on the first surface (or the first layer), and the first sensing pattern 211, the second sensing pattern 221, the first dummy pattern 231-1, the second dummy pattern 232-1, and the dummy island pattern 235-1 can be disposed on a second surface (or a second layer) different from the first surface. For example, the insulating layer 291 (see...) Figure 7A Insulating layer 291 is disposed between the first surface and the second surface. Figure 7A The second surface can cover the cover portion 280-1 and the grounding wire 261. In this case, the second surface can be an insulating layer 291 (see...). Figure 7A The upper surface of ).
[0204] In an exemplary embodiment of this disclosure, the cover portion 280-1 is electrically connected to the grounding wire 261. Charge generated during the process does not accumulate in the cover portion 280-1 but is released through the grounding wire 261. Therefore, charge accumulation on the cover portion 280-1 is prevented, and peripheral components (e.g., the first sensing pattern 211 or the second sensing pattern 221) are prevented from being damaged during a sudden discharge of static electricity.
[0205] Although exemplary embodiments of this disclosure have been described, it is understood that this disclosure should not be limited to these exemplary embodiments, but rather that various changes and modifications can be made by those skilled in the art within the spirit and scope of this disclosure as claimed herein. Therefore, the subject matter disclosed should not be limited to any single embodiment described herein, and the scope of the inventive concept should be determined by the appended claims.
Claims
1. An electronic device, the electronic device comprising: The substrate includes a hole, a first region surrounding the hole, a second region surrounding the first region, and a third region surrounding the second region; A covering portion is disposed in the first region and includes at least one covering pattern; A first sensing electrode is disposed in the second region and includes a first sensing pattern arranged in a first direction; A second sensing electrode is disposed in the second region and includes a second sensing pattern arranged in a second direction intersecting the first direction; A dummy electrode is disposed in the second region, and includes a dummy pattern disposed between the first sensing pattern and the second sensing pattern; as well as A grounding wire is disposed in the third region and is electrically connected to the cover portion through at least some of the dummy patterns. The covering portion, the grounding wire, and at least some of the dummy patterns are electrically connected to each other.
2. The electronic device according to claim 1, wherein, The covering portion includes a first covering pattern surrounding the hole and a second covering pattern surrounding the first covering pattern, wherein the second covering pattern has a width smaller than that of the first covering pattern.
3. The electronic device according to claim 2, wherein, The covering portion further includes a connecting pattern that extends from the second covering pattern to an area overlapping with at least some of the dummy patterns in the dummy pattern.
4. The electronic device according to claim 3, wherein, The connecting pattern extends from the second overlay pattern to the first overlay pattern, and the connecting pattern is connected to the first overlay pattern.
5. The electronic device according to claim 1, wherein, At least some of the dummy patterns in the dummy pattern extend from the second region to the region overlapping with the grounding wire.
6. The electronic device according to claim 1, wherein, The cover and the grounding wire are disposed on the first surface, and the first sensing pattern, the second sensing pattern and the dummy pattern are disposed on a second surface different from the first surface.
7. The electronic device of claim 6, further comprising an insulating layer disposed on the first surface and covering the grounding wire, wherein, The second surface is the upper surface of the insulating layer.
8. The electronic device according to claim 7, wherein, The insulating layer is provided with a first contact hole and a second contact hole. A first part of the dummy pattern is electrically connected to the grounding wire through the first contact hole, and a second part of the dummy pattern is electrically connected to the covering part through the second contact hole.
9. The electronic device according to claim 1, wherein, The dummy electrode also includes a dummy island pattern disposed in the second region, and the dummy island pattern is electrically connected to the grounding wire.
10. The electronic device according to claim 9, wherein, The dummy pattern includes a first dummy pattern superimposed on a portion of the cover and a second dummy pattern superimposed on the grounding wire, and the dummy island pattern is disposed between the first dummy pattern and the second dummy pattern to electrically connect the first dummy pattern and the second dummy pattern.
11. The electronic device according to claim 9, wherein, The second sensing electrode further includes an island pattern disposed between two adjacent second sensing patterns and electrically connected to the two second sensing patterns, wherein the dummy island pattern and the island pattern have the same area.
12. The electronic device according to claim 1, wherein, The hole includes at least one straight portion, and the grounding wire is electrically connected to the cover portion through at least one dummy pattern disposed between the straight portion and the grounding wire in the dummy pattern.
13. The electronic device according to claim 1, wherein, The second sensing electrode includes a first connecting unit, a second connecting unit, a third connecting unit, and a fourth connecting unit. The second connecting unit is spaced apart from the first connecting unit in the second direction, and the hole is located between the first connecting unit and the second connecting unit. The third connecting unit is spaced apart from the second connecting unit in the second direction, and the fourth connecting unit is spaced apart from the third connecting unit in the second direction. The distance between the first connecting unit and the second connecting unit is greater than the distance between the third connecting unit and the fourth connecting unit.
14. The electronic device according to claim 13, wherein, The distance between the first connecting unit and the second connecting unit is greater than the distance between the second connecting unit and the third connecting unit, and the distance between the second connecting unit and the third connecting unit is less than the distance between the third connecting unit and the fourth connecting unit.
15. The electronic device according to claim 14, wherein, The second sensing pattern connected to the second connection unit and the third connection unit in the second sensing pattern has an area smaller than the area of the second sensing pattern connected to the third connection unit and the fourth connection unit in the second sensing pattern.
16. The electronic device according to claim 1, wherein, The second sensing electrode further includes a connecting electrode that electrically connects two second sensing patterns spaced apart from each other, such that the aperture is disposed between the two second sensing patterns, the connecting electrode is spaced apart from the first sensing pattern, and at least one of the dummy patterns is disposed between the connecting electrode and the first sensing pattern, and the connecting electrode and the second sensing pattern are disposed on the same layer and comprise the same material as the second sensing pattern.
17. An electronic device, the electronic device comprising: The substrate includes a hole, a first region surrounding the hole, a second region surrounding the first region, and a third region surrounding the second region; A cover pattern is provided in the first area and surrounds the hole; A connecting pattern protrudes from the overlay pattern into the second region; A first dummy pattern is disposed in the second region and superimposed on the connecting pattern; A second dummy pattern is electrically connected to the first dummy pattern and extends from the second region to the third region; as well as A grounding wire is disposed in the third region, superimposed on the second dummy pattern, and electrically connected to the second dummy pattern. The covering pattern, the connecting pattern, the first dummy pattern, the second dummy pattern, and the grounding wire are electrically connected to each other.
18. The electronic device of claim 17, further comprising: A virtual island pattern is set between the first virtual pattern and the second virtual pattern; A first dummy bridge pattern is connected to the dummy island pattern and the first dummy pattern; as well as A second dummy bridging pattern is connected to the dummy island pattern and the second dummy pattern.
19. The electronic device according to claim 18, wherein, The first dummy pattern, the second dummy pattern, and the dummy island pattern are disposed on the first surface, and the overlay pattern, the grounding wire, the first dummy bridging pattern, and the second dummy bridging pattern are disposed on a second surface different from the first surface.
20. The electronic device according to claim 17, wherein, The covering pattern is configured as a plurality of such patterns, including a first covering pattern and a second covering pattern. The first covering pattern has a first width, and the second covering pattern is spaced apart from the hole such that the first covering pattern is disposed between the hole and the second covering pattern. The second covering pattern has a second width that is less than the first width. The second covering pattern is electrically connected to the grounding wire, and the first covering pattern is electrically connected to the grounding wire or floated.
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