An array detector and a detection system using the same

Abstract

The application discloses an array type detector, which is characterized by comprising array type arranged detection modules, the detection module comprising M*N pixel units, wherein M and N are both integers greater than 2, the pixel comprising a photodiode unit for acquiring a return light signal and converting the return light signal into photo-generated charges; a transfer element for transferring the photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charges transferred by the transfer element; and at least part of the pixel units sharing at least part of the transfer elements, so that the area originally occupied by the non-shared transfer elements can be reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of detection technology, in particular to an array type detector and a detection system using the same. BACKGROUND

[0002] As a method for measuring the distance from an object in a scene, time-of-flight (TOF) technology has been developed. This TOF technology can be applied in various fields, such as the automotive industry, human-machine interface, gaming, robotics, and security, etc. Generally speaking, the working principle of TOF technology is to use a light source to emit modulated light to illuminate a scene, and to observe the reflected light reflected by objects in the scene. In order to ensure that a higher detection efficiency can be obtained during the detection process and also to ensure that the detection system has a wider field of view, an array type receiving module is currently more commonly used in existing detection systems. The array type receiving module can have thousands of pixel units, each of which can be a charge-coupled semiconductor (CCD) or a complementary metal-oxide-semiconductor (CMOS) type diode. Here, it is not limited to only these two types of diodes to form the array type receiving module.

[0003] For example, a more typical array type receiving module is usually arranged on the focal plane of an optical (lens) system, so this array type receiving module is also called a focal plane type array receiving module. With the increasing requirements of chip miniaturization and high integration, the reliability of the array type receiving module in the entire detection system also faces higher challenges. In terms of light receiving area, it is necessary to ensure that the returned light has sufficient receiving area. In terms of charge transfer speed, it is necessary to ensure that the transfer gate has a larger influence range to speed up the transfer of the photo-generated charge generated by the diode. In the existing array type detection unit, especially in TOF ranging, since the active light source used is usually an infrared type laser light source, the wavelength is longer than that of visible light, so the photoelectric conversion unit needs to have a deeper absorption depth. Therefore, although the existing transfer element structure can apply a constant potential, the potential change at a far distance of the transfer element is actually very weak, so that the photo-generated electrons generated in the diode can only rely on thermal diffusion to diffuse into the floating diffusion (FD). The entire transfer process will be relatively slow. For example, in a special scenario, the photo-generated electrons generated in a short integration time of 5μs need about 20μs of transfer and readout time. With the requirement of array miniaturization, the pixel unit area will be smaller, and even in some cases, sub-pixel units need to be set for each pixel unit. Therefore, the size of the transfer element will be smaller. In addition, in order to ensure that the influence range of the transfer element can be improved, the applied voltage needs to be increased. However, increasing the voltage of the transfer element will result in higher risk of crosstalk and other effects in the pixel unit, and also may result in the risk of reduced device reliability.

[0004] In the above analysis, designing a new type of array pixel structure and the structure and arrangement of transfer elements in the array will be a problem to be solved. SUMMARY

[0005] The purpose of the present application is to solve the technical problems that the existing array type detection module cannot be efficiently identified with abnormal pixels, resulting in unqualified products being used or unable to accurately and constantly output accurate detection results during use, etc.

[0006] To achieve the above purpose, the technical scheme adopted by the embodiments of the present application is as follows:

[0007] The first aspect of the embodiments of the present application provides an array type detector, which includes array type detection modules, the detection module includes M*N pixel units, where M and N are integers greater than 2, the pixel includes a photodiode unit for obtaining a return light signal and converting it into photo-generated charge; a transfer element for transferring photo-generated charge generated in the photodiode; a charge storage unit for receiving photo-generated charge transferred by the transfer element; at least part of the pixel units share at least part of the transfer element.

[0008] Optionally, when any of the shared at least transfer elements is in a working state with an applied voltage, two pixel units sharing the transfer element simultaneously transfer the photo-generated charge to the charge storage units of the two pixel units.

[0009] Optionally, the photo-generated charge simultaneously transferred by the shared transfer element is the same delay phase received and converted photo-generated charge.

[0010] Optionally, each two adjacent pixel units in each row of M rows in the array type detection unit share the transfer element, so that the N pixel units in each row of the array include N+1 transfer elements.

[0011] Optionally, each two adjacent pixel units in each column of N columns in the array type detection unit share the transfer element, so that the M pixel units in each column of the array include M+1 transfer elements.

[0012] Optionally, the transfer unit is arranged in an isolation part of the pixel unit, when the transfer element is in a working state with an applied voltage, the surface of the isolation part and the surface adjacent area voltage rise, forming a charge transfer channel of two adjacent pixels.

[0013] Optionally, the isolation part is a deep trench isolation part, and the charge transfer channel simultaneously transfers the two adjacent photo-generated charges to the corresponding charge storage units.

[0014]

[0014] Optionally, the charge storage unit is contained in a regulating region with a potential barrier.

[0015] In a second aspect, the present application provides a detection system using the array detector of the first aspect, comprising a detection module arranged in an array, the detection module comprising M*N pixel units, where M and N are both integers greater than 2, the pixel unit comprising a photodiode unit for obtaining a return light signal and converting it into photo-generated charges; a transfer element for transferring the photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charges transferred by the transfer element; and at least part of the pixel units sharing at least part of the transfer element.

[0016] Optionally, when any of the shared transfer elements is in an active state with an applied voltage, two pixel units sharing the transfer element simultaneously transfer the photo-generated charges to the charge storage units of the two pixel units.

[0017] Optionally, the photo-generated charges simultaneously transferred by the shared transfer element are photo-generated charges of the same time delay phase.

[0018] Optionally, each two adjacent pixel units in each row of the M rows in the array detection unit share the transfer element, so that the N pixel units in each row of the array comprise N+1 transfer elements.

[0019] Optionally, each two adjacent pixel units in each column of the N columns in the array detection unit share the transfer element, so that the M pixel units in each column of the array comprise M+1 transfer elements.

[0020] Optionally, the transfer element is arranged in an isolation portion of the pixel unit, and when the transfer element is in an active state with an applied voltage, the surface of the isolation portion and the surface adjacent area have a voltage rise, forming a charge transfer channel of two adjacent pixels.

[0021] Optionally, the isolation portion is a deep trench isolation portion, and the charge transfer channel simultaneously transfers the two adjacent photo-generated charges to the corresponding charge storage units.

[0022] The beneficial effects of the present application are as follows:

[0023] The array type detector provided by the embodiment of the present application comprises array type arranged detection modules, the detection module comprises M*N pixel units, wherein M and N are integers greater than 2, the pixel comprises a photodiode unit for acquiring a return light signal and converting the return light signal into photo-generated charges; a transfer element for transferring the photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charges transferred by the transfer element; and at least part of the pixel units share at least part of the transfer elements. According to the scheme of the present application, on the one hand, at least part of the transfer elements are shared by different pixels to release the area occupied when not shared, thereby ensuring that the photosensitive area can obtain sufficient area after the device is miniaturized; on the other hand, the used transfer elements can be arranged in the isolation part of the existing pixel, thereby ensuring that the pixel isolation part has a new function, and the influence range of the transfer element is ensured by the sunken structure, so as to obtain the effect of quickly transferring electrons, and the area occupied by other areas is also saved. BRIEF DESCRIPTION OF DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0025] Figure 1 A schematic diagram of an array type receiving module provided by the prior art;

[0026] Figure 2 A schematic diagram of a TOF ranging 4T structure pixel circuit provided by the prior art;

[0027] Figure 3 A pixel layout structure schematic diagram provided by the embodiment of the present application;

[0028] Figure 4 A pixel structure longitudinal section structure schematic diagram provided by the embodiment of the present application;

[0029] Figure 5 A device working principle schematic diagram provided by the embodiment of the present application;

[0030] Figure 6 A transfer element circuit structure schematic diagram shared by different pixel units provided by the embodiment of the present application;

[0031] Figure 7 An array structure schematic diagram provided by the embodiment of the present application;

[0032] Figure 8This is a schematic diagram of another array structure provided in an embodiment of this application;

[0033] Figure 9 This is a schematic diagram of another pixel unit layout structure provided in an embodiment of this application. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0035] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0036] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0037] The optical receiver module can be adopted as follows: Figure 1The array type receiving module shown, the pixel unit 110 composed of diodes in the array type receiving module can adopt M*N pixel units to form the active area of the array type receiving module in actual implementation, and the pixel units can be in the order of tens of thousands, hundreds of thousands or even hundreds of thousands, etc., which is not limited here. The array type receiving module can include the lens part 101 and the detection unit substrate part 102. The lens part includes a plurality of lens units, which can be composed of microlens units with a predetermined curvature. Of course, in order to maximize the use of the returned light, the lens part can also include more than one layer of structure, which is not limited to the specific implementation scheme here. In a more optimal case, the substrate part 102 can be arranged at the corresponding focal plane position of the lens part 101, which can ensure that the detection pixel unit can maximize the acquisition of accurate returned light information. In this case, the lens of the lens part 101 can construct a light channel, so that the signal received by the light sensitive part of the detection unit is near the corresponding focal point position. The detection unit substrate part 102 includes an array type arranged light sensitive pixel array. The light sensitive pixel can be formed by doping on the semiconductor substrate part 102 to form a CCD or CMOS type light sensitive unit, etc. At the same time, the semiconductor substrate part 102 can also include all analog signal processing circuits used in the pixel unit readout, pixel level control circuit and analog-to-digital conversion circuit (ADC), etc. When arranging the position relationship between the circuit and the light sensitive unit, the front illumination process of arranging the circuit layer upstream of the light sensitive unit in the direction of the returned light propagation, or the back illumination process of arranging the circuit layer downstream of the light sensitive unit in the direction of the returned light propagation can be adopted. The specific implementation manner is not limited here. Of course, the light sensitive unit and part of the circuit can be arranged on different semiconductor layers, and a higher integrated design can be realized by using the stacking process. The specific implementation scheme is not limited here.

[0038] The current detection system basically includes: light emitting module, processing module, and light receiving module, which is illustrated by taking ITOF ranging as an example. The light emitting module includes but is not limited to semiconductor lasers, solid-state lasers, and other types of lasers. When a semiconductor laser is used as a light source, a vertical-cavity surface-emitting laser (VCSEL) or an edge-emitting laser (EEL) can be used. This is only an exemplary illustration and is not specifically limited. The light emitting module emits a sine wave or a square wave or a triangular wave, etc. In ranging applications, it is mostly a laser with a certain wavelength, such as 950 nm infrared laser (optimally near-infrared laser). The emitted light is projected into the field of view. The detected object existing in the field of view can reflect the projected laser to form return light. The return light enters the detection system and is captured by the light receiving module. The light receiving module can include a photoelectric conversion part, such as an array sensor composed of CMOS, CCD, etc. It can also include multiple lenses that can form more than one image plane. That is, the receiving module includes more than one image plane. The photoelectric conversion part of the receiving module is located at one of the image planes. It can be most commonly used to receive four-phase signals to obtain 0°, 90°, 180°, and 270° delay signals. Using a four-phase distance calculation scheme, this example is illustrated by taking the sine wave method. The amplitudes of the received signals are measured at four equidistant points (e.g., 90° or 1 / 4λ interval):

[0039]

[0040] The ratio of the difference between A1 and A3 to the difference between A2 and A4 is equal to the tangent of the phase angle. ArcTan is actually a two-variable inverse tangent function that can be mapped to the appropriate quadrant. When A2 = A4 and A1 > A3 or A3 > A1, it is defined as 0° or 180°, respectively.

[0041] The distance to the target object is determined by the following formula:

[0042]

[0043] At this point, the frequency of the emitted laser also needs to be determined to calculate the distance. Where c is the speed of light, is the phase angle (measured in radians), and f is the modulation frequency. The above scheme can achieve the effect of distance detection of the detected object in the field of view, and the scheme is called a four-phase delay scheme to obtain the detection result. Of course, the photoelectric conversion of the receiving module generates different information, and in some cases, a 0° and 180° two-phase scheme is also used to achieve information acquisition of the detected object. Some documents disclose that 0°, 120° and 240° three-phase schemes are used to obtain target information, and even some documents disclose a five-phase delay scheme. The present application is not specifically limited, and in actual measurement, a square wave is also used for detection, which has a mechanism similar to that of a sine wave, except that the calculation formula is different, which will not be described in detail here.

[0044] In the four-phase detection, a commonly used scheme for a pixel unit is Figure 2 The circuit structure diagram, in which the photodiode is connected to two transfer elements, and the transfer transistors TX1 and TX2 are taken as examples for description. When the return light or the background light irradiates the photodiode, it can generate photo-generated charges. After a certain integration time, a certain amount of photo-generated charges is generated in the diode. The two transfer transistors can transfer the generated photo-generated charges at complementary delay phases, for example, 0° and 180°, 90° and 270°. The FD1 and FD2 floating diffusion nodes contain MOS transistor type capacitors, so the two nodes can store photo-generated charges converted at different delay phases. Through subsequent column reading and digital circuit, the photo-generated charges are converted into the corresponding information in the distance calculation expression above, so as to obtain the distance information of the detected target. The present scheme takes a classical 4T structure as an example for description, and of course, it is not limited to using 3T or 5T structures and the like to realize it.

[0045] As previously described, the prior art scheme and pixel structure cannot adapt to the requirements of miniaturization and integration. Under the premise that the pixel unit area will be smaller, even in some cases, a sub-pixel unit needs to be arranged in each pixel unit, so the size of the transfer element will be smaller. In addition, in order to ensure the influence range of the transfer element, the applied voltage needs to be increased. However, increasing the voltage of the transfer element will lead to higher risk of crosstalk and other influences in the pixel unit, and may also cause the risk of reduced device reliability. In order to ensure the need to design a new structure, on the one hand, the photosensitive area in the pixel needs to be sufficient, and on the other hand, the transfer element needs to have a larger influence range.

[0046] Figure 3 An improved pixel unit is proposed for the present application, and a structure composed of four pixels is taken as an example for description. Firstly, in order to ensure that the transfer element can be at least partially shared, relatively speaking, the prior art needs two transfer elements for each pixel unit, and the prior art generally uses surface deposition and the like to manufacture the gate of the transfer element. Therefore, the influence range of the transfer element formed will be very small.Figure 3 The proposed scheme shares the transfer elements of at least some pixel units in the array-type detection module. In the pixel architecture, the charge storage units of two adjacent pixel units store photogenerated charges received with the same phase delay, while the two charge storage units that are farther apart store photogenerated charges received with complementary phase delays to the adjacent storage units. In the structural design of the transfer unit, the transfer elements are set in the existing isolation part between pixels and a recessed design is adopted, that is, the transfer elements are set as trench gate structures, which can enhance the influence range of the transmission gate and realize the rapid transfer of photogenerated charges.

[0047] Figure 4 This is a longitudinal cross-sectional view of the pixel structure proposed in this invention. Under the microlens, there is a photoelectric conversion region (PD), where the transfer element is a transfer gate disposed in the isolation portion of the pixel. The isolation portion also includes an oxide layer, also called a gate oxide layer, surrounding the transfer gate. This oxide layer ensures that the isolation portion still performs its isolation function between pixels. To ensure the transfer of photogenerated charges by the transfer gate, the side oxide layer connected to the transfer gate needs to have a relatively thin thickness, while the bottom oxide layer connected to the bottom of the transfer gate needs to have a thicker thickness. On the one hand, a certain thickness of the side oxide layer ensures reliable isolation between pixels; on the other hand, a thinner thickness ensures that the transfer gate can effectively transfer photoelectric charges. When the voltage is applied, the potential of a larger area can be changed. The thickness of the bottom oxide layer can be designed to be several times or tens of times the thickness of the side oxide layer to ensure that when the transmission gate is in working state, the photogenerated charges between different pixels will not be affected by crosstalk due to the application of the gate voltage. Furthermore, in order to ensure the influence range of the transmission gate and the more thorough transfer of the photogenerated charges generated during the integration time, so as to achieve a more efficient distance detection effect, the filling depth of the transmission gate of the present invention is optimally greater than 3 / 4 of the depth of the photoelectric conversion part (PD). More optimally, it can be basically close to or even exceed the depth of the PD. The transmission gate is formed by filling polysilicon in the trench.

[0048] To further explain the principles of this invention, combined with Figure 4 and Figure 5 To further explain, Figure 4 The potential distribution characteristics between the PD and the periphery of the transfer gate and the charge storage cell are shown in the figure on the right. Figure 4 The potential change at positions ABCD is used as an example to illustrate this. When the transfer gate is in an inactive state, a potential barrier exists around the gate, preventing charges from crossing it. Therefore, the PD and the charge storage cell cannot communicate. The charge storage cell is placed within an adjustment region with a potential barrier; here, a P-type doped region with a certain doping concentration is used as the adjustment region. Other transfer paths of photogenerated charges are also blocked by the potential barrier, ensuring accurate charge acquisition within the integration time. When the gate is in an active state, the potential barrier decreases, establishing a channel between the PD and the charge storage cell. Figure 5It is clear that under the structure of the present application, when the shared transfer gate is applied with voltage to be in working state, two pixels sharing the transfer gate build a transfer channel between PD and charge storage unit, the surface and the surface adjacent area of the isolation part is raised in voltage, forming the charge transfer channel of two adjacent pixels, the two pixel units sharing the transfer element transfer the photo-generated charge to the charge storage unit of the two pixel units at the same time, and the photo-generated charge transferred by the shared transfer element is the same in time phase, and the closely adjacent transfer gate is in non-working state at this time, and the signal corresponding to the time phase is not accumulated, under this structure, at least part of the transfer gate is shared, so that the number of components of the whole array is reduced, more area can be saved for the photosensitive area or other devices, and further, the transfer gate is arranged in the isolation part such as deep trench isolation part, which can utilize the existing structure, and play a new role and new function in the isolation part area.

[0049] Figure 6 Three pixel circuit diagrams are shown, according to the scheme of the present application, one of the transfer gates 1011 of the pixel 100 is shared with the pixel 300, and the other transfer gate 1012 is shared with the pixel 200, so that the scheme originally requiring 6 transfer gates now only needs 4 transfer gates, thereby saving the area occupied by part of the transfer gates, and further, the remaining transfer gates can be arranged in the deep trench isolation part between the pixels, so as not to occupy additional area, and since the influence range of the transfer gate arranged in the deep trench is increased when it is working, the speed of charge transfer is improved, and other elements and Figure 2 functions are similar, which will not be described in detail here.

[0050] Figure 7 It is a kind of array structure diagram using the layout scheme of the present application, the pixel units of the array are arranged in M*N rows and columns, every two adjacent pixel units of every adjacent two columns share a transfer gate, and every two adjacent pixel units of every row in the M rows of the array type detection unit share the transfer element, so that N pixel units of every row in the array contain N+1 transfer elements, so according to the prior art, 2N transfer gates are needed in each row, and the present application only needs N+1, when M rows are calculated, the total number of transfer gates can be reduced from 2N*M of the prior art to (N+1)*M, for example, when the array unit M=128 and N=256, the total number of transfer gates is reduced from 2*256*128=65536 to 257*128=32896, which is about half of the number, and a considerable area can be released in the array, of course, the row and column numbers of the actual array are not limited to this, and further, by arranging the used transfer gate in the deep trench isolation part, more area can be saved and a larger influence range can be generated, without applying excessive voltage, which greatly improves the reliability of the device.

[0051] Figure 8 For another array structure schematic diagram using the layout of the present application, the pixel units of the array are arranged in M*N rows and columns, each two adjacent pixel units of each adjacent two rows share a transfer gate, and each two adjacent pixel units of each column in the N columns of the array type detection unit share the transfer element, so that M pixel units in each column of the array contain M+1 transfer elements, so according to the prior art, 2M transfer gates are needed in each column, and the present application only needs M+1, when calculating on the total N columns, the total number of transfer gates can be reduced from 2M*N of the prior art to (M+1)*N, when the array unit M=128 and N=256, the total number of transfer gates is reduced from 2*128*256=65536 to 129*256=33024, which is also reduced by about half, and the effect is similar to Figure 7 The structure, which will not be described in detail here.

[0052] Figure 9 For another structure schematic diagram provided by the embodiment of the present application, which is different from the structure of Figure 3 , the difference is that in addition to setting the transfer gate in the partial isolation part, the isolation part not used is designed to accommodate the MOS tube type capacitor, that is Figure 9 , the isolation part sandwiched by the P+ area is set as a trench capacitor, which plays an isolation function and further increases the capacity of the FD, and the rest of the similar design will not be described in detail.

[0053] It should be noted that the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusion, so that processes, methods, articles or equipment including a series of elements not only include those elements, but also include other elements not explicitly listed, or further include elements inherent to such processes, methods, articles or equipment. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or equipment including the element.

[0054] The above descriptions are only the preferred embodiment of the present application, but not intended to limit the present application. Various modifications and changes can be carried out by those skilled in the art, which should be included in the scope of the present application so far as these modifications and changes do not deviate from the spirit and principle of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and once an item is defined in one drawing, it need not be further defined and explained in the subsequent drawings. The above descriptions are only the preferred embodiment of the present application, but not intended to limit the present application. Various modifications and changes can be carried out by those skilled in the art, which should be included in the scope of the present application so far as these modifications and changes do not deviate from the spirit and principle of the present application.

Claims

1. An array detector, characterized by, The detection module comprises M*N pixel units, which are arranged in M*N rows and columns, wherein M and N are integers greater than 2, the pixel unit comprises a photodiode unit for obtaining a return light signal and converting it into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; A charge storage unit for receiving photo-generated charges transferred by the transfer element; At least part of the pixel units share at least part of the transfer element; The transfer element is arranged in an isolation part of the pixel unit, and the transfer element is a transfer gate; The isolation part also includes a gate oxide layer, and the thickness of the gate oxide layer connected to the bottom of the transfer gate is greater than the thickness of the side oxide layer connected to the transfer gate; When the transfer element is in a working state after being applied with a voltage, the voltage of the surface and the surface adjacent area of the isolation part is raised, forming a charge transfer channel of two adjacent pixels; The isolation part is a deep trench isolation part, and the charge transfer channel simultaneously transfers photo-generated charges of the two adjacent pixels to the corresponding charge storage unit; In the part of the isolation part without the transfer element, a trench capacitor is arranged.

2. The array detector of claim 1, wherein, When any of the at least part of the pixel units sharing at least part of the transfer element is in a working state after being applied with a voltage, the two pixel units sharing the transfer element simultaneously transfer the photo-generated charges to the charge storage units of the two pixel units.

3. The array detector of claim 2, wherein, The photo-generated charges simultaneously transferred by the at least part of the pixel units sharing at least part of the transfer element are photo-generated charges of the same delay phase received and converted.

4. The array detector of claim 1, wherein, Each two adjacent pixel units in each row of the M rows in the detection module share the transfer element, so that the N pixel units in each row of the detection module comprise N+1 transfer elements.

5. The array detector of claim 1, wherein, Each two adjacent pixel units in each column of the N columns in the detection module share the transfer element, so that the M pixel units in each column of the detection module comprise M+1 transfer elements.

6. The array detector of claim 1, wherein, The charge storage unit is contained in an adjustment region with a potential barrier.

7. A detection system using the array detector according to claim 1, characterized by, The detection module comprises M*N pixel units, which are arranged in M*N rows and columns, wherein M and N are integers greater than 2, the pixel unit comprises a photodiode unit for obtaining a return light signal and converting it into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; A charge storage unit for receiving photo-generated charges transferred by the transfer element; At least part of the pixel units share at least part of the transfer element; The transfer element is arranged in an isolation part of the pixel unit, and the transfer element is a transfer gate; The isolation part also includes a gate oxide layer, and the thickness of the gate oxide layer connected to the bottom of the transfer gate is greater than the thickness of the side oxide layer connected to the transfer gate; When the transfer element is in a working state after being applied with a voltage, the voltage of the surface and the surface adjacent area of the isolation part is raised, forming a charge transfer channel of two adjacent pixels; The isolation part is a deep trench isolation part, and the charge transfer channel simultaneously transfers photo-generated charges of the two adjacent pixels to the corresponding charge storage unit; In the part of the isolation part without the transfer element, a trench capacitor is arranged.

8. The probe system of claim 7, wherein, When any of the at least partial transfer elements is in an active state by being applied with a voltage, the at least partial pixel units sharing the transfer element simultaneously transfer the photo-generated charges to the charge storage units of the two pixel units sharing the transfer element.

9. The probe system of claim 8, wherein, The photo-generated charges simultaneously transferred by the at least partial transfer elements are of the same time delay phase.

10. The probe system of claim 7, wherein, Each two adjacent pixel units in each row of the M rows in the detection module share the transfer element, so that the N pixel units in each row of the detection module include N+1 transfer elements.

11. The probe system of claim 7, wherein, Each two adjacent pixel units in each column of the N columns in the detection module share the transfer element, so that the M pixel units in each column of the detection module include M+1 transfer elements.

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