Controller, current-mode switching regulator including the controller, and adjustment method

By measuring and adjusting the turn-on and turn-off times of the power supply stage in a current-mode switching regulator, the problems of current overshoot and undershoot caused by loop delay are solved, achieving higher precision load current control, which is suitable for applications such as LED drivers.

CN112994448BActive Publication Date: 2025-10-31INFINEON TECH AUSTRIA AG
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Patent Information

Application Number
CN202011423437.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-12-17
Filing Date
2020-12-08
Publication Date
2025-10-31
Estimated Expiration
2040-12-08

AI Technical Summary

Technical Problem

Existing current-mode switching regulators suffer from overshoot and undershoot due to loop delay when controlling load current, affecting the accuracy of average current. This is an undesirable phenomenon, especially in applications requiring high precision, such as LED drivers.

Method used

By introducing a threshold detection circuit, a control circuit, and a current error determination and compensation circuit into the controller, the turn-on and turn-off times of the power supply stage are measured, and the high and low current thresholds are adjusted based on these times to compensate for errors caused by loop delay.

Benefits of technology

It significantly reduces current overshoot and undershoot caused by loop delay, improves the average current accuracy of the load current, and enhances the stability and accuracy of current control, especially in LED driver applications.

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Abstract

A controller, a current-mode switching regulator including the controller, and an adjustment method are provided, wherein a high current threshold and a low current threshold can be modified based on the on-time and off-time, the on-time and off-time being determined based on the detection that the load current reaches the high current threshold or the low current threshold.
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Description

Technical Field

[0001] This application relates to a current-mode switching regulator controller, a current-mode switching regulator including such a controller, and a corresponding method. Background Technology

[0002] In some applications, current-mode switching regulators are used to supply current to a load. For example, such regulators can be used to supply current to light-emitting diodes (LEDs).

[0003] Typically, such a regulator measures the current through the load. When the current reaches a high current threshold, the power supply stage supplying current to the load is turned off, and when the current then reaches a low current threshold, the power supply stage is turned on again. This can result in a sawtooth-shaped average current flowing through the load between the high and low current thresholds, ideally the average of the high and low current thresholds.

[0004] However, for control loops using the high and low current thresholds described above, a certain loop delay exists due to signal propagation from the device measuring the load current (e.g., a shunt resistor) to the controller, through the controller, and from the controller to the power supply stage. This loop delay can lead to overshoot and undershoot, i.e., the load current exceeding the high current threshold or falling below the low current threshold. These overshoots and undershoots can also affect the average current supplied to the load, which is undesirable in applications requiring very precise current, such as LED drivers.

[0005] Current overshoot and undershoot, and therefore the error in average current, also depend on the adjusted duty cycle (e.g., the frequency of the sawtooth current curve mentioned above), and are therefore not fixed quantities for a given system, but may change during operation.

[0006] Some recent solutions to this problem employ sophisticated regulation and control techniques that require very precise measurements of one or more parameters, such as the actual current or the voltage at the pins of the controller used to control the switch. Such solutions come at the cost of significant hardware workload, complexity, and slower response times. Summary of the Invention

[0007] According to an embodiment, a controller is provided, the controller comprising:

[0008] A threshold detection circuit is configured to receive a feedback signal indicating the load current and to detect whether the load current reaches a high current threshold or a low current threshold.

[0009] Control circuitry, configured to control the power supply stage in response to detection, to supply load current to the load, and

[0010] A current error determination and compensation circuit is configured to: determine the turn-on time between a first time point when the load current drops to a low current threshold and a second time point when the load current rises to a high current threshold, and the turn-off time between the second time point and the subsequent first time point, and adjust the high current threshold and the low current threshold based on the turn-on time and the turn-off time.

[0011] According to another embodiment, a method is provided, the method comprising:

[0012] Receive feedback signals indicating the load current.

[0013] Detect whether the load current reaches a high current threshold or a low current threshold.

[0014] The power supply stage is driven in response to the detection to supply load current to the load.

[0015] Determine the turn-on time between a first time point when the load current drops to a low current threshold and a second time point when the load current rises to a high current threshold, and the turn-off time between the second time point and the subsequent first time point, and

[0016] The high current threshold and low current threshold are adjusted based on the on-time and off-time.

[0017] The above overview is only a brief summary of some implementation methods and should not be construed as limiting, as other implementation methods may include features other than those listed above. Attached Figure Description

[0018] Figure 1A This is a block diagram of a current-mode switching regulator according to an implementation method.

[0019] Figure 1B This is a diagram illustrating a current-mode switching regulator according to an embodiment.

[0020] Figure 2 This diagram illustrates current overshoot and undershoot; in some implementations, the effects of current overshoot and undershoot are mitigated.

[0021] Figure 3 This is a flowchart illustrating a method according to an implementation method.

[0022] Figure 4 This is a diagram illustrating various quantities used to explain the implementation methods.

[0023] Figure 5 This is a diagram of the controller according to the implementation method.

[0024] Figure 6 This is a graph used to illustrate other measurements used in some implementations.

[0025] Figure 7 This is a diagram of the controller according to the implementation method.

[0026] Figure 8 This is a diagram of a current-mode switching regulator according to another embodiment. Detailed Implementation

[0027] Various embodiments will be described in detail below with reference to the accompanying drawings. These embodiments are for illustrative purposes only and should not be construed as limiting. For example, while embodiments including multiple features (e.g., components, elements, actions, events, steps, etc.) may be described, in other embodiments, some of these features may be omitted and / or replaced by alternative features. In addition to the features explicitly shown and described, other features may be provided, such as those used in conventional current-mode switching regulators. For example, some of the embodiments described herein relate to compensation for current errors caused by loop delays in regulation, and the regulator may also be implemented in a conventional manner in addition to such techniques.

[0028] Unless otherwise indicated, features described with respect to different implementations may be combined. For example, some variations, modifications, or details may be described with respect to only one implementation to avoid repetition, but may also be applied to other implementations.

[0029] Unless otherwise indicated, connections or couplings shown in the accompanying drawings or described herein refer to electrical connections or couplings. Such connections or couplings may be modified, for example, by adding other intermediate elements or by removing elements, as long as the general purpose of the connection or coupling is substantially maintained, such as providing or transmitting a signal, providing control, transmitting certain information, etc.

[0030] In all the accompanying drawings, the corresponding elements are labeled with the same reference numerals and will not be described again.

[0031] Now turn to the attached diagram. Figure 1A This is a block diagram of a current-mode switching regulator according to an implementation method. Figure 1A The implementation includes a controller 10 that controls a power supply stage 11. The power supply stage 11 supplies current to a load 12. A feedback signal fb indicating the current through the load is fed back to the controller 10. The feedback signal fb can be generated by any suitable circuit, such as a current sensing circuit. In the threshold detection section 13 of the controller 10, the current through the load indicated by the feedback signal fb is compared with a high current threshold and a low current threshold. Essentially, when the current exceeds the high current threshold, the power supply stage 11 is turned off. Furthermore, when the current through the load drops below the low current threshold, the power supply stage 11 is turned on. In this way, the current through the load 12 can be regulated.

[0032] Without other measures, the control loop established by the feedback signal fb and the controller 10 that controls the power supply stage 11 in response to the feedback signal will introduce loop delay, which may lead to overshoot and undershoot.

[0033] In one embodiment, the controller 10 includes a time measurement section 14 for measuring the on-time t of the power supply stage 11. on and the turn-off time t of power supply stage 11 off The turn-on and turn-off times can be measured based on the threshold detection in threshold detection section 13. It should be noted that although the actual switching of power supply stage 11 due to loop delay may be later than the actual exceeding of the high current threshold, and similarly, due to loop delay, re-switching may be later than the actual drop of the current through the load below the low current threshold, the turn-on and turn-off times can still be measured substantially unaffected by the loop delay because the loop delay is the same in both cases. Based on the measured turn-on and turn-off times, the control is modified to compensate for overshoot and undershoot caused by the loop delay, for example, by modifying the used high and low current thresholds from their nominal values. Detailed examples of this compensation will be further illustrated below.

[0034] Controller 10 may be a controller comprising analog and digital sections. In some embodiments, a fully analog implementation or a fully digital implementation is possible. For example, the threshold detection section 13 may be implemented using at least some analog circuitry, such as comparators for comparing voltage or current. In other embodiments, the threshold detection section 13 may be implemented digitally, provided the feedback signal fb is a digital signal using, for example, a sufficiently fast analog-to-digital converter in the current sensing circuit. The time measurement section may be implemented using digital circuitry, such as a digital counter. The calculation of compensation values ​​for high and low current thresholds can then be performed digitally.

[0035] To achieve this, controller 10 can be implemented in any suitable manner. For example, the digital portion of controller 10 can be implemented using a digital signal processor, application-specific integrated circuit, microcontroller, microprocessor, or similar device that allows digital calculation, counting, and other digital signal processing. The analog portion can be implemented using a digital-to-analog converter, analog comparator, or other analog circuitry such as a transistor driver that outputs drive signals for power supply stage 11. In other embodiments, such a driver may be external to controller 10, and controller 10 may include only (e.g., digitally implemented) control circuitry to control such a driver. Generally, describing or defining a controller as including different parts or circuits should be understood as including portions of circuitry that provide corresponding functions, but does not imply that the parts or circuits are implemented as physically separate blocks. For example, the individual parts or circuits can be implemented by programming a microcontroller or other digital device accordingly. Reference will be made next. Figure 1B Let's discuss some examples.

[0036] Figure 1B A current-mode switching regulator according to an embodiment is shown. Figure 1B The current-mode switching regulator is used to supply power to the LED 19_1...19_n chain. Hereinafter, LEDs 19_1...19_n will be collectively referred to as LED 19. Although in Figure 1B Two light-emitting diodes 19 are explicitly shown, but a chain of light-emitting diodes may include a greater number of light-emitting diodes.

[0037] Figure 1B The implementation also includes a controller 15, which controls a power supply stage including a transistor 16, a diode 17, and an inductor 18. When the transistor 16 is turned on by the controller 15, the light-emitting diode 19 is coupled to the supply voltage V via the inductor 18. in When transistor 16 is off, inductor 18 and light-emitting diode 19 are incompatible with voltage V. in Decoupling. However, current may still flow for some time, for example, due to the energy stored in inductor 18. Figure 1B The configuration shown is merely an example, and other conventional power supply stages and converter topologies including synchronous and asynchronous converters with current-mode control can also be used. For example, for a synchronous buck converter, diode 17 can be replaced by other transistors used as switches controlled by controller 15, or even more transistors can be used (e.g., four transistors for a synchronous buck-boost converter). In this regard, "shutting down the power supply stage" generally refers to stopping the supply of power from the supply voltage to the output, and "turning on the power supply stage" refers to starting the supply of power from the supply voltage to the output, and may involve various switching schemes involving multiple transistors in the power supply stage.

[0038] Use a resistor R CS The shunt resistor 110 measures the current I flowing through the light-emitting diode 19. LED This is an example of load current. The voltage drop across shunt resistor 110 indicates the current I. LED And is Figure 1A Example of feedback signal fb. The voltage across resistor 110 is supplied to controller 15 at terminals CS+ and CS-.

[0039] The controller 15 includes a signal processing and control section 111, which can be implemented using digital circuitry, as described above. Figure 1A As described in controller 10, the signal processing and control section 111 provides a high current threshold to the digital-to-analog converter 51 of the threshold detection circuit 50 and a low current threshold to the digital-to-analog converter 53 of the threshold detection circuit 50. The threshold detection circuit 50 is... Figure 1A Example of threshold detection section 13.

[0040] The output of digital-to-analog converter 51 is provided to the reference input of comparator 52, and the output of digital-to-analog converter 53 is provided to the reference input of comparator 54. The voltage at CS+ is provided to the sensing input of comparators 52 and 54. The voltage at CS- corresponds to ground, which can be used as the reference ground of threshold detection circuit 50. In other embodiments, other connection schemes are also possible, such as using the voltages at CS+ and CS- as differential signals.

[0041] Based on the threshold exceedance detected by comparators 51 and 52, the signal processing and control section 111 controls the driver 112 to turn the transistor 16 on and off. That is, if the current I... LED If the high current threshold is exceeded, transistor 16 is turned off, and when the current I... LED When the current drops below the low current threshold, transistor 16 is turned off.

[0042] Specifically, when the load current indicated by the voltage at CS+ exceeds the voltage output from the digital-to-analog converter 51, the output signal of comparator 52 changes its state (e.g., from logic 0 to logic 1, or vice versa). When the voltage at CS+ exceeds the output voltage of the digital-to-analog converter 53, comparator 54 changes its output state. In this way, it is possible to detect when the current I... LED Exceeding the high current threshold or falling below the low current threshold.

[0043] Furthermore, based on the outputs of comparators 52 and 54, the signal processing and control section 111 measures the aforementioned t. on and t offThe value of I is determined, and the threshold supplied to the digital-to-analog converters 51 and 53 is modified based on the measurement. In this way, in some implementations, the threshold value based on the current I can be reduced. LED The effect of loop delay in the control loop of transistor 16.

[0044] exist Figure 2 The connection time t is further shown in the figure. on Shutdown time t off And overshoot and undershoot caused by loop delay of the aforementioned control loop.

[0045] Figure 2 Overall, the LED current I over time is shown. LED Furthermore, the high current threshold Ihi is represented by line 21, and the low current threshold Ilow is represented by line 20.

[0046] Curve 22 illustrates the ideal behavior of the current in this situation. When the current reaches line 20 from a higher current, the power supply stage... Figure 1A and Figure 1B When the power supply stage 11 or transistor 16 is turned on and the current increases, the power supply stage is turned off and the current decreases once the current reaches line 21.

[0047] This results in an average current between Ihi and Ilow of (Ihi+Ilow) / 2, as shown by... Figure 2 As indicated by line 24 in the middle.

[0048] Due to the loop delay in the control loop, the actual behavior of the current differs from its ideal behavior. Figure 2 Curve 23 in the figure illustrates an example of such real-world behavior. When only with a certain delay (e.g., at...) Figure 1B The load current I is detected from the signal time from resistor 110 via threshold detection circuit 50 to signal processing and control section 111. LED When the high current threshold Ihi is reached and the power supply stage is then turned off with another delay (e.g., a delay from signal processing and control section 111 to driver 112 and transistor 16), the current actually continues to rise slightly after reaching line 21, resulting in overshoot. For similar reasons, the current continues to drop slightly after reaching line 20, resulting in undershoot. Figure 2 In the example, the overshoot is greater than the undershoot. In other cases, this may differ. Specifically, the undershoot and overshoot depend on parameters including the duty cycle, the inductance of inductor 18, the input voltage Vin, the output voltage Vout, and the loop delay. Therefore, Figure 2 The curves shown are for illustrative purposes only. Overshoot and undershoot cause a shift in the average current, in this case, a shift to a higher value, as indicated by... Figure 2 As indicated by line 25 in the middle.

[0049] In the implementation method, the connection time t is measured. on and shutdown time t off Connection time t on It is the time between the current dropping below Ilow and the current rising above Ihi, and the turn-off time t off It is the time from when the current rises above Ihi to when the current falls below Ilow, such as Figure 2 As indicated. Although a certain delay is used to detect reaching (cross) Ihi and Ilow as explained above, this delay is essentially the same for reaching Ihi and reaching Ilow. Therefore, the on-time t on and shutdown time t off The measurements are largely unaffected by the loop delay of the control loop because they correspond to the difference between the arrival of two thresholds. In the implementation, based on t on and time t off Modify the thresholds Ihi and Ilow to compensate for loop delay. An example of this compensation will be further illustrated below.

[0050] Before proceeding to details regarding threshold compensation, methods according to some implementations will be described. Figure 3 This is a flowchart illustrating a method according to some implementations. It can be used... Figure 1A and Figure 1B The current-mode switching regulator controller and current-mode switching regulator shown or described in further detail below are used to perform the operation. Figure 3 The method, but it can also be used independently of it. Figure 3 The method.

[0051] At 30 locations, Figure 3 The methods include, as referred to Figure 1B and Figure 2 For example, this illustrates measuring the on-time t of a current-mode switching regulator based on the comparator output. on and shutdown time t off .

[0052] At point 31, the method includes modifying a threshold based on the measured on-time and off-time (e.g., Figure 2 (Ihi and Ilow). As will be further explained below, in addition to turn-on and turn-off times, threshold correction can also be based on other measurable variables, such as, Figure 1B The inductance L of the inductor 18 Figure 1B The input voltage V in The estimation of the control loop delay, or overshoot and undershoot times, and slew rate. Now, refer to... Figures 4 to 7 Discuss examples of such methods.

[0053] Figure 4 This includes curves 22 (ideal behavior) and 23 (already referenced). Figure 2 The diagram illustrates example signals (demonstrating actual behavior), showing several quantities that will be used below. hi,ideal and I lo,ideal Based on the threshold values ​​of lines 20 and 21, at which, ideally, the current according to curve 22 has its maximum and minimum values, respectively. hi,real and I lo,real This includes the corresponding maximum and minimum values ​​of the actual curve 23, which is an example of the process and the downward stroke. hi,ideal with I lo,ideal The difference between them, that is, the current swing ΔI under the ideal condition according to curve 22. pp,ideal And the corresponding value of curve 23 is ΔI. pp,real .

[0054] For curve 22, the turn-on time and turn-off time are expressed as tide on,ideal and t off,ideal Furthermore, for curve 23, the turn-on time and turn-off time are expressed as t. on,real and t off,real The loop delay of the control loop is expressed as τ. loop .

[0055] t on and t off The sum is the switching period T, where the switching period T is the switching frequency f. sw The reciprocal of . For curve 22, these are respectively called T. ideal and f sw,ideal And for curve 23, they are respectively called T real and f sw,real .

[0056] ΔI overshoot isI hi,real with I hi,ideal The difference between them, and ΔI undershoot isI lo,ideal with I lo,real The difference between them. ΔI error,avg The average current I of curve 22 avg,ideal The average current I of curve 23 avg,real The difference between them, I avg,ideal For (I) hi,ideal +I lo,ideal ) / 2.

[0057] Curve 23 reaches I hi,real And then it drops to I hi,idealThe time between them is called t. over And curve 23 reaches I low,real And then reach I lo,ideal The time between them is called t. under . t over =ΔI overshoot / SR off , and t under =ΔI undershoot / SR on SR on It is the slew rate (i.e., slope) of the current when the power supply stage is turned on, and SR off It is the slew rate of the current when the power supply stage is turned off.

[0058] It should be noted that the actual slewing rate of curve 23 depends on the applied duty cycle, with a steeper slewing rate resulting in higher overshoot or undershoot, while a flatter slewing rate results in lower overshoot and undershoot. For a 50% duty cycle, ΔI error,average It will be 0 or close to 0 because in this case, the undershoot and overshoot will be equal. The duty cycle will be expressed as D below. For example... Figure 4 As seen in [the diagram], the loop delay τ loop The associated undershoot and overshoot also lengthen the period T, and thus reduce the switching frequency f. SW .

[0059] for Figure 4 The various quantities shown apply to the following equations, where L is the inductor of the power supply stage, for example... Figure 1B The inductance of inductor 18:

[0060]

[0061] ΔI overshoot =τ loop ·SR on (7) ΔI undershoot =τ loop ·SR off (8)

[0062] Then, the error ΔI of the resulting average current can be calculated according to the following formula. error,avg :

[0063]

[0064] As can be seen, the error depends on the duty cycle, input voltage, inductance L, and loop delay.

[0065] Substituting equation (2) into equation (11) based on t on and t off The duty cycle is calculated, and the result is:

[0066]

[0067] Therefore, as can be seen, as explained above, it can be based on t off and t on Calculation error ΔI error,avg .

[0068] Furthermore, in equation (12), the design of the inductor L via a current-mode switching regulator is known. Input voltage V in This is known for a specific setting, or the input voltage V can be measured. in For example, it can provide the input voltage V. in A comparator that compares the input voltage V with a threshold voltage makes the input voltage V... in The range is determined. In other implementations, an analog-to-digital converter can be used, for example, to perform the adjustment of the input voltage V. in More precise measurements are possible. If the regulator is used for a specific input voltage, it can also be programmed into a controller such as controller 10 or controller 15. At least the loop delay τ can be approximated. loop For example, typical loop delays are between 80 ns and 120 ns. Loop delays can also be determined, at least in part, through circuit simulation. For example, a portion of the loop delay caused by the controller (controller 10 or controller 15) can be determined through circuit simulation, and the remaining loop delay can be estimated based on line length and the components used.

[0069] Therefore, at least the value V can be provided. in L, τ loop A good approximation, and can be calculated for ΔI error,avg The corresponding estimate is then obtained. Based on this error, the threshold can then be modified. For example, in some implementations, the error value can essentially be subtracted from the threshold.

[0070] For digital processing, such as by Figure 1B The signal processing and control section 111 provides the digital error value to the digital-to-analog converters 51 and 53, and can also calculate the error value based on the adjustable least significant bit (LSB) of the threshold. To do this, multiplying the above value by the LSB scaling factor produces the following equation (13):

[0071]

[0072] constant factor s comp,LSB For a specific setting (a specific V caused by circuit design) in L and τ loop ) is fixed and can be based on t on and t offCalculated value ΔI error,avg,LSB In some implementations, the same operation as s can be achieved through simple shift operations. comp,LSB Multiplication. Furthermore, in typical applications, (t) off -t on ) / (t on +t off The calculation of t is not strictly time-sensitive, as the value does not change rapidly in many applications. In some implementations, it can also be applied, for example, over multiple on and off times t. on t off 、(t off -t on ) / (t on +t off ) or ΔI error,avg,LSB The average of one or more of them.

[0073] Figure 5 A current-mode switching regulator controller based on the above equation (13) is shown according to an embodiment, and particularly according to its error calculation section. For example, it is used to drive power supply stages such as power supply stage 11 or... Figure 1B Other parts of the supply level can be, for example, such as Figure 1B The implementation shown utilizes driver 112 or can be implemented in any conventional manner.

[0074] Figure 5 The controller shown includes a threshold detection section 50, which has already been implemented. Figure 1B The following scenario was described. Besides using the outputs of comparators 52 and 54, for example, via a switch... Figure 1B In addition to turning the power supply stage on and off, transistor 16 also provides the outputs of comparators 52 and 54 to the digital section 55 of the controller, particularly the two counters 57 and 58 of the measurement section 56.

[0075] It should be noted that using multiple blocks (such as...) Figure 5 The description of the digital part (blocks 56, 510, 513) does not imply physically separate blocks, but may simply indicate the various functions that can be implemented using digital parts such as digital signal processors, ASICs, logic circuits, etc.

[0076] Counters 57 and 58 are timed by a clock signal provided by oscillator 59. This could be the clock signal used to time the digital section 55.

[0077] Counter 57 at t onCounting is performed during this period; that is, the counting begins when the voltage CS+ drops to a low current threshold (detected by comparator 54) and stops when the voltage at CS+ rises to a high current threshold (detected by comparator 52). In contrast, counter 58 measures t. off The counter 57 starts when the voltage indicated by CS rises to a high threshold (indicated by comparator 52) and stops when the voltage drops to a low current threshold (indicated by comparator 54). Therefore, the count value of counter 57 represents t. on And the count value of counter 58 represents t off .

[0078] It should be noted that, to some extent, regarding t on and t off The accuracy of this measurement also depends on the clock frequency of clock 59, because time t on t off It is measured based on the clock cycle. Therefore, the clock frequency in the implementation is greater than the switching frequency, for example, the clock frequency is at least ten times or at least 50 times greater than the switching frequency, such as approximately 100 times greater, to achieve t on and t off The corresponding precise measurement.

[0079] t obtained in this way on and t off The value is provided to the calculation unit 511 of the current error prediction section 510. The calculation in the current error prediction section 510 can be implemented in any suitable digital manner, and Figure 5 The representation is merely an example. As indicated by the symbols “-”, “+”, and “÷” and the arrows between them, calculation unit 511 calculates (t) used in equation (13). off -t on ) / (t on + off Then, in multiplier 520, this value is multiplied by the scaling factor s. comp,LSB Multiplication. S is provided from storage device 512. comp,LSB The storage device 512 may, for example, include a lookup table, in which a lookup table is used for input voltage V. in L and τ loop Pre-compute and store multiple values ​​or ranges of values. comp,LSB And select s accordingly. comp,LSB As mentioned above, these values ​​τ are determined through design and application scenarios. loop V in L is known, or these values ​​τ can be measured. loop V inIn embodiments where a particular controller is intended for a specific setting (specific input voltage, specific inductance L) and which are known in advance, a single appropriate factor s for these specific settings can also be applied, for example, by using the voltage across a resistor coupled to a pin of the controller. comp,LSB Programmed into storage device 512.

[0080] In the current error compensation section 513, the correction value ΔI based on the output of multiplier 520 is subtracted from the nominal low current threshold stored in storage device 514 and the nominal high current threshold stored in storage device 516 by subtractors 518 and 519. error,avg,LSB The value, or add a correction value ΔI based on the output of multiplier 520 to the nominal low current threshold stored in storage device 514 and the nominal high current threshold stored in storage device 516. error,avg,LSB The value is used to generate the corrected values ​​stored in storage devices 515 and 517 respectively. Whether subtraction or addition can be used depends on the sign convention and ΔI. error,avg,LSB The calculation. If positive ΔI error,avg,LSB The indicator shows that the average current is higher than the ideal average current, and the negative ΔI error,avg,LSB If the indicated average current is lower than the ideal average current, then for a positive ΔI error,avg,LSB This can be reduced by subtracting values ​​from the nominal high threshold and nominal low threshold (mathematically, subtracting negative values ​​corresponds to adding them). In the negative ΔI... error,avg,LSB Conversely, if the indicated average current is higher than the ideal average current, the value can be added to the nominal high threshold and the nominal low threshold. For example, the correction value ΔI can be subtracted from both the nominal high current threshold and the nominal low current threshold current. error,avg,LSB Alternatively, a correction value ΔI can be added to both the nominal high current threshold and the nominal low current threshold. error,avg,LSB Other ratios are also possible, for example, such that in an implementation, rv·ΔI can be subtracted from the nominal low current threshold. error,avg,LSB And (2-rv)·ΔI can be subtracted from the nominal high current threshold. error,avg,LSB Where rv is a value between 0 and 2. Other combinations that alter the hysteresis and thus the current ripple can also be considered. For example, this can be determined based on ΔI. error,avg,LSB The multiplicative correction factors for the nominal high current threshold and the nominal low current threshold are obtained.

[0081] Storage devices 514 to 517 can be registers, memory cells, or any other part within digital section 554 used to implement the illustrated calculations. These corrected values ​​are then fed to digital-to-analog converters 51, 53 to (in analog conversion versions) serve as high and low current thresholds in comparators 52, 54. In this way, in some embodiments, depending on the implementation, the effect of loop delay, particularly on the average current, can be significantly reduced.

[0082] As from Figure 5 As can be seen, most calculations can be performed digitally, and threshold detection section 50 is required regardless of the control of the power supply stage. Therefore, in order to achieve... Figure 5 The current error compensation technology requires minimal additional hardware and essentially only requires the corresponding digital calculations to be implemented in the controller.

[0083] To illustrate the effectiveness of the discussed current error compensation, the following two tables show the results using the techniques discussed above and not using them for different inductor sizes and input voltages. For each pair of Vin and L, the loop delay varies from 80ns to 120ns. Table 1 shows the effect from the perspective of LSB (assuming a maximum current resolution of 1.3A and a digital clock frequency of 55MHz; duty cycle varies from 10% to 90%), while Table 2 shows the relative error as a percentage for the same analog settings.

[0084] Table 1:

[0085]

[0086] Table 2:

[0087]

[0088] Table 1 presents the average current error in terms of least significant bits (LSB). As can be seen, the current error can be significantly reduced, for example, by about half in many cases, down to the low single digits (LSB).

[0089] It should be noted that current error typically also depends on the duty cycle. At a duty cycle of 0.5, the current error is usually close to zero, and it increases with higher duty cycles. A decrease in current error is observed over a wider range of duty cycles.

[0090] In the above embodiments, V in L and τ loop Estimation or measurement of V is necessary. Next, we will discuss using additional time measurements to determine or estimate V. in / L and τ loop Another implementation method.

[0091] exist Figure 6 The measurement of the additional time is shown in the figure. Figure 6 Curve 23, representing an example of actual current behavior already discussed, is shown, along with line 20 representing a low current threshold and line 21 representing a high current threshold.

[0092] As can be seen, in cases such as those targeting Figure 4 In each defined period T, the low current threshold, represented by line 20 (at 61, 62 and then at 65, 66 in the next period T), is reached twice, and the high current threshold, represented by line 21 (at 63, 64), is also reached twice. This can be achieved, for example, using a corresponding comparator (e.g., Figure 1B The comparators 52 and 54 detect each reaching of the low current threshold and the high current threshold by changing the state of their respective outputs. Therefore, the additional time can be measured by monitoring the changes in the comparator outputs.

[0093] These times are the rise time t from the current (e.g., at 62) rising to the low current threshold to the current (e.g., at 63) reaching the high current threshold. rise Between reaching a high current threshold within a cycle (e.g., during) Figure 6 The overshoot time t between 63 and 64 m,hi When the current (e.g. at 64) drops to the high current threshold and the current (e.g. at) Figure 6 The fall time t between the 65th position and the low current threshold. fall and between reaching the low current threshold that defines the undershoot (e.g., in Figure 6 Between 61 and 62 or in Figure 6 The downstroke time t between 65 and 66 in the middle. m,lo Similarly, Figure 6 The slew rate SR is indicated by the middle. on It can be represented by (for example, based on the least significant bit) ΔI pp,LSB and t rise This indicates that the slew rate SR off ΔI can be used pp,LSB and t fall This will be explained in more detail below.

[0094] Returning to equation (12), the three contributing factors to the actual error can be considered as 1.(t) off -t on ) / (t on +t off ), 2.V in / L and 3.τ loop As explained above, you can refer to, for example... Figure 5The measurement described (t) off -t on ) / (t on +t off ). use Figure 6 The additional measurements shown can also identify two other contributing factors (2. and 3.), as illustrated below.

[0095] As to a certain extent already Figure 6 As indicated in the text, V in The contribution of / L can be based on the slew rate SR for the rising and falling portions of the load current, respectively. on and SR off And the difference between the selected (i.e., ideal) threshold level and the threshold level is used to determine this, and this difference is called ΔI. pp,LSB (corresponding to) Figure 4 ΔI pp,ideal Using equations (4) and (6), we obtain:

[0096]

[0097] Due to ΔI being the difference between the threshold voltage levels set by the controller pp,LSB It is known, therefore it can be determined by measuring t. rise and t fall To calculate V in / L.

[0098] It can be achieved by measuring t m,hi and / or t m,lo τ is calculated as the time during which the current is above a high threshold or below a low threshold. loop The contribution. Using equations (7) and (8) and Figure 4 and Figure 6 The relationship shown in the figure, τ loop It can be calculated as follows:

[0099]

[0100]

[0101]

[0102] As explained above, SR on and SR off It can also be based on t fall and t rise (see Figure 6 Therefore, t can be used to determine this. m,lo or t m,hi To measure τ loop .

[0103] As can be seen from equations (16) and (17), by measuring t m,hi and t m,lo τ can be calculated from all of them. loop Depending on the duty cycle, one of these times can be very short (e.g., in...). Figure 6 In the middle, t m,lo than t m,hi Much shorter). When measuring such time using a digital clock (similar to using... Figure 5 (Measurements of the counter and oscillator 59 in the measurement), if such a short time becomes shorter, then such a short time may only be a very small number of clock cycles, which may lead to a relatively large measurement error (because in such a measurement, the clock cycle is the shortest unit). To improve robustness, in some implementations, t m,hi and t m,lo All were measured and can be averaged according to the following equation (18).

[0104]

[0105] In other implementations, t m,hi and t m,lo Both can be measured and compared with each other, and in order to calculate τ loop Alternatively, only the larger of the two times can be used, i.e., equation (16) or equation (17) can be used. In other embodiments, only t can be used. m,hi Or just use t m,lo .

[0106] The error ΔI obtained using equations (12), (14) and (18) error,avg The following formula can be used for calculation:

[0107]

[0108] Therefore, by measuring Figure 6 The time shown is t on t off t rise t fall t m,hi and t m,lo ΔI can be calculated error,avg without needing to consider the input voltage V in The inductance L or circuit delay τ of the inductor used loop Assumptions or measurements. It should be noted that when using equation (19), the loop delay need not be determined in advance or separately, but can be calculated directly based on the measured time. error,avg It should also be noted that in other embodiments, V can be determined based on equation (14).in / L, but it can be like Figure 5 In the implementation method, τ is estimated as follows loop Alternatively, τ can be calculated separately as in equations (16), (17), or (18). loop .

[0109] Figure 7 A portion of the controller that implements such a method is shown.

[0110] Figure 7 The controller includes the threshold detection circuit 50, oscillator 59, and digital section 70, which have already been discussed.

[0111] The outputs of comparators 52 and 54 are provided to the timing measurement section 71. Figure 7 The timing measurement section 71 in the embodiment includes six counters that are timed by a clock provided by oscillator 59. Each counter measures the time referenced above by starting and stopping counting at corresponding state changes of the output signals of comparators 52 and 54. Figure 4 and Figure 6 One of the described time periods is when the corresponding state change corresponds to the current reaching a high threshold or a low threshold. Counter 72 measures t. fall Counter 73 measures t rise Counter 74 measures t m,lo Counter 75 measures t m,hi Counter 76 measures t on And counter 77 measures t off It should be noted that the number of counters can vary depending on the implementation. For example, although in Figure 7 A separate counter is shown for each time to be measured, but different times can also be measured sequentially using a single counter.

[0112] The value thus determined is provided to the current error calculation section 78, which determines the correction value according to equation (19). This calculation is performed by... Figure 7 Elements 79, 710 to 713 are represented in the equation. These elements merely represent the calculation and can be implemented in any way. In particular, these elements represent the calculation of the individual factors of equation (19). At 79, the slewing rate ΔI is calculated. pp,LSB / t rise and ΔI pp,LSB / t fall Then the slew rate ΔI pp,LSB / t rise and ΔI pp,LSB / t fall Used to calculate V at 710 in / L and τ calculated at 711 loopAt position 712, according to (t) off -t on ) / (t on +t off Calculate the duty cycle value (1-2D). Multiply all these elements by 1 / 4 (713) to obtain ΔI. error,avg .

[0113] The compensation portion 513 basically corresponds to Figure 5 The compensation portion 513, wherein the ΔI calculated in portion 78 is now subtracted at subtractors 518 and 519. error,avg The value of .

[0114] In some implementations, it depends on... Figure 5 The implementation method allows for the determination of the accuracy of loop delay, inductor, and input voltage, through... Figure 7 In this implementation, the current error can be further reduced, and in some cases, by a factor of two. In other cases, such as when the loop delay, the inductor inductance, and the input voltage are precisely known, Figure 5 The method of implementation can be more accurate. Furthermore, the clock frequency used for timing measurements affects the measurement accuracy at each time point, and therefore affects the overall accuracy. Figure 5 In this implementation method, clock requirements can be more relaxed.

[0115] Figure 8 A current-mode switching regulator according to an embodiment is shown, which can be used as described in reference. Figure 5 or Figure 7 The controller discussed uses compensation for loop delay. Although Figure 8 A specific implementation is shown, but this is only for illustrative purposes, and as already mentioned, the techniques disclosed herein can be used in conjunction with a variety of topologies.

[0116] exist Figure 8 In the middle, a controller 80 is provided to control including those already referenced Figure 1B The power supply stage for transistor 16, diode 17, and inductor 18 has been discussed. Additionally, in Figure 8 The implementation example provides a bootstrap capacitor 85. Similar to... Figure 1B ,exist Figure 8 In this implementation, current is supplied to the light-emitting diode 19 chain. The current through the diode is measured using the shunt resistor 110, which has already been discussed.

[0117] The measured current is provided to the controller 80 at terminals CS+ and CS-, and the measured current is compared with high current thresholds and low current thresholds using the threshold detection circuit 50, which has already been discussed. The outputs of the comparators (52 and 54) of the threshold detection circuit 50 are provided to the digital current error determination and compensation section 83, which can correspond to... Figure 5 Parts 56, 510, 512, and 513 are used to implement this, or correspond to... Figure 7 Parts 71, 78, and 513 are used to set the threshold for the threshold detection circuit 50.

[0118] Furthermore, the output of the comparator in the threshold detection circuit 50 is provided to the analog pulse control section 82 of the analog section 81. This analog pulse control section 82 may include, for example, logic gates, flip-flops, latches, filters, and other components to provide a modulation voltage V. PWM The pulse is then used to drive transistor 16 via drive circuit 84. Figure 8 In the example, the drive circuit 84 uses the low-side transistor M1 and the high-side transistor M2, driven by their respective drivers, to output a signal to the gate of transistor 16 at terminal HSGD. Any conventional drive circuit 84 and pulse control circuit 82 can be used, and the implementation shown is merely an example.

[0119] It should be noted that, although in Figure 8 The document illustrates specific topologies for power supply stages and types of power supply stages based on threshold crossings, but the methods discussed herein can generally be used in circuits such as switch-mode power supplies where the output current is regulated based on high and low thresholds.

[0120] Furthermore, the techniques discussed in this article are not only suitable for current control, but also generally suitable for situations where the output is adjusted based on high and low thresholds. Examples include voltage regulation or temperature regulation. For instance, in the case of voltage regulation, a voltage divider, such as a resistive voltage divider, can be coupled in parallel with the load to provide a feedback signal indicating the voltage across the load, which can then be compared with high and low voltage thresholds.

[0121] Some implementation methods are defined by the following examples.

[0122] Example 1. A controller comprising:

[0123] A threshold detection circuit is configured to receive a feedback signal indicating the load current and to detect whether the load current reaches a high current threshold or a low current threshold.

[0124] A control circuit is configured to control a power supply stage to supply the load current to the load in response to the detection, i.e., by detecting through the threshold detection circuit that the load current has reached the high current threshold or the low current threshold.

[0125] A current error determination and compensation circuit is configured to: determine the turn-on time between a first time point when the load current drops to the low current threshold and a second time point when the load current rises to the high current threshold, and the turn-off time between the second time point and a subsequent first time point; and adjust the high current threshold and the low current threshold based on the turn-on time and the turn-off time.

[0126] Example 2. The controller according to Example 1, wherein the current error determination and compensation circuit is configured to determine a value indicating the duty cycle of the power supply stage based on the on-time and the off-time.

[0127] Example 3. The controller according to Example 1 or 2, wherein the current error determination and compensation circuit is implemented digitally.

[0128] Example 4. The controller according to any one of Examples 1 to 3, wherein the current error determination and compensation circuit includes at least one counter for determining the turn-on time and the turn-off time.

[0129] Example 5. A controller according to any one of Examples 1 to 4, wherein the current error determination and compensation circuit is configured to determine the deviation from the nominal average load current based on the turn-on time, the turn-off time, and a factor depending on the input voltage, the inductance of the power supply stage inductor, and the control loop delay.

[0130] Example 6. The controller according to Example 5, wherein the factor is stored in a storage device.

[0131] Example 7. The controller according to Example 6, wherein the storage device includes a lookup table that includes factors for multiple values ​​or ranges of values ​​for the input voltage, the inductance, and / or the loop delay.

[0132] Example 8. The controller according to Example 6, wherein the factor is programmable.

[0133] Example 9. A controller according to any one of Examples 5 to 8, wherein the current error determination and compensation circuit is configured to determine the deviation according to the following formula:

[0134]

[0135] Where, ΔI error,avg,LSBIt is based on the deviation of the least significant bit of the target average current, and s comp,LSB It is the factor mentioned.

[0136] Example 10. The controller according to Example 5, wherein the current error determination and compensation circuit is configured to determine the fall time between a third time point when the load current drops to the high current threshold and a subsequent first time point, the rise time from a fourth time point when the load current rises to the low current threshold and a subsequent second time point, and is further configured to determine the factor based on the rise time and the fall time.

[0137] Example 11. The controller according to Example 10, wherein the current error determination and compensation circuit is configured to determine at least one of an overshoot time between a second time point and a subsequent third time point or an undershoot time between a first time point and a subsequent fourth time point, and is further configured to determine the factor based on at least one of the overshoot time and the undershoot time.

[0138] Example 12. A controller according to Example 11, wherein the controller is configured to determine the factor based on both the overshoot time and the undershoot time.

[0139] Example 13. A controller according to Example 11 or 12, wherein the controller is configured to determine the deviation according to the following formula:

[0140]

[0141] Where, ΔI error,avg It is the aforementioned deviation, ΔI pp,LSB It is the difference between the high current threshold and the low current threshold, t m,hi The overshoot time, t m,lo The downstroke time, t fall It is the descent time, t rise The rise time, t on It is the connection time, and t off This refers to the shutdown time.

[0142] Example 14. A controller according to any one of Examples 10 to 13, wherein the current error determination and compensation circuit includes at least one counter for determining the fall time, the rise time, the overshoot time, and the undershoot time.

[0143] Example 15. A controller according to any one of Examples 5 to 12, wherein the current error determination and compensation circuit is configured to add a value based on the deviation to the high current threshold and / or the low current threshold or subtract a value based on the deviation from the high current threshold and / or the low current threshold.

[0144] Example 16. A current-mode switching regulator comprising a controller and a power supply stage as described in any one of Examples 1 to 15, wherein the power supply stage comprises at least one transistor and an inductor coupled to the transistor.

[0145] Example 17. A method comprising:

[0146] Receive feedback signals indicating the load current.

[0147] The system detects whether the load current reaches a high current threshold or a low current threshold.

[0148] In response to the detection, the power supply stage is driven to supply the load current to the load.

[0149] Determine the turn-on time between a first time point when the load current drops to the low current threshold and a second time point when the load current rises to the high current threshold, and the turn-off time between the second time point and a subsequent first time point, and

[0150] The high current threshold and the low current threshold are adjusted based on the on-time and the off-time.

[0151] Example 18. The method according to Example 17 further includes determining a value indicating the duty cycle of the power supply stage based on the on-time and the off-time.

[0152] Example 19. The method according to Example 17 or 18 further includes determining the deviation from the nominal average load current based on the turn-on time, the turn-off time, and a factor depending on the input voltage, the inductance of the power supply stage inductor, and the control loop delay.

[0153] Example 20. The controller according to Example 19 further includes retrieving the factor from a lookup table, the lookup table including factors for multiple values ​​or ranges of values ​​for the input voltage, the inductance, and / or the loop delay.

[0154] Example 21. The method according to Example 19 further includes programming the factor.

[0155] Example 22. The method according to Example 19, 20 or 21, wherein determining the deviation includes determining the deviation according to the following formula:

[0156]

[0157] Where, ΔI error,avg,LSB It is based on the deviation of the least significant bit of the high current threshold and the low current threshold, and s comp,LSB It is the factor mentioned.

[0158] Example 23. The method according to Example 19 further includes:

[0159] Determine the fall time between the third time point when the load current drops to the high current threshold and the subsequent first time point, the rise time from the fourth time point when the load current rises to the low current threshold and the subsequent second time point, and

[0160] The factor is determined based on the rise time and the fall time.

[0161] Example 24. The method according to Example 23 further includes determining at least one of the overshoot time between the second time point and the subsequent third time point and the undershoot time between the first time point and the subsequent fourth time point, and

[0162] The factor is determined based on at least one of the process time and the downstroke time.

[0163] Example 25. The method according to Example 24, wherein determining the factor includes determining the factor based on both the overshoot time and the undershoot time.

[0164] Example 26. The method according to Example 24 or 25, wherein determining the deviation includes determining the deviation according to the following formula:

[0165]

[0166] Where, ΔI error,avg It is the aforementioned deviation, ΔI pp,LSB It is the difference between the high current threshold and the low current threshold, t m,hi The overshoot time, t m,lo The downstroke time, t fall It is the descent time, t rise The rise time, t on It is the connection time, and t off This refers to the shutdown time.

[0167] Example 26. The method according to any one of Examples 19 to 25 further includes: adding the deviation to the high current threshold and the low current threshold or subtracting the deviation from the high current threshold and the low current threshold.

[0168] While specific embodiments have been illustrated and described herein, those skilled in the art will understand that various alternative and / or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is intended to be limited only by its claims and their equivalents.

Claims

1. A controller (10; 15; 80), including: Threshold detection circuit (13; 50), which is configured to receive indication load current (I LED The feedback signal (fb) of the load current (I) and the detection of the load current (I) LED Reaching the high current threshold or low current threshold, A control circuit (112; 84) is configured to control a power supply stage (11; 16, 17, 18) in response to the detection to supply the load current (I) to the load. LED ),as well as A current error determination and compensation circuit (83) is configured to: determine the load current (I0). LED The first time point (61) when the current drops to the low current threshold and the load current (I) LED The on-time (t) between the second time point (63) when the current rises to the high current threshold on ), and the shutdown time (t) between the second time point (63) and the subsequent first time point (65). off ), and based on the connection time (t) on ) and the shutdown time (t) off To adjust the high current threshold and the low current threshold, The current error determination and compensation circuit (83) is characterized in that it is further configured to base its determination on the on-time, the off-time, and the input voltage (V) on the current error determination and compensation circuit. in The inductance (L) of the inductor (18) of the power supply stage and the control loop delay (τ) loop The deviation between the average current and the nominal average load current is determined by a factor, and the high current threshold and the low current threshold are further adjusted based on this deviation.

2. The controller according to claim 1, wherein, The current error determination and compensation circuit (83) is configured to determine the value indicating the duty cycle of the power supply stage (11; 16, 17, 18) based on the on-time and the off-time.

3. The controller according to claim 1 or 2, wherein, The current error determination and compensation circuit (83) is implemented digitally.

4. The controller according to claim 1 or 2, wherein, The current error determination and compensation circuit (83) includes at least one counter (57, 58; 76, 77) for determining the turn-on time and the turn-off time.

5. The controller according to claim 1 or 2, wherein, The current error determination and compensation circuit is configured to determine the deviation according to the following formula: Where, ΔI error,avg,LSB It is the deviation of the average current expressed in terms of the least significant bit, s comp,LSB It is the factor, t on It is the connection time, and t off This refers to the shutdown time.

6. The controller according to claim 1 or 2, wherein, The current error determination and compensation circuit (83) is configured to determine the current error at the load current (I led The fall time (t) between the third time point (64) when the current drops to the high current threshold and the subsequent first time point (65) fall ), and the rise time (t) from the fourth time point (62; 66) when the load current rises to the low current threshold to the subsequent second time point (63). rise ), and is also configured to be based on the rise time (t) rise ) and the descent time (t) fall The factor is determined by ( ).

7. The controller according to claim 6, wherein, The current error determination and compensation circuit (83) is configured to determine the overshoot time (t) between the second time point (63) and the subsequent third time point (64). m,hi ) or the downslip time (t) between the first time point (61; 65) and the subsequent fourth time point (62; 66). m,lo At least one of the following, and further configured to be based on the overshoot time (t) m,hi ) and the downstroke time (t) m,lo At least one of the following can be used to determine the factor.

8. The controller according to claim 7, wherein, The controller is configured to determine the factor based on both the overshoot time and the undershoot time.

9. The controller according to claim 7 or 8, wherein, The controller is configured to determine the deviation according to the following formula: Where, ΔI error,avg It is the aforementioned deviation, ΔI pp,LSB It is the difference between the high current threshold and the low current threshold, t m,hi The overshoot time, t m,lo The downstroke time, t fall It is the descent time, t rise The rise time, t on It is the connection time, and t off This refers to the shutdown time.

10. The controller according to claim 1 or 2, wherein, The current error determination and compensation circuit is configured to add a value based on the deviation to the high current threshold and / or the low current threshold, or subtract a value based on the deviation from the high current threshold and / or the low current threshold.

11. A current-mode switching regulator, comprising a controller and a power supply stage according to any one of claims 1 to 10, wherein, The power supply stage includes at least one transistor (16) and an inductor (18) coupled to the transistor.

12. A method for adjustment, comprising: Receive indication load current (I) LED The feedback signal (fb) of ) Detect the load current (I) LED Reaching the high current threshold or low current threshold, In response to the detection, drive the power supply stage (11; 16, 17, 18) to supply the load current (I) to the load. LED ), Determine the load current (I) LED The first time point (61) when the current drops to the low current threshold and the load current (I) LED The on-time (t) between the second time point (63) when the current rises to the high current threshold on ), and the shutdown time (t) between the second time point (63) and the subsequent first time point (65). off ),as well as Based on the connection time (t) on ) and the shutdown time (t) off To adjust the high current threshold and the low current threshold, The feature is that it further includes data based on the on-time, the off-time, and the input voltage (V). in The inductance (L) of the inductor (18) of the power supply stage and the control loop delay (τ) loop The deviation between the average current and the nominal average load current is determined by a factor, and the high current threshold and the low current threshold are further adjusted based on this deviation.

13. The method of claim 12, further comprising determining a value indicating the duty cycle of the power supply stage (11; 16, 17, 18) based on the on-time and the off-time.

14. The method according to claim 12 or 13, further comprising: Determine the load current (I) LED The fall time (t) between the third time point (64) when the current drops to the high current threshold and the subsequent first time point (65) fall ), and from the load current (I LED The rise time (t) from the fourth time point (62; 66) to the subsequent second time point (63) when the current rises to the low current threshold. rise ),as well as Based on the rise time (t) rise ) and the descent time (t) fall The factor is determined by this process.

15. The method of claim 14, further comprising: Determine the overshoot time (t) between the second time point (63) and the subsequent third time point (64). m,hi ) and the downstroke time (t) between the first time point (65) and the subsequent fourth time point (62; 66). m,lo At least one of them, and Based on the overshoot time (t) m,hi ) and the downstroke time (t) m,lo The factor is determined by at least one of the following:

Citation Information

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