printed circuit boards

Abstract

This disclosure provides a printed circuit board, comprising: an insulating body; a wiring structure disposed on the insulating body; and a shielding portion including conductive vias disposed around the wiring structure surrounding the insulating body. The conductive vias include a first metal layer and a second metal layer having different magnetic permeabilities.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0001423, filed on January 6, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to a printed circuit board. Background Technology

[0003] With the rapid increase in the trend towards lightweighting and miniaturization of portable mobile devices and electronic devices used for displays, the signal transmission speed between components in such devices is increasing, and as circuit boards become high-density microcircuits, the damage caused by electromagnetic interference (EMI) due to electromagnetic noise between adjacent circuits is constantly increasing. Summary of the Invention

[0004] One aspect of this disclosure is to provide a printed circuit board that can improve signal interference caused by electromagnetic noise.

[0005] According to one aspect of this disclosure, conductive vias can be formed that use multiple metal layers with different permeabilities to shield electromagnetic waves.

[0006] According to one aspect of this disclosure, a printed circuit board includes: an insulating body; a wiring structure disposed within the insulating body; and a shielding portion including conductive vias disposed around the wiring structure of the insulating body. The conductive vias may include a first metal layer and a second metal layer having different magnetic permeabilities. Attached Figure Description

[0007] The above and other aspects, features and advantages of this disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0008] Figure 1 This is a schematic block diagram illustrating an example of an electronic device system;

[0009] Figure 2 This is a schematic perspective view showing an example of an electronic device;

[0010] Figure 3 This is a schematic cross-sectional view showing an example of a printed circuit board;

[0011] Figure 4 It is along Figure 3 A schematic cross-sectional view of the printed circuit board taken from line II′;

[0012] Figure 5 This is a schematic diagram illustrating the electromagnetic shielding effect based on the thickness of the first metal layer;

[0013] Figure 6 This is a schematic diagram illustrating the difference in electromagnetic shielding effects between the first and second metal layers; and

[0014] Figure 7 This is a schematic cross-sectional view showing another example of a printed circuit board. Detailed Implementation

[0015] In the following description, this disclosure will be made with reference to the accompanying drawings. To make the description clearer, the shapes and dimensions of the elements in the drawings may be enlarged or reduced.

[0016] Figure 1 This is a schematic block diagram illustrating an example of an electronic device system.

[0017] Reference Figure 1 The electronic device 1000 may house a motherboard 1010. The motherboard 1010 may include chip-related components 1020, network-related components 1030, other components 1040, etc., which are physically or electrically connected thereto. These components may be connected to other components described below via various signal lines 1090.

[0018] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM)), flash memory, etc.; application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters, application-specific integrated circuits (ASICs), etc.; etc. However, chip-related components 1020 are not limited to these, but may include other types of chip-related components. Furthermore, chip-related components 1020 may be combined with each other.

[0019] Network-related components 1030 may include components operating according to protocols such as: Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE+, GSM+, GSM, GPS, GPRS, CDMA, TDMA, and DECT. The network-related component 1030 includes 3G, 4G, and 5G protocols, as well as any other wireless and wired protocols specified after the aforementioned protocols. However, the network-related component 1030 is not limited to this, but may also include components that operate according to various other wireless or wired standards or protocols. Furthermore, the network-related component 1030 may be combined with the aforementioned chip-related component 1020.

[0020] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) capacitors, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCC), etc. However, other components 1040 are not limited to these, and may also include passive components for various other purposes. Furthermore, other components 1040 may be combined with the aforementioned chip-related components 1020 or network-related components 1030.

[0021] Depending on the type of electronic device 1000, it may include other components that are physically or electrically connected to the motherboard 1010 or may not be physically or electrically connected to the motherboard 1010. These other components may include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, an audio codec (not shown), a video codec (not shown), a power amplifier (not shown), a compass (not shown), an accelerometer (not shown), a gyroscope (not shown), a speaker (not shown), a mass storage unit (e.g., a hard disk drive) (not shown), an optical disc (CD) drive (not shown), a digital versatile optical disc (DVD) drive (not shown), etc. However, these other components are not limited to these, and may include other components for various purposes depending on the type of electronic device 1000, etc.

[0022] Electronic device 1000 can be a smartphone, personal digital assistant (PDA), digital video camera, digital camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these, and can be any other electronic device capable of processing data.

[0023] Figure 2 This is a schematic perspective view showing an example of an electronic device.

[0024] Reference Figure 2The electronic device can be, for example, a smartphone 1100. A motherboard 1110 can be housed in the smartphone 1100, and various electronic components 1120 can be physically and / or electrically connected to the motherboard 1110. Furthermore, other electronic components (such as a camera module 1130 and / or a speaker 1140) that may or may not be physically and / or electrically connected to the motherboard 1110 can be housed in the motherboard 1110. A portion of the electronic component 1120 can be the aforementioned chip-related components (e.g., a semiconductor package 1121), but is not limited thereto. The semiconductor package 1121 can be a surface-mount package in which a semiconductor chip or passive component is mounted on a package substrate, but is not limited thereto. An antenna can be applied to the smartphone 1100. For example, the antenna can be applied in the form of an antenna module, and the antenna module can be configured such that a wireless communication integrated circuit is mounted on an antenna substrate including an antenna pattern and a feed pattern. Optionally, the antenna module can be configured such that a chip antenna and a wireless communication integrated circuit are respectively mounted on an antenna substrate including a feed pattern. The antenna substrate can be a multilayer printed circuit board. By applying an antenna module in the smartphone 1100, antenna signal radiation can be performed in various directions. Furthermore, the electronic device employing the antenna is not limited to the smartphone 1100. For example, in addition to the smartphone 1100, the electronic device can be other types of electronic devices as described above.

[0025] Figure 3 This is a schematic cross-sectional view showing an example of a printed circuit board.

[0026] Figure 4 It is along Figure 3 A schematic cross-sectional view of line II′ of the printed circuit board.

[0027] Reference Figure 3 and Figure 4 The printed circuit board 100A according to the example includes: an insulating body 110; a wiring structure 130 disposed on the insulating body 110; and a shielding portion 170 disposed on the insulating body. The shielding portion 170 includes one or more conductive vias 150. For example, the shielding portion 170 may include a plurality of conductive vias 150, in which case the conductive vias 150 may be configured to be spaced apart from each other around the wiring structure 130. The conductive vias 150 include a first metal layer 151 and a second metal layer 152 having different permeabilities. For example, the second metal layer 152 may include a metal with a higher permeability than the first metal layer 151. The wiring structure 130 may be a signal portion for transmitting signals. Furthermore, the shielding portion 170 may also include a conductive pattern disposed on one side of the insulating body 110 and connected to each of the plurality of conductive vias 150.

[0028] Furthermore, the damage caused by signal interference due to electromagnetic noise between adjacent circuits has recently increased, thus necessitating improvements to mitigate this interference. For example, electromagnetic shielding has become a significant issue in 5G antenna substrates for transmitting and receiving high-frequency signals. To address this, for instance, multiple conductive vias can be considered around the signal circuitry. This is because electromagnetic noise can be removed through reflection by a shielding layer, including metal, or through absorption and attenuation within the shielding layer. Commonly used metals in plating processes (e.g., copper (Cu)) can be used as the material for the conductive vias. Moreover, thicker shielding layers generally have higher conductivity and permeability, thus increasing noise reduction due to absorption. However, copper (Cu) has relatively low permeability, requiring relatively thick shielding layers to achieve sufficient noise reduction. In this case, the size of the conductive vias increases, thus imposing design limitations.

[0029] On the other hand, in the printed circuit board 100A according to the example, conductive vias 150 may be disposed around wiring structure 130, but the conductive vias 150 may include a first metal layer 151 and a second metal layer 152 with different magnetic permeabilities. For example, the second metal layer 152 may include a metal with a higher magnetic permeability than the first metal layer 151. For example, as a non-limiting example, the first metal layer 151 may include copper (Cu), and the second metal layer 152 may include an alloy containing iron (Fe) and nickel (Ni). Since iron (Fe) and nickel (Ni) have magnetic permeabilities hundreds to thousands of times greater than copper (Cu), conductive vias 150 including such a combination of first metal layer 151 and second metal layer 152 can have excellent noise reduction effects even if the thickness is thinner than that of conductive vias that only include a metal layer containing copper (Cu). Therefore, the size of conductive vias 150 can be reduced, and as a result, a large number of conductive vias 150 can be easily formed around wiring structure 130. Therefore, design flexibility can be improved, and better noise reduction effects can be obtained. In addition, the conductive via 150 includes not only a second metal layer 152 with high magnetic permeability, but also a first metal layer 151 with low magnetic permeability. The conductive via 150 can have the effect of allowing the first metal layer 151 to pass through in addition to having magnetic permeability, thereby having additional effects such as easy plating, cost reduction, process simplification and / or improved reliability.

[0030] The components of the printed circuit board 100A according to the example will be described in more detail below with reference to the accompanying drawings.

[0031] The insulating body 110 can provide an insulating region. The insulating body 110 may include multiple insulating layers 111, 112, 113, 114, 121, 122, and 123. Each of the insulating layers 111, 112, 113, 114, 121, 122, and 123 may include an insulating material, which may include various materials (including thermosetting resins, thermoplastic resins, or materials including reinforcing materials such as glass fibers (or glass cloth, glass fabric) and / or inorganic fillers). If desired, the insulating body 110 may include a laminate comprising multiple thermoplastic resin layers 111, 112, 113, and 114 and multiple thermosetting resin layers 121, 122, and 123. For example, the insulating body 110 may include: a first thermoplastic resin layer 111; a first thermosetting resin layer 121 disposed on the first thermoplastic resin layer 111; a second thermoplastic resin layer 112 disposed on the first thermosetting resin layer 121; a second thermosetting resin layer 122 disposed on the second thermoplastic resin layer 112; and a third thermoplastic resin layer 113 disposed on the second thermosetting resin layer 122. Furthermore, the insulating body 110 may also include: a third thermosetting resin layer 123 disposed on the third thermoplastic resin layer 113; and a fourth thermoplastic resin layer 114 disposed on the third thermosetting resin layer 123. Multiple thermoplastic resin layers 111, 112, 113, and 114, and multiple thermosetting resin layers 121, 122, and 123 may be stacked alternately in the vertical direction.

[0032] For example, for high-frequency signal transmission, liquid crystal polymers (LCP), polytetrafluoroethylene (PTFE), polyphenylene sulfide (PPS), polyphenylene ether (PPE), and polyimide (PI) can be used as materials for thermoplastic resin layers 111, 112, 113, and 114. The dielectric loss factor Df can be adjusted according to the type of resin, the type of filler contained in the resin, and the filler content of the thermoplastic resin layers 111, 112, 113, and 114. Here, the dielectric loss factor is the value of dielectric loss, which represents the power loss generated when an alternating electric field is formed in the resin layer (dielectric). The dielectric loss factor is directly proportional to the dielectric loss; the lower the dielectric loss factor, the lower the dielectric loss. Thermoplastic resin layers 111, 112, 113, and 114 with low dielectric loss characteristics are advantageous for reducing losses in high-frequency signal transmission. The dielectric loss factors of thermoplastic resin layers 111, 112, 113, and 114 may be 0.003 or less, for example, 0.002 or less. Additionally, the dielectric constants Dk of thermoplastic resin layers 111, 112, 113, and 114 may be 3.5 or less. In one example, thermoplastic resin layers 111, 112, 113, and 114 may be made from the same material.

[0033] For example, for high-frequency signal transmission, polyphenylene oxide (PPE), modified polyimide (PI), modified epoxy resin, etc., can be used as materials for thermosetting resin layers 121, 122, and 123. The dielectric loss factor can be adjusted according to the type of resin, the type of filler contained in the resin, and the filler content of the thermosetting resin layers 121, 122, and 123. Here, the dielectric loss factor is the value of dielectric loss, which represents the power loss generated when an alternating electric field is formed in the resin layer (dielectric). The dielectric loss factor is directly proportional to the dielectric loss; the lower the dielectric loss factor, the lower the dielectric loss. Thermosetting resin layers 121, 122, and 123 with low dielectric loss characteristics are advantageous for reducing losses in high-frequency signal transmission. The dielectric loss factors of thermosetting resin layers 121, 122, and 123 can be 0.003 or less, for example, 0.002 or less. Additionally, the dielectric constants of the thermosetting resin layers 121, 122, and 123 may be 3.5 or less. In one example, the thermosetting resin layers 121, 122, and 123 may be made of the same material.

[0034] The thickness of each of the thermoplastic resin layers 111, 112, 113, and 114 may be greater than the thickness of each of the thermosetting resin layers 121, 122, and 123. This thickness relationship is more desirable for high-frequency signal transmission. The interface between vertically adjacent thermoplastic resin layers 111, 112, 113, and 114 and thermosetting resin layers 121, 122, and 123 may include a rough surface. A rough surface may refer to a roughened and non-uniform surface. The dielectric loss factor of each of the thermoplastic resin layers 111, 112, 113, and 114 may be higher than the dielectric loss factor of each of the thermosetting resin layers 121, 122, and 123. By selecting a combination of these materials, signal transmission loss in the high-frequency region can be improved more effectively.

[0035] The wiring structure 130 may include multiple circuit layers 131, 132, 133, and 134, and multiple via layers 141, 142, and 143 connecting the multiple circuit layers 131, 132, 133, and 134 in a vertical direction. For example, the wiring structure 130 may include: a first circuit layer 131 disposed on a first thermoplastic resin layer 111 and embedded in a first thermosetting resin layer 121; a second circuit layer 132 disposed on a second thermoplastic resin layer 112 and embedded in a second thermosetting resin layer 122; a third circuit layer 133 disposed on a third thermoplastic resin layer 113 and embedded in a third thermosetting resin layer 123; a fourth circuit layer 134 disposed on a fourth thermoplastic resin layer 114; and a first via. Layer 141 extends through the first thermosetting resin layer 121 and the second thermoplastic resin layer 112 and connects the first circuit layer 131 and the second circuit layer 132; second via layer 142 extends through the second thermosetting resin layer 122 and the third thermoplastic resin layer 113 and connects the second circuit layer 132 and the third circuit layer 133; and third via layer 143 extends through the third thermosetting resin layer 123 and the fourth thermoplastic resin layer 114 and connects the third circuit layer 133 and the fourth circuit layer 134. Circuit layers 131, 132, 133 and 134 may protrude from the thermoplastic resin layers 111, 112, 113 and 114, respectively. Circuit layers 131, 132 and 133 embedded in the insulating body 110 of circuit layers 131, 132 and 133 may be embedded in the thermosetting resin layers 121, 122 and 123, respectively. The via layers 141, 142, and 143 can simultaneously penetrate adjacent thermoplastic resin layers 112, 113, and 114, as well as thermosetting resin layers 121, 122, and 123. Furthermore, the via layers 141, 142, and 143 can taper in the same direction.

[0036] Metallic materials can be used as the materials for circuit layers 131, 132, 133, and 134. In this case, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and their alloys can be used. Circuit layers 131, 132, 133, and 134 can be formed by plating processes, such as addition (AP), semi-AP (SAP), modified SAP (MSAP), and tenting (TT). As a result, circuit layers 131, 132, 133, and 134 can include seed layers (without plating) and plating layers formed based on the seed layers. Circuit layers 131, 132, 133, and 134 can perform various functions due to the design of the respective layers. For example, circuit layers 131, 132, 133, and 134 can include antenna patterns, signal patterns, ground patterns, power patterns, etc. Here, signal patterns may include patterns for various signals other than antenna patterns, ground patterns, and power patterns (e.g., feed patterns). These patterns in circuit layers 131, 132, 133, and 134 may include line patterns, surface patterns, and / or pad patterns, respectively.

[0037] Metallic materials can also be used as the materials for via layers 141, 142, and 143. In this case, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and their alloys can be used as the metallic materials. Via layers 141, 142, and 143 can also be formed by plating processes such as AP, SAP, MSAP, TT, etc. As a result, via layers 141, 142, and 143 may include a seed layer (without plating) and an electroplated layer formed based on the seed layer. Via layers 141, 142, and 143 can perform various functions due to design. For example, via layers 141, 142, and 143 may include connection vias for antenna connections, connection vias for signal connections, connection vias for ground connections, connection vias for power connections, etc. Here, the connection vias for signal connections may include connection vias for connecting various signals, in addition to connection vias for antenna connections, connection vias for ground connections, and connection vias for power connections (e.g., connection vias for power supply). Each of the connection vias may be completely filled with a metallic material, or the metallic material may be formed along the wall surface of the via. Furthermore, each of the connection vias may have various shapes, such as a tapered shape.

[0038] The shielding portion 170 may include one or more conductive vias 150 penetrating the first thermoplastic resin layer 111, the second thermoplastic resin layer 112, the third thermoplastic resin layer 113, and the fourth thermoplastic resin layer 114, as well as the first thermosetting resin layer 121, the second thermosetting resin layer 122, and the third thermosetting resin layer 123. For example, multiple conductive vias 150 may be present. The conductive vias 150 may include a first metal layer 151 and a second metal layer 152 with different magnetic permeabilities. For example, the second metal layer 152 may include a metal with a higher magnetic permeability than the first metal layer 151. As a non-limiting example, the first metal layer 151 may include copper (Cu), and the second metal layer 152 may include an alloy comprising iron (Fe) and nickel (Ni), but is not limited thereto; various combinations of metals with different magnetic permeabilities may be applied. The conductive vias 150 may be conformal vias disposed along the wall surface of a through-hole 150h penetrating at least a portion of the insulating body 110. For example, a conductive via 150 may include a first metal layer 151 disposed on the wall surface of the via 150h and a second metal layer 152 disposed on the first metal layer 151. In this case, the first metal layer 151 and the second metal layer 152 can provide double shielding for electromagnetic waves, respectively, along the paths of electromagnetic waves generated toward the wiring structure 130 and along the paths of electromagnetic waves generated from the wiring structure 130 and flowing into the conductive via 150. As a result, multiple shielding of electromagnetic waves can be achieved in each conductive via 150, and thus excellent electromagnetic shielding effect can be achieved. The conductive via 150 may penetrate only a pair of adjacent thermoplastic resin layers 111, 112, 113, and 114 and thermosetting resin layers 121, 122, and 123. In this case, multiple conductive vias 150 may be arranged in a stacked manner in the vertical direction with a pad pattern between them. The conductive via 150 may have various shapes, such as cylindrical shapes, conical shapes, etc.

[0039] The shielding portion 170 may further include a grounding pattern 160. The grounding pattern 160 may be disposed below the insulating body 110. However, this disclosure is not limited thereto, and if desired, the grounding pattern 160 may also be disposed within the insulating body 110. A conductive via 150 may be connected to the grounding pattern 160. For example, the conductive via 150 may be used as ground. The grounding pattern 160 may be in the form of a ground plane blocking the underside of the wiring structure 130. Therefore, the underside of the wiring structure 130 may also have an electromagnetic shielding effect. The grounding pattern 160 may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), alloys thereof, etc., and may be formed by plating processes such as AP, SAP, MSAP, TT, etc. As a result, the grounding pattern 160 may include a seed layer (without electroplating) and an electroplated layer formed based on the seed layer.

[0040] Figure 5This is a schematic diagram illustrating the electromagnetic shielding effect based on the thickness of the first metal layer.

[0041] Reference Figure 5 As shown in (a), when the first metal layer 151, which includes a metal with relatively low permeability (such as copper (Cu)), has a relatively thin thickness t1, the first metal layer 151 may not have sufficient electromagnetic noise absorption effect. However, as shown in (b), when the first metal layer 151 has a relatively thick thickness t2, the first metal layer 151 can have sufficient electromagnetic noise absorption effect. Therefore, it can be seen that the shielding layer including the metal with relatively low permeability should be thick.

[0042] Figure 6 This is a schematic diagram illustrating the difference in electromagnetic shielding effects between the first metal layer and the second metal layer.

[0043] Reference Figure 6 As shown in (a), when the first metal layer 151 has a relatively thick thickness t2, the first metal layer 151, which includes a metal with relatively low permeability (such as copper (Cu)), can have sufficient electromagnetic noise absorption effect. On the other hand, as shown in (b), even when the second metal layer 152, which includes a metal with relatively high permeability (such as an alloy including nickel (Ni) and iron (Fe), has a relatively thin thickness t3, it can be seen that the second metal layer 152 can have sufficient electromagnetic noise absorption effect. Therefore, it can be seen that the shielding layer containing a metal with relatively high permeability can be thinner.

[0044] Figure 7 This is a schematic cross-sectional view showing another example of a printed circuit board.

[0045] Reference Figure 7In a printed circuit board 100B according to another example, the insulating body 110 may include: a first thermoplastic resin layer 111; a first thermosetting resin layer 121 disposed on the upper surface of the first thermoplastic resin layer 111; a second thermosetting resin layer 122 disposed on the lower surface of the first thermoplastic resin layer 111; a second thermoplastic resin layer 112 disposed on the upper surface of the first thermosetting resin layer 121; and a third thermoplastic resin layer 113 disposed on the lower surface of the second thermosetting resin layer 122. Additionally, the wiring structure 130 may include: a first circuit layer 131 disposed on the upper surface of the first thermoplastic resin layer 111 and embedded in the first thermosetting resin layer 121; a second circuit layer 132 disposed on the lower surface of the first thermoplastic resin layer 111 and embedded in the second thermosetting resin layer 122; a third circuit layer 133 disposed on the upper surface of the second thermoplastic resin layer 112; a fourth circuit layer 134 disposed on the lower surface of the third thermoplastic resin layer 113; a first via layer 141 penetrating the first thermosetting resin layer 121 and the second thermoplastic resin layer 112 and connecting the first circuit layer 131 and the third circuit layer 133; and a second via layer 142 penetrating the second thermosetting resin layer 122 and the third thermoplastic resin layer 113 and connecting the second circuit layer 132 and the fourth circuit layer 134. Furthermore, the first circuit layer 131 and the second circuit layer 132 may be electrically insulated from each other. Furthermore, the first via layer 141 and the second via layer 142 may taper in opposite directions. The shielding portion 170 may include a plurality of conductive vias 150 penetrating the first thermoplastic resin layer 111, the second thermoplastic resin layer 112, and the third thermoplastic resin layer 113, as well as the first thermosetting resin layer 121 and the second thermosetting resin layer 122. The shielding portion 170 may further include a grounding pattern 160 connected to each of the conductive vias 150. Additionally, the shielding portion 170 may also include a conductive pattern disposed on one side of the insulating body 110 and connected to each of the plurality of conductive vias 150. Other aspects are substantially the same as described above, and detailed descriptions thereof will be omitted.

[0046] As used herein, the terms "side," "side surface," etc., refer to a surface facing a first or second direction, or in said direction. The terms "upper side," "upper part," "upper surface," etc., refer to a surface facing a third direction, or in said direction, while the terms "lower side," "lower part," "lower surface," etc., refer to a surface facing the opposite direction, or in said opposite direction. Furthermore, these spatially related terms have been used to encompass both cases where the target component is positioned in a corresponding direction but does not directly contact the reference component, and cases where the target component directly contacts the reference component in the corresponding direction. However, the terms may be defined as above for ease of description, and the principles of the exemplary embodiments are not particularly limited to the above terms.

[0047] As used herein, the term "connection" can refer not only to "direct connection" but also to "indirect connection" via adhesive layers, etc. The term "electrical connection" can include both cases where the constituent elements are "physically connected" and cases where the constituent elements are "not physically connected." Furthermore, the terms "first," "second," etc., can be used to distinguish one constituent element from another and do not limit the order and / or importance of the constituent elements. In some cases, without departing from the principles of the exemplary embodiments, a first constituent element may be referred to as a second constituent element, and similarly, a second constituent element may be referred to as a first constituent element.

[0048] As used herein, the term "embodiment" is provided to emphasize a particular feature, structure, or characteristic, and does not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, a particular feature or characteristic may be combined in any suitable manner. For example, unless features are described in other embodiments contrary to or contradicting those described in other embodiments, features described in a particular exemplary embodiment may be used in other embodiments even if not described in other embodiments.

[0049] The terminology used herein describes specific embodiments only and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form.

[0050] As described above, according to this disclosure, a printed circuit board capable of improving signal interference caused by electromagnetic noise can be provided.

[0051] Although exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the invention as defined by the appended claims.

Claims

1. A printed circuit board, comprising: Insulating body; A wiring structure, disposed on the insulating body, includes multiple circuit layers and one or more via layers connecting the multiple circuit layers in the thickness direction of the printed circuit board; and The shielding portion includes conductive vias disposed around the wiring structure on the insulating body. The conductive via includes a first metal layer and a second metal layer with different magnetic permeabilities, and Each of the one or more via layers is disposed in a different via than each of the conductive vias.

2. The printed circuit board as claimed in claim 1, wherein, The conductive via is a conformal via disposed along the wall surface of a through hole that penetrates at least a portion of the insulating body.

3. The printed circuit board as claimed in claim 1, wherein, The first metal layer is disposed on the wall surface of the via hole. The second metal layer is disposed on the first metal layer, and The second metal layer comprises a metal with a higher permeability than the first metal layer.

4. The printed circuit board as claimed in claim 3, wherein, The first metal layer comprises copper, and The second metal layer comprises an alloy containing iron and nickel.

5. The printed circuit board as claimed in claim 1, wherein, The shielding portion includes multiple conductive vias, and The plurality of conductive vias are configured to be spaced apart from each other around the wiring structure.

6. The printed circuit board as claimed in claim 5, wherein, The shielding portion further includes a conductive pattern disposed on one side of the insulating body and connected to each of the plurality of conductive vias.

7. The printed circuit board as claimed in claim 1, wherein, The shielding portion also includes a grounding pattern, which is connected to the conductive via.

8. The printed circuit board as claimed in claim 1, wherein, The insulating body comprises a laminate of a thermosetting resin layer and a thermoplastic resin layer.

9. The printed circuit board as claimed in claim 8, wherein, The thermoplastic resin layer includes a liquid crystal polymer.

10. The printed circuit board of claim 8, wherein, The thermoplastic resin layer is thicker than the thermosetting resin layer.

11. The printed circuit board of claim 8, wherein, The dielectric loss factor of the thermoplastic resin layer is greater than that of the thermosetting resin layer.

12. The printed circuit board of claim 1, wherein, The insulating body includes a laminate comprising a plurality of thermosetting resin layers and a plurality of thermoplastic resin layers alternately stacked in the thickness direction.

13. The printed circuit board of claim 12, wherein, In the laminate, in a pair of vertically adjacent thermoplastic resin layers and thermosetting resin layers: The first circuit layer of the plurality of circuit layers is embedded in the thermosetting resin layer of the pair of thermoplastic resin layers and thermosetting resin layers. The second circuit layer of the plurality of circuit layers protrudes from the thermoplastic resin layer of the pair of thermoplastic resin layers and thermosetting resin layers, and The first via layer in one or more via layers penetrates the pair of thermosetting resin layers and thermoplastic resin layers to connect the first circuit layer and the second circuit layer.

14. The printed circuit board as claimed in claim 1, wherein, The insulating body comprises: a first thermoplastic resin layer; a first thermosetting resin layer disposed on the first thermoplastic resin layer; a second thermoplastic resin layer disposed on the first thermosetting resin layer; a second thermosetting resin layer disposed on the second thermoplastic resin layer; and a third thermoplastic resin layer disposed on the second thermosetting resin layer. The wiring structure includes: a first circuit layer disposed on and embedded in the first thermoplastic resin layer; a second circuit layer disposed on and embedded in the second thermoplastic resin layer; a third circuit layer disposed on the third thermoplastic resin layer; a first via layer penetrating the first thermoplastic resin layer and the second thermoplastic resin layer and connecting the first circuit layer and the second circuit layer; and a second via layer penetrating the second thermoplastic resin layer and the third thermoplastic resin layer and connecting the second circuit layer and the third circuit layer. The shielding portion includes the conductive via, which penetrates the first thermoplastic resin layer, the second thermoplastic resin layer, the third thermoplastic resin layer, the first thermosetting resin layer, and the second thermosetting resin layer.

15. The printed circuit board of claim 14, wherein, The first via layer and the second via layer taper in the same direction.

16. The printed circuit board of claim 1, wherein, The insulating body comprises: a first thermoplastic resin layer; a first thermosetting resin layer disposed on the upper surface of the first thermoplastic resin layer; a second thermosetting resin layer disposed on the lower surface of the first thermoplastic resin layer; a second thermoplastic resin layer disposed on the upper surface of the first thermosetting resin layer; and a third thermoplastic resin layer disposed on the lower surface of the second thermosetting resin layer. The wiring structure includes: a first circuit layer disposed on the upper surface of the first thermoplastic resin layer and embedded in the first thermosetting resin layer; a second circuit layer disposed on the lower surface of the first thermoplastic resin layer and embedded in the second thermosetting resin layer; a third circuit layer disposed on the upper surface of the second thermoplastic resin layer; a fourth circuit layer disposed on the lower surface of the third thermoplastic resin layer; a first via layer penetrating the first thermosetting resin layer and the second thermoplastic resin layer and connecting the first circuit layer and the third circuit layer; and a second via layer penetrating the second thermosetting resin layer and the third thermoplastic resin layer and connecting the second circuit layer and the fourth circuit layer. The shielding portion includes the conductive via, which penetrates the first thermoplastic resin layer, the second thermoplastic resin layer, the third thermoplastic resin layer, the first thermosetting resin layer, and the second thermosetting resin layer.

17. The printed circuit board of claim 16, wherein, The first via layer and the second via layer taper in opposite directions.

18. The printed circuit board of claim 16, wherein, The first circuit layer and the second circuit layer are electrically insulated from each other.

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