Semiconductor device and method of manufacturing a semiconductor device

Abstract

The present application relates to a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device includes a nitride semiconductor layer, an insulating layer provided on a surface of the nitride semiconductor layer, and a metal electrode in contact with the surface through an opening that penetrates the insulating layer. The insulating layer includes a first SiN film and a second SiN film, the first SiN film has a chlorine (Cl) concentration of 1 x 10 20 [atoms / cm 3 ] or more and a thickness of 30 nm or less, and the second SiN film has a chlorine (Cl) concentration of 1 x 10 19 [atoms / cm 3 ] or less.

Description

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Japanese Patent Application No. 2020-002772, filed on January 10, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to semiconductor devices and methods for manufacturing semiconductor devices. Background Technology

[0004] Japanese Unexamined Patent Publication No. 2009-200306 discloses a method for manufacturing a semiconductor device. In this method, a GaN traveling layer, a GaN electron supply layer, and a GaN capping layer are sequentially grown on a substrate, and a first silicon nitride film and a second silicon nitride film are sequentially formed on the GaN capping layer using plasma-enhanced chemical vapor deposition (PECVD). Then, the GaN capping layer is exposed using an exposure method and an etching method, and a source electrode and a drain electrode are formed on the exposed GaN capping layer, with a gate electrode formed between the source and drain electrodes on the GaN capping layer. Summary of the Invention

[0005] This disclosure discloses a semiconductor device comprising: a nitride semiconductor layer; an insulating layer disposed on the surface of the nitride semiconductor layer; and a metal electrode contacting the surface through an opening penetrating the insulating layer. The insulating layer comprises a first SiN film and a second SiN film, the first SiN film having a 1×10⁻⁶ SiN film. 20 [atoms / cm] 3 A chlorine (Cl) concentration of 1×10⁻⁶ or higher and a thickness of 30 nm or less, and the second SiN film has a chlorine (Cl) concentration of 1×10⁻⁶ or higher. 19 [atoms / cm] 3 Or even lower concentrations of chlorine (Cl).

[0006] A method for manufacturing a semiconductor device disclosed herein includes: forming an insulating layer comprising a first SiN film and a second SiN film on the surface of a nitride semiconductor layer using a CVD method, the second SiN film being on the first SiN film; forming an opening in the insulating layer for exposing the surface using reactive ion etching with a chlorine-based gas; and forming a metal electrode that contacts the surface through the opening. When forming the insulating layer on the surface, a feed gas comprising a compound gas and ammonia (NH3) is used to form the first SiN film and the second SiN film. The compound gas comprises silicon (Si) and chlorine (Cl). When forming the first SiN film, the flow rate ratio (F1 / F2) of the compound gas (F1) to the flow rate of ammonia (F2) is set to 1 / 4 or greater and 10 or less, and when forming the second SiN film, the flow rate ratio (F1 / F2) is set to 1 / 10 or less. Attached Figure Description

[0007] Figure 1 This is a cross-sectional view showing a field-effect transistor as an example of a semiconductor device according to an embodiment.

[0008] Figure 2A , Figure 2B and Figure 2C Each showed Figure 1 The image shows a cross-sectional view of the manufacturing process of a field-effect transistor.

[0009] Figure 3A , Figure 3B and Figure 3C Each showed Figure 1 The image shows a cross-sectional view of the manufacturing process of a field-effect transistor.

[0010] Figure 4 This is a flowchart illustrating an example of a method for forming an insulating layer using the LPCVD method.

[0011] Figure 5A It is a diagram showing the furnace temperature and gas supply process during the formation of the insulation layer. Figure 5B It is a diagram showing the pressure inside the furnace when the insulating layer is formed.

[0012] Figure 6 It is a diagram showing the flow rate ratio of the raw material gas when the insulating layer is formed.

[0013] Figure 7 This is a graph showing the relationship between the flow rate ratio and chlorine concentration in the feed gas.

[0014] Figure 8A yes Figure 1 The image shows a surface image of the nitride semiconductor layer in a field-effect transistor. Figure 8BThis is a surface image of the nitride semiconductor layer in a field-effect transistor of the prior art. Detailed Implementation

[0015] [The problem this disclosure aims to solve]

[0016] In recent years, semiconductor devices using nitride semiconductors, such as GaN-based semiconductors, have been developed. When manufacturing semiconductor devices using nitride semiconductors, a silicon nitride (SiN) film can be formed on the surface of the nitride semiconductor layer, and an opening for forming a gate electrode can be formed in this SiN film. This opening is formed, for example, using highly anisotropic dry etching. This dry etching is performed by applying a bias voltage to a plasma of etching gas in the stacking direction of the nitride semiconductor layers.

[0017] However, when using this dry etching method to form openings in the SiN film, the plasma of the etching gas, accelerated by the bias voltage, collides with the surface of the nitride semiconductor layer at a high energy state, thus impairing the surface flatness. If the surface flatness is impaired, the Schottky barrier formed between the surface and the gate electrode will be in a different state than ideal. As a result, leakage current will increase.

[0018] [The Effects of This Disclosure]

[0019] According to the semiconductor device and method of manufacturing the semiconductor device disclosed herein, the increase in leakage current of the semiconductor device can be suppressed by suppressing the decrease in the flatness of the surface of the nitride semiconductor layer.

[0020] [Description of embodiments of this disclosure]

[0021] First, embodiments of the present disclosure will be listed and described. A semiconductor device according to an embodiment of the present disclosure includes: a nitride semiconductor layer; an insulating layer disposed on the surface of the nitride semiconductor layer; and a metal electrode contacting the surface through an opening penetrating the insulating layer. The insulating layer includes a first SiN film and a second SiN film, the first SiN film having a 1×10⁻⁶ SiN film. 20 [atoms / cm] 3 A chlorine (Cl) concentration of 1×10⁻⁶ or higher and a thickness of 30 nm or less, and the second SiN film has a chlorine (Cl) concentration of 1×10⁻⁶ or higher. 19 [atoms / cm] 3 Or even lower concentrations of chlorine (Cl).

[0022] In this semiconductor device, an insulating layer is formed on the surface of a nitride semiconductor layer, and an opening penetrating the insulating layer is formed within the insulating layer. This opening can be formed in the insulating layer, for example, by dry etching, during the fabrication of the semiconductor device. Here, the insulating layer includes a layer with a diameter of 1×10⁻⁶. 20 [atoms / cm]3 The first SiN film has a chlorine concentration of 1×10⁻⁶ or higher. When dry etching reaches a concentration of 1×10⁻⁶... 20 [atoms / cm] 3 When a first SiN film with a chlorine concentration of 1×10⁻⁶ or higher is used, a small amount of chlorine is released from the first SiN film into the opening. The released chlorine causes a chemical reaction with the surface of the nitride semiconductor layer exposed from the opening. As a result, chemical etching using chlorine is performed on the surface. This chemical etching preferentially reacts with the rough portions (i.e., uneven portions) of the surface. Through this chemical etching, the surface can be made atomically flat. Therefore, the reduction in surface flatness due to dry etching can be suppressed by chemical etching. By suppressing the reduction in surface flatness, the Schottky barrier formed between the surface and the metal electrode can be made closer to an ideal state. As a result, the increase in leakage current can be suppressed. In addition, since the insulating layer includes a 1×10⁻⁶... 19 [atoms / cm] 3 A second SiN film with a chlorine concentration of [ ] or even lower can be used to suppress the excessive inclusion of chlorine as an impurity in the insulating layer. Therefore, it is possible to suppress the degradation of the insulating properties of the insulating layer and suppress the increase of leakage current through the insulating layer.

[0023] The first SiN film can be positioned closer to the surface of the nitride semiconductor layer than the second SiN film. In this case, with a 1×10 19 [atoms / cm] 3 Compared to a second SiN film with a chlorine concentration of 1×10 or lower, it has 1×10 20 [atoms / cm] 3 A first SiN film with a chlorine concentration of 1,000 or higher is located on the surface side of the nitride semiconductor layer. Therefore, chlorine released from the first SiN film can more reliably act on the surface, and the aforementioned effect of suppressing the reduction of surface flatness can be maintained.

[0024] A method for manufacturing a semiconductor device according to an embodiment of the present disclosure includes: forming an insulating layer comprising a first SiN film and a second SiN film on the surface of a nitride semiconductor layer using a CVD method, the second SiN film being on the first SiN film; forming an opening in the insulating layer for exposing the surface using reactive ion etching based on a chlorine gas; and forming a metal electrode that contacts the surface through the opening. When forming the insulating layer on the surface, a feed gas comprising a compound gas containing silicon (Si) and chlorine (Cl) and ammonia (NH3) is used to form the first SiN film and the second SiN film. When forming the first SiN film, the flow rate ratio (F1 / F2) of the compound gas (F1) to the ammonia gas (F2) is set to 1 / 4 or greater and 10 or less, and when forming the second SiN film, the flow rate ratio (F1 / F2) is set to 1 / 10 or less.

[0025] In a method for manufacturing semiconductor devices, when forming the first SiN film, the flow rate ratio (F1 / F2) of the compound gas (F1) to the ammonia gas (F2) is set to 1 / 4 or greater and 10 or less. In this way, the amount of chlorine contained in the feed gas can be increased by increasing the flow rate (F1) of the chlorine-containing compound gas. Therefore, a film with a diameter of 1 × 10⁻⁶ can be formed. 20 [atoms / cm] 3 A first SiN film with a chlorine concentration of 1×10⁻⁶ or higher can be formed. By forming the first SiN film on the surface of the nitride semiconductor layer, as described above, the reduction in surface flatness can be suppressed. As a result, the increase in leakage current can be suppressed. Furthermore, in forming an insulating layer on the surface, when forming a second SiN film on the first SiN film after forming the first SiN film on the surface, the amount of chlorine contained in the raw material gas can be reduced by decreasing the flow rate (F1) of the chlorine-containing compound gas. Therefore, a first SiN film with a chlorine concentration of 1×10⁻⁶ can be formed. 19 [atoms / cm] 3 A second SiN film with a chlorine concentration of 1×10⁻⁶ or lower. This is because the insulating layer includes a second SiN film with a chlorine concentration of 1×10⁻⁶. 19 [atoms / cm] 3 A second SiN film with a chlorine concentration of 1×10⁻⁶ or lower can be formed, thus suppressing the excessive inclusion of chlorine as an impurity in the insulating layer. Therefore, the degradation of the insulating properties of the insulating layer and the increase of leakage current through the insulating layer can be suppressed. Furthermore, since a second SiN film is formed on the first SiN film, it has a chlorine concentration of 1×10⁻⁶. 19 [atoms / cm] 3 Compared to a second SiN film with a chlorine concentration of 1×10 or lower, it has 1×10 20 [atoms / cm] 3 A first SiN film with a chlorine concentration of 1,000 or higher is located on the surface side of the nitride semiconductor layer. Therefore, chlorine released from the first SiN film can more reliably act on the surface, and the aforementioned effect of suppressing the reduction of surface flatness can be maintained.

[0026] When forming openings in the insulation layer, the fluorine-based gas can be sulfur hexafluoride (SF6) or carbon tetrafluoride (CF4). In this case, openings can be appropriately formed in the insulation layer.

[0027] [Detailed Description of Embodiments of this Disclosure]

[0028] Specific examples of semiconductor devices and methods of manufacturing semiconductor devices according to embodiments of the present disclosure will now be described with reference to the accompanying drawings. This disclosure is not limited to these examples, but rather includes all modifications indicated by the claims and is intended to cover the meaning and scope of the claims. In the following description, in the description of the drawings, the same elements will be designated by the same reference numerals, and repeated descriptions will be omitted as appropriate.

[0029] Figure 1 This is a cross-sectional view showing a field-effect transistor (hereinafter simply referred to as "transistor") 1, which is an example of a semiconductor device according to this embodiment. The transistor 1 according to this embodiment is a high electron mobility transistor (HEMT). Figure 1 As shown, transistor 1 includes a substrate 2, a nitride semiconductor layer 10, insulating layers 20 and 25, a source electrode 31, a drain electrode 32, and a gate electrode 33. The nitride semiconductor layer 10 is an epitaxial layer formed on the substrate 2 and mainly comprises nitride semiconductor. Starting from the substrate 2 side, the nitride semiconductor layer 10 sequentially includes a channel layer 11, a barrier layer 12, and a capping layer 13. A two-dimensional electron gas (2DEG) is generated near the interface between the channel layer 11 and the barrier layer 12. Therefore, a channel region is formed in the channel layer 11.

[0030] Substrate 2 is the substrate used for crystal growth. Examples of substrate 2 include SiC substrates, GaN substrates, and sapphire (Al2O3) substrates. In this example, substrate 2 is a SiC substrate. Channel layer 11 is a semiconductor layer epitaxially grown on substrate 2. Channel layer 11 is formed of a nitride semiconductor and is, for example, a GaN layer. The thickness of channel layer 11 is, for example, 400 nm or more and 2000 nm or less. Barrier layer 12 is a semiconductor layer epitaxially grown on channel layer 11. Barrier layer 12 is formed of a nitride semiconductor having a higher electron affinity than channel layer 11. Barrier layer 12 is, for example, an AlGaN layer, an InAlN layer, or an InAlGaN layer. Barrier layer 12 may exhibit n-type conductivity. The thickness of barrier layer 12 is, for example, 5 nm or more and 30 nm or less.

[0031] The capping layer 13 is a semiconductor layer epitaxially grown on the barrier layer 12. The capping layer 13 is formed of a nitride semiconductor, and is, for example, a GaN layer. The capping layer 13 may contain impurities. For example, the capping layer 13 may be an n-type GaN layer. The thickness of the capping layer 13 is, for example, 1 nm or more and 5 nm or less. The surface of the capping layer 13 forms the surface 10a of the nitride semiconductor layer 10. Surface 10a is the surface located on the side of the insulating layer 20 (i.e., the side opposite to the substrate 2) in the stacking direction of the nitride semiconductor layer 10.

[0032] The insulating layer 20 is an insulating protective layer disposed on the surface 10a of the nitride semiconductor layer 10. The insulating layer 20 is formed using, for example, a low-pressure chemical vapor deposition (LPCVD) method, as described later. The LPCVD method is a method for forming a dense film by reducing the film formation pressure and increasing the film formation temperature. The insulating layer 20 may also be formed using a plasma CVD method.

[0033] The insulating layer 20 includes a first SiN film 21 disposed on the surface 10a of the nitride semiconductor layer 10 and a second SiN film 22 disposed on the first SiN film 21. The first SiN film 21 is in contact with and covers the surface 10a. The first SiN film 21 is a chlorine-rich film containing a large amount of chlorine (Cl) as an impurity. The first SiN film 21 has a density of 1×10⁻⁶. 20 [atoms / cm] 3 [or a higher chlorine concentration. The chlorine concentration of the first SiN film 21 can be, for example, 1 × 10⁻⁶.] 20 [atoms / cm] 3 [or larger and 1×10] 21 [atoms / cm] 3 [1] or less. In the embodiment, the chlorine concentration of the first SiN film 21 is 1 × 10⁻⁶. 21 [atoms / cm] 3 The refractive index of the first SiN film 21 relative to a wavelength of 632 nm is, for example, 2.3 or greater and 2.4 or less. The refractive index of the first SiN film 21 relative to a wavelength of 632 nm can be, for example, 2.25 or greater and 2.5 or less. The thickness of the first SiN film 21 is, for example, 5 nm or greater and 20 nm or less. The thickness of the first SiN film 21 can be, for example, 1 nm or greater and 30 nm or less.

[0034] The second SiN film 22 is disposed on the surface 10a of the nitride semiconductor layer 10 through the first SiN film 21. That is, the second SiN film 22 is disposed on the opposite side of the first SiN film 21 in the stacking direction of the nitride semiconductor layer 10. The second SiN film 22 contacts and covers the first SiN film 21. The chlorine concentration of the second SiN film 22 is lower than that of the first SiN film 21. Specifically, the chlorine concentration of the second SiN film 22 is 1 × 10⁻⁶. 19 [atoms / cm] 3 [or smaller.] The chlorine concentration of the second SiN film 22 can be, for example, 1 × 10⁻⁶. 15 [atoms / cm] 3 [or larger and 1×10] 19 [atoms / cm] 3 [1] or less. In the embodiment, the chlorine concentration of the second SiN film 22 is 1 × 10⁻⁶. 19 [atoms / cm] 3 In this embodiment, the chlorine concentration is measured, for example, by secondary ion mass spectrometry (SIMS). The detection limit for chlorine concentration measurement by the SIMS method is 1 × 10⁻⁶. 15 [atoms / cm] 3 ].

[0035] The refractive index of the second SiN film 22 is lower than that of the first SiN film 21. Specifically, the refractive index of the second SiN film 22 relative to a wavelength of 632 nm is, for example, 2.0 or greater and 2.2 or less. The refractive index of the second SiN film 22 relative to a wavelength of 632 nm can be, for example, 2.0 or less, or 1.8 or greater and 2.25 or less. The thickness of the second SiN film 22 is greater than that of the first SiN film 21. The thickness of the second SiN film 22 is, for example, 20 nm or greater and 100 nm or less. The thickness of the second SiN film 22 can be, for example, 10 nm or greater and 150 nm or less. The ratio (T2 / T1) of the thickness of the second SiN film 22 (T2) to the thickness (T1) of the first SiN film 21 is, for example, 1 or greater and 5 or less. The ratio (T2 / T1) can be, for example, 1 or greater and 20 or less.

[0036] A source opening 20a, a drain opening 20b, and a gate opening 20c are formed in the insulating layer 20. Openings 20a, 20b, and 20c penetrate the insulating layer 20 in the stacking direction of the nitride semiconductor layer 10. The surface 10a of the nitride semiconductor layer 10 is exposed in the openings 20a, 20b, and 20c. The source opening 20a and the drain opening 20b are aligned in one direction along the surface 10a. The gate opening 20c is disposed between the source opening 20a and the drain opening 20b. The openings 20a, 20b, and 20c are formed by, for example, reactive ion etching (RIE) using a reactive gas containing fluorine (F) atoms (i.e., a fluorine-based gas).

[0037] A source electrode 31 is disposed on the surface 10a of the nitride semiconductor layer 10 and blocks the source opening 20a. The source electrode 31 forms an ohmic contact with the surface 10a through the source opening 20a. A drain electrode 32 is disposed on the surface 10a and blocks the drain opening 20b. The drain electrode 32 forms an ohmic contact with the surface 10a through the drain opening 20b. Each of the source electrode 31 and the drain electrode 32 is an ohmic electrode and is, for example, an alloy having overlapping tantalum (Ta), aluminum (Al), and molybdenum (Mo) layers. A titanium (Ti) layer may be used instead of a Ta layer.

[0038] In this embodiment, the gate electrode 33 is an example of a metal electrode. The gate electrode 33 is disposed on the surface 10a of the nitride semiconductor layer 10 and is located between the source electrode 31 and the drain electrode 32. The gate electrode 33 blocks the gate opening 20c and contacts the surface 10a through the gate opening 20c. The gate electrode 33 comprises a material in Schottky contact with the surface 10a and has a stacked structure, for example, a nickel (Ni) layer and a gold (Au) layer. In this case, the Ni layer is in Schottky contact with the surface 10a of the nitride semiconductor layer 10 (specifically, the surface of the capping layer 13).

[0039] An insulating layer 25 is disposed on the insulating layer 20. The insulating layer 25 is a protective film covering the gate electrode 33 and is in contact with the second SiN film 22 of the insulating layer 20. The insulating layer 25 is formed of an insulating material containing Si, and is, for example, a SiN film, a SiO2 film, or a SiON film. The insulating layer 25 is formed on the insulating layer 20 using, for example, an LPCVD method or a plasma CVD method. A source opening 25a and a drain opening 20b are formed in the insulating layer 25. The openings 25a and 25b penetrate the insulating layer 25 in the stacking direction of the nitride semiconductor layer 10.

[0040] A source opening 25a is formed in a portion of the insulating layer 25 covering the source electrode 31. The source electrode 31 is exposed in the source opening 25a. The source electrode 31 contacts a source electrode pad (not shown) through the source opening 25a. A drain opening 25b is formed in a portion of the insulating layer 25 covering the drain electrode 32. The drain electrode 32 is exposed in the drain opening 25b. The drain electrode 32 contacts a drain electrode pad (not shown) through the drain opening 25b. Openings 25a and 25b are formed by, for example, using a fluorine-based gas-based refrigerant exchange (RIE).

[0041] Next, an example of a method for manufacturing transistor 1 according to this embodiment will be described. Figure 2A , Figure 2B , Figure 2C , Figure 3A , Figure 3B and Figure 3C These are cross-sectional views showing the manufacturing process of transistor 1. When manufacturing transistor 1, firstly, as... Figure 2A As shown, a nitride semiconductor layer 10 comprising a channel layer 11, a barrier layer 12, and a capping layer 13 is formed on a substrate 2. Specifically, the channel layer 11, the barrier layer 12, and the capping layer 13 are epitaxially grown sequentially on the substrate 2 using a metal-organic chemical vapor deposition (MOCVD) method.

[0042] Subsequently, an insulating layer 20 is formed on the surface 10a of the nitride semiconductor layer 10 using an LPCVD method. Specifically, as shown... Figure 2B As shown, a first SiN film 21 of an insulating layer 20 is formed on the surface 10a of the nitride semiconductor layer 10. At this time, by controlling the film formation time of the first SiN film 21, the thickness (T1) of the first SiN film 21 is set to, for example, 5 nm or more and 20 nm or less. Thereafter, as... Figure 2CAs shown, a second SiN film 22, which forms an insulating layer 20, is formed on the first SiN film 21. At this time, by controlling the film formation time of the second SiN film 22, the thickness (T2) of the second SiN film 22 is set to, for example, 20 nm or more and 100 nm or less. In this way, the insulating layer 20 is formed on the surface 10a. Details of the method for forming the insulating layer 20 (the first SiN film 21 and the second SiN film 22) using the LPCVD method will be described later.

[0043] Subsequently, by selectively etching portions of the insulating layer 20, a source opening 20a and a drain opening 20b are formed in the insulating layer 20 (see [link]). Figure 1 Specifically, a photoresist is applied to the insulating layer 20, and an opening pattern having the same planar shape as the source opening 20a and the drain opening 20b is formed on the photoresist. Then, dry etching of the insulating layer 20 is performed via the opening pattern. In this embodiment, the dry etching is a re-etching process using a fluorine-based gas.

[0044] The fluorine-based gas is, for example, carbon tetrafluoride (CF4), but can also be sulfur hexafluoride (SF6). When the fluorine-based gas is CF4, the flow rate is set to, for example, 50 sccm, the high-frequency power (RF power) is set to, for example, 100 W, the bias power is set to, for example, 10 W, and the reaction pressure is set to, for example, 0.4 Pa. 1 sccm represents 1 cm at 0°C under 1 atmosphere. 3 / minute. The etching time of the insulating layer 20 is set according to the thickness of the insulating layer 20 and the bias power. In practice, an over-etching time is added to the etching time. The over-etching time is set to 100% or less of the calculated etching time. In this step, a source opening 20a and a drain opening 20b penetrating the insulating layer 20 are formed, and the surface 10a is exposed from the openings 20a and 20b.

[0045] Subsequently, a source electrode 31 is formed in the source opening 20a, and a drain electrode 32 is formed in the drain opening 20b. In this step, photolithography and lift-off are used to form metal electrodes (e.g., Ta, Al, and Mo layers) for the source electrode 31 and drain electrode 32. Thereafter, to make the source electrode 31 and drain electrode 32 ohmic electrodes, each of the source electrode 31 and drain electrode 32 is alloyed by heat treatment. The temperature of this heat treatment is, for example, 500°C or higher and 600°C or lower.

[0046] Subsequently, as Figure 3A As shown, a resist R with an opening Ra is formed on the insulating layer 20. A gate opening 20c is formed therein (see...). Figure 1 Photolithography is used on the area to form the opening Ra of the resist R. Subsequently, the resist R is used as a mask to subject the insulating layer 20 to a RIE. Using this RIE, as... Figure 3B As shown, a gate opening 20c is formed in the insulating layer 20.

[0047] The fluorine-based gas used for RIE is, for example, CF4, but can be SF6. When the fluorine-based gas is CF4, the flow rate of the fluorine-based gas is set to, for example, 50 sccm, the high-frequency power is set to, for example, 100 W, the bias power is set to, for example, 10 W, and the reaction pressure is set to, for example, 0.4 Pa. The etching time of the insulating layer 20 is set according to the thickness of the insulating layer 20 and the bias power. In practice, an over-etching time is added to the etching time. The over-etching time is set to 100% or less of the calculated etching time. In this step, a gate opening 20c penetrating the insulating layer 20 is formed, and the surface 10a is exposed from the gate opening 20c. Thereafter, the resist R is removed.

[0048] Subsequently, as Figure 3C As shown, a gate electrode 33 is formed to block the gate opening 20c. Specifically, a photoresist is applied to the insulating layer 20, and an opening of the photoresist is formed on the gate opening 20c by photolithography. Then, a metal electrode is deposited in and around the gate opening 20c through the photoresist opening. The metal electrode deposition is performed by a vapor deposition method. Then, the metal material deposited on the photoresist is stripped away by removing the photoresist. Thus, the gate electrode 33 is formed.

[0049] Subsequently, for example, an insulating layer 25 is formed on the second SiN film 22 using an LPCVD method or a plasma CVD method (see...). Figure 1 The gate electrode 33 is then covered with an insulating layer 25. At this time, for example, silicon tetrahydroxide (SiH4), silicon dichlorohydroxide (SiH2Cl2), and ammonia (NH3) are used as feed gases. Subsequently, openings 25a and 25b are formed in the insulating layer 25 using, for example, a fluorine-based gas via a re-embedded electrode (RIE), and electrodes 31 and 32 are exposed from the openings 25a and 25b. Through the above steps, a [fabrication method / product] is manufactured. Figure 1 Transistor 1 is shown in the figure.

[0050] Here, the details of the method for forming the insulating layer 20 using the LPCVD method will be described. Figure 4 This is a flowchart illustrating an example of a method for forming an insulating layer 20 using the LPCVD method.

[0051] Figure 5A This is a diagram showing the temperature inside the reactor (hereinafter referred to as "furnace temperature") and the gas supply process when the insulating layer 20 is formed. Figure 5B This is a diagram showing the pressure inside the reactor (hereinafter referred to as "furnace pressure") when the insulating layer 20 is formed. Figure 5AIn the diagram, the vertical axis represents the furnace temperature (unit: °C), and the horizontal axis represents time. Figure 5B In the diagram, the vertical axis represents the furnace pressure (unit: Pa), and the horizontal axis represents time.

[0052] First, the wafer containing the nitride semiconductor layer 10 is introduced into the reactor of the decompression CVD equipment in an atmospheric atmosphere (step S1). At this time, the furnace temperature is set as follows: Figure 5A The temperature H1 shown is [temperature H1]. Temperature H1 can be, for example, room temperature (25°C) or higher and 600°C or lower. In this embodiment, temperature H1 is 600°C. Next, the atmosphere in the reactor is replaced (step S2). Specifically, the atmosphere in the reactor is replaced with a nitrogen atmosphere by repeatedly evacuating the reactor and introducing nitrogen (N2) into the reactor (i.e., performing a cyclic purging). At this time, as […] Figure 5B As shown, the pressure inside the furnace decreases from atmospheric pressure P1 to pressure P2. Pressure P2 can be, for example, 20 Pa or lower. In this embodiment, pressure P2 is 20 Pa.

[0053] Subsequently, while maintaining the pressure inside the furnace at pressure P2, the temperature inside the furnace is increased from temperature H1 to temperature H2, as follows: Figure 5A As shown in step S3. The pressure H2 can be, for example, 800°C or higher. In this embodiment, the temperature H2 is 800°C. Subsequently, after stabilizing the furnace temperature at temperature H2 (step S4), the nitrogen atmosphere in the reactor is replaced with ammonia (step S5). Specifically, the nitrogen atmosphere in the reactor is replaced with an ammonia atmosphere by repeatedly evacuating the reactor and introducing ammonia into the reactor.

[0054] Subsequently, a feed gas containing a compound gas containing silicon (Si) and chlorine, as well as ammonia, is supplied to the reactor. The compound gas is, for example, dichlorosilane (SiH2Cl2). This compound gas only needs to contain Si and Cl, and can be a gas other than dichlorosilane. In this embodiment, the insulating layer 20 is formed by LPCVD using a feed gas containing dichlorosilane and ammonia. Specifically, after forming a first SiN film 21 of the insulating layer 20 on surface 10a using the feed gas (step S6), a second SiN film 22 of the insulating layer 20 is then formed on the first SiN film 21 using the feed gas (step S7).

[0055] In each of steps S6 and S7, the ratio of the flow rate of dichlorosilane (F1) to the sum of the flow rates of dichlorosilane (F1) and ammonia (F2) (F1+F2) is adjusted [F1 / (F1+F2)]. Figure 6 The ratio [F1 / (F1+F2)] when insulating layer 20 is formed is shown. Figure 6In step S6, the ratio [F1 / (F1+F2)] is represented as ratio R1, and in step S7, the ratio [F1 / (F1+F2)] is represented as ratio R2. Figure 6 In the steps before and after steps S6 and S7, dichlorosilane is not supplied, so the ratio [F1 / (F1+F2)] is 0.

[0056] In step S6, dichlorosilane and ammonia are supplied, so the ratio R1 becomes a value greater than 0. In this embodiment, the ratio R1 is greater than or equal to 1 / 5 and less than or equal to 10 / 11. When the ratio R1 is 1 / 5 or greater and 10 / 11 or less, the flow rate ratio (F1 / F2) of dichlorosilane (F1) to ammonia (F2) is 1 / 4 or greater and 10 or less. In step S6, the flow rate of dichlorosilane (F1) is, for example, 50 sccm or greater and 150 sccm or less, and the flow rate of ammonia (F2) is, for example, 10 sccm or greater and 50 sccm or less.

[0057] On the other hand, in step S7, the ratio R2 is greater than 0 and less than the ratio R1. In this embodiment, the ratio R2 is greater than 0 and less than or equal to 1 / 11. When the ratio R2 is greater than 0 and less than or equal to 1 / 11, the flow ratio (F1 / F2) is greater than 0 and less than or equal to 1 / 10. In step S7, the flow rate (F1) of dichlorosilane can be, for example, 10 sccm or greater and 100 sccm or less, and the flow rate (F2) of ammonia can be, for example, 100 sccm or greater and 500 sccm or less.

[0058] In this way, the ratio [F1 / (F1+F2)] is adjusted in each of steps S6 and S7. This adjustment allows for the control of the chlorine concentration in each of the SiN films 21 and 22. Figure 7 This is a graph showing the relationship between the ratio [F1 / (F1+F2)] and the chlorine concentration. Figure 7 In the diagram, the horizontal axis represents the ratio [F1 / (F1+F2)] using logarithmic representation, and the vertical axis represents the chlorine concentration of the SiN film (unit: atoms / cm³). 3 ).

[0059] like Figure 7 As shown, the chlorine concentration increases accordingly with the increase of the ratio [F1 / (F1+F2)]. Within the range of the ratio R1, the amount of chlorine contained in the feed gas can be increased by increasing the flow rate (F1) of the chlorine-containing dichlorosilane. When the amount of chlorine contained in the feed gas increases, the amount of chlorine entering the first SiN film 21 increases, and the chlorine concentration of the first SiN film 21 increases. Therefore, in step S6, a film with a concentration of 1×10⁻⁶ is formed. 20 [atoms / cm] 3[A first SiN film with a higher chlorine concentration 21] or greater.

[0060] On the other hand, within the range of ratio R2, the amount of chlorine contained in the feed gas can be reduced by decreasing the flow rate (F1) of the chlorine-containing dichlorosilane. When the amount of chlorine contained in the feed gas decreases, the amount of chlorine entering the second SiN film 22 decreases, and the chlorine concentration of the second SiN film 22 decreases. Therefore, in step S7, a film with a concentration of 1×10⁻⁶ is formed. 19 [atoms / cm] 3 A second SiN film 22 with a chlorine concentration of [ ] or lower. In step S7, a feed gas that does not contain chlorine can be used to form the second SiN film 22. For example, the feed gas may contain silicon tetrahydroxide instead of silicon dichlorohydroxide, in which case any feed ratio can be selected as ratio R2.

[0061] In this way, the chlorine concentration of each of the SiN films 21 and 22 can be adjusted by controlling the ratio [F1 / (F1+F2)] in the feed gas. When the chlorine concentration of each of the SiN films 21 and 22 changes, the amount of chlorine contained as an impurity in each of the SiN films 21 and 22 changes, and the refractive index of each of the SiN films 21 and 22 changes. The refractive index of the first SiN film 21, formed at a ratio R1, is, for example, 2.3 or greater and 2.4 or less. On the other hand, the refractive index of the second SiN film 22, formed at a ratio R2, is, for example, 2.2 or less. The refractive indices of the first SiN film 21 and the second SiN film 22 are expressed as refractive indices relative to a wavelength of 632 nm.

[0062] When the flow rate of silicon dichlorosilane containing Si increases relative to the flow rate of ammonia containing N, the amount of Si in the feed gas increases relative to the amount of N. In this case, there is a concern that the amount of N in the first SiN film 21 formed at ratio R1 will be insufficient. However, although the refractive index of Si relative to a wavelength of 632 nm is approximately 3.4, in actual production, the refractive index of the first SiN film 21 is 2.4 or less. Based on this magnitude of the refractive index, it can be understood that the amount of N in the first SiN film 21 is sufficient (i.e., it is a SiN film rather than a Si film). Similarly, the second SiN film 22 formed at ratio R2 is also formed as a SiN film rather than a Si film.

[0063] After the formation of SiN films 21 and 22, as Figure 5AAs shown, the interior of the reactor is purged with a nitrogen atmosphere (step S8). In step S8, the chlorine gas produced by the decomposition of dichlorosilane is diluted to the detection limit by performing a cyclic purging with nitrogen. At this time, the furnace temperature decreases from temperature H2 to temperature H1. Subsequently, the furnace pressure returns from pressure P2 to atmospheric pressure P1, and the wafer is removed from the reactor (step S9). Through the above steps, an insulating layer 20 is formed on the surface 10a of the nitride semiconductor layer 10.

[0064] The effects obtained by the transistor 1 and the method of manufacturing the transistor 1 according to the present embodiment will be described together with the problems of the prior art. When a transistor is manufactured using a nitride semiconductor, an insulating layer can be formed on the surface of the nitride semiconductor layer, and a gate opening for forming a gate electrode can be formed in the insulating layer. For example, the gate opening is formed by a highly anisotropic RIE. This RIE is performed by applying a bias voltage to the plasma of the etching gas in the stacking direction.

[0065] When using a resonant electrode (RIE) to form a gate opening in an insulating layer, the plasma of the etch gas, accelerated by the bias voltage, collides with the surface of the nitride semiconductor layer at a high energy state, thus impairing the surface flatness. If the surface flatness is impaired, the Schottky barrier formed between the surface and the gate electrode will be in a different state than ideal. Therefore, leakage current increases. Consequently, power consumption during transistor operation increases. Therefore, to suppress this increase in leakage current, it is desirable for the surface exposed from the gate opening to have high flatness, making atomic layer steps visually identifiable.

[0066] On the other hand, chemical etching can also be considered for forming the gate opening. Examples of chemical etching include liquid-phase etching using an HF solution or gas-phase etching using a corrosive gas (e.g., chlorine-based gas). Such chemical etching allows the surface of the nitride semiconductor layer to achieve atomic-level flatness. However, because the gate opening width requires sub-micron dimensional accuracy, it is difficult to achieve this dimensional accuracy using liquid-phase etching, which is isotropic etching. In gas-phase etching, the etching rate of the corrosive gas is high relative to the outermost layer of the nitride semiconductor layer (e.g., GaN layer), making it difficult to accurately control the etching depth, i.e., the depth of the gate opening.

[0067] Regarding the above issues, in transistor 1 according to this embodiment, a 1×10 ohm transistor is provided on surface 10a. 20 [atoms / cm] 3 A first SiN film 21 with a chlorine concentration of 1×10⁻⁶ or higher is formed, and a gate opening 20c is formed through the RIE that penetrates the insulating layer 20 including the first SiN film 21. When the etching reaches a concentration of 1×10⁻⁶... 20 [atoms / cm] 3When the first SiN film 21 has a chlorine concentration of 1 or higher, a small amount of chlorine is released from the first SiN film 21 into the gate opening 20c. The released chlorine reacts chemically with the surface 10a exposed from the gate opening 20c. As a result, chemical etching using chlorine is performed on the surface 10a.

[0068] When the outermost capping layer 13 of the nitride semiconductor layer 10 is a GaN layer, the above chemical reaction is represented by the following chemical reaction formula (1) or (2).

[0069] 2GaN + 2Cl → 2GaCl + N2 (1)

[0070] 2GaN + 6Cl → 2GaCl3 + N2 (2)

[0071] The chemical reaction preferentially occurs in the structurally unstable portions of surface 10a (i.e., the rough portions (uneven portions) of surface 10a). This chemical reaction acts on surface 10a, thus enabling it to achieve atomic-level flatness. In this way, chemical etching is performed on the surface 10a exposed from the gate opening 20c, parallel to the RIE used to form the gate opening 20c in the insulating layer 20, and therefore, the reduction in the flatness of surface 10a caused by etching can be suppressed by chemical etching. On the other hand, since the chlorine released from the first SiN film 21 does not contribute to the etching of the SiN film, it does not affect the dimensional accuracy of the opening width and depth of the gate opening 20c.

[0072] Figure 8A This is an image of the surface 10a of the nitride semiconductor layer 10 obtained by atomic force microscopy (AFM) after a gate opening 20c is formed in the insulating layer 20 through RIE in the transistor 1 according to this embodiment. On the other hand, Figure 8B This is an image of the surface 100a of the nitride semiconductor layer obtained by AFM after RIE (Real-Installation Electrode) is performed in a prior art transistor to form a gate opening in the insulating layer. Unlike transistor 1 according to this embodiment, in prior art transistors, the insulating layer consists only of a layer with a concentration measurement detection limit of 1 × 10⁻⁶, which is lower than that of the SIMS method. 15 [atoms / cm] 3 The SiN film is composed of chlorine concentrations.

[0073] like Figure 8A and Figure 8B As shown, it can be understood that the surface 10a of the transistor 1 according to this embodiment is almost non-rough compared to the surface 100a of a prior art transistor. In the surface 10a of the transistor 1, a step / platform structure formed by multiple platforms and atomic layer steps connecting them is confirmed. When measurements are taken... Figure 8A and Figure 8B When the root mean square (RMS) values ​​of the roughness of each surface are shown, Figure 8A The RMS value of surface 10a shown is 0.215 nm, and Figure 8B The RMS value of surface 100a shown is 0.425 nm. In this way, transistor 1 according to this embodiment can achieve the following: Figure 8A The almost rough surface 10a is shown in the figure, and the RMS value of surface 10a is converged to 0.3 nm or less.

[0074] By ensuring the flatness of surface 10a in this way, the Schottky barrier formed between surface 10a and gate electrode 33 can be made closer to the ideal state. Therefore, the increase in leakage current can be suppressed. The inventors have confirmed that, in use... Figure 8A In the case of transistor 1 according to this embodiment shown in the figure, compared with the use of Figure 8B Compared to the prior art transistors shown, the leakage current is reduced by two digits. In this way, transistor 1 according to this embodiment can suppress the increase in leakage current. Therefore, it is possible to suppress the increase in power consumption during the operation of transistor 1.

[0075] The insulating layer 20 includes a second SiN film 22 disposed on the first SiN film 21, and the second SiN film 22 has a 1×10 19 [atoms / cm] 3 [or even lower chlorine concentration. In this way, since the insulating layer 20 includes a chlorine concentration of 1×10] 19 [atoms / cm] 3 A second SiN film with a chlorine concentration of [ ] or even lower can be used to suppress the excessive inclusion of chlorine as an impurity in the insulating layer 20. Therefore, the reduction of the insulating properties of the insulating layer 20 can be suppressed, and the increase of leakage current through the insulating layer 20 can be suppressed.

[0076] In this embodiment, the first SiN film 21 can be positioned closer to the surface 10a of the nitride semiconductor layer 10 than the second SiN film 22. In this case, compared to having 1×10... 19 [atoms / cm] 3 Compared to a second SiN film 22 with a chlorine concentration of 1×10⁻⁶ or lower, it has a chlorine concentration of 1×10⁻⁶. 20 [atoms / cm] 3 A first SiN film 21 with a chlorine concentration of 10a or higher is located on the surface 10a side. Therefore, chlorine released from the first SiN film 21 can more reliably act on the surface 10a, and the effect of suppressing the reduction of the flatness of the surface 10a mentioned above can be maintained.

[0077] In transistor 1 of this embodiment, a 1×10⁻⁶ ohm² pattern is shown formed on the surface 10a of the nitride semiconductor layer 10.20 [atoms / cm] 3 Examples of first SiN films 21 with a chlorine concentration of 1 or higher. However, as described above, as long as the chlorine released from the first SiN film 21 can act on the surface 10a of the nitride semiconductor layer 10, similar effects can be expected even with a structure in which a third SiN film with a chlorine concentration lower than that of the first SiN film 21 is formed between the first SiN film 21 and the nitride semiconductor layer 10.

[0078] In this embodiment, the ratio (T2 / T1) of the thickness (T2) of the second SiN film 22 to the thickness (T1) of the first SiN film 21 can be 1 or greater and 5 or less. In this case, since the ratio of the second SiN film 22 to the insulating layer 20 can be increased, the excessive inclusion of chlorine as an impurity in the insulating layer 20 can be further suppressed. Therefore, the reduction of the insulating properties of the insulating layer 20 can be further suppressed, and the increase of leakage current through the insulating layer 20 can be further suppressed.

[0079] In this embodiment, the refractive index of the first SiN film 21 may be 2.3 or greater and 2.4 or less, and the refractive index of the second SiN film 22 may be 2.2 or less. The refractive index of the SiN film changes according to the chlorine concentration of the SiN film. When the refractive index of the first SiN film 21 is 2.3 or greater and 2.4 or less, the first SiN film 21 has a refractive index of 1×10⁻⁶. 20 [atoms / cm] 3 [or a higher chlorine concentration. On the other hand, when the refractive index of the second SiN film 22 is 2.2 or less, the second SiN film 22 has a 1×10 19 [atoms / cm] 3 [or even lower chlorine concentrations. According to this configuration, it is possible to achieve a concentration of 1×10...] 20 [atoms / cm] 3 A first SiN film 21 with a chlorine concentration of 1×10⁻⁶ or higher is disposed on the first SiN film 21. 19 [atoms / cm] 3 A second SiN film 22 with a chlorine concentration of [ ] or even lower can be configured. Therefore, the same effect as mentioned above can be obtained.

[0080] In the method for manufacturing transistor 1 according to this embodiment, when forming the first SiN film 21, the flow ratio (F1 / F2) of the compound gas flow rate (F1) to the ammonia gas flow rate (F2) is set to 1 / 4 or greater and 10 or less. The amount of chlorine contained in the raw material gas can be increased by increasing the flow rate (F1) of dichlorosilane containing chlorine. Therefore, a film with a diameter of 1 × 10⁻⁶ can be formed. 20 [atoms / cm] 3A first SiN film 21 with a chlorine concentration of 10a or higher is formed. By forming the first SiN film 21 on the surface 10a, as described above, the reduction in the flatness of the surface 10a can be suppressed. As a result, the increase in leakage current can be suppressed, and the power consumption of the transistor 1 can be suppressed.

[0081] When a first SiN film 21 is formed on surface 10a, and a second SiN film 22 is formed on top of the first SiN film 21, the flow ratio (F1 / F2) is set to 1 / 10 or less. In this way, the amount of chlorine contained in the feed gas can be reduced by decreasing the flow rate (F1) of the chlorine-containing dichlorosilane. Therefore, a film with a flow ratio of 1×10⁻⁶ can be formed. 19 [atoms / cm] 3 A second SiN film 22 with a chlorine concentration of 1×10⁻⁶ or lower. Additionally, since the insulating layer 20 includes a second SiN film 22 with a chlorine concentration of 1×10⁻⁶... 19 [atoms / cm] 3 The second SiN film 22 has a chlorine concentration of 1×10⁻⁶ or even lower, thus suppressing the excessive inclusion of chlorine as an impurity in the insulating layer 20. Therefore, the reduction in the insulating properties of the insulating layer 20 and the increase in leakage current through the insulating layer 20 can be suppressed. Furthermore, since the second SiN film 22 is formed on the first SiN film 21, it has a chlorine concentration of 1×10⁻⁶ or even lower. 19 [atoms / cm] 3 Compared to a second SiN film 22 with a chlorine concentration of 1×10⁻⁶ or lower, it has a chlorine concentration of 1×10⁻⁶. 20 [atoms / cm] 3 A first SiN film 21 with a chlorine concentration of 10 or higher is located on the surface 10a side of the nitride semiconductor layer 10. Therefore, chlorine released from the first SiN film 21 can more reliably act on the surface 10a, and the aforementioned effect of suppressing the reduction of the flatness of the surface 10a can be maintained.

[0082] In this embodiment, during the step of forming the insulating layer 20 on surface 10a, the ratio (T2 / T1) of the thickness (T2) of the second SiN film 22 to the thickness (T1) of the first SiN film 21 can be 1 or greater and 5 or less. In this case, since the ratio of the second SiN film 22 to the insulating layer 20 can be increased, the excessive inclusion of chlorine as an impurity in the insulating layer 20 can be further suppressed. Therefore, the reduction of the insulating properties of the insulating layer 20 can be further suppressed, and the increase of leakage current through the insulating layer 20 can be further suppressed.

[0083] In this embodiment, the fluorine-based gas used in the step of forming the gate opening 20c in the insulating layer 20 can be SF6 or CF4. In this case, the gate opening 20c can be appropriately formed in the insulating layer 20.

[0084] The semiconductor device and method of manufacturing the semiconductor device according to this disclosure are not limited to the embodiments described above, and various other modifications are possible. For example, in the embodiments described above, the insulating layer 25 includes a first SiN film 21 and a second SiN film 22. However, the insulating layer may contain only the first SiN film. In this case, the first SiN film may constitute the entire insulating layer. In addition to the first and second SiN films, the insulating layer may also contain another SiN film.

[0085] The first SiN film may not be in contact with the surface of the nitride semiconductor layer and may be separable from the surface. In this case, the first SiN film may be disposed on the surface via another film. Similarly, the second SiN film may not be in contact with the first SiN film and may be separable from the first SiN film. In this case, the second SiN film may be disposed on the first SiN film via another film. The second SiN film may be a chlorine-free film. In the above embodiments, an example of the present disclosure being applied to HEMTs is shown. However, the present disclosure is applicable to transistors other than HEMTs, and to semiconductor devices other than transistors (in particular, nitride semiconductor devices).

Claims

1. A semiconductor device comprising: a nitride semiconductor layer; an insulating layer provided on a surface of the nitride semiconductor layer; and a metal electrode in contact with the surface through an opening that penetrates the insulating layer, wherein the insulating layer includes:

2. The semiconductor device according to claim 1, a first silicon nitride (SiN) film having a concentration of 1 x 10 20 atoms / cm 3 a concentration of chlorine (Cl) of 1 x 1019atoms / cm2or more and a thickness of 30 nm or less, and a second silicon nitride (SiN) film having a concentration of chlorine (Cl) of 1 x 10 19 atoms / cm 3 or less. the first SiN film is positioned closer to the surface of the nitride semiconductor layer than the second SiN film. wherein 3. The semiconductor device according to claim 2, the first SiN film is in contact with the surface of the nitride semiconductor layer. wherein 4. The semiconductor device according to any one of claims 1 to 3, a thickness of the second SiN film is thicker than a thickness of the first SiN film. wherein 5. The semiconductor device according to claim 4, a ratio of the thickness of the second SiN film to the thickness of the first SiN film is 1 or more and 5 or less. wherein 6. The semiconductor device according to any one of claims 1 to 3, a refractive index of the first SiN film is 2.3 or more and 2.4 or less, and a refractive index of the second SiN film is 2.2 or less. wherein 7. The semiconductor device according to any one of claims 1 to 3, further comprising: another insulating layer provided on the insulating layer to cover the metal electrode.

8. A method of manufacturing a semiconductor device, comprising: forming an insulating layer including a first silicon nitride (SiN) film and a second silicon nitride (SiN) film on a surface of a nitride semiconductor layer using a chemical vapor deposition method, the second SiN film being on the first SiN film; forming an opening for exposing the surface in the insulating layer by reactive ion etching using a fluorine-based gas; and forming a metal electrode in contact with the surface through the opening, wherein, in forming the insulating layer on the surface, the first SiN film and the second SiN film are formed using a source gas containing a compound gas and ammonia (NH3), the compound gas containing silicon (Si) and chlorine (Cl), when forming the first SiN film, a flow rate ratio of a flow rate of the compound gas to a flow rate of the ammonia is set to 1 / 4 or more and 10 or less, and when forming the second SiN film, the flow rate ratio is set to 1 / 10 or less.

9. The method of manufacturing a semiconductor device according to claim 8, in forming the opening in the insulating layer, wherein, the fluorine-based gas is sulfur hexafluoride (SF6) or carbon tetrafluoride (CF4). ​

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