Micro light emitting diode and method for manufacturing micro light emitting diode

The micro LED structure addresses light efficiency and manufacturing challenges by utilizing a vertical and inclined side surface design with a reflective layer, improving light directionality and substrate utilization.

CN113169253BActive Publication Date: 2024-12-13SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN201980079816.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-12-24
Filing Date
2019-12-19
Publication Date
2024-12-13
Estimated Expiration
2039-12-19

AI Technical Summary

Technical Problem

Micro LEDs face challenges with reduced light efficiency and increased power consumption due to side light irradiation and limited growth substrate utilization due to inclined surfaces, which affect manufacturing efficiency.

Method used

A micro LED structure with a vertical first side surface, an inclined second side surface, an insulating layer, and a reflective layer arranged symmetrically to the active layer, enhancing light directionality and substrate utilization.

Benefits of technology

Improves light efficiency by directing side light towards the display screen and increases the number of LEDs produced per substrate, thereby enhancing manufacturing efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

A micro light emitting diode (LED), comprising: a first semiconductor layer doped with an n-type dopant; a second semiconductor layer doped with a p-type dopant; an active layer arranged between the first semiconductor layer and the second semiconductor layer and configured to provide light; a first side surface comprising a vertical side surface of the first semiconductor layer; a second side surface inclined relative to the first side surface and comprising a first inclined side surface of the active layer and a second inclined side surface of the second semiconductor layer; an insulating layer arranged to surround the first side surface and the second side surface; and a reflective layer arranged to partially surround the insulating layer in a region of the insulating layer corresponding to the second side surface.
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Description

Technical Field

[0001] The present disclosure relates to a micro light emitting diode (LED) having improved light efficiency and manufacturing efficiency, and a method for manufacturing the micro LED. Background Art

[0002] Micro LEDs can be formed of ultra-micro inorganic luminescent materials and display images by emitting light by themselves. Specifically, micro LEDs can refer to ultra-micro LEDs that have 1 / 10 the length and 1 / 100 the area of ​​a normal light-emitting diode (LED) chip, and whose width, length, and height are between 10 and 250 micrometers (μm) in size.

[0003] Micro LED can be implemented as a display screen because it is arranged on the substrate of the display and provides light to the front and irradiates light. At the same time, the micro LED irradiates light not only on the top surface facing forward but also on the side, so when implementing the display screen, it is difficult to use the light of the micro LED irradiated on the side. Therefore, there is a problem that the light efficiency of the micro LED is reduced and the power consumption of the display device is increased.

[0004] In addition, in order to use the side light of the micro LED, the side of the micro LED is formed as an inclined surface, and the side light is refracted and reflected on the top surface of the micro LED, but due to the inclined surface of the micro LED, there is a problem that the number of micro LEDs generated on one growth substrate can be reduced. Summary of the invention

[0005] Technical issues

[0006] Provided are a micro LED with improved light efficiency and manufacturing efficiency, and a method for manufacturing the micro LED.

[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments.

[0008] Solution to the problem

[0009] According to one aspect of the present disclosure, a micro light emitting diode (LED) may include: a first semiconductor layer doped with an n-type dopant; a second semiconductor layer doped with a p-type dopant and arranged in a predetermined first area on a bottom surface of the first semiconductor layer; an active layer arranged between the first semiconductor layer and the second semiconductor layer and configured to provide light; a first electrode pad arranged in a predetermined second area on a bottom surface of the first semiconductor layer; a second electrode pad arranged on a bottom surface of the second semiconductor layer; a first side surface including a vertical side surface of the first semiconductor layer; a second side surface inclined relative to the first side surface and including a first inclined side surface of the active layer and a second inclined side surface of the second semiconductor layer; an insulating layer arranged to surround the first side surface and the second side surface; and a reflective layer arranged to partially surround an area of ​​the insulating layer corresponding to the second side surface.

[0010] The reflective layer may be arranged symmetrically with respect to the active layer.

[0011] The reflective layer may be arranged at an angle in a range of 40 to 50 degrees with respect to the first side surface.

[0012] The second side may include a portion of the first semiconductor layer.

[0013] A portion of the first side surface may be continuously connected to the second side surface, and the insulating layer may be integrally formed on a portion of the first side surface and the second side surface.

[0014] The insulating layer may include a first insulating portion disposed on the first side; and a second insulating portion disposed on the second side, and the first insulating portion may be integrally formed with the second insulating portion.

[0015] A height of the first electrode pad relative to the first semiconductor layer may be equal to a height of the second electrode pad relative to the first semiconductor layer.

[0016] The micro LED may further include: a growth substrate disposed on one surface of the first semiconductor layer; and a buffer layer disposed between the first semiconductor layer and the growth substrate.

[0017] The length of the micro-LED may be less than or equal to 250 μm.

[0018] A ratio of the length of the micro LED to the sum of the thickness of the first semiconductor layer, the thickness of the insulating layer, and the thickness of the second semiconductor layer may be less than 50.

[0019] According to one aspect of the present disclosure, a method for manufacturing a micro light emitting diode (LED) may include: sequentially forming a first semiconductor layer doped with an n-type dopant, an active layer configured to provide light, and a second semiconductor layer doped with a p-type dopant on a growth substrate; forming a second side surface inclined relative to the first semiconductor layer, and the second side surface includes a first inclined side surface of the active layer and a second inclined side surface of the second semiconductor layer; etching the active layer and the second semiconductor layer so as to be stepped relative to the first semiconductor layer; etching the first semiconductor layer to a predetermined size to form a first side surface, which extends from a portion of the second side surface and is perpendicular to the first semiconductor layer; forming an insulating layer surrounding the first side surface and the second side surface; forming a reflective layer, which partially surrounds the insulating layer in an area of ​​the insulating layer corresponding to the second side surface; forming a first electrode pad connected to the first semiconductor layer and a second electrode pad connected to the second semiconductor layer; and separating the first semiconductor layer from the growth substrate.

[0020] The reflective layer may be formed symmetrically with respect to the active layer.

[0021] The reflective layer may be formed at an angle ranging from 40 degrees to 50 degrees with respect to the first side.

[0022] A height of the first electrode pad relative to the first semiconductor layer may be equal to a height of the second electrode pad relative to the first semiconductor layer.

[0023] The first semiconductor layer may be separated from the growth substrate by a laser or chemical lift-off method.

[0024] The active layer and the second semiconductor layer may be etched using isotropic etching.

[0025] The first semiconductor layer may be etched using isotropic etching. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent through the following description in conjunction with the accompanying drawings, in which:

[0027] Figure 1 is a perspective view showing a micro LED according to an embodiment;

[0028] Figure 2A is along Figure 1 A cross-sectional view shown in AA;

[0029] Figure 2B is a bottom view of a micro LED according to an embodiment;

[0030] Figure 3 is a cross-sectional view illustrating the operation of a micro LED according to an embodiment;

[0031] Figure 4 is a cross-sectional view showing that a first semiconductor layer, an active layer, and a second semiconductor layer are sequentially formed on a growth substrate according to an embodiment;

[0032] Figure 5 is a diagram showing a method according to an embodiment of the present invention. Figure 4 A cross-sectional view of a p-electrode formed in a configuration of;

[0033] Figure 6 is a diagram showing a method according to an embodiment of the present invention. Figure 5 A cross-sectional view of etching the active layer and the second semiconductor layer in a configuration of;

[0034] Figure 7 is a diagram showing a method according to an embodiment of the present invention. Figure 6 A cross-sectional view of etching a first side of a first semiconductor layer in a configuration of;

[0035] Figure 8 is a diagram showing a method according to an embodiment of the present invention. Figure 7 A cross-sectional view of an n-electrode formed in a configuration of;

[0036] Fig. 9 is a diagram showing a method according to an embodiment of the present invention. Figure 8 A cross-sectional view of an insulating layer formed in a configuration of;

[0037] Fig.10 is a diagram showing a method according to an embodiment of the present invention. Fig. 9 A cross-sectional view of a reflective layer formed in a configuration of;

[0038] Fig.11 is a diagram showing a method according to an embodiment of the present invention. Fig.10 A cross-sectional view of a first electrode pad and a second electrode pad formed in a configuration of;

[0039] Fig.12 is a schematic diagram showing separation of a plurality of micro LEDs from a growth substrate by a laser lift-off method according to an embodiment;

[0040] Fig.13A is a cross-sectional view showing a second side of each of a plurality of micro LEDs formed on a growth substrate according to an embodiment;

[0041] Fig. 13B is a cross-sectional view showing a first side of each of a plurality of micro LEDs formed according to an embodiment; and

[0042] Fig.14 is a flowchart illustrating a method of manufacturing a micro LED according to an embodiment. DETAILED DESCRIPTION

[0043] Invention Mode

[0044] Hereinafter, embodiments will be described with reference to the accompanying drawings to fully understand the configuration and effects of the present disclosure. At the same time, it should be noted that the present disclosure is not limited to the embodiments described herein, but can be implemented in various forms, and various modifications can be made to the embodiments. The description of the embodiments is provided only to complete the description and to help ordinary technicians in the technical field to which the present disclosure belongs to understand the scope of the present disclosure. At the same time, in the accompanying drawings, for ease of description, each component is shown in a larger size than its actual size, and the proportion of each component may be enlarged or reduced.

[0045] In the case of describing that a component is "on" or "contacting" another component, it should be understood that the component may directly contact or be connected to the top of another component, but another component may exist between the components. Conversely, in the case of describing that a component is "on" or "directly contacting" another component, it should be understood that another component does not exist between the components. Other expressions describing the relationship between components, such as "between" and "directly between", can be interpreted in the same manner.

[0046] In addition, the expressions "first", "second", etc. used in the present disclosure may be used to describe various elements, but they are not intended to limit these elements. Such expressions are only used to distinguish one element from another element. For example, without departing from the scope of the present disclosure, a first element may be referred to as a second element, and a second element may be referred to as a first element in a similar manner.

[0047] In addition, singular expressions also include plural expressions as long as they do not have obviously different meanings in the context. In the present disclosure, terms such as "including" and "having" should be interpreted as indicating that such features, quantities, steps, operations, elements, components, or combinations thereof described in the specification exist, and can be interpreted as meaning that one or more of other features, quantities, steps, operations, elements, components, or combinations thereof can be added.

[0048] Unless otherwise defined, the terms used in the embodiments may be construed as having meanings generally known to those of ordinary skill in the art described in the present disclosure.

[0049] In the following, reference will be made to Figure 1 and FIG. 2 describe in detail the configuration of the micro LED 1 according to the embodiment.

[0050] Figure 1 is a perspective view showing a micro LED 1 according to an embodiment. Figure 2A is along Figure 1 A cross-sectional view is shown in AA. Figure 2B is a bottom view of the micro LED 1 according to the embodiment.

[0051] like Figure 1 As shown in FIG. 2 , the micro LED 1 may include: a first semiconductor layer 10 doped with an n-type dopant thereon, which may mean that the first semiconductor layer is doped with the n-type dopant; a second semiconductor layer 30, which is arranged in a predetermined first area E1 of a bottom surface 10 b of the first semiconductor layer 10 and doped with a p-type dopant thereon, which may mean that the second semiconductor layer is doped with the p-type dopant; an active layer 20, which is arranged between the first semiconductor layer 10 and the second semiconductor layer 30 and provides light; a first electrode pad 40, which is arranged in a predetermined second area E2 of the bottom surface 10 b of the first semiconductor layer 10; and a second electrode pad 50, which is arranged on the bottom surface 30 b of the second semiconductor layer 30.

[0052] The first semiconductor layer 10 is formed on a growth substrate 90 (refer to Figure 4 ) and may have an n-type conductivity type. Specifically, the first semiconductor layer 10 may be formed as a layer on which an n-type dopant is doped.

[0053] For example, when doped with an n-type dopant such as Si, Ge, Sn, Se, and Te, the first semiconductor layer 10 may have n-type conductivity.

[0054] Furthermore, the first semiconductor layer 10 determines the size of the micro LED 1, and the size of the first semiconductor layer 10 may be considered as the size of the micro LED 1. That is, the area of ​​the first semiconductor layer 10 may correspond to the area of ​​the micro LED 1 on a plane (eg, XY plane).

[0055] Therefore, if Figure 1 , Figure 2B , Fig.13A and Fig. 13B As shown in , if the first semiconductor layer 10 is etched with a length D1 and a width W1 determined on one growth substrate 90 , a plurality of micro LEDs 1 , 2 having the same size as a structure including the determined length D1 and width W1 may be generated.

[0056] For example, when the first semiconductor layer 10 is etched with a length D1 and a width W1 determined on one growth substrate 90 , a plurality of micro LEDs 1 , 2 having the same structure may be formed.

[0057] Furthermore, the number of the plurality of micro LEDs 1 formed on the growth substrate 90 may be different.

[0058] Therefore, according to the determined length D1 and width W1 of the first semiconductor layer 10 , the number of micro LEDs 1 that can be generated on one growth substrate 90 may vary.

[0059] For example, Figure 1 and Figure 2B As shown in , the determined length D1 may be less than or equal to 250 μm. That is, the length D1 of one micro LED 1 may be less than or equal to 250 μm.

[0060] In addition, the width W1 of the micro LED 1 may be the same as the length D1 of the micro LED 1. For example, if the length D1 of the micro LED 1 is 100 μm, the width W1 of one micro LED 1 may also be 100 μm. Therefore, the top surface of the micro LED 1 may be in the form of a square.

[0061] In addition, the first semiconductor layer 10 may have a vertical first side surface S1 at a corner thereof. Here, “vertical” may mean a vertical direction (Z-axis direction) relative to the flat top surface 10a or bottom surface 10b of the first semiconductor layer 10. That is, the side surface 10c of the first semiconductor layer 10 may constitute a vertical first side surface S1.

[0062] Therefore, since the first semiconductor layer 10 has the vertical first side surface S1 , the number of micro LEDs that can be generated on one growth substrate 90 can be increased.

[0063] For example, if the side surface of the first semiconductor layer 10 consists of an inclined surface, the area of ​​the first semiconductor layer 10 becomes wide, and thus the number of micro LEDs that can be generated on one growth substrate 90 decreases.

[0064] However, if the first semiconductor layer 10 has a vertical first side S1, the area of ​​the first semiconductor layer 10 may be smaller than that of a structure in which the side of the first semiconductor layer 10 consists of an inclined surface.

[0065] Therefore, through the structure in which the first semiconductor layer 10 has the vertical first side surface S1, the number of generated micro LEDs 1 can be maximized, and manufacturing efficiency can be improved.

[0066] In addition, the first semiconductor layer 10 may include a material through which light can pass. Figure 3 As shown in FIG. 1 , even if the first light L1 and the second light L2 generated on the active layer 20 pass through the first semiconductor layer 10 , the amount of lost light is reduced, and thus light efficiency can be improved.

[0067] The second semiconductor layer 30 may have a p-type conductivity. Specifically, the second semiconductor layer 30 may be formed as a layer doped with a p-type dopant thereon. For example, when a p-type dopant such as Zn, Mg, Co, Ni, Cu, Fe, and C is doped, the second semiconductor layer 30 may have p-type conductivity.

[0068] In addition, the second semiconductor layer 30 may be disposed in a predetermined first area E1 of the bottom surface 10 b of the first semiconductor layer 10 .

[0069] Here, the predetermined first area E1 may mean a partial area of ​​the bottom surface 10b of the first semiconductor layer 10. In addition, the first area E1 may include a corner of the first semiconductor layer 10. That is, if the active layer 20 is formed to be thin, the side surface of the second semiconductor layer 30 may be connected to the first side surface S1 of the first semiconductor layer 10. In addition, the predetermined first area E1 may be determined, while the area in which the first electrode pad 40 is to be formed is left in the remaining area of ​​the bottom surface 10b of the first semiconductor layer 10 in the predetermined first area E1.

[0070] The second semiconductor layer 30 may include the same base material as the first semiconductor layer 10. However, the second semiconductor layer 30 may have a conductivity type complementary to that of the first semiconductor layer 10 due to a different dopant.

[0071] For example, the first semiconductor layer 10 may provide electrons, and the second semiconductor layer 30 may provide holes.

[0072] In addition, the second semiconductor layer 30 may have a first inclined side surface 30c which is wider in an upper region (eg, in the Z-axis direction) and inclined relative to the first side surface S1. Here, the upper region may mean a direction in which the first semiconductor layer 10 is arranged based on the second semiconductor layer 30.

[0073] That is, as the second semiconductor layer 30 is farther from the first semiconductor layer 10 in the downward direction, the cross-sectional area gradually decreases.

[0074] The active layer 20 may be disposed between the first semiconductor layer 10 and the second semiconductor layer 30 and provide light. That is, the second semiconductor layer 30, the active layer 20, and the first semiconductor layer 10 may have a structure in which they are sequentially stacked.

[0075] The active layer 20 is a layer in which electrons provided from the first semiconductor layer 10 and holes provided from the second semiconductor layer 30 recombine and output light of a specific wavelength, and may have a single quantum well structure or a multiple quantum well (MQW) structure in which well layers and barrier layers are alternately stacked.

[0076] Therefore, light provided on the active layer 20 may be irradiated on the top and bottom surfaces as well as the side surfaces of the active layer 20 .

[0077] In addition, the active layer 20 may have a second inclined side surface 20 c which is wider in an upper region (Z-axis direction) and inclined with respect to the first side surface S1 . Here, the upper region may mean a direction in which the first semiconductor layer 10 is arranged based on the active layer 20 .

[0078] That is, as the active layer 20 is farther than the first semiconductor layer 10 in the lower direction, the cross-sectional area may be gradually reduced.

[0079] In addition, the cross-sectional area of ​​the active layer 20 may be smaller than the cross-sectional area of ​​the first semiconductor layer 10 , and may be larger than the cross-sectional area of ​​the second semiconductor layer 30 .

[0080] Therefore, the active layer 20 and the second semiconductor layer 30 may have a second side surface S2 inclined relative to the vertical first side surface S1 of the first semiconductor layer 10. Specifically, the first inclined side surface 30c of the second semiconductor layer 30 and the second inclined side surface 20c of the active layer 20 may constitute the second side surface S2.

[0081] In addition, the second side surface S2 may include a portion of the first semiconductor layer 10. That is, a portion of the first semiconductor layer 10 may also include an inclined side surface.

[0082] The first electrode pad 40 may be disposed in a predetermined second area E2 of the bottom surface 10b of the first semiconductor layer 10. Here, the second area E2 means other areas of the bottom surface 10b of the first semiconductor layer 10 except the first area E1, and the size of the second area E2 may vary.

[0083] In addition, the first electrode pad 40 may include a conductive material and may be electrically connected to the first semiconductor layer 10. Furthermore, the first electrode pad 40 may be connected to a thin film transistor substrate (not shown) on which the micro LED 1 is mounted and transmit an electrical signal to the micro LED 1.

[0084] Specifically, the first electrode pad 40 may be arranged in the form of being electrically connected to the first semiconductor layer 10 and to the n-electrode 40 - 1 formed to protrude from the bottom surface 10 b of the first semiconductor layer 10 while surrounding the n-electrode 40 - 1 .

[0085] Here, the n-electrode 40 - 1 may include Au, Cu, indium tin oxide (ITO), or the like.

[0086] Therefore, if the micro LED 1 is mounted on the thin film transistor substrate by a method such as soldering, damage to the n-electrode can be prevented.

[0087] In addition, the height of the first electrode pad 40 from the first semiconductor layer 10 may be the same as the height of the second electrode pad 50. Therefore, if the micro LED 1 is mounted on the thin film transistor substrate, the micro LED 1 may not be tilted to one side but may be arranged flat on the thin film transistor substrate.

[0088] The second electrode pad 50 may be disposed on the bottom surface 30 b of the second semiconductor layer 30 , may include a conductive material, and may be electrically connected to the second semiconductor layer 30 .

[0089] Specifically, the second electrode pad 50 may be arranged in the form of being electrically connected to the second semiconductor layer 30 and to the p-electrode 50 - 1 formed to protrude from the bottom surface 30 b of the second semiconductor layer 30 while surrounding the p-electrode.

[0090] Here, the p-electrode 50 - 1 may include Au, Cu, indium tin oxide (ITO), or the like.

[0091] Therefore, if the micro LED 1 is mounted on the thin film transistor substrate by a method such as soldering, damage to the p-electrode 50 - 1 can be prevented.

[0092] In addition, the heights of the first electrode pad 40 and the second electrode pad 50 may be the same relative to the first semiconductor layer 10 .

[0093] In addition, the first electrode pad 40 and the second electrode pad 50 may be formed on the bottom surface of the micro LED 1 .

[0094] That is, on the micro LED 1 , the first electrode pad 40 and the second electrode pad 50 are disposed at the lower portion of the micro LED 1 , and thus the micro LED 1 may be formed as a flip chip type.

[0095] This flip chip type of micro LED 1 can allow miniaturization, weight reduction and high integration of diodes. In addition, when manufacturing a display device, due to the structure of the micro LED 1, the electrode does not limit the light-emitting area, so the light-emitting efficiency can be improved. In addition, in combination with a thin film transistor substrate, no intermediate medium such as a wire is used, so the efficiency of the transfer process, etc. can be improved. The display module according to the embodiment can be applied to electronic products or electronic devices that require wearable devices, portable devices, handheld devices, or various displays in a single unit. The display module can also be applied to display devices such as monitors for personal computers, televisions and digital signage, and electronic displays arranged by multiple assemblies.

[0096] In addition, the micro LED 1 may include an insulating layer 70. The insulating layer 70 may be arranged to surround a vertical first side surface S1 and a second side surface S2 inclined relative to the first side surface S2. Specifically, the insulating layer 70 may include a first insulating portion 70a surrounding the first side surface S1 and a second insulating portion 70b surrounding the inclined second side surface S2.

[0097] Therefore, the insulating layer 70 may entirely surround the top surface 10 a of the first semiconductor layer 10 , the bottom surface 10 b except the first area E1 , and the side surfaces of the micro LED 1 except the bottom surface 30 b of the second semiconductor layer 30 .

[0098] Additionally, the insulating layer 70 may include a non-conductive material.

[0099] Therefore, the insulating layer 70 may prevent the escape of electrons for providing light to the outside of the micro LED 1 at the micro LED 1 , thereby improving light efficiency of the micro LED 1 .

[0100] In addition, the insulating layer 70 can prevent the micro LED 1 from being electrically short-circuited with external adjacent conductors or electronic devices, thereby improving the structural stability of the micro LED 1 .

[0101] In addition, the insulating layer 70 may be arranged in a structure entirely surrounding a corner region of the micro LED 1 , thereby improving structural durability of each layer included in the micro LED 1 .

[0102] In addition, the insulating layer 70 may include a material having a certain level of light transmittance. Therefore, light provided at the active layer 20 may be prevented from being absorbed into the insulating layer 70, so that light efficiency of the micro LED 1 may be improved.

[0103] The insulating layer 70 may be integrally formed on a portion of the first side surface S1 and the second side surface S2. Figure 1 and Figure 2A As shown in FIG. 1 , a portion of the first side surface S1 is continuously connected to the second side surface S2 , and thus the first insulating portion 70 a and the second insulating portion 70 b of the insulating layer 70 may be integrally formed.

[0104] Therefore, even if an edge portion is formed between the vertical first side surface S1 and the inclined second side surface S2 of the micro LED 1, the first insulating portion 70a and the second insulating portion 70b of the insulating layer 70 are formed integrally, so that the electrons of the micro LED 1 are separated from the edge portion, or the structurally weaker portion is closed, thereby improving the structural stability.

[0105] In addition, the micro LED 1 may include a reflective layer 80 that is arranged to surround the second side surface S2 in a partial region of the insulating layer 70 and reflects and refracts light provided on the active layer 20 in a direction of the first semiconductor layer 10 .

[0106] Specifically, the reflective layer 80 may be laminated on the second insulating portion 70 b of the insulating layer 70 , and reflect and refract light provided on the active layer 20 and passing through the insulating layer 70 to an upper portion of the micro LED 1 .

[0107] In addition, the reflective layer 80 may be disposed to surround the inclined side surface 30 c of the active layer 20 .

[0108] Therefore, the direction of the side light provided on the active layer 20 of the micro LED 1 may be changed to an upward direction required to realize a display screen, so that the light efficiency of the micro LED 1 may be improved.

[0109] In addition, the reflective layer 80 may include a metal having a high reflectivity to reflect light. For example, the reflective layer 80 may include a metal such as aluminum (Al), silver (Ag), and nickel (Ni).

[0110] In addition, the reflective layer 80 may be arranged symmetrically with respect to the active layer 20. For example, Figure 1 As shown in , the reflective layer 80 may be symmetrically arranged on the four inclined side surfaces 30 c of the active layer 20 with the active layer 20 as the center, and simultaneously reflect and refract light irradiated from the four inclined side surfaces 30 c of the active layer 20 in the direction in which the first semiconductor layer 10 is arranged.

[0111] Therefore, the concentration of light provided at the micro LED 1 in one side direction of the micro LED 1 is prevented, and thus uniform brightness of the micro LED 1 can be achieved.

[0112] In addition, the reflective layer 80 may be arranged at an angle of 40 to 50 degrees relative to the first side surface S1. Figure 2A As shown in FIG. 1 , the reflective layer 80 may be arranged at an R angle with respect to the first side surface S1. Here, the R angle is an angle at which light provided on the active layer 20 may be reflected and refracted to the upper portion of the micro LED 1. For example, the R angle may be 40 to 50 degrees.

[0113] In the following, reference will be made to Figure 3 The operation of the micro LED 1 according to the embodiment is described.

[0114] Figure 3 is a cross-sectional view illustrating the operation of the micro LED 1 according to the embodiment.

[0115] In the micro LED 1 , an electron signal is introduced to the first electrode pad 40 and the second electrode pad 50 , and thus, electrons provided from the first semiconductor layer 10 and holes provided from the second semiconductor layer 30 are recombined, and light may be provided on the active layer 20 .

[0116] Specifically, the light may include a first light L1 irradiated in a direction perpendicular to the active layer 20 , and a second light L2 and a third light L3 irradiated side by side in a plane direction of the active layer 20 .

[0117] That is, the first light L1 may be irradiated in an upper direction where the first semiconductor layer 10 is disposed, and the second light L2 and the third light L3 may be irradiated on the side surface 20 c of the active layer 20 .

[0118] Then, the second light L2 and the third light L3 may pass through the insulating layer 70 disposed on the side 20 c of the active layer 20 , and may be refracted and reflected from the reflective layer 80 laminated on the insulating layer 70 in a direction in which the first semiconductor layer 10 is disposed.

[0119] That is, the directions of the second light L2 and the third light L3 may be changed to the same direction as the first light L1 by the reflective layer 80 .

[0120] Therefore, in addition to realizing the display screen by irradiating the first light L1 on the top surface of the micro LED 1, the directions of the second light L2 and the third light L3 are also changed to the same direction as the first light L1, thereby realizing the same display screen as the first light L1, and therefore, the light efficiency of the micro LED 1 can be improved.

[0121] In addition, as described above, the side surfaces 10 c of the first semiconductor layer 10 constituting the side surfaces of the micro LEDs 1 are formed vertically, and thus, the number of micro LEDs 1 that can be produced on one growth substrate 90 can be increased.

[0122] That is, by the reflective layer 80 arranged on the vertical first side and partially inclined second side of the micro LED 1 according to the embodiment, the light efficiency of the micro LED 1 can be improved, and a large number of micro LEDs 1 can be produced at the same time.

[0123] Therefore, the light efficiency and manufacturing efficiency of the micro LED 1 can be improved at the same time.

[0124] In the following, reference will be made to Figures 4 to 14 A manufacturing process of the micro LED 1 according to the embodiment is described in detail.

[0125] Figure 4 is a cross-sectional view showing that a first semiconductor layer, an active layer, and a second semiconductor layer are sequentially formed on a growth substrate.

[0126] Figure 5 It is shown Figure 4 A cross-sectional view of a p-electrode 50 - 1 formed in a configuration of . Figure 6 It is shown Figure 5 2 is a cross-sectional view of etching the active layer 20 and the second semiconductor layer 30 in the configuration of FIG. Figure 7 It is shown Figure 6 FIG. 5 is a cross-sectional view of etching the first side surface S1 of the first semiconductor layer 10 in the configuration of FIG. Figure 8 It is shown Figure 7 4 is a cross-sectional view of an n-electrode 40 - 1 formed in a configuration of . Fig. 9 It is shown Figure 8 A cross-sectional view of an insulating layer 70 formed in a configuration of FIG. Fig.10 It is shown Fig. 9 A cross-sectional view of a reflective layer 80 formed in a configuration of FIG. Fig.11 It is shown Fig.10 A cross-sectional view of a first electrode pad 40 and a second electrode pad 50 formed in a configuration of FIG. Fig.12 is a schematic diagram showing separation of a plurality of micro LEDs 1 , 2 from a growth substrate 90 by a laser lift-off method. Fig.13A is a cross-sectional view showing a second side surface S2 of each of a plurality of micro LEDs 1 , 2 formed on a growth substrate 90 according to an embodiment. Fig. 13B is a cross-sectional view showing a first side surface S1 of each of a plurality of micro LEDs 1 and 2 formed according to an embodiment. Fig.14 is a flowchart illustrating a method of manufacturing the micro LED 1 according to the embodiment.

[0127] First, if Figure 4 As shown in FIG. 1 , at operation F1 , a first semiconductor layer 10 , an active layer 20 , and a second semiconductor layer 30 may be formed and sequentially stacked simultaneously on a growth substrate 90 .

[0128] That is, the growth substrate 90 may be disposed on one surface of the first semiconductor layer 10 .

[0129] Here, if Figure 7 As shown in FIG. 1 , the sum t1 of the thicknesses of the first semiconductor layer 10 , the active layer 20 , and the second semiconductor layer 30 formed on the growth substrate 90 and stacked simultaneously may be less than or equal to 50 μm.

[0130] In addition, a ratio of the length D1 of one micro LED 1 to the thickness t1 of the first semiconductor layer 10 , the active layer 20 , and the second semiconductor layer 30 may be less than 50.

[0131] That is, the size of the micro LED 1 may be formed such that a ratio of a length D1 of one micro LED 1 to a total thickness t1 of the first semiconductor layer 10 , the active layer 20 , and the second semiconductor layer 30 is less than 50.

[0132] For example, if the length D1 of one micro LED 1 is formed to be 100 μm, the total thickness t1 of the first semiconductor layer 10 , the active layer 20 , and the second semiconductor layer 30 may be formed to be greater than 2 μm.

[0133] In addition, if the total thickness t1 of the first semiconductor layer 10 , the active layer 20 , and the second semiconductor layer 30 of one micro LED 1 is formed to be 5 μm, the length D1 of one micro LED 1 may be formed to be less than 250 μm.

[0134] In addition, the growth substrate 90 is a mother substrate for growing the first semiconductor layer 10, and may include sapphire (Al2O3), silicon carbide (SiC), gallium nitride (GaN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), aluminum nitride (AlN), gallium oxide (Ga2O3), gallium arsenide (GaAs) or a silicon substrate.

[0135] In addition, a buffer layer 100 may be formed between the growth substrate 90 and the first semiconductor layer 10. If the completed micro LED 1 is separated from the growth substrate 90, the buffer layer 100 may enable selective etching of the portion where the micro LED 1 is located, and may reduce the degree of lattice mismatch between the growth substrate 90 and the micro LED 1.

[0136] Next, if Figure 5 As shown in FIG. 1 , a p-electrode 50 - 1 electrically connected to the second semiconductor layer 30 may be formed on one surface of the second semiconductor layer 30 .

[0137] Then, if Figure 6 As shown in , the second semiconductor layer 30 and the active layer 20 can form a second side S2, the upper area of ​​which is wider and inclined relative to the first semiconductor layer 10, and at operation F2, the active layer 20 and the second semiconductor layer 30 can be etched into a step shape relative to the first semiconductor layer 10.

[0138] Here, the active layer 20 and the second semiconductor layer 30 may form the second side surface S2 by isotropic etching. Here, the second side surface S2 may be formed to be inclined at an angle of 40 to 50 degrees with respect to the vertical side surface of the first semiconductor layer 10.

[0139] In addition, a portion of the first semiconductor layer 10 may be etched to form an inclined second side S2. However, the present disclosure is not limited thereto, and only the active layer 20 and the second semiconductor layer 30 may be etched without etching the first semiconductor layer 10, and the second side S2 may be formed.

[0140] Next, if Figure 7 As shown in FIG. 1 , at operation F3 , the first semiconductor layer 10 may be etched by a predetermined size to form a first side surface S1 extending from a portion of the second side surface S2 and vertical with respect to the first semiconductor layer 10 .

[0141] Here, the predetermined size is a size including the determined length D1 , and may mean a size of the micro LED 1 to be manufactured.

[0142] Therefore, in the case where the first semiconductor layer 10 is etched according to a predetermined size including a determined length D1 , a plurality of micro LEDs 1 may be manufactured on one growth substrate 90 .

[0143] For example, as the predetermined dimension including the determined length D1 becomes larger, the number of micro LEDs 1 manufactured on one growth substrate 90 decreases. Also, as the predetermined dimension including the determined length D1 becomes smaller, the number of micro LEDs 1 manufactured on one growth substrate 90 increases.

[0144] In addition, the first semiconductor layer 10 may be isotropically etched to form the first side surface S1 .

[0145] Next, if Figure 8 As shown in FIG. 1 , an n-electrode 40 - 1 electrically connected to the first semiconductor layer 10 may be formed in a portion of one surface of the first semiconductor layer 10 where the active layer 20 and the second semiconductor layer 30 are not formed.

[0146] Afterwards, if Fig. 9 As shown in FIG. 1 , at operation F4 , an insulating layer 70 surrounding the vertical first side surface S1 of the first semiconductor layer 10 and the inclined second side surfaces S2 of the active layer 20 and the second semiconductor layer 30 may be formed.

[0147] Specifically, a first insulating portion 70a surrounding the first side surface S1 and a second insulating portion 70b surrounding the second side surface S2 may be formed. That is, the insulating layer 70 may be formed while being stacked on the first side surface S1 and the second side surface S2.

[0148] In addition, the insulating layer 70 may be formed by a deposition process, for example, by metal organic chemical vapor deposition (MOCVD).

[0149] In addition, the insulating layer 70 may be integrally formed. Therefore, even if an edge portion is formed between the vertical first side surface S1 and the inclined second side surface S2 of the micro LED 1, the insulating layer 70 is integrally formed, so that electrons of the micro LED 1 are separated from the edge portion or the weaker portion of the structure is closed, thereby improving the structural stability.

[0150] Next, if Fig.10 As shown in FIG. 1 , at operation F5 , a reflective layer 80 surrounding the second side S2 may be formed in a partial region of the insulating layer 70 . Specifically, the reflective layer 80 may be laminated on the second insulating portion 70 b of the insulating layer 70 .

[0151] In addition, the reflective layer 80 may be arranged to be inclined at an angle of 40 to 50 degrees relative to the first side surface S1. Therefore, the direction of the side light provided on the active layer 20 of the micro LED 1 may be changed to the upper direction required for realizing the display screen, thereby improving the light efficiency of the micro LED 1.

[0152] In addition, the reflective layer 80 may be symmetrically arranged with respect to the active layer 20. Therefore, the reflective layer 80 may reflect the side light of the active layer 20 on all sides of the active layer 20, thereby preventing the light provided at the micro LED 1 from being concentrated in one side direction of the micro LED 1, and thus uniform brightness of the micro LED 1 may be achieved.

[0153] Afterwards, if Fig.11 As shown in FIG. 1 , at operation F6 , a first electrode pad 40 connected to the first semiconductor layer 10 and a second electrode pad 50 connected to the second semiconductor layer 30 may be formed.

[0154] Specifically, the first electrode pad 40 may be formed to surround the n-electrode 40 - 1 on the n-electrode 40 - 1. In addition, the second electrode pad 50 may be formed to surround the p-electrode 50 - 1 on the p-electrode 50 - 1.

[0155] In addition, the first electrode pad 40 may be formed on one surface of the first semiconductor layer 10 , and the second electrode pad 50 may be formed on one face of the second semiconductor layer 30 .

[0156] In addition, the heights of the first electrode pad 40 and the second electrode pad 50 may be formed to be the same with respect to the first semiconductor layer 10 .

[0157] Specifically, the height H1 of the first electrode pad 40 and the height H2 of the second electrode pad 50 are different, but the heights of the first electrode pad 40 and the second electrode pad 50 may be formed to be the same based on one surface of the first semiconductor layer 10 .

[0158] Therefore, if the micro LEDs 1 are of a flip chip type and are mounted on a thin film transistor substrate (not shown), the micro LEDs 1 may be mounted while maintaining parallelism without being arranged to be tilted.

[0159] Therefore, it is possible to prevent the irradiation of light emitted from the micro LED 1 from being inclined in one direction.

[0160] Next, if Fig.12 As shown in FIG, while the micro LED 1 is combined with the growth substrate 90, laser may be applied to the growth substrate 90 so that the first semiconductor layer 10 may be separated from the growth substrate 90. That is, at operation F7, the manufactured micro LED 1 may be separated from the growth substrate 90 by a laser lift-off (LLO) method.

[0161] For example, after the mask 110 is arranged on the growth substrate 90, the laser Z may be irradiated on the mask 110 in a corresponding position of the growth substrate 90 where the micro LED 1 to be separated is located. Therefore, the micro LED 1 located in the region where the heat from the laser Z is transmitted may be separated from the growth substrate 90.

[0162] In addition, according to a user's selection, the first semiconductor layer 10 may be separated from the growth substrate 90 by a chemical lift-off (CLO) method instead of a laser lift-off method.

[0163] Although the various embodiments have been described separately from each other, the embodiments do not have to be implemented independently, but the configuration and operation of each embodiment may be implemented in combination with at least one other embodiment.

[0164] In addition, although preferred embodiments have been shown and described, the present disclosure is not limited to the above-mentioned specific embodiments, and it is obvious that a person skilled in the art of the present disclosure can make various modifications without departing from the subject matter required by the appended claims. In addition, it is intended that such modifications should not be interpreted independently of the technical ideas or prospects.

Claims

1. A micro light emitting diode LED, include: a first semiconductor layer doped with an n-type dopant; a second semiconductor layer, arranged in a predetermined first region of a bottom surface of the first semiconductor layer and doped with a p-type dopant; an active layer disposed between the first semiconductor layer and the second semiconductor layer and configured to provide light; a first electrode pad arranged in a predetermined second region of the bottom surface of the first semiconductor layer; as well as a second electrode pad disposed on the bottom surface of the second semiconductor layer, The first semiconductor layer has a vertical first side surface. wherein each of the active layer and the second semiconductor layer has a second side surface, the second side surface is wider in an upper region and is inclined relative to the first side surface; and Wherein, the micro LED further comprises: an insulating layer arranged to surround the first side surface and the second side surface; and a reflective layer arranged to surround the second side surface in a partial region of the insulating layer, At least one of a portion of a bottom surface of the first semiconductor layer and a portion of a bottom surface of the second semiconductor layer is exposed.

2. The micro LED according to claim 1, in, The reflective layer is arranged symmetrically with respect to the active layer.

3. The micro LED according to claim 1, in, The reflective layer is arranged at an angle ranging from 40 degrees to 50 degrees relative to the first side surface.

4. The micro LED according to claim 1, in, The second side includes a portion of the first semiconductor layer.

5. The micro LED according to claim 1, in, A portion of the first side surface is continuously connected to the second side surface, and Wherein, the insulating layer is integrally formed on the portion of the first side surface and the second side surface.

6. The micro-LED according to claim 5, in, The insulating layer comprises: A first insulating portion, arranged on the first side surface; and a second insulating portion disposed on the second side surface, and Wherein, the first insulating part and the second insulating part are formed integrally.

7. The micro LED according to claim 1, in, A height of the first electrode pad is equal to a height of the second electrode pad relative to the first semiconductor layer.

8. The micro-LED according to claim 1, further comprising: include: a growth substrate, arranged on a surface of the first semiconductor layer; as well as A buffer layer is arranged between the first semiconductor layer and the growth substrate.

9. The micro LED according to claim 1, in, The length of the micro LED is less than or equal to 250 μm.

10. The micro LED according to claim 1, in, A ratio of the length of the micro LED to the sum of the thickness of the first semiconductor layer, the thickness of the insulating layer, and the thickness of the second semiconductor layer is less than 50.

11. The micro LED according to claim 1, in, The portion of the bottom surface of the first semiconductor layer and the portion of the bottom surface of the second semiconductor layer are both exposed.

12. A method for manufacturing a micro light emitting diode (LED), include: sequentially forming a first semiconductor layer doped with an n-type dopant, an active layer configured to provide light, and a second semiconductor layer doped with a p-type dopant on a growth substrate; A second side surface is formed by the active layer and the second semiconductor layer, the second side surface is wider in an upper region and is inclined relative to the first semiconductor layer; etching the active layer and the second semiconductor layer to be stepped relative to the first semiconductor layer; Etching the first semiconductor layer to a predetermined size to form a first side surface, the first side surface extending from a portion of the second side surface and being vertical relative to the first semiconductor layer; forming an insulating layer surrounding the first side surface and the second side surface; forming a reflective layer surrounding the second side surface in a partial region of the insulating layer; forming a first electrode pad connected to the first semiconductor layer and a second electrode pad connected to the second semiconductor layer; and separating the first semiconductor layer from the growth substrate, After the insulating layer is formed, at least one of a portion of a bottom surface of the first semiconductor layer and a portion of a bottom surface of the second semiconductor layer is exposed.

13. The method for manufacturing a micro LED according to claim 12, in, The reflective layer is formed symmetrically with respect to the active layer.

14. The method for manufacturing a micro LED according to claim 12, in, The reflective layer is formed at an angle ranging from 40 degrees to 50 degrees with respect to the first side surface.

15. The method for manufacturing a micro LED according to claim 12, in, A height of the first electrode pad is equal to a height of the second electrode pad relative to the first semiconductor layer.

16. The method for manufacturing a micro LED according to claim 12, in, Separating the first semiconductor layer from the growth substrate includes separating the first semiconductor layer from the growth substrate by laser or chemical lift-off method.