Reverse flow automatic transfer switch

Abstract

The system and apparatus include an automatic transfer switch including a source coupled to a power source, a first load coupled to a first load, a second load coupled to a second load, a first switch selectively coupling the first load to the source, and a second switch selectively coupling the second load to the source.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 16 / 200,374, filed on November 26, 2018, entitled “REVERSE FLOW AUTOMATICTRANSFER SWITCH,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to power coupling. More particularly, the present disclosure relates to systems and methods for connecting a power source to multiple loads.

[0004] background

[0005] For example, an automatic transfer switch (ATS) for consumer applications can be used to selectively couple local loads of a residential or commercial building to a utility grid. When a power outage occurs, such a device can also be used to selectively couple local loads to a generator. A typical ATS has two power inputs and one output. A typical ATS consists of multiple components (e.g., actuators, solenoids, and contactor cartridges). The ATS design has a complex construction and many components, especially with respect to the actuator and solenoid subsystems.

[0006] Overview

[0007] At least one embodiment relates to a method comprising: coupling a source pole of an automatic transfer switch to a power source, coupling a first load pole to a first load, coupling a second load pole to a second load, selectively closing a first switch to couple the first load pole to the source pole, and selectively closing a second switch to couple the second load pole to the source pole.

[0008] Another embodiment relates to a ring bus topology, which includes a first automatic transfer switch and a second automatic transfer switch. The first automatic transfer switch includes a first source electrode, a first load electrode, a second load electrode, a first switch, and a second switch, the first source electrode is configured to receive power from a first power source, the first load electrode is configured to supply power to a first load, the second load electrode is configured to supply power to a second load, the first switch is movable between an open position isolating the first load electrode from the first source electrode and a closed position connecting the first load electrode to the first source electrode, and the second switch is movable between an open position isolating the second load electrode from the first source electrode and a closed position connecting the second load electrode to the first source electrode. The second automatic transfer switch includes a second source electrode, a third load electrode, a fourth load electrode, a third switch, and a fourth switch, the second source electrode is configured to receive power from a second power source, the third load electrode is configured to supply power to a second load, the fourth load electrode is configured to supply power to a first load, the third switch is movable between an open position isolating the third load electrode from the second source electrode and a closed position connecting the third load electrode to the second source electrode, the fourth switch is movable between an open position isolating the fourth load electrode from the second source electrode and a closed position connecting the fourth load electrode to the second source electrode. The second load electrode is coupled to the third load electrode, and the first load electrode is coupled to the fourth load electrode.

[0009] Another embodiment relates to a ring bus topology, which includes a plurality of reverse flow automatic transfer switches, each reverse flow automatic transfer switch including: a source electrode, a first load electrode, a second load electrode, a first switch selectively coupling the first load electrode to the source electrode, and a second switch selectively coupling the second load electrode to the source electrode. Each source electrode is configured to be coupled to one of a plurality of power sources. Each first load electrode is connected to a second load electrode of an adjacent reverse flow automatic transfer switch. The first load electrode and the second load electrode are configured to be coupled to a plurality of loads.

[0010] Another embodiment relates to an automatic transfer switch, which includes: a source electrode coupled to a power source, a first load electrode coupled to a first load, a second load electrode coupled to a second load, a first switch selectively coupling the first load electrode to the source electrode, and a second switch selectively coupling the second load electrode to the source electrode.

[0011] This summary is illustrative only and is not intended to be limiting in any way.Other aspects, inventive features, and advantages of the devices or processes described herein will become apparent in the detailed description set forth herein in conjunction with the accompanying drawings, wherein like reference numerals refer to like elements. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic diagram of a reverse flow automatic transfer switch according to some embodiments.

[0014] Figure 2 According to some embodiments, Figure 1 Schematic diagram of a reverse flow automatic transfer switch connecting a single generator set to multiple loads.

[0015] Figure 3 is a schematic diagram of a ring bus topology according to some embodiments, the ring bus topology includes six power supplies, the six power supplies using six Figure 1 The reverse flow automatic transfer switch is connected to six loads.

[0016] Detailed Description

[0017] Before turning to the drawings showing certain exemplary embodiments in detail, it should be understood that the present disclosure is not limited to the details or methods set forth in the specification or shown in the drawings. It should also be understood that the terminology used herein is for descriptive purposes and should not be regarded as limiting.

[0018] Referring generally to the accompanying drawings, in one embodiment, an automatic transfer switch can be used in a reverse flow configuration to connect a power source (e.g., a generator set) to multiple loads. In some embodiments, a single generator set can be connected to two separate loads, and the power transmission can be selectively controlled by the automatic transfer switch. In some embodiments, multiple automatic transfer switches can be arranged in a ring bus to provide power switching and isolation capabilities for interconnecting multiple power sources and multiple loads. In addition, the power system including the automatic transfer switch can be connected via a communication network to perform fault detection and isolation using the automatic transfer switch.

[0019] like Figure 1 As shown, an automatic transfer switch (ATS) 10 is arranged in a reverse flow arrangement and includes a first pole in the form of a source pole 14, which is configured to receive power from a first power source (e.g., a generator set, a solar array, a wind turbine, a battery, a grid power source, etc.), a second pole in the form of a first load pole 18, which is configured to selectively supply power to a first load or a first load bus, and a third pole in the form of a second load pole 22, which is configured to selectively supply power to a second load or a second load bus.

[0020] In a typical forward flow installation, the automatic transfer switch is connected differently than Figure 1ATS 10 of reverse flow. In a typical installation, an automatic transfer switch is used to couple two power sources (e.g., grid power and a backup power source such as a generator set) to a single load. When a single power source is to be coupled to multiple loads, a circuit is usually provided comprising two or more separate circuit breakers, which are manually operated or automatically operated and controlled by a programmable logic controller. Alternatively, a distribution load panel with manual circuit breakers is provided for each sub-circuit. Figure 1 The Upstream ATS 10 replaces the circuit breaker or load panel that couples power to loads in a typical installation and can be more easily interconnected into a larger communicating network.

[0021] The first switch 26 is located between the source 14 and the first load 18, and the second switch 30 is located between the source 14 and the second load 22. The first switch 26 is controllable between an open position, in which the flow of electrical energy between the source 14 and the first load 18 is prohibited, and a closed position, in which electrical communication is provided between the source 14 and the first load 18. The second switch 30 is controllable between an open position, in which the flow of electrical energy between the source 14 and the second load 22 is prohibited, and a closed position, in which electrical communication is provided between the source 14 and the second load 22.

[0022] In operation, the source electrode 14 is connected to a power source such as a generator set and is arranged to receive electrical energy. The first load electrode 18 is connected to a first electrical load, and when the first switch 26 is in a closed position, the first load is selectively powered by the power source. The second load electrode 22 is connected to a second electrical load, and when the second switch 30 is in a closed position, the second load is selectively powered by the power source. In some embodiments, the first switch 26 and the second switch 30 can be arranged in an open position at the same time. In some embodiments, the first switch 26 and the second switch 30 can both be arranged in a closed position to simultaneously power the first load and the second load. An example of an automatic transfer switch can be found in U.S. Patent Publication No. 2018 / 0190441, the entire contents of which are incorporated herein by reference.

[0023] like Figure 2 As shown, the ATS 10 can be coupled to a power source in the form of a generator set 34, a first load 38, and a second load 42. The ATS 10 is shown with the first switch 26 in an open position such that the first load 38 does not receive power, and the second switch 30 closed such that the second load 42 is powered by the generator set 34.

[0024] In some embodiments, the ATS 10 may be connected to a communication network 44 (e.g., NEXSYS TMThe communication network 44 includes a controller 46 that communicates with the generator set 34 and the ATS 10. The controller 46 is configured to receive operating parameters or characteristics from the power source (e.g., the generator set 34) and / or the load 38, 42 and control the operation of the ATS 10. In some embodiments, the controller 46 associated with the ATS 10 controls the operation of the first switch 26 and the second switch 30 to direct the flow of power from the source 14. In some embodiments, the communication network 44 is a high-speed peer-to-peer network that provides communication and power monitoring of the power sources, loads, and power buses to provide a reliable architecture for fault detection, isolation, and control.

[0025] In such Figure 2 In the illustrated multi-load application, a single generator set 34 can provide power to two loads 38, 42 simultaneously. If an overload condition occurs, the generator set 34 can communicate with the ATS 10 via the communication network 44 to shed the lowest priority load determined by the controller 46. Note that additional ATS switches can be coupled to the load poles 18, 22 in a reverse flow configuration in place of one or more loads 38, 42 to provide additional output load poles and controls. In this case, each additional reverse flow ATS adds an additional load pole (i.e., a total of N reverse flow ATS switches provide N+1 load poles, and each additional ATS switch "layer" descending from the initial reverse flow ATS 10 doubles the number of available output load poles).

[0026] like Figure 3 As shown, the ATS 10 is configured for extended parallel applications so that both the first switch 26 and the second switch 30 can be simultaneously arranged in the closed position for an indeterminate amount of time to allow bus coupling applications. In some embodiments, the ATS 10 is suitable for a ring bus topology 48. The ring bus topology 48 shown includes six reverse flow ATSs 10a-10f. In some embodiments, the ring bus topology may include more than six ATSs 10 or less than six ATSs 10. In the ring bus topology 48, each ATS 10 replaces two circuit breakers typically used in the ring bus topology. The reduction in components provided by the reverse flow ATS 10 allows for reduced space requirements, thereby allowing the system to be used in a smaller space. In addition, the ATS 10 reduces the complexity of the system and the cost of the system. In some embodiments, the cost of one ATS 10 is between about half and about one third of the cost of two installed circuit breakers. In addition, circuit breakers are typically used with programmable logic controllers, which greatly increases the cost of the system.

[0027] The ring bus topology 48 includes a first power source in the form of a first generator set 34 connected to the first ATS 10a, a second power source in the form of a second generator set 50 connected to the second ATS 10b, a third power source in the form of a solar array 54 connected to the third ATS 10c, a fourth power source in the form of a battery pack 58 connected to the fourth ATS 10d, a fifth power source in the form of a wind turbine 62 connected to the fifth ATS 10e, and a sixth power source in the form of a grid 66 connected to the sixth ATS 10f. The ring bus topology 48 also includes a first load 70 connected between the first ATS 10a and the second ATS 10b, a second load 74 connected between the second ATS 10b and the third ATS 10c, a third load 78 connected between the third ATS 10c and the fourth ATS 10d, a fourth load 82 connected between the fourth ATS 10d and the fifth ATS 10e, a fifth load 86 connected between the fifth ATS 10e and the sixth ATS 10f, and a sixth load 90 connected between the sixth ATS 10f and the first ATS 10a. The controller 46 provides communication between the power sources 34, 50, 54, 58, 62, 66, the ATSs 10a-10f, and the loads 70, 74, 78, 82, 86, 90 via the communication network 44. Note that in some embodiments, one or more loads 70 , 74 , 78 , 82 , 86 , 90 may be coupled to the ring bus topology 48 via the ATS 10 to enable additional control and isolation capabilities.

[0028] The communication network 44 allows the ring bus topology 48 to reliably detect faults in system components, isolate single or multiple components, and / or control the self-healing of the power ring. Figure 3 , the controller 46 has determined a fault in the second load 74. In response, the controller 46 actuates the second switch 30 of the second ATS 10b and the first switch 26 of the third ATS 10c so that the second load 74 is isolated and can be repaired. It should be noted that the ATS 10a-10f also allows the power sources 34, 50, 54, 58, 62, 66 to be isolated for maintenance or to respond to a fault condition.

[0029] The use of the reverse flow ATS 10 provides scalable opportunities from single generator set applications to complex multi-source ring bus applications. The integration of the ATS 10 with a high-speed peer-to-peer communication network architecture and power monitoring provides a self-healing communication network and power bus with granularity in fault isolation for a low-cost, reliable power generation system.

[0030] In one configuration, the controller 46 is embodied as a machine or computer readable medium that can be executed by a processor. As described herein and in other uses, the machine readable medium helps to perform certain operations to achieve the reception and transmission of data. For example, the machine readable medium can provide instructions (e.g., commands, etc.) to, for example, collect data. In this regard, the machine readable medium can include programmable logic that defines the frequency of data acquisition (or data transmission). The computer readable medium can include code that can be written in any programming language, including but not limited to Java, etc. and any traditional procedural programming language, such as "C" programming language or similar programming language. The computer readable program code can be executed on a processor or multiple remote processors. In the latter case, the remote processors can be interconnected through any type of network (e.g., CAN bus, etc.).

[0031] In another configuration, the controller is embodied as a hardware unit, such as an electronic control unit. Thus, the controller 46 may be embodied as one or more circuit components, including but not limited to processing circuits, network interfaces, peripherals, input devices, output devices, sensors, etc. In some embodiments, the controller 46 may take the form of one or more analog circuits, electronic circuits (e.g., integrated circuits (ICs), discrete circuits, system-on-chip (SOC) circuits, microcontrollers, etc.), telecommunications circuits, hybrid circuits, and any other type of "circuit". In this regard, the controller 46 may include any type of component for completing or facilitating the implementation of the operations described herein. For example, the circuits described herein may include one or more transistors, logic gates (e.g., NAND, AND, NOR, OR, XOR, NOT, XNOR, etc.), resistors, multiplexers, registers, capacitors, inductors, diodes, wires, etc. The controller 46 may also include programmable hardware devices, such as field programmable gate arrays, programmable array logic, programmable logic devices, etc. The controller 46 may include one or more memory devices for storing instructions that can be executed by a processor of the controller 46. In some hardware unit configurations, the controller 46 may be geographically dispersed in different locations. Alternatively, the controller 46 may be contained in or within a single unit / housing.

[0032] In the example shown, the controller includes a processing circuit having a processor and a memory device. The processing circuit can be constructed or configured to execute or implement the instructions, commands and / or control processes described herein with respect to the controller 46. The depicted configuration represents the controller 46 as a machine or computer readable medium. However, as described above, this diagram is not meant to be limiting, because the present disclosure contemplates other embodiments in which the controller 46 or at least one circuit of the controller 46 is configured as a hardware unit. All such combinations and variations are intended to fall within the scope of the present disclosure.

[0033] The processor may be implemented as one or more general purpose processors, application specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), digital signal processors (DSPs), a group of processing components or other suitable electronic processing components. In some embodiments, one or more processors may be shared by multiple circuits (e.g., the controller 46 may include or otherwise share the same processor, which in some example embodiments may execute instructions stored or otherwise accessed via different areas of the memory). Alternatively or additionally, one or more processors may be configured to implement or otherwise perform certain operations independently of one or more coprocessors. In other example embodiments, two or more processors may be coupled via a bus to implement independent, parallel, pipelined or multithreaded instruction execution. All such variations are intended to fall within the scope of the present disclosure. Memory devices (e.g., RAM, ROM, flash memory, hard disk storage, etc.) may store data and / or computer code for facilitating the various processes described herein. The memory device may be communicatively connected to the processor to provide computer code or instructions to the processor for performing at least some of the processes described herein. In addition, the memory device may be or include a tangible, non-transient volatile memory or a non-volatile memory. Thus, the memory devices may include database components, object code components, script components, or any other type of information structures for supporting the various activities and information structures described herein.

[0034] As described above, in one configuration, a "circuit" may be implemented in a machine-readable medium for use by various types of processors (e.g., Figure 3 Controller 46) is executed. For example, the identification circuit of the executable code may include one or more physical or logical computer instruction blocks, which can, for example, be organized as objects, processes or functions. However, the executable code (executables) of the identification circuit is not necessarily physically located together, but may include completely different instructions stored in different locations, which, when logically joined together, include the circuit and achieve the purpose of the circuit. In fact, the circuit of the computer readable program code can be a single instruction or many instructions, and can even be distributed on several different code segments, distributed in different programs, and distributed on several memory devices. Similarly, operating data can be identified and described in the circuit herein, and can be embodied in any suitable form and organized in any suitable type of data structure. The operating data can be collected as a single data set, or can be distributed in different locations, including on different storage devices, and can exist at least partially only as an electronic signal on a system or network.

[0035] No claim element herein is to be construed under the terms of 35 USC §112(f) unless the element is expressly recited using the phrase "means for."

[0036] As used herein, the terms "approximately," "about," "substantially," and similar terms are intended to have a broad meaning consistent with the ordinary, accepted usage by those of ordinary skill in the art to which the subject matter of the present disclosure belongs. Those of ordinary skill in the art who review the present disclosure should understand that these terms are intended to allow for a description of certain features described and claimed without limiting the scope of those features to the precise numerical ranges provided. Accordingly, these terms should be interpreted as indicating that insubstantial or inconsequential modifications or alterations of the subject matter described and claimed are considered to be within the scope of the present disclosure as set forth in the appended claims.

[0037] It should be noted that the term "exemplary" and variations thereof as used herein to describe various embodiments are intended to indicate that such embodiments are possible examples, representations or illustrations of possible embodiments (and such terms are not intended to imply that such embodiments are necessarily unusual or best examples).

[0038] As used herein, the term "coupling" and its variants mean the direct or indirect joining of two components to each other. Such joining can be static (e.g., permanent or fixed) or movable (e.g., removable or releasable). Such joining can be achieved by direct coupling of two components to each other, wherein two components coupled to each other use a separate insertion component and any additional intermediate components coupled to each other, or wherein two components coupled to each other use an insertion component, which is integrally formed as a single unitary body with one of the two components. If "coupling" or its variants are modified by additional terms (e.g., direct coupling), the general definition of "coupling" provided above is modified by the simple language meaning of the additional terms (e.g., "direct coupling" refers to the joining of two components without any separate insertion components), resulting in a narrower definition than the general definition of "coupling" provided above. Such coupling can be mechanical, electrical, or fluid. For example, circuit A is communicatively "coupled" to circuit B, which can mean that circuit A communicates directly with circuit B (i.e., without an intermediary), or communicates indirectly with circuit B (e.g., through one or more intermediaries).

[0039] As used herein, the term "or" is used in its inclusive sense (and not its exclusive sense), such that, for example, when used to relate a list of elements, the term "or" refers to one, some, or all of the elements in the list. Unless otherwise specifically stated, conjunction language such as the phrase "at least one of X, Y, and Z" is understood to mean that the element can be X, Y, Z; X and Y; X and Z; Y and Z; or X, Y, and Z (i.e., any combination of X, Y, and Z). Therefore, unless otherwise indicated, such conjunction language is generally not intended to imply that certain embodiments require that at least one X, at least one Y, and at least one Z are each present.

[0040] References herein to element positions (e.g., "top," "bottom," "above," "below") are only used to describe the orientation of the various elements in the drawings. It should be noted that the orientation of different elements may be different according to other exemplary embodiments, and such variations are intended to be covered by the present disclosure.

[0041] The hardware and data processing components for implementing the various processes, operations, illustrative logic, logic blocks, modules and circuits described in conjunction with the embodiments disclosed herein may be implemented or implemented with a general purpose single-chip or multi-chip processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration. In some embodiments, specific processes and methods may be performed by circuits specific to a given function. A memory (e.g., a memory, a memory unit, a storage device) may include one or more devices (e.g., RAM, ROM, flash memory, hard disk storage) for storing data and / or computer code to complete or facilitate the various processes, layers and modules described in this disclosure. The memory may be or may include volatile memory or non-volatile memory, and may include a database component, an object code component, a script component, or any other type of information structure for supporting the various activities and information structures described in the present disclosure. According to an exemplary embodiment, the memory is communicatively connected to the processor via a processing circuit and includes computer code for executing (e.g., by a processing circuit or a processor) one or more processes described herein.

[0042] The present disclosure contemplates methods, systems, and program products on any machine-readable medium for completing each operation. The embodiments of the present disclosure can be implemented using an existing computer processor, or a dedicated computer processor of an appropriate system introduced for this purpose or other purposes, or a hard-wired system. Embodiments within the scope of the present disclosure include program products, which include machine-readable media for carrying or having machine-executable instructions or data structures stored thereon. Such machine-readable media can be any available medium that can be accessed by a general-purpose computer or a special-purpose computer or other machine with a processor. For example, such machine-readable media can include RAM, ROM, EPROM, EEPROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or other any other media that can be used to carry or store the required program code in the form of machine-executable instructions or data structures and can be accessed by a general-purpose computer or a special-purpose computer or other machine with a processor. The above combination is also included in the scope of machine-readable media. Machine-executable instructions include, for example, instructions and data, which enable a general-purpose computer, a special-purpose computer, or a special-purpose processing machine to perform a certain function or a group of functions.

[0043] Although the drawings and description may illustrate a particular order of method steps, the order of these steps may be different from that depicted and described, unless otherwise indicated above. In addition, two or more steps may be performed simultaneously or partially simultaneously, unless otherwise indicated above. Such variations may depend, for example, on selected software systems and hardware systems and on designer selection. All of these variations are within the scope of the present disclosure. Likewise, software implementations of the method may be accomplished with standard programming techniques with rule-based logic and other logic to accomplish the various connection steps, processing steps, comparison steps, and determination steps.

[0044] It is important to note that the construction and arrangement of the ATS 10 and other systems shown in the various exemplary embodiments are illustrative only. In addition, any element disclosed in one embodiment may be combined or used with any other embodiment disclosed herein.

[0045] Aspects of the present disclosure may be implemented in one or more of the following embodiments:

[0046] 1) A method comprising:

[0047] coupling the source of the automatic transfer switch to the power source;

[0048] coupling the first load electrode to the first load;

[0049] coupling the second load electrode to the second load;

[0050] selectively closing a first switch to couple the first load electrode to the source electrode; and

[0051] A second switch is selectively closed to couple the second load to the source.

[0052] 2) The method according to 1), further comprising communicating with the power source, the first load and the second load via a controller; and

[0053] A fault is determined in one of the power source, the first load, and the second load.

[0054] 3) The method according to 2), further comprising controlling actuation of the first switch and the second switch via the controller in response to an operating characteristic of at least one of the power source, the first load, and the second load.

[0055] 4) The method according to 2) further includes controlling, via the controller, the first switch to actuate to a closed position for supplying power to the first load, and simultaneously controlling the second switch to actuate to a closed position for supplying power to the second load.

[0056] 5) The method according to 2) further comprises determining, via the controller, that the power supply has been overloaded;

[0057] determining a lowest priority load from among the first load and the second load; and

[0058] A switch associated with the lowest priority load is controlled via the controller to actuate to an open position such that power is not supplied to the lowest priority load.

[0059] 6) The method according to 1), further comprising closing the first switch and the second switch to supply power to the first load and the second load simultaneously.

[0060] 7) The method according to 1) further includes providing a plurality of automatic transfer switches arranged in a ring bus topology to a plurality of power sources and a plurality of loads.

[0061] 8) The method according to 1), wherein the automatic transfer switch is a first automatic transfer switch; and

[0062] The method also includes coupling a second source of a second automatic transfer switch to a first load of the first automatic transfer switch.

[0063] 9) A ring bus topology, comprising:

[0064] A first automatic transfer switch, wherein the first automatic transfer switch comprises:

[0065] a first source configured to receive power from a first power source,

[0066] a first load electrode, the first load electrode being configured to supply power to a first load,

[0067] a second load electrode, the second load electrode being configured to supply power to a second load,

[0068] a first switch movable between an open position isolating the first load electrode from the first source electrode and a closed position connecting the first load electrode to the first source electrode, and

[0069] a second switch movable between an open position isolating the second load electrode from the first source electrode and a closed position connecting the second load electrode to the first source electrode, and

[0070] A second automatic transfer switch, wherein the second automatic transfer switch comprises:

[0071] a second source configured to receive power from a second power source,

[0072] a third load electrode, the third load electrode being configured to supply power to the second load,

[0073] a fourth load electrode, the fourth load electrode being configured to supply power to the first load,

[0074] a third switch movable between an open position isolating the third load electrode from the second source electrode and a closed position connecting the third load electrode to the second source electrode, and

[0075] a fourth switch movable between an open position isolating the fourth load electrode from the second source electrode and a closed position connecting the fourth load electrode to the second source electrode,

[0076] The second load electrode is coupled to the third load electrode, and the first load electrode is coupled to the fourth load electrode.

[0077] 10) The ring bus topology according to 9), wherein the first switch, the second switch, the third switch and the fourth switch are all arranged in a closed position to supply power to the first load and the second load simultaneously.

[0078] 11) The ring bus topology according to 9), further comprising a control system that provides communication between the first automatic transfer switch and the second automatic transfer switch.

[0079] 12) A ring bus topology according to 11), wherein the control system is configured to determine a fault in the first load, and in response to determining the fault, actuate the first switch and the fourth switch to an open position to isolate the first load.

[0080] 13) The ring bus topology of 11), wherein the control system is configured to determine that an overload condition has occurred and identify the first load as a lowest priority load, and

[0081] The control system controls actuation of the first switch and the fourth switch to isolate the first load.

[0082] 14) A ring bus topology according to 11), wherein the control system includes a first controller associated with the first power supply, a second controller associated with the first automatic transfer switch, a third controller associated with the second power supply, and a fourth controller associated with the second automatic transfer switch.

[0083] 15) The ring bus topology according to 11), wherein the control system comprises a high-speed peer-to-peer network.

[0084] 16) A ring bus topology, comprising:

[0085] A plurality of reverse flow automatic transfer switches, each reverse flow automatic transfer switch comprising:

[0086] Source,

[0087] The first load terminal,

[0088] The second load terminal,

[0089] a first switch that selectively couples the first load electrode to the source electrode, and

[0090] a second switch that selectively couples the second load electrode to the source electrode,

[0091] wherein each source is configured to be coupled to one of a plurality of power sources,

[0092] wherein each first load terminal is connected to a second load terminal of an adjacent reverse current automatic transfer switch, and

[0093] The first load electrode and the second load electrode are configured to be coupled to a plurality of loads.

[0094] 17) The ring bus topology according to 16), wherein the plurality of first switches and the plurality of second switches are configured to be maintained in a closed position to simultaneously supply power to the plurality of loads.

[0095] 18) The ring bus topology according to 16), wherein the plurality of reverse flow automatic transfer switches include six reverse flow automatic transfer switches.

[0096] 19) The ring bus topology according to 16) further includes a control system that provides communication between the plurality of reverse flow automatic transfer switches.

[0097] 20) A ring bus topology according to 19), wherein the control system is configured to determine a fault in one of the loads, and in response to determining the fault, actuate the first switch and the second switch adjacent to the fault to isolate the first load.

[0098] 21) A ring bus topology according to 19), wherein the control system includes a high-speed peer-to-peer network.

Claims

1. A method comprising: coupling a first source electrode of a first reverse current automatic transfer switch to a first power source; coupling a first load pole of the first reverse current automatic transfer switch to a first load; coupling the second load pole of the first reverse current automatic transfer switch to a second load; selectively closing a first switch of the first reverse current automatic transfer switch to couple the first load electrode to the first source electrode; selectively closing a second switch of the first reverse current automatic transfer switch to couple the second load electrode to the first source electrode; coupling a second source electrode of the second reverse current automatic transfer switch to a second power source; coupling the third load pole of the second reverse flow automatic transfer switch with the second load pole of the first reverse flow automatic transfer switch and the second load; as well as A fourth load terminal of the second reverse flow automatic transfer switch is coupled to the first load terminal of the first reverse flow automatic transfer switch and the first load to provide a ring bus topology.

2. The method of claim 1 , further comprising communicating with the first power source, the first load, and the second load via a controller; and A fault is determined in one of the first power source, the first load, and the second load. 3 . The method of claim 2 , further comprising controlling, via the controller, actuation of the first switch and the second switch in response to an operating characteristic of at least one of the first power source, the first load, and the second load. 4 . The method of claim 2 , further comprising controlling, via the controller, the first switch to actuate to a closed position for supplying power to the first load, and simultaneously controlling the second switch to actuate to a closed position for supplying power to the second load.

5. The method of claim 2, further comprising determining, via the controller, that the first power supply has experienced an overload condition; determining a lowest priority load from among the first load and the second load; and A switch associated with the lowest priority load is controlled via the controller to actuate to an open position such that power is not supplied to the lowest priority load. 6 . The method of claim 1 , further comprising closing the first switch and the second switch to simultaneously supply power to the first load and the second load.

7. The method of claim 1, further comprising providing a plurality of reverse flow automatic transfer switches arranged in a ring bus topology to the plurality of power sources and the plurality of loads.

8. A ring bus topology, comprising: A first reverse flow automatic transfer switch, wherein the first reverse flow automatic transfer switch comprises: a first source configured to receive power from a first power source, a first load electrode configured to supply power to a first load, and A second load electrode, the second load electrode is configured to supply power to a second load; and A second reverse flow automatic transfer switch, wherein the second reverse flow automatic transfer switch comprises: a second source configured to receive power from a second power source, a third load electrode configured to be coupled to the second load electrode of the first reverse current automatic transfer switch and the second load, A fourth load electrode is configured to be coupled to the first load electrode of the first reverse current automatic transfer switch and the first load.

9. The ring bus topology according to claim 8, wherein: The first reverse flow automatic transfer switch also includes: a first switch movable between an open position isolating the first load electrode from the first source electrode and a closed position connecting the first load electrode to the first source electrode; and a second switch movable between an open position isolating the second load electrode from the first source electrode and a closed position connecting the second load electrode to the first source electrode; Wherein, the second reverse flow automatic transfer switch further comprises: a third switch movable between an open position isolating the third load electrode from the second source electrode and a closed position connecting the third load electrode to the second source electrode; and a fourth switch movable between an open position isolating the fourth load electrode from the second source electrode and a closed position connecting the fourth load electrode to the second source electrode; and The first switch, the second switch, the third switch and the fourth switch are all arranged in a closed position to supply power to the first load and the second load simultaneously.

10. The ring bus topology of claim 9, further comprising a control system providing communications between the first reverse flow automatic transfer switch and the second reverse flow automatic transfer switch.

11. The ring bus topology according to claim 10, wherein: The control system is configured to determine a fault in the first load and, in response to determining the fault, actuate the first switch and the fourth switch to an open position to isolate the first load.

12. The ring bus topology according to claim 10, wherein: The control system is configured to determine that an overload condition has occurred and identify the first load as a lowest priority load, and The control system controls actuation of the first switch and the fourth switch to isolate the first load.

13. The ring bus topology according to claim 10, wherein: The control system includes a first controller associated with the first power source, a second controller associated with the first reverse flow automatic transfer switch, a third controller associated with the second power source, and a fourth controller associated with the second reverse flow automatic transfer switch.

14. The ring bus topology according to claim 10, wherein: The control system includes a high-speed peer-to-peer network.

15. A ring bus topology, comprising: A plurality of reverse flow automatic transfer switches, each reverse flow automatic transfer switch comprising: Source, The first load terminal, and The second load terminal, wherein each source is configured to be coupled to one of a plurality of power sources, Each first load electrode is connected to a second load electrode of an adjacent reverse flow automatic transfer switch, so that the plurality of reverse flow automatic transfer switches form the ring bus topology.

16. The ring bus topology according to claim 15, wherein: Each of the plurality of reverse flow automatic transfer switches further comprises: a first switch that selectively couples the first load electrode to the source electrode; and a second switch selectively coupling the second load electrode to the source electrode; wherein the first load electrode and the second load electrode are configured to be coupled to a plurality of loads; and The plurality of first switches and the plurality of second switches are configured to be maintained in a closed position to supply power to the plurality of loads simultaneously.

17. The ring bus topology according to claim 15, wherein: The plurality of reverse flow automatic transfer switches include six reverse flow automatic transfer switches.

18. The ring bus topology of claim 16, further comprising a control system providing communications between the plurality of reverse flow automatic transfer switches.

19. The ring bus topology according to claim 18, wherein: The control system is configured to determine a fault in one of the plurality of loads and, in response to determining the fault, actuate the first switch and the second switch adjacent to the fault to isolate the faulty load.

20. The ring bus topology according to claim 18, wherein: The control system includes a high-speed peer-to-peer network.

Images