Wiring circuit substrate and method for manufacturing the same

Abstract

A wiring circuit substrate (1) has, in order toward a thickness direction side, a base insulating layer (2), a conductor layer (3), and a metal protective film (4). The conductor layer (3) has a signal wiring (7) that transmits a signal, and a terminal (9) continuous with the signal wiring (7). The signal wiring (7) has one face (10) in the thickness direction, and a first face (11) and a second face (12) continuous with the one face (10) and disposed opposite each other in a width direction. The terminal (9) has one face (19) in the thickness direction, and another face (20) disposed opposite the one face (19) with a space in the thickness direction. The another face (20) of the terminal (9) is exposed from the base insulating layer (2) toward the other side in the thickness direction. The metal protective film (4) covers the one face (10) of the signal wiring (7), and does not cover both the first face (11) and the second face (12). The metal protective film (4) covers the one face (19) of the terminal (9).

Description

TECHNICAL FIELD

[0001] The present application relates to a wiring circuit substrate and a manufacturing method thereof. BACKGROUND

[0002] A wiring circuit substrate sequentially having a base insulating layer, a conductor layer including copper, a metal thin film including nickel, and a cover insulating layer toward an upper side is known (for example, refer to Patent Literature 1). In the wiring circuit substrate, the conductor layer has a terminal and a plurality of signal wirings.

[0003] In the manufacturing method of the wiring circuit substrate, first, a seed film (base) is formed on a surface of the base insulating layer, then, a plating resist layer is formed on a surface of the seed film in a pattern complementary to the conductor layer, then, the conductor layer is formed by electrolytic plating supplied from the seed film, then, the plating resist layer is removed, and a portion of the seed film exposed from the conductor layer is soft-etched. Then, the metal thin film is formed on a surface of the conductor layer by chemical plating, and then, the cover insulating layer is formed so as to cover the metal thin film. At this time, the cover insulating layer is formed so as to expose the metal thin film corresponding to the terminal by optical processing. Then, the metal thin film corresponding to the terminal is removed by etching or the like so as to expose a surface of the terminal.

[0004] PRIOR ART DOCUMENTS

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Laid-Open No. 2008-218728 SUMMARY

[0007] Problem to be solved by the invention

[0008] In recent years, thinning of the wiring circuit substrate is required, and specifically, a wiring circuit substrate having a thinner conductor layer is required.

[0009] However, in the wiring circuit substrate described in Patent Literature 1, when the metal thin film corresponding to the terminal is removed, the terminal is easily damaged due to the thinness. Thus, there is a problem that connection reliability of the terminal is decreased.

[0010] In addition, in recent years, in order to cope with an increase in demand for communication devices using high frequencies, a high-frequency current is sometimes caused to flow through the signal wiring, and in this case, in the signal wiring whose surface is covered with the above-described metal protective layer, skin effect (a phenomenon that current flows only through a surface layer of the signal wiring and does not flow into the inside) is remarkably increased. Thus, there is a problem that loss of a high-frequency signal in the signal wiring is large.

[0011] Also, in the manufacturing method of the wiring circuit substrate, when the seed film is soft-etched, if the surfaces of the plurality of thin signal wirings are accidentally removed, and as a result, are further thinned to a degree that affects the transmission reliability of the plurality of signal wirings, there is a problem that the transmission reliability of the plurality of signal wirings is degraded.

[0012] The present application provides a wiring circuit substrate in which the connection reliability of a terminal is excellent and in which the loss of current in a signal wiring is suppressed, and a manufacturing method of a wiring circuit substrate in which the transmission reliability of a signal wiring and a second signal wiring and the connection reliability of a terminal are excellent and in which the loss of current in the signal wiring and the second signal wiring is suppressed.

[0013] Solution for solving the problem

[0014] The present application (1) includes a wiring circuit substrate having, in order toward one side in a thickness direction, an insulating layer, a conductor layer, and a metal protective film, the conductor layer having: a signal wiring for transmitting a signal; and a terminal continuous with the signal wiring, the signal wiring having: one face in the thickness direction; and a first face and a second face continuous with the one face and disposed opposite each other in a direction orthogonal to a transmission direction of the signal and the thickness direction, the terminal having: one face in the thickness direction; and another face disposed opposite the one face with a space in the thickness direction on the other side, the other face of the terminal exposed from the insulating layer toward the other side in the thickness direction, the metal protective film covering the one face of the signal wiring without covering both the first face and the second face, or the metal protective film covering the one face of the signal wiring and either the first face or the second face without covering the other of the first face and the second face, the metal protective film covering the one face of the terminal.

[0015] In the wiring circuit substrate, the other face of the terminal is exposed from the insulating layer toward the other side in the thickness direction, so it is not necessary to remove the metal thin film corresponding to the terminal to expose the one face of the terminal from the insulating layer toward one side, and thus damage to the terminal can be prevented. Therefore, in the wiring circuit substrate, the connection reliability of the terminal is excellent. As a result, the terminal can be electrically connected to an electronic component disposed on the other side of the terminal with excellent reliability.

[0016] In addition, in the wiring circuit substrate, the metal protective film does not cover both the first face and the second face of the signal wiring, or the metal protective film does not cover either the first face or the second face. Therefore, the skin effect in the signal wiring can be suppressed. As a result, the loss of a high-frequency signal in the signal wiring can be reduced.

[0017] The invention (2) includes the wiring circuit substrate of (1), wherein the conductor layer further has a second signal wiring adjacent to the signal wiring in the orthogonal direction, the second signal wiring has: one face in the thickness direction; a third face continuous with the one face, facing the first face; and a fourth face continuous with the one face, located on the side opposite to the side where the first face is located with respect to the third face, the metal protective film covers the one face of the second signal wiring without covering both the third face and the fourth face, or the metal protective film covers the one face of the second signal wiring and either one of the third face and the fourth face without covering the other one of the third face and the fourth face.

[0018] In a case where the conductor layer has the signal wiring and the second signal wiring adjacent to each other, magnetic fields generated from the signal wiring and the second signal wiring respectively cause unevenness (deviation) in current density of the signal wiring and the second signal wiring, and sometimes, due to an adjacent effect in which a resistance increases based on the unevenness, a loss of a high-frequency signal in each of the signal wiring and the second signal wiring is large.

[0019] However, in the wiring circuit substrate, the metal protective film does not cover both the third face and the fourth face of the second signal wiring, or the metal protective film does not cover either one of the third face and the fourth face of the second signal wiring. Therefore, it is possible to suppress the adjacent effect between the signal wiring and the second signal wiring. As a result, it is possible to reduce the loss of the high-frequency signal in each of the signal wiring and the second signal wiring.

[0020] The invention (3) includes the wiring circuit substrate of (2), wherein the metal protective film does not cover the first face, the second face, the third face, and the fourth face.

[0021] Further, in the wiring circuit substrate, since the metal protective film does not cover the first face, the second face, the third face, and the fourth face, it is possible to suppress the skin effect, and it is possible to further suppress the adjacent effect.

[0022] The present application (4) includes a manufacturing method of a wiring circuit substrate, which is the manufacturing method of the wiring circuit substrate described in (3), and has the following steps: disposing the insulating layer having the opening portion penetrating in the thickness direction on one face in the thickness direction of the base material; disposing a seed film on one face in the thickness direction of the insulating layer, an inner peripheral surface of the opening portion in the insulating layer, and one face in the thickness direction of the base material exposed from the opening portion; disposing a plating resist layer on one face in the thickness direction of the seed film in a pattern complementary to the conductor layer; disposing the conductor layer on the one face of the seed film by electrolytic plating with power supplied to the seed film; disposing the metal protective film on the one face of the conductor layer; removing the plating resist layer; and removing the portion of the seed film exposed from the conductor layer by soft etching; and removing the base material.

[0023] According to the manufacturing method of the wiring circuit substrate, even if the seed film is subjected to soft etching, since the metal protective film has been disposed on one face of the signal wiring and the second signal wiring, the metal protective film functions as a mask, and the signal wiring and the second signal wiring can be prevented from being unintentionally thinned. Therefore, the transmission reliability of the signal wiring and the second signal wiring can be prevented from being degraded.

[0024] In addition, according to the manufacturing method of the wiring circuit substrate, the other face of the terminal is exposed from the insulating layer toward the other side in the thickness direction, and thus it is not necessary to remove the metal thin film corresponding to the terminal to expose one face of the terminal from the insulating layer toward one side, and thus the terminal can be prevented from being damaged. Therefore, in the obtained wiring circuit substrate, the connection reliability of the terminal is excellent. As a result, the terminal can be electrically connected to the electronic component disposed on the other side of the terminal with excellent reliability.

[0025] In addition, in the wiring circuit substrate obtained by the manufacturing method of the wiring circuit substrate, the metal protective film does not cover the first face, the second face, the third face, and the fourth face, and thus the skin effect in the signal wiring and the second signal wiring can be suppressed. As a result, the loss of the high-frequency signal in the signal wiring and the second signal wiring can be reduced.

[0026] Effects of the invention

[0027] In the wiring circuit substrate of the present application, the connection reliability of the terminal is excellent, and the loss of the high-frequency signal in the signal wiring can be reduced.

[0028] The manufacturing method of the wiring circuit substrate of the present application can suppress the degradation of the transmission reliability of the signal wiring and the second signal wiring, the connection reliability of the terminal is excellent, and the loss of the high-frequency signal in the signal wiring and the second signal wiring can be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0029] [ Figure 1] Figure 1 This is a cross-sectional view showing one embodiment of the wiring circuit board of the present invention.

[0030] [ Figure 2 ] Figure 2 A~ Figure 2 E is Figure 1 The diagram shows the manufacturing process of the wiring circuit board. Figure 2 A indicates the process of depositing the substrate insulating layer onto the substrate. Figure 2 B indicates the process of preparing the seed film. Figure 2 C indicates the process of configuring the anti-plating coating. Figure 2 D indicates the process of configuring the conductor layer. Figure 2 E indicates the process of applying a metal protective film.

[0031] [ Figure 3 ] Figure 3 F~ Figure 3 I am next Figure 2 E's Figure 1 The diagram shows the manufacturing process of the wiring circuit board. Figure 3 F indicates the process of removing the anti-plating coating. Figure 3 G indicates the process of removing the portion of the seed membrane exposed from the conductor layer. Figure 3 H indicates the process of configuring the covering insulation layer. Figure 3 I indicates the process of removing the substrate.

[0032] [ Figure 4 ] Figure 4 express Figure 1 A cross-sectional view of a modified example of the wiring circuit board shown (without the metal protective film covering the first and third surfaces).

[0033] [ Figure 5 ] Figure 5 express Figure 1 A cross-sectional view of a modified example of the wiring circuit board shown (without the metal protective film covering the second and fourth surfaces).

[0034] [ Figure 6 ] Figure 6 express Figure 1 A cross-sectional view of a modified example of the wiring circuit board shown (where the metal protective film does not cover the first and fourth surfaces).

[0035] [ Figure 7 ] Figure 7 express Figure 1 A cross-sectional view of a modified example of the wiring circuit board shown (the conductor layer does not have a second signal wiring pattern).

[0036] [ Figure 8 ] Figure 8 express Figure 1A cross-sectional view of a modification of the wiring circuit substrate shown (a pattern in which the conductor layer has a signal wiring and a power wiring). DETAILED DESCRIPTION

[0037] Reference Figure 1 to explain an embodiment of the wiring circuit substrate of the present application.

[0038] As Figure 1 shown, the wiring circuit substrate 1 has a substantially plate shape extending in a planar direction, and has one face and another face opposite in a thickness direction. The wiring circuit substrate 1 has, in order toward the thickness direction side, a base insulating layer 2 which is one example of an insulating layer, a conductor layer 3, a metal protective film 4, and a cover insulating layer 18.

[0039] The base insulating layer 2 has the same outer shape as the wiring circuit substrate 1, and specifically, the base insulating layer 2 has one face and another face opposite in the thickness direction. The one face and the another face of the base insulating layer 2 have flat shapes parallel to each other. In addition, the base insulating layer 2 has an opening portion 5 corresponding to a terminal 9 described later. The opening portion 5 is a through hole penetrating in the thickness direction of the base insulating layer 2.

[0040] As a material of the base insulating layer 2, an insulating resin such as a polyimide resin can be given. The thickness of the base insulating layer 2 is the length between the one face and the another face, and is, for example, 1 μm or more, and preferably 5 μm or more, and is, for example, 30 μm or less, and preferably 20 μm or less.

[0041] The conductor layer 3 is disposed on the one face of the base insulating layer 2. The conductor layer 3 has a signal wiring 7, a second signal wiring 8, and a terminal 9.

[0042] The signal wiring 7 is an electric wire transmitting a signal on the thickness direction side of the base insulating layer 2. Specifically, the signal wiring 7 is a differential wiring transmitting a differential signal together with the second signal wiring 8. The signal wiring 7 has a substantially rectangular shape in a cross-sectional view in a width direction (one example of an orthogonal direction) orthogonal to a direction (transmission direction) in which the signal (a high-frequency signal or the like) thereof is transmitted (a paper thickness direction or a direction corresponding to a paper depth direction). Specifically, the signal wiring 7 continuously has one face and another face opposite in the thickness direction, and a first face and a second face opposite in the width direction.

[0043] The one face and the another face of the signal wiring 7 have flat shapes parallel to each other. The another face of the signal wiring 7 is in contact with the one face of the base insulating layer 2. The one face 10 of the signal wiring 7 is spaced apart from the another face in the thickness direction side.

[0044] The first surface 11 and the second surface 12 have flat shapes parallel to each other. The first surface 11 connects a width direction one end edge of the one surface 10 and a width direction one end edge of the other surface. The second surface 12 connects a width direction other end edge of the one surface 10 and a width direction other end edge of the other surface. The second surface 12 is located on a side opposite to a side on which the second signal wiring 8 is located, with respect to the first surface 11.

[0045] A transmission direction one end of the signal wiring 7 is continuous with the terminal 9, and this state is not specifically illustrated in a cross-sectional view. Figure 1

[0046] The second signal wiring 8 is a second differential wiring that transmits a differential signal together with the signal wiring 7. However, the second signal wiring 8 and the signal wiring 7 are independent of each other. The second signal wiring 8 and the signal wiring 7 are adjacent in the width direction. Specifically, the second signal wiring 8 and the signal wiring 7 are arranged adjacent to each other with a space in the width direction. In addition, the second signal wiring 8 has the same cross-sectional shape as the signal wiring 7. Specifically, the second signal wiring 8 continuously has an one surface 13 and an other surface opposite in the thickness direction, and a third surface 14 and a fourth surface 15 opposite in the width direction.

[0047] The one surface 13 and the other surface of the second signal wiring 8 have flat shapes parallel to each other. The other surface of the second signal wiring 8 is in contact with the one surface of the base insulating layer 2. The one surface 13 of the second signal wiring 8 is spaced apart from the other surface on one side in the thickness direction.

[0048] The third surface 14 and the fourth surface 15 of the second signal wiring 8 have flat shapes parallel to each other. The third surface 14 connects a width direction other end edge of the one surface 13 and a width direction other end edge of the other surface. In addition, the third surface 14 faces the first surface 11 of the signal wiring 7. Specifically, the third surface 14 and the first surface 11 are opposite in the width direction with a space therebetween. More specifically, the third surface 14 is arranged close to the first surface 11 with a narrow space therebetween.

[0049] The fourth surface 15 is arranged on a side opposite to a side on which the first surface 11 is located in the width direction, of the third surface 14. The fourth surface 15 connects a width direction one end edge of the one surface 13 and a width direction one end edge of the other surface. In addition, the fourth surface 15 is located on a side opposite to a side on which the signal wiring 7 is located in the width direction, with respect to the third surface 14.

[0050] In addition, the second signal wiring 8 is continuous with a terminal not illustrated.

[0051] ​The terminal 9 is partially or entirely filled in the opening portion 5. The terminal 9 has a substantially cap shape which is open toward the thickness direction side in a cross-sectional view. The terminal 9 integrally has a surface 19 in the thickness direction, another surface 20 which is disposed opposite to the surface 19 with a space in the thickness direction, and a peripheral side surface 24 which connects the peripheral edge of the surface 19 in the thickness direction and the peripheral edge of the another surface 20.

[0052] The surface 19 has a shape in which the central portion in the surface direction is recessed toward the other side in the thickness direction in correspondence with the opening portion 5.

[0053] The central portion of the another surface 20 is exposed from the opening portion 5. Specifically, the central portion of the another surface 20 is exposed toward the other side in the thickness direction from the base insulating layer 2. The central portion of the another surface 20 is flush with the another surface of the base insulating layer 2.

[0054] On the other hand, the peripheral edge of the another surface 20 follows the inner peripheral surface 6 of the opening portion 5, and covers the portion of the surface of the base insulating layer 2 which is in the periphery of the opening portion 5.

[0055] The material of the conductor layer 3 is a metal or an alloy which is easily etched by soft etching described later, and a conductor such as copper can be given as an example.

[0056] The width of the signal wiring 7, the width of the second signal wiring 8, and the interval between the signal wiring 7 and the second signal wiring 8 are, for example, 5 μm or more, preferably 10 μm or more, and, for example, 100 μm or less, preferably 50 μm or less, more preferably 25 μm or less.

[0057] The maximum length in the surface direction of the terminal 9 is, for example, 10 μm or more, preferably 100 μm or more, and, for example, 2500 μm or less, preferably 500 μm or less.

[0058] The thickness of the conductor layer 3 is very thin, and is, for example, 10 μm or less, preferably 5 μm or less, more preferably 3 μm or less, and, for example, 0.1 μm or more, further 0.5 μm or more, more further 1.0 μm or more.

[0059] The metal protective film 4 is a protective film which partially covers the surface of the conductor layer 3 and protects the surface. In this embodiment, the metal protective film 4 covers the surface 10 of the signal wiring 7, the surface 13 of the second signal wiring 8, and the surface 19 of the terminal 9. Specifically, the metal protective film 4 is directly disposed on the surface 10 of the signal wiring 7, the surface 13 of the second signal wiring 8, and the surface 19 of the terminal 9.

[0060] The metal protective film 4 has a film shape which follows the above-mentioned surfaces 10, 13, and 19.

[0061] On the other hand, the metal protective film 4 does not cover both the first face 11 and the second face 12 of the signal wiring 7, both the third face 14 and the fourth face 15 of the second signal wiring 8, and the peripheral side face 24 of the terminal 9, that is, the metal protective film 4 is not disposed on these faces (side faces).

[0062] In addition, the metal protective film 4 is also not disposed on the central portion of the other face 20 of the terminal 9. Also, the metal protective film 4 is not disposed on the face (contact face) of the conductor layer 3 that contacts the base insulating layer 2.

[0063] The material of the metal protective film 4 is a metal or an alloy that is not easily etched by the soft etching described later, and examples that can be given include nickel, nickel alloys, and the like, with nickel and the like being preferable.

[0064] The thickness of the metal protective film 4 is, for example, 0.03 μm or more, preferably 0.1 μm or more, and is, for example, 2 μm or less, preferably 0.5 μm or less.

[0065] The covering insulating layer 18, which is indicated by the imaginary line, is disposed on one face in the thickness direction of the base insulating layer 2 in a manner so as to cover the conductor layer 3 and the metal protective film 4. Specifically, the covering insulating layer 18 covers the first face 11 and the second face 12 of the signal wiring 7, the third face 14 and the fourth face 15 of the second signal wiring 8, and the peripheral side face 24 of the terminal 9. In addition, the covering insulating layer 18 covers one face and the peripheral side face of the metal protective film 4. Also, the covering insulating layer 18 covers one face of the base insulating layer 2 in the thickness direction that is exposed from the conductor layer 3. The material of the covering insulating layer 18 is the same as the material of the base insulating layer 2. The thickness of the covering insulating layer 18 is, for example, 1 μm or more and 30 μm or less.

[0066] The thickness of the wiring circuit substrate 1 is the total thickness of the base insulating layer 2, the conductor layer 3, the metal protective film 4, and the covering insulating layer 18, and is, for example, 70 μm or less, preferably 60 μm or less, more preferably 50 μm or less, and is, for example, 5 μm or more.

[0067] Next, the manufacturing method of the wiring circuit substrate 1 will be described with reference to Figure 2 A ~ Figure 3 H.

[0068] As shown in Figure 2 A, the method disposes the base insulating layer 2 on one face in the thickness direction of the base material 21.

[0069] The base material 21 has a substantially sheet shape that extends in the face direction. The base material 21 supports each member of the wiring circuit substrate 1 during the manufacturing process of the wiring circuit substrate 1, and is removed after the wiring circuit substrate 1 is manufactured. Therefore, as shown in Figure 1 and Figure 3 I, the base material 21 is not contained in the wiring circuit substrate 1 after it is manufactured.

[0070] As the material of the substrate 21, there is no particular limitation, and for example, a metal such as stainless steel, for example, a resin, and the like can be given, and from the viewpoint of mechanical strength, a metal is preferably given. The thickness of the substrate 21 is, for example, 1 μm or more and 1000 μm or less.

[0071] Next, the base insulating layer 2 having the opening portion 5 is formed on one face in the thickness direction of the substrate 21, for example, by photolithography. Specifically, a varnish of a photosensitive insulating resin is applied to one face of the substrate 21, and then, the base insulating layer 2 having the opening portion 5 is formed by exposure and development. Alternatively, the base insulating layer 2 having the opening portion 5 formed in advance can be disposed on one face in the thickness direction of the substrate 21.

[0072] As shown in FIG. 1A, in this method, next, the seed film 22 is disposed on one face in the thickness direction of the base insulating layer 2, the inner peripheral surface 6 of the opening portion 5 in the base insulating layer 2, and one face in the thickness direction of the substrate 21 exposed from the opening portion 5. Figure 2 As the method of disposing the seed film 22 on each of the above-mentioned faces, for example, a thin film forming method such as evaporation, sputtering, ion plating, plating, and the like can be given. Sputtering is preferably given.

[0073] The seed film 22 is continuously formed on each of the above-mentioned faces.

[0074] As shown in FIG. 1C, in this method, next, the anti-plating layer 23 is disposed on one face in the thickness direction of the seed film 22 in a pattern complementary to the conductor layer 3.

[0075] Figure 2 For example, the anti-plating layer 23 is formed by photolithography in the above-mentioned pattern. Specifically, a dry film resist (not shown) is disposed on the entire one face of the seed film 22, and then, the anti-plating layer 23 is formed in the above-mentioned pattern using exposure and development.

[0076] As shown in FIG. 1D, in this method, next, the conductor layer 3 is disposed on one face of the seed film 22 by electrolytic plating in which power is supplied to the seed film 22.

[0077] As shown in FIG. 1E, in this method, next, the metal protective film 4 is disposed on one face of the conductor layer 3. Figure 2 Specifically, the substrate 21, the base insulating layer 2, the seed film 22, and the anti-plating layer 23 are immersed in an electrolytic plating solution, and then, power is supplied to the seed film 22, and a material (conductor) of the conductor layer 3 is deposited on one face of the seed film 22. Thus, the conductor layer 3 is formed in a pattern complementary to the anti-plating layer 23.

[0078] As shown in FIG. 1E, in this method, next, the metal protective film 4 is disposed on one face of the conductor layer 3.

[0079] Figure 2 Specifically, the substrate 21, the base insulating layer 2, the seed film 22, and the anti-plating layer 23 are immersed in an electrolytic plating solution, and then, power is supplied to the seed film 22, and a material (conductor) of the conductor layer 3 is deposited on one face of the seed film 22. Thus, the conductor layer 3 is formed in a pattern complementary to the anti-plating layer 23.

[0080] ​​For example, the metal protective film 4 is formed by a thin film forming method such as plating (electrolytic plating, chemical plating). It is preferable that the metal protective film 4 be formed on the one face 10 of the signal wiring 7, the one face 13 of the second signal wiring 8, and the one face 19 of the terminal 9 by chemical plating.

[0081] Thus, the metal protective film 4 is formed on the one face of the conductor layer 3 exposed from the plating resist layer 23.

[0082] Further, in the above-described thin film forming method, the first face 11 and the second face 12 of the signal wiring 7, the third face 14 and the fourth face 15 of the second signal wiring 8, and the peripheral side face 24 of the terminal 9 are not formed with the metal protective film 4 due to the masking effect of the plating resist layer 23.

[0083] Further, in the above-described thin film forming method, the first face 11 and the second face 12 of the signal wiring 7, the third face 14 and the fourth face 15 of the second signal wiring 8, and the peripheral side face 24 of the terminal 9 are not formed with the metal protective film 4 due to the masking effect of the plating resist layer 23.

[0084] As shown in Figs. 6A and 6B, the plating resist layer 23 is then removed. Further, in the case where the metal protective film 4 is formed on the one face of the plating resist layer 23 (see the dotted line), the plating resist layer 23 is removed together with the above-described metal protective film 4. Figure 3 F, the plating resist layer 23 is then removed. Further, in the case where the metal protective film 4 is formed on the one face of the plating resist layer 23 (see the dotted line), the plating resist layer 23 is removed together with the above-described metal protective film 4.

[0085] Thus, the seed film 22 corresponding to the plating resist layer 23 is exposed from the conductor layer 3.

[0086] As shown in Figs. 6A and 6B, the plating resist layer 23 is then removed. Further, in the case where the metal protective film 4 is formed on the one face of the plating resist layer 23 (see the dotted line), the plating resist layer 23 is removed together with the above-described metal protective film 4. Figure 3 G, the exposed portion of the seed film 22 from the conductor layer 3 is then removed by soft etching.

[0087] In the soft etching, conditions (etching solution, time, temperature, etc.) that dissolve the exposed portion of the seed film 22 from the conductor layer 3 are selected.

[0088] On the other hand, the seed film 22 sandwiched by the base insulating layer 2 and the conductor layer 3 in the thickness direction is not actually dissolved.

[0089] However, in this soft etching, slight etching (retreating toward the center in the width direction) occurs in the first face 11 and the second face 12 of the signal wiring 7, the third face 14 and the fourth face 15 of the second signal wiring 8, and the peripheral side face 24 of the terminal 9.

[0090] Further, in this soft etching, etching (etching toward the other side in the thickness direction, hereinafter the same) of the one face 10 of the signal wiring 7, etching of the one face 13 of the second signal wiring 8, and etching of the one face 19 of the terminal 9 are suppressed due to the masking effect of the metal protective film 4.

[0091] Further, the metal protective film 4 is slightly etched (removed) in the above-described soft etching, and specifically, is etched in an amount smaller than that of the seed film 22.

[0092] As shown in FIG. 1, the base insulating layer 2 is provided on one side of a substrate 21 in the thickness direction thereof. Figure 3 As shown in FIG. 2, the seed film 22 is provided on the other side of the substrate 21 in the thickness direction thereof.

[0093] Then, as shown in FIG. 3, the conductor layer 3 is provided on the other side of the substrate 21 in the thickness direction thereof. Figure 3 I, the substrate 21 is removed.

[0094] Specifically, if the substrate 21 is metal, the substrate 21 is removed using, for example, a peeling agent (peeling liquid or the like). In addition, if the substrate 21 is resin, the substrate 21 is peeled from the other side of the base insulating layer 2.

[0095] Thus, the wiring circuit board 1 having the base insulating layer 2, the seed film 22, the conductor layer 3, the metal protective film 4, and the cover insulating layer 18 is manufactured.

[0096] Further, in the wiring circuit board 1, the boundary of the seed film 22 and the conductor layer 3 is not clear, that is, there is a case where the seed film 22 is contained in the conductor layer 3, in which case, the existence of the seed film 22 cannot be clearly grasped, as explained in Figure 1 The wiring circuit board 1 has the base insulating layer 2, the conductor layer 3, the metal protective film 4, and the cover insulating layer 18.

[0097] Then, the wiring circuit board 1 is electrically connected to the electronic element 25 provided on the other side in the thickness direction thereof. The electronic element 25 is in contact with the central portion of the other side 20 of the terminal 9.

[0098] Further, in the wiring circuit board 1, the central portion of the other side 20 of the terminal 9 is exposed from the base insulating layer 2 toward the other side in the thickness direction, and thus, it is not necessary to remove the metal protective film 4 covering the one side 19 of the terminal 9 to expose the one side 19 of the terminal 9 from the base insulating layer 2 toward the one side, and damage to the thin (for example, 10 μm or less) terminal 9 can be prevented. Therefore, in the wiring circuit board 1, the connection reliability of the terminal 9 is excellent. As a result, the terminal 9 can be electrically connected to the electronic element 25 provided on the other side of the terminal 9 with excellent reliability.

[0099] In addition, in the wiring circuit board 1, the metal protective film 4 does not cover both the first side 11 and the second side 12 of the signal wiring 7. Therefore, the skin effect in the signal wiring 7 can be suppressed. As a result, the loss of a high-frequency signal in the signal wiring 7 can be reduced.

[0100] However, the conductor layer 3 of the wiring circuit board 1 has the signal wiring 7 and the second signal wiring 8 adjacent to each other, and thus, sometimes the loss of a high-frequency signal in each of the signal wiring 7 and the second signal wiring 8 becomes large due to the proximity effect.

[0101] However, in the wiring circuit board 1 of this embodiment, the metal protective film 4 does not cover both the third surface 14 and the fourth surface 15 of the second signal wiring 8. Therefore, the proximity effect between the signal wiring 7 and the second signal wiring 8 can be suppressed. As a result, the loss of high-frequency signals in each of the signal wiring 7 and the second signal wiring 8 can be reduced.

[0102] In addition, in this wiring circuit board 1, the metal protective film 4 does not cover the first surface 11, the second surface 12, the third surface 14 and the fourth surface 15, so it can suppress the skin effect and further suppress the proximity effect.

[0103] Furthermore, according to the manufacturing method of the wiring circuit board 1, such as... Figure 3 As shown in G, even when the seed film 22 is soft-etched, since the metal protective film 4 is disposed on one side 10 of the signal wiring 7 and one side 13 of the second signal wiring 8, the metal protective film 4 acts as a mask, thus preventing the signal wiring 7 and the second signal wiring 8 from becoming unintentionally thinner. Therefore, it is possible to suppress the decrease in the transmission reliability of the signal wiring 7 and the second signal wiring 8.

[0104] Furthermore, according to the manufacturing method of this wiring circuit board 1, since the central portion of the other side 20 of the terminal 9 is exposed from the substrate insulating layer 2 towards the other side in the thickness direction, it is not necessary to remove the metal thin film 4 corresponding to the terminal 9 to expose one side 19 of the terminal 9 from the substrate insulating layer 2, thus preventing damage to the terminal 9. Therefore, in the obtained wiring circuit board 1, the connection reliability of the terminal 9 is excellent. As a result, the terminal 9 can be electrically connected to electronic components disposed on the other side of the terminal 9 with excellent reliability.

[0105] Furthermore, in the wiring circuit board 1 obtained using this manufacturing method, the metal protective film 4 does not cover the first surface 11, the second surface 12, the third surface 14, and the fourth surface 15. Therefore, the skin effect in the signal wiring 7 and the second signal wiring 8 can be suppressed. As a result, the loss of high-frequency signals in the signal wiring 7 and the second signal wiring 8 can be reduced.

[0106] Variations

[0107] In the following variations, the same reference numerals are used to indicate the same components and processes as in the first embodiment described above, and detailed descriptions are omitted. Furthermore, apart from the specifically described contents, each variation can achieve the same effect as the first embodiment. Moreover, the first embodiment and variations can be appropriately combined.

[0108] In addition, Figures 4 to 8 In order to clearly show the relative configuration of the metal protective film 4 with respect to the conductor layer 3, the covering insulating layer 18 is omitted.

[0109] As Figure 4 shown, the metal protective film 4 can not cover the first surface 11 and the third surface 14 which face each other in the width direction, but cover the second surface 12 and the fourth surface 15 on both outer sides in the width direction.

[0110] Alternatively, as Figure 5 shown, the metal protective film 4 can not cover the second surface 12 and the fourth surface 15, but cover the first surface 11 and the third surface 14.

[0111] Further, in the embodiment shown in Figure 1 , the modified example shown in Figure 4 , and the modified example shown in Figure 5 , from the viewpoint of further reducing the proximity effect, the embodiment shown in Figure 1 and the modified example shown in Figure 4 are preferable.

[0112] Also, as Figure 6 shown, the metal protective film 4 can not cover the first surface 11 and the fourth surface 15, but cover the second surface 12 and the third surface 14. Alternatively, it can be contrary to this, for which no drawing is shown.

[0113] In addition, it can also be that, as Figure 7 shown, the conductor layer 3 does not have the second signal wiring 8, but is constituted by the signal wiring 7.

[0114] Also, as Figure 8 shown, it can also be that the conductor layer 3 has a power supply wiring 26 which is separated from the signal wiring 7 in the width direction, in place of the second signal wiring 8.

[0115] A comparatively large current flows in the power supply wiring 26 along the transmission direction. The power supply wiring 26 has a substantially rectangular shape in cross section, and has the same cross-sectional shape as the signal wiring 7. Specifically, the power supply wiring 26 has one surface 27 and another surface which are opposite in the thickness direction, and a fifth surface 28 and a sixth surface 29 which are opposite in the width direction.

[0116] It can also be that the one surface 27, the fifth surface 28, and the sixth surface 29 of the power supply wiring 26 are covered with the metal protective film 4.

[0117] In addition, it can also be that, as shown by the imaginary line, the metal protective film 4 covers the peripheral surface 24 of the terminal 9. Figure 7

[0118] In addition, in the embodiment, the wiring circuit board 1 has the covering insulating layer 18 indicated by the imaginary line, but it can also be that the covering insulating layer 18 is not provided, but is constituted as shown by the solid line.

[0119] ​For example, a plating layer such as a gold plating layer can be provided in the central portion of the other surface 20, but this is not shown in the drawings. Figure 1

[0120] Further, the above-described application is provided as an example of an embodiment of the present application, but this is merely an example and is not intended to be a limiting explanation. Variations of the present application that are apparent to those skilled in the art are included in the above-described claims.

[0121] Industrial applicability

[0122] The wiring circuit substrate can be used in various applications.

[0123] Explanation of reference signs

[0124] 1: wiring circuit substrate, 2: base insulating layer, 3: conductor layer, 4: metal protective film, 5: opening portion, 6: inner peripheral surface, 7: signal wiring, 8: 2nd signal wiring, 9: terminal, 10: one surface (signal wiring), 11: 1st surface (signal wiring), 12: 2nd surface (signal wiring), 13: one surface (2nd signal wiring), 14: 3rd surface (2nd signal wiring), 15: 4th surface (2nd signal wiring), 19: one surface (terminal), 20: other surface (terminal), 21: base material, 22: plating resist layer, 23: plating resist layer.​

Claims

1. A wiring circuit substrate, wherein the wiring circuit substrate has: an insulating layer having one face and another face in a thickness direction; a conductor layer disposed on the one face of the insulating layer; and a metal protective film, the conductor layer has: a signal wiring for transmitting a signal; a terminal continuous with the signal wiring; and a second signal wiring adjacent to the signal wiring in a direction orthogonal to a transmission direction of the signal and the thickness direction, the signal wiring has: one face disposed apart from the one face of the insulating layer in the thickness direction; and first and second faces continuous with the one face of the signal wiring and disposed on opposite sides of each other in the orthogonal direction, the terminal has: one face disposed apart from the one face of the insulating layer in the thickness direction; and another face exposed from the another face of the insulating layer, the second signal wiring has: one face disposed apart from the one face of the insulating layer in the thickness direction; a third face continuous with the one face of the second signal wiring and facing the first face; and a fourth face continuous with the one face of the second signal wiring and located on a side opposite to a side on which the first face is located with respect to the third face, the metal protective film covers the one face of the signal wiring and the one face of the terminal, and covers either of the first and second faces without covering the other of the first and second faces, the metal protective film further covers the one face of the second signal wiring, and covers either of the third and fourth faces without covering the other of the third and fourth faces.

2. A manufacturing method of a wiring circuit substrate, characterized by being a manufacturing method of a wiring circuit substrate, the wiring circuit substrate has: an insulating layer having one face and another face in a thickness direction; a conductor layer disposed on the one face of the insulating layer; and a metal protective film, the conductor layer has: a signal wiring for transmitting a signal; a terminal continuous with the signal wiring; and a second signal wiring adjacent to the signal wiring in a direction orthogonal to a transmission direction of the signal and the thickness direction, the signal wiring has: one face disposed apart from the one face of the insulating layer in the thickness direction; and first and second faces continuous with the one face of the signal wiring and disposed on opposite sides of each other in the orthogonal direction, the terminal has: one face disposed apart from the one face of the insulating layer in the thickness direction; and another face exposed from the another face of the insulating layer toward the other side of the thickness direction, the second signal wiring has: one face disposed apart from the one face of the insulating layer in the thickness direction; ​ ​ a third surface which is continuous with the one surface of the second signal wiring, faces the first surface, and a fourth surface which is continuous with the one surface of the second signal wiring, is located on the side opposite to the side on which the first surface is located with respect to the third surface, the metal protective film covers the one surface of the signal wiring, the one surface of the second signal wiring, and the one surface of the terminal, and does not cover the first surface, the second surface, the third surface, and the fourth surface, the transmission direction of the signal is orthogonal to the thickness direction, the thickness of the metal protective film is 0.03 μm or more and 0.5 μm or less, the manufacturing method of the wiring circuit substrate has the following steps: the insulating layer having an opening portion which penetrates in the thickness direction is disposed on one surface of the substrate in the thickness direction; a seed film is disposed on one surface of the insulating layer in the thickness direction, an inner peripheral surface of the opening portion in the insulating layer, and one surface in the thickness direction of the substrate exposed from the opening portion; a plating resist layer is disposed on one surface of the seed film in a pattern complementary to the conductor layer; the conductor layer is disposed on the one surface of the seed film by electrolytic plating in which power is supplied to the seed film; the metal protective film is disposed on the one surface of the conductor layer; the plating resist layer is removed; and a portion of the seed film exposed from the conductor layer is removed by soft etching; the substrate is removed.

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