Light emitting diode and display device including the same

By employing nanoscale multiple active element structures and insulating layer design in LEDs, the problem of reduced emission efficiency caused by lattice mismatch under high In concentration was solved, and a stable improvement in red light emission efficiency was achieved.

CN113241396BActive Publication Date: 2025-12-16SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202110080705.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-06-17
Filing Date
2021-01-21
Publication Date
2025-12-16
Estimated Expiration
2041-01-21

AI Technical Summary

Technical Problem

In the prior art, when the In concentration of group III nitride-based LEDs is increased to emit red light, the emission efficiency decreases rapidly, and the lattice mismatch in the active layer leads to defects and strain, affecting the stability and efficiency of the LED.

Method used

A nanoscale structure with multiple active elements is employed. Multiple active elements are arranged on a first semiconductor layer, each with a width smaller than the width of the first semiconductor layer, and an insulating layer is placed between them to reduce defects caused by lattice mismatch and maintain strain state.

Benefits of technology

This improved the emission efficiency of LEDs under high In concentration conditions, reduced the occurrence of defects, and achieved stable red light emission.

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Abstract

A light emitting diode (LED) and a display device including the same are provided. The LED includes a first semiconductor layer, a plurality of active elements spaced apart from each other on the first semiconductor layer and each having a width smaller than a width of the first semiconductor layer, and a second semiconductor layer disposed on the plurality of active elements.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates to a semiconductor light emitting diode (LED), a method of manufacturing the same, and a display apparatus including the same. BACKGROUND

[0002] Light emitting diodes (LEDs) are considered to be next-generation light sources having advantages such as long lifespan, low power consumption, fast response speed, and environmental friendliness compared to prior art light sources, and are used in various products such as lighting apparatuses and backlights of display apparatuses. In particular, III-nitride-based LEDs including gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and indium aluminum gallium nitride (InAlGaN) are used as semiconductor light emitting devices that output light. SUMMARY

[0003] A semiconductor LED having improved emission efficiency and a method of manufacturing the same are provided.

[0004] A semiconductor LED including an active layer having a large lattice mismatch and a method of manufacturing the same are provided.

[0005] Additional aspects will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following description, or can be learned by practice of the disclosed implementations of the present disclosure.

[0006] According to an aspect of the present disclosure, there is provided a light emitting diode (LED) including: a first semiconductor layer; a plurality of active elements disposed on the first semiconductor layer, the plurality of active elements being spaced apart from each other and each having a width smaller than a width of the first semiconductor layer; and a second semiconductor layer disposed on the plurality of active elements.

[0007] Each of the plurality of active elements can have a first end in contact with the first semiconductor layer and a second end in contact with the second semiconductor layer.

[0008] The plurality of active elements can be arranged in a direction parallel to a width direction of the first semiconductor layer.

[0009] A sum of the widths of the plurality of active elements can be smaller than the width of the first semiconductor layer.

[0010] Each of the plurality of active elements can be in a strained state.

[0011] The width of each of the plurality of active elements can be greater than or equal to about 10 nm and less than or equal to about 100 nm.

[0012] A pitch between the plurality of active elements can be greater than or equal to about 20 nm and less than or equal to about 300 nm.

[0013] The first semiconductor layer can include a plurality of first semiconductor elements respectively in contact with the plurality of active elements, the plurality of first semiconductor elements being spaced apart from each other, and a first semiconductor common layer in contact with each of the plurality of first semiconductor elements.

[0014] The plurality of first semiconductor elements and the first semiconductor common layer can be made of the same material.

[0015] The second semiconductor layer can include a plurality of second semiconductor elements respectively in contact with the plurality of active elements, the plurality of second semiconductor elements being spaced apart from each other.

[0016] The second semiconductor layer can further include a second semiconductor common layer in contact with each of the plurality of second semiconductor elements.

[0017] The LED can further include an insulating layer disposed between the plurality of active elements.

[0018] The insulating layer includes a mesh structure.

[0019] Each of the plurality of active elements can include In x Ga 1-x N (0 ≤ x ≤ 1).

[0020] An In content of each of the plurality of active elements can be about 35% or more.

[0021] Each of the plurality of active elements can emit red light.

[0022] According to another aspect of the disclosure, there is provided a display device including a substrate, a display element layer disposed on the substrate and including a plurality of light emitting diodes (LEDs), and a driving element layer including a plurality of transistors electrically connected to the plurality of LEDs and configured to drive the plurality of LEDs, wherein at least one of the plurality of LEDs includes a first semiconductor layer, a plurality of active elements disposed on the first semiconductor layer, the plurality of active elements being spaced apart from each other and each having a width smaller than a width of the first semiconductor layer, and a second semiconductor layer disposed on the plurality of active elements.

[0023] The display device can further include a first electrode in contact with the first semiconductor layer, and a second electrode in contact with the second semiconductor layer.

[0024] The first electrode, the first semiconductor layer, the plurality of active elements, the second semiconductor layer, and the second electrode can be sequentially arranged in a first direction.

[0025] The first electrode, the first semiconductor layer, the plurality of active elements, the second semiconductor layer, and the second electrode can be arranged in a first direction perpendicular to a second direction, which is a thickness direction of the substrate.

[0026] The first electrode, the first semiconductor layer, the plurality of active elements, the second semiconductor layer, and the second electrode can be arranged in a first direction parallel to a second direction, which is a thickness direction of the substrate.

[0027] Each of the plurality of active elements can have a first end in contact with the first semiconductor layer and a second end in contact with the second semiconductor layer.

[0028] Each of the plurality of active elements can be in a strained state.

[0029] A width of each of the plurality of active elements can be greater than or equal to about 10 nm and less than or equal to about 100 nm.

[0030] The first semiconductor layer can include a plurality of first semiconductor elements in contact with the plurality of active elements, respectively, the plurality of first semiconductor elements being spaced apart from each other, and a first semiconductor common layer in contact with each of the plurality of first semiconductor elements.

[0031] The display device can further include an insulating layer disposed between the plurality of active elements on the first semiconductor layer.

[0032] The insulating layer can include a mesh structure.

[0033] Each of the plurality of active elements can include In x Ga 1-x N (0 ≤ x ≤ 1).

[0034] Each of the plurality of active elements can emit red light.

[0035] According to another aspect of the disclosure, there is provided a light emitting diode (LED) including a first semiconductor layer having a first portion and a plurality of second portions formed on the first portion of the first semiconductor layer, a plurality of active elements each formed on one of the plurality of second portions, and a second semiconductor layer disposed on the plurality of active elements, wherein each of the plurality of second portions has a width smaller than a width of the first portion of the first semiconductor layer.

[0036] According to another aspect of the present disclosure, there is provided a method of manufacturing a light emitting diode (LED), the method including forming a first semiconductor common layer on a base substrate; forming an insulating layer including a plurality of openings on an upper surface of the first semiconductor common layer; and forming a first semiconductor element, an active element, and a second semiconductor element by growing a first semiconductor material, an active material, and a second semiconductor material in the plurality of openings. BRIEF DESCRIPTION OF DRAWINGS

[0037] The above and other aspects, features and advantages of certain embodiments of the present disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0038] Figure 1 is a cross-sectional view illustrating a semiconductor light emitting diode (LED) according to an example embodiment;

[0039] Figure 2 is a graph illustrating a wavelength-dependent emission efficiency of an active layer of the related art;

[0040] Figure 3A is a graph illustrating a phase separation state of In x Ga (1-y) N according to a material content in a relaxed state;

[0041] Figure 3B is a graph illustrating a phase separation state of In x Ga (1-y) N according to a material content in a strained state;

[0042] Figure 4 is a graph illustrating a relationship between a width and a thickness at which a strain can be maintained for each material according to an example embodiment;

[0043] Figure 5 is a graph illustrating a light emitting device including an LED according to an example embodiment;

[0044] Figures 6A-6H is a graph illustrating a method of manufacturing a light emitting device according to an example embodiment;

[0045] Figures 7A-7C is a graph illustrating a method of manufacturing a light emitting device according to another example embodiment;

[0046] Figure 8 is a graph illustrating an LED according to another example embodiment;

[0047] Figure 9 is a graph illustrating an LED according to another example embodiment;

[0048] Figures 10A-10GFIG. 1 is a view showing a method of manufacturing a light-emitting device including an LED according to an embodiment;

[0049] Figure 11 FIG. 2 is a view showing a light-emitting device according to another embodiment;

[0050] Figure 12 FIG. 3 is a view showing a light-emitting device according to another embodiment;

[0051] Figure 13 FIG. 4 is a circuit diagram showing a unit emission region of a light-emitting device according to an embodiment;

[0052] Figure 14 FIG. 5 is a view showing a part of a display device according to an embodiment;

[0053] Figure 15 FIG. 6 is a view showing a part of a display device according to another embodiment; and

[0054] Figure 16 FIG. 7 is a view showing a part of a display device according to another embodiment. DETAILED DESCRIPTION

[0055] Reference will now be made in detail embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the present embodiments can have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the embodiments are merely described below, by referring to the drawings, to explain aspects. When used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of," when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list.

[0056] Hereinafter, example embodiments will be described in detail with reference to the accompanying drawings. The embodiments described below are merely examples and various modifications can be made thereto. In the drawings, like reference numerals refer to the same element throughout, and the size of each element can be exaggerated for clarity and convenience of description.

[0057] When used herein, the term "on" or "over" an element can be understood to mean that the element can be directly on another element or on another element without contact with the other element.

[0058] The terms "first", "second", and the like can be used to describe various elements, but are used herein only to distinguish one element from another element. The terms are not intended to limit the materials or structures of the elements.

[0059] When used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be understood that when an element is referred to as being "on" another element, it can be directly on the element or intervening elements can also be present.

[0060] When used herein, the terms such as "unit," "module," etc. mean a unit for processing at least one function or operation, which can be implemented by hardware, software, or a combination of hardware and software.

[0061] The terms "the" and similar articles of speech can be understood to include both the singular and the plural forms.

[0062] Unless it is explicitly stated that the operations of the method should be performed in the order described below, the operations can be performed in an appropriate order. In addition, all terms indicating examples (e.g., etc.) are only for the purpose of detailed description of the technical idea, and therefore, the scope of the disclosure is not limited by these terms unless limited by the claims.

[0063] Figure 1 is a cross-sectional view showing a semiconductor light emitting diode (LED) 100 according to an example embodiment. As shown, the semiconductor LED 100 can be an inorganic-based LED and can emit light of a specific wavelength according to materials included in the LED 100. The LED 100 can include a first semiconductor layer 110, an active layer 120, and a second semiconductor layer 130. Figure 1

[0064] The first semiconductor layer 110 can include, for example, an n-type semiconductor, but is not necessarily limited thereto. In some cases, the first semiconductor layer 110 can include a p-type semiconductor. The first semiconductor layer 110 can include a III-V group n-type semiconductor, such as n-GaN. The first semiconductor layer 110 can have a single layer or a multi-layer structure. For example, the first semiconductor layer 110 can include any one of semiconductor materials of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and can include a semiconductor layer doped with a conductive dopant such as Si, Ge, Sn, etc.

[0065] The active layer 120 can be disposed on an upper surface of the first semiconductor layer 110. The active layer 120 can generate light when an electron and a hole are combined, and can have a multi-quantum well (MQW) structure or a single-quantum well (SQW) structure. The active layer 120 can include a III-V group semiconductor such as InGaN, GaN, AlGaN, AlInGaN, etc. A cladding layer doped with a conductive dopant can be formed on an upper portion and / or a lower portion of the active layer 120. For example, the cladding layer can be implemented as an AlGaN layer or an InAlGaN layer.

[0066] ​The second semiconductor layer 130 can be provided on the active layer 120 and can include a semiconductor layer of a different conductivity type from the first semiconductor layer 110. For example, the second semiconductor layer 130 can include a p-type semiconductor layer. The second semiconductor layer 130 can include, for example, InAlGaN, GaN, AlGaN, and / or InGaN, and can be a semiconductor layer doped with a conductive dopant such as Mg or the like. According to an example embodiment, a cladding layer doped with a conductive dopant can be formed on an upper portion and / or a lower portion of the active layer 120 so as to be disposed between the active layer 120 and the second semiconductor layer 130.

[0067] In addition to the first semiconductor layer 110, the active layer 120, and the second semiconductor layer 130 described above, the LED 100 can include additional cladding layers and / or electrodes on upper and / or lower portions of each layer.

[0068] The wavelength of the emitted light can differ according to the material concentration in the active layer 120. For example, the higher the concentration of indium In, the greater the wavelength of the emitted light. For example, when the concentration of In of the active layer 120 is about 15%, the active layer 120 can emit blue light of about 450 nm, and when the concentration of In of the active layer 120 is about 25%, the active layer 120 can emit green light of about 520 nm. Further, when the concentration of In of the active layer 120 is about 35%, the active layer 120 can emit red light of about 630 nm.

[0069] In addition, in the active layer of the related art, as the increase in the In concentration causes an increase in the wavelength of the emitted light, the efficiency of the LED rapidly decreases. Figure 2 is a graph illustrating the emission efficiency according to the wavelength of an active layer of the related art. As shown, Figure 2 when the active layer includes a material emitting blue light of about 450 nm, the maximum value of the external quantum efficiency (EQE) of the active layer is about 0.7. However, when the active layer includes a material emitting red light of about 630 nm, the maximum value of the external quantum efficiency of the active layer is less than 0.1. This is because, as the In concentration increases, a lattice mismatch occurs between the materials in the active layer, for example, InGaN and GaN. This lattice mismatch can cause a strain or a defect on the materials in the active layer, and the strain can change the phase separation state of the active layer.

[0070] Figure 3A is a graph illustrating the phase separation state of In x Ga (1-y) N in a relaxed state according to the material concentration, Figure 3B is a graph illustrating the phase separation state of In x Ga (1-y) N in a strained state according to the material concentration.

[0071] As Figure 3A and Figure 3B indicated, when In x Ga (1-y) N in a relaxed state includes an In concentration of 0.5 or less, In x Ga (1-y) N can be in a spinodal state or a binodal state depending on the temperature. In particular, when the concentration of In is about 0.3 to 0.5, In x Ga (1-y) N can be in a spinodal state in most temperature ranges. In the spinodal state, this means that the active layer can become unstable, which can be a limitation on the manufacturing process of an LED including the active layer.

[0072] In Figure 3B , when In x Ga (1-y) N in a strained state includes an In concentration of 0.5 or less (e.g., 0.3 to 0.5), the active layer can be in a binodal state in all temperature ranges. Thus, when the In concentration is 0.5 or less in a strained state, this means that In x Ga (1-y) N can maintain a stable state regardless of the temperature. Such a strained state can be obtained when the active layer has a lattice mismatch.

[0073] In addition, when the thickness of the active layer increases, causing defects such as dislocations, the strain caused by the lattice mismatch can be eliminated. Thus, it is desirable to obtain an active layer that maintains a strained state in which no defects occur.

[0074] The width and thickness of the active layer having a strain can be determined by the lattice constant of the material in the active layer. Figure 4 is a graph showing the relationship between the width and thickness in which a strain can be maintained for each material according to an embodiment. As Figure 4 indicated, the width and thickness in which a strain can be maintained vary depending on the material. In addition, even with respect to the same material, the greater the width, the smaller the thickness in which a strain can be maintained. For example, when In 0.5 Ga 0.5 N having a width of 150 nm or more is to be stacked on a GaN layer, In 0.5 Ga 0.5 N having a thickness of about 0.5 nm or less is stacked, In 0.5 Ga 0.5 N can maintain a strain. However, stacking a layer having a thickness of 0.5 nm or less causes many difficulties in the process.

[0075] To overcome the difficulties in the process, strain can be maintained by reducing the width of the active layer. For example, when In 0.5 Ga 0.5 N having a thickness of 1 nm or more is to be stacked, In 0.5 Ga 0.5 N having a width of 30 nm or less can be formed, thereby reducing the occurrence of defects and maintaining strain. In particular, when materials having a large lattice mismatch are stacked, limiting the width can effectively reduce the occurrence of defects.

[0076] Accordingly, the active layer 120 according to an embodiment can include a plurality of active elements 122 having a width of a nanometer scale. Referring back to Figure 1 , the active layer 120 can include a plurality of active elements 122 spaced apart from each other on the first semiconductor layer 110. The plurality of active elements 122 can be arranged one-dimensionally or two-dimensionally in a direction parallel to the width (W1) direction of the first semiconductor layer 110.

[0077] The width W2 of each active element 122 can be of a nanometer size. For example, the width W2 of the active element 122 can be greater than or equal to about 10 nm and less than or equal to about 100 nm. Also, the pitch P between the active elements 122 can be 10 µm or less, for example, about 20 nm or more and about 300 nm or less. The thickness of each active element 122 can be greater than or equal to about 1 nm and less than or equal to about 100 nm. As described above, since the width W2 of the active element 122 is small, the occurrence of defects can be reduced even when the lattice mismatch in the active element 122 or the lattice mismatch between the active element 122 and the first and second semiconductor layers 110 and 130 is large.

[0078] When the active layer 120 includes a plurality of active elements 122 having a small width as described above, the occurrence of defects is prevented even when the concentration of In is high, and thus light can be emitted with high light efficiency. For example, the active element 122 can include In x Ga 1-x N (0 ≤ x ≤ 1), and the concentration of In can be 35% or more, by which red light can be emitted.

[0079] In addition, the first semiconductor layer 110 can include a first semiconductor common layer 112 and a plurality of first semiconductor elements 114 spaced apart from each other on the first semiconductor common layer 112. The first semiconductor common layer 112 and the plurality of first semiconductor elements 114 can include the same material, and the width W1 of the first semiconductor common layer 112 can be the width of the LED 100. The first semiconductor common layer 112 can have a width of about 1 µm or less, for example, about 600 nm or less.

[0080] The plurality of first semiconductor elements 114 can be spaced apart from each other on the first semiconductor common layer 112, and each first semiconductor element 114 can overlap and contact with a corresponding active element 122. A width W2 of each first semiconductor element 114 can be the same as a width W2 of the active element 122. For example, the width W2 of the first semiconductor element 114 can be greater than or equal to about 10 nm and less than or equal to about 100 nm. Also, a pitch P between the first semiconductor elements 114 can be 10 µm or less, for example, greater than or equal to about 20 nm and less than or equal to about 300 nm. The first semiconductor element 114 can serve as a seed layer when the active element 122 is grown, and has a narrow width, and thus defects do not occur even when there is a lattice mismatch between the first semiconductor element 114 and the active element 122.

[0081] As described above, the first semiconductor layer 110 can include the first semiconductor common layer 112 and the first semiconductor element 114, stably provides electrons or holes to the active layer 120 through the first semiconductor common layer 112 having a wide width, and prevents occurrence of defects in the active element 122 through the first semiconductor element 114 having a narrow width.

[0082] The second semiconductor layer 130 can include a plurality of second semiconductor elements 132 spaced apart from each other. Each second semiconductor element 132 can overlap and contact with a corresponding active element 122, and has a width the same as a width of the corresponding active element 122. The width of the second semiconductor element 132 can be greater than or equal to about 10 nm and less than or equal to about 100 nm, and a pitch P between the second semiconductor elements 132 can be 10 µm or less, for example, greater than or equal to about 20 nm and less than or equal to about 300 nm. Defects do not occur even when there is a lattice mismatch between the second semiconductor element 132 and the active element 122 because the width of the second semiconductor element 132 is narrow.

[0083] Figure 5 FIG. 1 is a diagram illustrating a light emitting device 100 according to an example embodiment. As shown in FIG. 1, the light emitting device 100 can include a substrate 110, a first semiconductor layer 120 disposed on the substrate 110, an active layer 130 disposed on the first semiconductor layer 120, and a second semiconductor layer 140 disposed on the active layer 130. Figure 5 The substrate 110 can include an insulating material such as glass, an organic polymer, a crystal, or the like. Also, the substrate 110 can include a material having flexibility to be bent or folded, and can have a single layer structure or a multi-layer structure. The substrate 110 can include a transistor or the like capable of driving the light emitting device 100.

[0084] The substrate 210 can include an insulating material such as glass, an organic polymer, a crystal, or the like. Also, the substrate 210 can include a material having flexibility to be bent or folded, and can have a single layer structure or a multi-layer structure. The substrate 210 can include a transistor or the like capable of driving the LED 100.

[0085] The LED 100 can include Figure 1 As illustrated, the first semiconductor layer 110 can include a first semiconductor common layer 112 and a plurality of first semiconductor elements 114, the active layer 120 can include a plurality of active elements 122, and the second semiconductor layer 130 can include a plurality of second semiconductor elements 132. Each component of the LED 100 has been described above, and thus a detailed description thereof is omitted. Figure 1

[0086] The thickness direction of the LED 100 and the thickness direction of the substrate 210 can be perpendicular to each other. For example, as illustrated, Figure 5 the first semiconductor layer 110, the active layer 120, and the second semiconductor layer 130 of the LED 100 can be sequentially arranged in a direction perpendicular to the thickness direction of the substrate 210 (indicated by an arrow in FIG. 1B). Light of a desired wavelength can be emitted from the plurality of active elements 122 overlapping in the thickness direction of the substrate 210. Figure 5

[0087] The first electrode 220 and the second electrode 230 can be disposed on the substrate 210. The first electrode 220 and the second electrode 230 can be spaced apart from each other with the LED 100 therebetween, the first electrode 220 can be disposed in contact with the first semiconductor layer 110, and the second electrode 230 can be disposed in contact with the second semiconductor layer 130. The first electrode 220 and the second electrode 230 can be disposed on the same plane and can have the same thickness. When the first electrode 220 and the second electrode 230 have the same thickness, the LED 100 can be more stably connected to the first electrode 220 and the second electrode 230.

[0088] The first electrode 220 and the second electrode 230 can include a conductive material. The conductive material can include a metal (such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and alloys thereof), a conductive oxide (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO)), a conductive polymer (such as PEDOT), etc.

[0089] Figures 6A-6H FIG. 1C is a diagram illustrating a method of manufacturing a light emitting device according to an embodiment.

[0090] First, as Figure 6A ​​As shown, a first semiconductor common layer 112 can be formed on the substrate 310. The substrate 310 can be a substrate for growing the LED 100. The substrate 310 can include various materials used in general semiconductor processes. For example, a silicon substrate or a sapphire substrate can be used as the substrate 310.

[0091] The first semiconductor common layer 112 can be formed using methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), etc. The first semiconductor common layer 112 can be formed to have a thickness of about 5 μm or less.

[0092] An insulating layer 320 comprising a plurality of openings h can then be formed on the first semiconductor common layer 112. The insulating layer 320 may be a mesh structure comprising a plurality of openings h. For example, an insulating material layer may be formed on the first semiconductor common layer 112 and then patterned to form the openings h. The size of the openings h may be greater than or equal to about 10 nm and less than or equal to about 100 nm, and the shape of the openings h may be circular, elliptical, and / or polygonal. The plurality of openings h may be arranged in one-dimensional or two-dimensional form and may have the same size or different sizes. The shape and width of the openings h may be used to determine the shape and width of the subsequently formed first semiconductor element 114, active element 122, and second semiconductor element 132.

[0093] like Figure 6B As shown, a first semiconductor element 114, an active element 122, and a second semiconductor element 132 can be formed by growing a first semiconductor material, an active material, and a second semiconductor material in multiple openings h. The first semiconductor element 114, the active element 122, and the second semiconductor element 132 can also be formed using methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), and hydride vapor phase epitaxy (HVPE).

[0094] like Figure 6C As shown, masks 330 spaced apart by a predetermined interval H can be disposed on the insulating layer 320. The width of the spaced masks 330 can be used to determine the width W1 of the LED 100, and can be, for example, about 600 nm or less.

[0095] like Figure 6D As shown, material in region H that does not overlap with mask 330 can be removed from the material stacked on substrate 310 by etching.

[0096] like Figure 6EThe mask 330 can be removed as shown. In Figures 6C-6E The process of using the mask 330 to obtain a plurality of LEDs has been described in the above. When one LED is manufactured, the process of using the mask 330 is not required, and thus, the process of Figures 6C-6E may be omitted.

[0097] Next, the insulating layer 320 can be removed by etching as shown. Figure 6F

[0098] As shown, the LED 100 can be separated from the base substrate 310 and then transferred to the substrate 210. Figure 6G As shown, the first electrode 220 and the second electrode 230 can be formed on the substrate 210. The second electrode 230 can be formed to be in contact with the second semiconductor layer 130 of the LED 100, and the first electrode 220 can be formed to be in contact with the first semiconductor layer 110 of the LED 100.

[0099] Figure 6H In and

[0100] , the first electrode 220 and the second electrode 230 are formed after the LED 100 is transferred to the substrate 210, but the present disclosure is not limited thereto. The LED 100 can be transferred after the first electrode 220 and the second electrode 230 are formed on the substrate 210. Figure 6G Figure 6H is a diagram illustrating a method of manufacturing a light emitting device according to another example embodiment.

[0101] Figures 7A-7C As shown, the first sub-electrode 221 and the second sub-electrode 231 can be formed on the substrate 210, and a solution SOL including the LED 100 can be dispersed in a region between the first sub-electrode 221 and the second sub-electrode 231. The dispersion of the solution SOL can use an inkjet printing method, but is not limited thereto.

[0102] As shown, when an electric field is applied between the first sub-electrode 221 and the second sub-electrode 231, the LED 100 can be self-aligned between the first sub-electrode 221 and the second sub-electrode 231 by the electric field. Instead of applying the electric field after the solution SOL is dispersed, the solution SOL including the LED 100 can be dispersed while the electric field is applied between the first sub-electrode 221 and the second sub-electrode 231. Figure 7A When the LED 100 is self-aligned, the first sub-electrode 221 and the second sub-electrode 231 can be formed to be in contact with the first semiconductor layer 110 and the second semiconductor layer 130 of the LED 100, respectively, as shown.

[0103] Figure 7B

[0104] When the LED 100 is self-aligned, the first sub-electrode 221 and the second sub-electrode 231 can be formed to be in contact with the first semiconductor layer 110 and the second semiconductor layer 130 of the LED 100, respectively, as shown. Figure 7C ​​​​As shown, a first contact electrode 222 for electrically and / or physically and stably connecting the first sub-electrode 221 and the corresponding LED 100 can be formed on the first sub-electrode 221, and a second contact electrode 232 for electrically and / or physically and stably connecting the second sub-electrode 231 and the corresponding LED 100 can be formed on the second sub-electrode 231. The first and second contact electrodes 222 and 232 can be in ohmic contact with the first and second sub-electrodes 221 and 231, respectively, and the LED 100. Here, the first sub-electrode 221 and the first contact electrode 222 can be referred to as a first electrode, and the second sub-electrode 231 and the second contact electrode 232 can be referred to as a second electrode.

[0105] Figure 8 is a diagram illustrating an LED 100a according to another example embodiment. Comparing Figure 1 and Figure 8 , Figure 8 The LED 100a can further include an insulating layer 140 between the plurality of active elements 122. The insulating layer 140 can include a mesh structure. Figure 8 The insulating layer 140 included in Figure 6B may be the insulating layer 320 formed in Figure 6F , or an insulating layer including additional insulating material after the insulating layer 320 is removed in

[0106] Figure 9 is a diagram illustrating an LED 100b according to another example embodiment. Comparing Figure 8 and Figure 9 , Figure 9 The second semiconductor layer 130a of the LED 100b as shown can further include a second semiconductor common layer 134. The second semiconductor common layer 134 can include the same material as the second semiconductor element 132. By connecting an electrode to the second common semiconductor layer 134, electrons or holes can be stably supplied to the active layer 120.

[0107] Figures 10A-10G is a diagram illustrating a method of manufacturing a light emitting device including the LED 100b according to another example embodiment. Hereinafter, differences between the methods of manufacturing the light emitting device described in Figures 6A-6H and Figures 10A-10G will be described.

[0108] First, as shown in Figure 10A , a first semiconductor common layer 112 can be formed on a base substrate 310. The base substrate 310 can be a substrate for growing the LED 100b. The base substrate 310 can include various materials used in general semiconductor processes. Then, an insulating layer 320 including a plurality of openings h can be formed on the first semiconductor common layer 112.

[0109] As Figure 10B illustrated, the first semiconductor element 114, the active element 122, and the second semiconductor element 132 can be formed by growing the first semiconductor material, the active material, and the second semiconductor material in the plurality of openings h. In addition, the second semiconductor common layer 134 can be further formed on the insulating layer 320 and the second semiconductor element 132. The second semiconductor common layer 134 can be formed using the same method as used in the second semiconductor element 132.

[0110] As Figure 10C illustrated, the mask 330 can be disposed on the insulating layer 320 and the second semiconductor element 132 at a predetermined interval H. The width of the mask 330 can be used to determine the width of the LED 100b. As Figure 10D illustrated, the material stacked on the base substrate 310 among the materials can be removed in the region H not overlapping with the mask 330. Then, as Figure 10E illustrated, the mask 330 can be removed.

[0111] Next, as Figure 10F illustrated, the LED 100b can be transferred to the substrate 210, and, as Figure 10G illustrated, the first electrode 220 and the second electrode 230 can be formed on the substrate 210.

[0112] Figure 11 FIG. 2 is a view illustrating a light emitting device according to an example embodiment.

[0113] As Figure 11 illustrated, the first electrode 220a, the LED 100b, and the second electrode 230a can be sequentially arranged on the substrate 210 in a thickness direction (indicated by an arrow in FIG. 2) of the substrate 210. The first electrode 220a, the LED 100b, and the second electrode 230a are the same as described above, and thus a detailed description thereof will be omitted. Figure 11

[0114] Figure 12 FIG. 3 is a view illustrating a light emitting device 200c according to another example embodiment.

[0115] As Figure 12 illustrated, the light emitting device 200c can include a substrate 210, an LED 100c, and a first electrode 220b and a second electrode 230b. The LED 100c can include a first semiconductor layer 110a and a plurality of active elements 122 spaced apart from each other, and a second semiconductor layer 130. The first semiconductor layer 110a can include a first semiconductor common layer 112a and a plurality of first semiconductor elements 114. According to an example embodiment, an insulating layer can be disposed between the plurality of active elements 122. ​

[0116] The first electrode 220b can be provided on the first semiconductor common layer 112a and on the same plane as the first semiconductor element 114. The second electrode 230b can be provided on the second semiconductor layer 130.

[0117] The above-described LEDs 100, 100a, 100b, and 100c can be used as light emitting sources of various display devices. For example, the LEDs 100, 100a, 100b, and 100c can be applied to a lighting device or a self-emissive display device.

[0118] Figure 13 is a circuit diagram illustrating a unit emission region of a light emitting device according to an example embodiment. Referring to Figure 13 , the sub-pixel SP can include an LED LD and a drive circuit C connected to the LED LD and driving the LED LD.

[0119] A first electrode (e.g., an anode electrode) of the LED LD is connected to a first power source VDD via the drive circuit C, and a second electrode (e.g., a cathode electrode) is connected to a second power source VSS. The LED LD can have the above-described structure.

[0120] The first power source VDD and the second power source VSS can have different potentials. For example, the potential of the second power source VSS can be lower than the potential of the first power source VDD and equal to or greater than a threshold voltage of the LED LD.

[0121] The LED LD can emit light at a luminance corresponding to a driving current controlled by the drive circuit C.

[0122] In addition, although an embodiment in which only one LED LD is included in the sub-pixel SP is illustrated in Figure 13 , a plurality of LEDs connected in parallel to each other can be included.

[0123] The drive circuit C can include a first transistor M1 and a second transistor M2 and a storage capacitor C st . However, the structure of the drive circuit C is not limited to the embodiment illustrated in Figure 13 .

[0124] A first electrode of the first transistor M1 (a switching transistor) is connected to a data line D, and a second electrode is connected to a first node N1. Here, the first electrode and the second electrode of the first transistor M1 are different electrodes. For example, when the first electrode is a source electrode, the second electrode can be a drain electrode. A gate electrode of the first transistor M1 is connected to a scan line S.

[0125] When a scan signal that provides a voltage (e.g., a low voltage) at which the first transistor M1 can be turned on is supplied from a scan line S, the first transistor M1 is turned on, thereby electrically connecting the data line D and the first node N1. At this time, a data signal of a corresponding frame is supplied to the data line D, and thus, the data signal is transmitted to the first node N1. The data signal transmitted to the first node N1 is charged in the storage capacitor C st .

[0126] A first electrode of the second transistor M2 (a driving transistor) is connected to the first power source VDD, and a second electrode is connected to a first electrode of the LED LD. A gate electrode of the second transistor M2 is connected to the first node N1. The second transistor M2 controls an amount of a driving current supplied to the LED LD in response to a voltage of the first node N1.

[0127] One electrode of the storage capacitor C st is connected to the first power source VDD, and the other electrode is connected to the first node N1. The storage capacitor C st charges a voltage corresponding to a data signal supplied to the first node N1 and maintains the charged voltage until a data signal of a next frame is supplied.

[0128] For convenience, Figure 13 a driving circuit C having a relatively simple structure is shown, which includes a first transistor M1 for transmitting a data signal into a sub-pixel SP, a storage capacitor C st for storing the data signal, and a second transistor M2 for supplying a driving current corresponding to the data signal to the LED LD. However, the present disclosure is not limited thereto, and the structure of the driving circuit C can be modified and implemented in various ways. For example, the driving circuit C can further include a transistor element for compensating for a threshold voltage of the second transistor M2, a transistor element for initializing the first node N1, and / or a transistor element for controlling an emission time of the LED LD, or a boost capacitor for increasing a voltage of the first node N1, etc.

[0129] Further, in Figure 13 , the transistors (e.g., the first transistor M1 and the second transistor M2) included in the driving circuit C are all shown as P-type transistors, but are not limited thereto. The first transistor M1 and / or the second transistor M2 included in the driving circuit C can be changed to N-type transistors.

[0130] Figure 14 is a diagram showing a portion of a display apparatus 1000 according to an example embodiment. Referring to Figure 14 , the display apparatus 1000 can include a substrate 410 provided with a plurality of pixels. One pixel can include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3 provided on the substrate 410.

[0131] The first to third sub-pixels SP1, SP2, and SP3 are pixel regions in which an image is displayed on one pixel, and can be light emitting regions in which light is emitted.

[0132] Each of the first to third sub-pixels SP1, SP2, and SP3 can include a substrate 410, a driving element layer 420, a display element layer 430, and a cover structure layer 440.

[0133] The substrate 410 can include an insulating material such as glass, an organic polymer, a crystal, etc. In addition, the substrate 410 can include a material having flexibility to be bent or folded, and can have a single layer structure or a multi-layer structure.

[0134] The driving element layer 420 can include a buffer layer 421 disposed on the substrate 410, a transistor TFT disposed on the buffer layer 421, and a driving voltage wiring (not shown).

[0135] The buffer layer 421 can prevent impurities from diffusing into the transistor TFT. The buffer layer 421 can be provided as a single layer, but can also be provided as a multi-layer of at least two layers.

[0136] When the buffer layer 421 is provided as a multi-layer, each layer can include the same material or different materials. The buffer layer 421 can be omitted depending on the material of the substrate 410 and process conditions.

[0137] The transistor TFT can drive a corresponding LED among a plurality of LEDs LD1, LD2, and LD3 included in the display element layer 430. The transistor TFT can include a semiconductor layer SC, a gate electrode G, a source electrode S, and a drain electrode D.

[0138] The semiconductor layer SC can be disposed on the buffer layer 421. The semiconductor layer SC can include a source region in contact with the source electrode S and a drain region in contact with the drain electrode D. A region between the source region and the drain region can be a channel region.

[0139] The semiconductor layer SC can be a semiconductor pattern including polysilicon, amorphous silicon, an oxide semiconductor, etc. The channel region is a semiconductor pattern into which impurities are not doped, and can be an intrinsic semiconductor. The source region and the drain region can be semiconductor patterns into which impurities are doped.

[0140] The gate electrode G can be provided on the semiconductor layer SC with a gate insulating layer 422 interposed between the gate electrode G and the semiconductor layer SC.

[0141] The source electrode S and the drain electrode D can contact the source region and the drain region of the semiconductor layer SC, respectively, through contact holes passing through an interlayer insulating layer 423 and the gate insulating layer 422.

[0142] A protective layer 424 can be provided on the transistor TFT.

[0143] The display element layer 430 can include a plurality of LEDs LD1, LD2, and LD3 provided on the protective layer 424. For example, the LED LD1 in the first sub-pixel SP1 can emit red light, the LED LD2 in the second sub-pixel SP2 can emit green light, and the LED LD3 in the third sub-pixel SP3 can emit blue light. In a manufacturing process of the LEDs LD1, LD2, and LD3, the wavelength of the emitted light can be changed by adjusting the concentration of In.

[0144] In the drawings, Figure 9 The illustrated LEDs 100b are shown as the LEDs LD1, LD2, and LD3. Alternatively, any one of the LEDs LD1, LD2, and LD3 in the first to third sub-pixels SP1, SP2, and SP3 can have the structure of the LEDs 100, 100a, and 100c. For example, the LED that emits red light can be the LED 100, 100a, 100b, or 100c having the above-described structure, and the LED that emits green light and the LED that emits blue light can be an LED having a structure different from that of the LEDs 100, 100a, 100b, and 100c.

[0145] The display element layer 430 can further include a pixel definition layer 431. The pixel definition layer 431 can be provided on the protective layer 424 and can divide an emission area in each of the first to third sub-pixels SP1, SP2, and SP3. The pixel definition layer 431 can include an opening that exposes the LEDs LD1, LD2, and LD3 respectively included in the first to third sub-pixels SP1, SP2, and SP3.

[0146] Two pixel definition layers 431 adjacent to each other can be spaced apart by a predetermined interval on the substrate 410. For example, two pixel definition layers 431 adjacent to each other can be spaced apart by a length greater than the LEDs LD1, LD2, and LD3 on the substrate 410. The pixel definition layer 431 can be an insulating material including an inorganic material or an organic material, but is not limited thereto.

[0147] The pixel definition layer 431 can be an insulating material including an organic material. For example, the pixel definition layer 431 can include polystyrene, polymethyl methacrylate (PMMA), polyacrylonitrile (PAN), polyamide (PA), polyimide (PI), polyarylether (PAE), a heterocyclic polymer, parylene, an epoxy resin, benzocyclobutene (BCB), a siloxane-based resin, a silane-based resin, or the like.

[0148] The first insulating layer 432a can be provided on the pixel-defining layer 431. The first insulating layer 432a can cover a portion of an upper surface of each of the LEDs LD1, LD2, and LD3 provided in the first to third sub-pixels SP1, SP2, and SP3, respectively. Due to the first insulating layer 432a, the first end and the second end of each of the LEDs LD1, LD2, and LD3 can be exposed to the outside.

[0149] The first electrode E1 and the second electrode E2 can be disposed on the protective layer 424. The first electrode E1 can include a first sub-electrode EL1 disposed adjacent to one end (e.g., a first semiconductor layer) of a corresponding LED LD and a first contact electrode CNE1 electrically connecting the first sub-electrode EL1 and the one end of the LED LD. The second electrode E2 can include a second sub-electrode EL2 disposed adjacent to the other end (e.g., a second semiconductor layer) of the corresponding LED LD and a second contact electrode CNE2 electrically connecting the second sub-electrode EL2 and the other end of the LED LD.

[0150] Accordingly, a driving voltage can be applied to the corresponding LED LD through the first electrode E1, and a voltage of the transistor TFT can be applied to the corresponding LED LD through the second electrode E2. As a result, a predetermined voltage can be applied to both ends of the LED LD through the first electrode E1 and the second electrode E2, and thus the LED LD can emit light. The wavelength of the emitted light can differ according to the concentration of In of the LED LD.

[0151] The second insulating layer 432b and the third insulating layer 432c can be provided on the first electrode E1 and the second electrode E2.

[0152] The overcoat layer 440 can be provided on the third insulating layer 432c. The overcoat layer 440 can be a planarization layer that mitigates a step caused by components disposed thereunder. In addition, the overcoat layer 440 can be a sealing layer that prevents oxygen and moisture from permeating into the LED LD.

[0153] In addition, when the LEDs LD1, LD2, and LD3 of the respective sub-pixels SP1, SP2, and SP3 emit light of the same wavelength, the display device 1000 can further include a color conversion layer (not shown). The color conversion layer can include first to third color conversion patterns. Here, the first to third color conversion patterns can correspond to the sub-pixels, respectively. For example, the first color conversion pattern can correspond to the first sub-pixel SP1, the second color conversion pattern can correspond to the second sub-pixel SP2, and the third color conversion pattern can correspond to the third sub-pixel SP3.

[0154] Figure 15is a view showing a portion of a display device 1000a according to another example embodiment. In comparison Figure 14 and Figure 15 , Figure 15 The first semiconductor layer, the active layer, and the second semiconductor layer of the LED LD can be arranged in parallel to the thickness direction of the substrate 410.

[0155] Figure 16 is a view showing a portion of a display device 1000b according to another example embodiment. As shown in Figure 16 The display element layer 430, the drive element layer 420, and the outer layer 440 can be sequentially arranged on the substrate 410. In comparison Figure 15 and Figure 16 The display element layer 430 can be provided between the substrate 410 and the drive element layer 420. Figure 16 The display device 1000b of FIG. 1 can integrally and sequentially form the display element layer 430, the drive element layer 420, and the outer layer 440 on the substrate 410, and thus can simplify a manufacturing process. In addition, Figure 16 The display device 1000b of FIG. 1 can be implemented as a bottom emission type by emitting light of different wavelengths in the LED LD.

[0156] The display device including the above-described LED can be used in various electronic devices. For example, the display device can be applied to a television, a laptop computer, a mobile phone, a smart phone, a smart pad (PD), a PMP, a PDA, a navigation, various wearable devices such as a smart watch, etc.

[0157] The above has described the LED, the manufacturing method thereof, and the display device with reference to the embodiments shown in the accompanying drawings, but they are only examples, and it will be apparent to those skilled in the art that various modifications can be made and other equivalent embodiments can be derived. Although many things have been described in detail above, they should be interpreted as an illustration of certain embodiments, not a limitation of the scope of the present disclosure. Therefore, the scope of the present disclosure should not be determined by the example embodiments set forth herein, but by the technical idea described in the claims.

[0158] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should typically be considered as being applicable in other similar embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be apparent to those skilled in the art that various changes in form and detail can be made therein without departing from the spirit and scope of the appended claims.

[0159] This application is based on Korean Patent Application Nos. 10-2020-0008760 and 10-2020-0073732 filed in the Korean Intellectual Property Office on January 22, 2020 and June 17, 2020, respectively, and claims priority under 35 U.S.C. § 119 to them, the disclosures of which are incorporated by reference herein in their entireties.

Claims

1. A light emitting diode comprising: a first semiconductor layer; a plurality of active elements disposed on the first semiconductor layer, the plurality of active elements being spaced apart from each other and each having a width smaller than a width of the first semiconductor layer; and a second semiconductor layer disposed on the plurality of active elements. 2.The light emitting diode of claim 1, wherein each of the plurality of active elements has a first end in contact with the first semiconductor layer and a second end in contact with the second semiconductor layer. wherein each of the plurality of active elements comprises In x Ga 1-x N, where 0.3≤x≤0.5, and each of the plurality of active elements has a width equal to or greater than 10 nm and equal to or less than 30 nm and is in a strained state and a double-barrier state. 3.The light emitting diode of claim 1, wherein the plurality of active elements are arranged in a direction parallel to a width direction of the first semiconductor layer. 4.The light emitting diode of claim 1, wherein a sum of the widths of the plurality of active elements is smaller than the width of the first semiconductor layer. 5.The light emitting diode of claim 1, wherein a pitch between the plurality of active elements is greater than or equal to 20 nm and smaller than or equal to 300 nm. 6.The light emitting diode of claim 1, wherein the first semiconductor layer comprises: a plurality of first semiconductor elements in contact with the plurality of active elements, respectively, the plurality of first semiconductor elements being spaced apart from each other; and a first semiconductor common layer in contact with each of the plurality of first semiconductor elements. 7.The light emitting diode of claim 6, wherein the plurality of first semiconductor elements and the first semiconductor common layer are made of the same material. 8.The light emitting diode of claim 1, wherein the second semiconductor layer comprises a plurality of second semiconductor elements in contact with the plurality of active elements, respectively, the plurality of second semiconductor elements being spaced apart from each other. 9.The light emitting diode of claim 8, wherein the second semiconductor layer further comprises a second semiconductor common layer in contact with each of the plurality of second semiconductor elements. 10.The light emitting diode of claim 1, further comprising: an insulating layer disposed between the plurality of active elements. 11.The light emitting diode of claim 10, wherein the insulating layer comprises a mesh structure. 12.The light emitting diode of claim 1, wherein each of the plurality of active elements has an In content of 0.35≤x≤0.

5. 13.The light emitting diode of claim 1, wherein each of the plurality of active elements emits red light. 14.A display device comprising: a substrate; a display element layer disposed on the substrate and comprising a plurality of light emitting diodes; a driving element layer comprising a plurality of transistors electrically connected to the plurality of light emitting diodes and configured to drive the plurality of light emitting diodes, wherein at least one of the plurality of light emitting diodes comprises: a first semiconductor layer; a plurality of active elements disposed on the first semiconductor layer, the plurality of active elements being spaced apart from each other and each having a width smaller than a width of the first semiconductor layer; and a second semiconductor layer disposed on the plurality of active elements. 15.The display device of claim 14, further comprising: a first electrode in contact with the first semiconductor layer; and wherein each of the plurality of active elements comprises In x Ga 1-x N, where 0.3≤x≤0.5, and each of the plurality of active elements has a width equal to or greater than 10 nm and equal to or less than 30 nm and is in a strained state and a double-barrier state. a second electrode in contact with the second semiconductor layer. ​ ​ a second electrode in contact with the second semiconductor layer.

16. The display device according to claim 15, wherein the first electrode, the first semiconductor layer, the plurality of active elements, the second semiconductor layer, and the second electrode are sequentially arranged in a direction.

17. The display device according to claim 15, wherein the first electrode, the first semiconductor layer, the plurality of active elements, the second semiconductor layer, and the second electrode are arranged in a first direction perpendicular to a second direction, the second direction being a thickness direction of the substrate.

18. The display device according to claim 15, wherein the first electrode, the first semiconductor layer, the plurality of active elements, the second semiconductor layer, and the second electrode are arranged in a first direction parallel to a second direction, the second direction being a thickness direction of the substrate.

19. The display device according to claim 14, wherein each of the plurality of active elements has a first end in contact with the first semiconductor layer and a second end in contact with the second semiconductor layer.

20. The display device according to claim 14, wherein the first semiconductor layer comprises: a plurality of first semiconductor elements in contact with the plurality of active elements, respectively, the plurality of first semiconductor elements being spaced apart from each other; and a first semiconductor common layer in contact with each of the plurality of first semiconductor elements.

21. The display device according to claim 14, further comprising: an insulating layer provided between the plurality of active elements on the first semiconductor layer.

22. The display device according to claim 21, wherein the insulating layer comprises a mesh structure.

23. The display device according to claim 14, wherein each of the plurality of active elements emits red light. ​

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