Mapping table management method and system executed in a computing device

Abstract

Disclosed is a mapping table management method and system executed in a computing device. The method includes: receiving a read / write operation request; if the logical address exists in a first hot data mapping table of at least one hot data mapping table, updating the access statistics of the first hot data mapping table; if the logical address exists in a first cold data mapping table of at least one cold data mapping table, updating the access statistics of the first cold data mapping table, moving the second hot data mapping table with the smallest statistics to a flash memory device as a new cold data mapping table, and moving the first cold data mapping table to a memory device as a new hot data mapping table. The method dynamically adjusts the hot data mapping table and the cold data mapping table according to the access statistics, so as to effectively reduce the resource occupation of the memory device while balancing the system performance.

Description

Technical Field

[0001] The present disclosure relates to the field of storage technology, and more particularly to a mapping table management method and system executed in a computing device. Background Art

[0002] Since the read and write characteristics of flash memory devices are very different from those of disks, the computer's file system cannot directly operate the storage space of flash memory devices. Based on this, a flash translation layer (FTL) is set between the file system and the flash memory device. The flash translation layer includes a mapping table for converting between logical addresses and physical addresses. When the flash translation layer receives a read or write operation request for the flash memory device, it determines the physical address in the flash memory device based on the mapping table and the logical address in the access request, and then performs read and write operations on the physical address.

[0003] To ensure the response speed, the mapping table is usually stored in the computer's memory. Usually, the mapping table of a 1T SSD occupies at least 0.1% of the memory space. For example, in the case of 12 4T SSDs, a total of 12*4T*0.1%=48GB of memory space is required. Based on this, with the rapid development of large-capacity flash memory devices, it is necessary to reduce the memory usage of the L2P mapping table to avoid affecting system performance or restricting the development of large-capacity flash memory devices. Summary of the invention

[0004] In view of this, an object of the present disclosure is to provide a mapping table management method and system executed in a computing device to solve the problems existing in the prior art.

[0005] In a first aspect, an embodiment of the present disclosure provides a mapping table management method executed in a computing device, wherein the computing device includes a flash memory device and a memory device, the memory device stores at least one hot data mapping table, and the flash memory device stores at least one cold data mapping table, the mapping table management method comprising:

[0006] Receiving a read / write operation request, wherein the read / write operation request includes a logical address of the read / write operation;

[0007] If the logical address exists in a first hot data mapping table in the at least one hot data mapping table, updating the access statistics of the first hot data mapping table;

[0008] If the logical address exists in a first cold data mapping table of the at least one cold data mapping table, the access statistics of the first cold data mapping table are updated, the second hot data mapping table with the smallest access statistics is moved to the flash memory device as a new cold data mapping table, and the first cold data mapping table is moved to the memory device as a new hot data mapping table.

[0009] Optionally, updating the pageview statistics includes:

[0010] updating the number of accesses to the first hot data mapping table or the first cold data mapping table within a recent time period t; and

[0011] The weighted sum of the number of accesses to the first hot data mapping table or the first cold data mapping table within s consecutive time lengths t is taken as the access quantity statistical value, where s is a positive integer greater than 1.

[0012] Optionally, in weighted summation, the more recent the duration t is, the higher the weight it has.

[0013] Optionally, the method further includes: regularly deleting the pageview statistics values ​​other than the latest s pageview statistics values.

[0014] Optionally, updating the pageview statistics includes:

[0015] The number of accesses to the first hot data mapping table or the first cold data mapping table in the latest specified time period is counted, and the number of accesses is used as the access volume statistical value.

[0016] Optionally, it further includes: obtaining a corresponding physical address according to the logical address, and

[0017] A corresponding physical space of the flash memory device is accessed according to the physical address.

[0018] Optionally, the method further includes: during the startup phase of the computing device, constructing mapping relationship data, and dividing the mapping relationship data into the at least one hot data mapping table and the at least one cold data mapping table.

[0019] Optionally, the method further includes: presenting access statistics of the at least one hot data mapping table and the at least one cold data mapping table on a display interface, and presenting mapping tables stored in the memory device and the flash memory device respectively.

[0020] In a second aspect, an embodiment of the present disclosure provides a mapping table management system applied in a computing device, wherein the computing device includes a flash memory device and a memory device, wherein the memory device stores at least one hot data mapping table, and the flash memory device stores at least one cold data mapping table, wherein the mapping table management system includes:

[0021] A data communication unit, used for receiving read and write operation requests;

[0022] a heat calculation unit, configured to determine that the logical address in the read / write operation request exists in a first hot data mapping table among the at least one hot data mapping table, and update the access statistics of the first hot data mapping table; if it is determined that the logical address in the data read / write operation request exists in a first cold data mapping table among the at least one cold data mapping table, update the access statistics of the first cold data mapping table;

[0023] A heat control unit is used to add a second hot data mapping table with the smallest access statistics to the flash memory device as a new cold data mapping table if the logical address in the read / write operation request exists in the first cold data mapping table, and move the first cold data mapping table to the memory device as a new hot data mapping table.

[0024] Optionally, the updating of access statistics includes:

[0025] Counting the number of accesses to the first hot data mapping table or the first cold data mapping table within a time interval t; and

[0026] updating the number of accesses to the first hot data mapping table or the first cold data mapping table within a recent time period t; and

[0027] The weighted sum of the number of accesses to the first hot data mapping table or the first cold data mapping table within s consecutive time lengths t is taken as the access quantity statistical value, where s is a positive integer greater than 1.

[0028] Optionally, in weighted summation, the more recent the duration t is, the higher the weight it has.

[0029] Optionally, updating the access statistics includes: counting the number of accesses to the first hot data mapping table or the first cold data mapping table within a latest specified time period, and using the number of accesses as the access statistics.

[0030] In a third aspect, an embodiment of the present disclosure provides a computing device, comprising: a processor, a memory device and a flash memory device, wherein the memory device stores at least one hot data mapping table, the flash memory device stores at least one cold data mapping table, the processor reads computer instructions from the flash memory device, and when the computer instructions are executed, any one of the above-mentioned mapping table management methods is executed.

[0031] Optionally, the computing device is an embedded system or a system on a chip.

[0032] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable medium, wherein the computer-readable medium stores computer instructions executable by a computing device, and when the computer instructions are executed, any of the mapping table management methods described above is implemented.

[0033] The mapping table management method and system provided in this embodiment dynamically adjust the hot data mapping table and the cold data mapping table according to the access statistics, thereby effectively reducing the resource occupation of the memory device while balancing the system performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The above and other objects, features and advantages of the present disclosure will become more apparent through the description of the embodiments of the present disclosure with reference to the following drawings, in which:

[0035] Figure 1 This is a schematic diagram of page-level mapping;

[0036] Figure 2a and 2b Used to illustrate two implementations of the flash translation layer;

[0037] Figure 3 is a flowchart of a mapping table management method provided by an embodiment of the present disclosure;

[0038] Figure 4 is a schematic diagram of the structure of a mapping table management system provided by an embodiment of the present disclosure;

[0039] Figure 5 and 6 A schematic diagram showing a computing device for implementing an embodiment of the present disclosure. DETAILED DESCRIPTION

[0040] The present disclosure is described below based on embodiments, but the present disclosure is not limited to these embodiments. In the detailed description of the present disclosure below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present disclosure without the description of these details. In order to avoid confusing the essence of the present disclosure, well-known methods, processes, and procedures are not described in detail. In addition, the drawings are not necessarily drawn to scale.

[0041] Before describing the embodiments of the present disclosure in detail, some characteristics of the flash translation layer will be introduced below.

[0042] Since the read and write characteristics of flash memory devices are very different from those of disks, for example, NAND flash memory has the limitation of "erase before write", so when a flash memory device is installed in a computing device, a flash memory translation layer is usually set between the computing device's file system (or operating system) and the flash memory device. One of the main functions of the flash memory translation layer is to realize the mapping of logical addresses to physical addresses, and the implementation of this function is based on a mapping table. Specifically, the flash memory translation layer receives read and write operation requests, and converts the logical address in the read and write operation request into a physical address for the flash memory device according to the mapping table, and then completes the read and write operations for the physical address under the control of the flash memory translation layer. Different mapping mechanisms are used for the flash memory translation layer, and the corresponding mapping table structure is also very different. Figure 1 This is a schematic diagram of page-level mapping. As shown in the figure, the corresponding physical page number k is found from the page mapping table through the logical page number i, and the flash physical page k is found according to the physical page number k for read and write operations. In addition to page-level mapping, there are also block-level mapping, mixed-level mapping, etc. The mapping tables constructed may be different, but the principles are basically the same, so they will not be introduced one by one here.

[0043] The flash translation layer can be implemented in software on the flash device, such as Figure 2a As shown, the flash memory device 20 includes a flash memory translation layer 201 implemented by software and a physical storage space 202 provided by a storage medium. The advantage of the software implementation is that it is more flexible and can adjust the storage management strategy according to the application characteristics. Another implementation method is to design the flash memory translation layer into a hardware-implemented flash memory controller and encapsulate it in the computing device, for example, Figure 2b As shown, the flash memory device 30 includes a flash memory controller 301 and a physical storage space 302 provided by a storage medium. The flash memory controller 301 may also include a low-end processor 3011 or a microcontroller and a memory 3012. The memory 3012 is, for example, a static random access memory (SRAM) or a dynamic random access memory (DRAM).

[0044] Figure 3 1 is a flow chart of a mapping table management method provided by an embodiment of the present disclosure. The mapping table management method is applied to a computing device including a memory device and a flash memory device. The memory device generally has a higher storage efficiency than the flash memory device. The memory device is, for example, various random access memories, such as static random access memories (SRAM) or dynamic random access memories (DRAM). The flash memory device includes NAND flash memory, Flash chip, solid state drive (SSD) using NAND flash memory or Flash chip as storage medium, and the like.

[0045] The mapping relationship data of the logical address to the physical address is pre-divided into multiple mapping tables. The multiple mapping tables are initially stored in the flash memory device. After the division is completed, at least one mapping table is moved to the memory device. For the purpose of distinction, we will refer to the mapping table in the memory device as a hot data mapping table, and the mapping table retained in the flash memory device as a cold data mapping table. Typically, the mapping relationship data is divided into multiple mapping tables during the startup phase of the computing device and the flash memory device, and at least one mapping table is loaded into the memory device after the startup is completed. Reference Figure 1 As shown, the page mapping table is a type of such mapping table. The following takes the page mapping table as an example to illustrate how to obtain the cold data mapping table and the hot data mapping table. Each time the computing device is started, the physical page information in the flash memory device is scanned and the page mapping relationship data is constructed. Since the address of the logical page will change, the logical address of the mapping relationship data constructed each time is not exactly the same, but the physical page address will basically not change. After the construction is completed, at least one cold data mapping table and at least one hot data mapping table are formed according to a predetermined segmentation strategy. The predetermined segmentation strategy, for example, randomly divides the mapping relationship data into at least one cold data mapping table and a hot data mapping table.

[0046] refer to Figure 3 As shown, this embodiment includes the following steps.

[0047] In step S301, a read / write operation request is received. The read / write operation request in this step may come from a file system, an operating system, or an application. The read / write operation request includes a data write request and a data read request for a flash memory device. Regardless of the data write request or the data read request, the request includes a logical address to which the read / write operation points. Through the logical address, the flash memory conversion layer of the flash memory device can convert the logical address into a physical address, thereby realizing the read / write operation for the physical storage space corresponding to the physical address.

[0048] In step S302, it is determined whether the logical address of the read / write operation exists in the hot data mapping table or in the cold data mapping table. If it exists in the hot data mapping table, step S306 is executed; otherwise, step S303 is executed.

[0049] In this step, at least one cold data mapping table and at least one hot data mapping table are searched respectively by the logical address to determine whether the logical address exists in the cold data mapping table or the hot data mapping table.

[0050] In step S303, if the logical address exists in a first cold data mapping table in at least one cold data mapping table, the access statistics of the first cold data mapping table are updated.

[0051] In step S304, the second hot data mapping table with the smallest access volume statistics is moved to the flash memory device as a new cold data mapping table.

[0052] In step S305 , the first cold data mapping table is moved to the memory device as a new hot data mapping table.

[0053] In step S306, if the logical address exists in a first hot data mapping table of the at least one hot data mapping table, the access statistics of the first hot data mapping table are updated.

[0054] In this embodiment, for each mapping table in at least one hot data mapping table and at least one cold data mapping table, a corresponding relationship data between the mapping table and the access statistics is maintained. When a read / write operation request is received, if it is determined that the logical address in the read operation request exists in the first hot data mapping table, it means that the system will read the physical address corresponding to the logical address from the first hot data mapping table, and thus update the access statistics of the first hot data mapping table. If it is determined that the logical address exists in the first cold data mapping table, it means that the system will read the physical address of the logical address from the first cold data mapping table, and thus update the access statistics of the first cold data mapping table. In addition, when it is determined that the logical address exists in the first cold data mapping table, the second hot data mapping table with the smallest statistical value is also moved to the flash memory device as a new cold data mapping table, and the first cold data mapping table is moved to the memory device as a new hot data mapping table.

[0055] In this embodiment, there are multiple methods for calculating the access statistics of the mapping table. In one method, the number of accesses in the latest specified time period is counted and used as the access statistics. For example, for mapping table AA, it is counted that the system has obtained the physical address corresponding to the logical address through it 16 times in the latest 15 minutes, then its access number is 16, and the access statistics of mapping table AA is 16. In another method, for each mapping table, with time t as an interval, s access times of the mapping table in a continuous time length t are maintained, and then the access statistics of the mapping table as a whole are calculated based on the s access times. Specifically, when a mapping table contains a logical address requested for a read or write operation, the corresponding number of accesses to the mapping table in the latest time length t is added by 1. Then, the s access times are weighted and accumulated to obtain the access statistics. When weighted accumulation is performed, the closer the time length t is, the higher the weight it has. s is a positive integer greater than 1. In the above method, it is also necessary to regularly delete unnecessary visit statistics. For example, in the first method, the statistical data on visit statistics outside the most recent specified time period is deleted, and in the second method, the statistical data on visit statistics outside s time periods are regularly deleted.

[0056] Combination Figure 2a and 2b The mapping table management method provided in this embodiment can be implemented by software, and the software program obtained thereby can be recorded in the flash translation layer or the flash controller of the flash memory device, and part of the functions of the software program can be executed by the processor of the computing device, and the other part of the functions can be executed by the flash memory controller. For example, the functions of maintaining the access statistics of the hot data mapping table and the cold data mapping table can be executed by the flash memory controller, while moving the hot data mapping table and the cold data mapping table is executed by the processor of the computing device.

[0057] Figure 4 It is a structural schematic diagram of the mapping table management system of the embodiment of the present disclosure. As shown in the figure, the system includes a data communication unit 401, a heat calculation unit 402 and a heat control unit 403. The data communication unit 401 is used to communicate with an external system and receive a read and write operation request from the external system based on the communication. The heat calculation unit 402 is used to update the access statistics of the first hot data mapping table if the logical address in the read and write operation request exists in the first hot data mapping table of at least one hot data mapping table, and to update the access statistics of the first cold data mapping table if the logical address in the data read and write operation request exists in the first cold data mapping table of at least one cold data mapping table. The heat control unit 403 is used to move the second hot data mapping table with the smallest access statistics to the flash memory device as a new cold data mapping table if the logical address in the read and write operation request exists in the first cold data mapping table, and move the first cold data mapping table to the memory device as a new hot data mapping table.

[0058] In some embodiments, the heat calculation unit 402 maintains s access times within a time length of t for each mapping table, and then calculates the overall access statistics based on the s access times. For example, the heat calculation unit 402 weightedly sums the s access times to obtain the overall access statistics.

[0059] The mapping table management method and system provided in this embodiment dynamically adjust the hot data mapping table and the cold data mapping table according to the access heat, so as to effectively reduce the resource occupation of the memory device while balancing the system performance. For example, if only m mapping relationship data are stored in the memory device and n mapping relationship data are stored in the flash memory device, the memory occupation can be reduced to m / (m+n). At the same time, since the hot data mapping table and the cold data mapping table are continuously adjusted according to the access heat, the performance degradation caused by accessing the cold data mapping table is balanced by the performance improvement caused by the reduction of memory occupation, so the overall performance can be improved.

[0060] In some embodiments, the mapping table management system further includes a display interface, which presents the access statistics of at least one hot data mapping table and at least one cold data mapping table, and presents the mapping tables stored in the memory device and the flash memory device respectively, so that the R&D personnel can intuitively understand the changes of the hot and cold mapping tables through the display interface. It should be noted that the first and second in this article are only used to distinguish different subjects, and do not represent the distinction between the priority or importance of each subject.

[0061] Figure 5 The computer system 50 can be constructed based on various processors currently on the market and run under WINDOWS. TM Operating system version, UNIX operating system, Linux operating system, etc. Operating system driver. In addition, the computer system 50 can be implemented in hardware and / or software such as a PC, a desktop, a notebook, a server, and a mobile communication device.

[0062] like Figure 5 As shown, the computer system 50 according to the embodiment of the present invention may include one or more processors 12 and a memory device 14 .

[0063] The memory device 14 in the computer system 50 can be a main memory or an auxiliary memory, used to store instruction information and / or data information represented by data signals, such as storing data provided by the processor 12 (such as calculation results), and can also be used to realize data exchange between the processor 12 and an external storage device 16 (or called auxiliary memory or external memory).

[0064] In some cases, the processor 12 may need to access the memory device 14 to obtain data in the memory device 14 or modify the data in the memory device 14. Since the access speed of the memory device 14 is slow, in order to alleviate the speed gap between the processor 12 and the memory device 14, the computer system 50 also includes a cache memory 18 coupled to the bus 11, and the cache memory 18 is used to cache some program data or message data in the memory device 14 that may be repeatedly called. The cache memory 18 is implemented by a storage device of the type of static random access memory (SRAM). The cache memory 18 can be a multi-level structure, such as a three-level cache structure with a first-level cache (L1 Cache), a second-level cache (L2 Cache) and a third-level cache (L3 Cache), or a cache structure of more than three levels or other types of cache structures. In some embodiments, a portion of the cache memory 18 (such as a first-level cache, or a first-level cache and a second-level cache) can be integrated inside the processor 12 or integrated with the processor 12 in the same system on a chip.

[0065] The information exchange between the memory device 14 and the cache memory 18 is usually organized in blocks. In some embodiments, the cache memory 18 and the memory device 14 can be divided into data blocks according to the same spatial size, and the data block can be used as the minimum unit of data exchange between the cache memory 18 and the memory device 14 (including one or more data of a preset length). For the sake of simplicity and clarity, the data blocks in the cache memory 18 are referred to as cache blocks (which can be called cache lines or cache lines), and different cache blocks have different cache block addresses; the data blocks in the memory device 14 are referred to as memory blocks, and different memory blocks have different memory block addresses. The cache block address includes, for example, a physical address tag for locating the data block.

[0066] Due to space and resource limitations, the cache memory 18 cannot cache all the contents in the memory device 14, that is, the storage capacity of the cache memory 18 is usually smaller than that of the memory device 14, and the cache block addresses provided by the cache memory 18 cannot correspond to all the memory block addresses provided by the memory device 14. When the processor 12 needs to access the memory, it first accesses the cache memory 18 via the bus 11 to determine whether the content to be accessed has been stored in the cache memory 18. If so, the cache memory 18 hits, and the processor 12 directly calls the content to be accessed from the cache memory 18; if the content that the processor 12 needs to access is not in the cache memory 18, the cache memory 18, the processor 12 needs to access the memory device 14 via the bus 11 to find the corresponding information in the memory device 14. Because the access rate of the cache memory 18 is very fast, when the cache memory 18 hits, the efficiency of the processor 12 can be significantly improved, thereby improving the performance and efficiency of the entire computer system 50.

[0067] In addition, the computer system 50 may also include input / output devices such as a storage device 16, a display device 13, an audio device 14, and a mouse / keyboard 15. The storage device 16 is, for example, a hard disk, an optical disk, a flash memory, and other devices for information access coupled to the bus 11 through a corresponding interface. The display device 13 is, for example, coupled to the bus 11 through a corresponding graphics card, and is used to display according to a display signal provided by the bus 11.

[0068] The computer system 50 also typically includes a communication device 17, so that it can communicate with a network or other devices in various ways. The communication device 17 may include, for example, one or more communication modules. As an example, the communication device 17 may include a wireless communication module suitable for a specific wireless communication protocol. For example, the communication device 17 may include a WLAN module for implementing Wi-FiTM communication that complies with the 802.11 standard established by the Institute of Electrical and Electronics Engineers (IEEE); the communication device 17 may also include a WWAN module for implementing wireless wide area communication that complies with cellular or other wireless wide area protocols; the communication device 17 may also include a communication module that uses other protocols, such as a Bluetooth module, or other custom types of communication modules; the communication device 17 may also be a port for serial transmission of data.

[0069] In this embodiment, the storage device 16 includes the flash memory device mentioned in the above embodiment, and the memory device 14 or the cache memory 18 includes the memory device mentioned in the above embodiment, so the mapping table management method and system provided in the above embodiment can be executed on the computer system 50.

[0070] Figure 6402 or Flash Memory 403. Figure 6 shown.

[0071] In addition, in the embedded system 60, an A / D (analog / digital conversion) interface 405 and a serial interface 406 are required for the needs of measurement and control, which are rarely used in general-purpose computers. The A / D interface 405 mainly completes the conversion of analog signals to digital signals and the conversion of digital signals to analog signals required in the test. The embedded system 60 often needs to be tested when applied to industrial production. Since the single-chip microcomputer generates digital signals, it needs to be converted into analog signals for testing during testing. Therefore, unlike general-purpose computers, an A / D (analog / digital conversion) interface 405 is required to complete the relevant conversion. In addition, multiple embedded systems are often required to be connected in series in industry to complete relevant functions, so a serial interface 406 is required for connecting multiple embedded systems in series, which is mostly not required in general-purpose computers.

[0072] In addition, as a basic processing unit, the embedded system 60 often needs to connect multiple embedded systems 60 into a network in industrial design, so a network interface 407 is needed to connect the embedded system 60 to the network. This is mostly not required in general-purpose computers. In addition, according to the actual application and scale, some embedded systems 60 need to use an external bus 404. With the rapid expansion of the application field of the embedded system 60, the embedded system 60 is becoming more and more personalized, and the types of buses used according to its own characteristics are also increasing. In addition, in order to test the internal circuit of the embedded processor 401, the processor chip generally adopts a boundary scan test technology. In order to adapt to this test, a debug interface 408 is used.

[0073] In this embodiment, the flash memory 603 may be the flash memory device mentioned in the above embodiment, and the RAM 602 may be the memory device mentioned in the above embodiment. Therefore, the mapping table management method and system provided in the above embodiment may be executed on the embedded system 60.

[0074] Those skilled in the art will appreciate that the present disclosure may be implemented as systems, methods, and computer program products. Therefore, the present disclosure may be specifically implemented in the following forms, namely complete hardware, complete software (including firmware, resident software, microcode), and may also be implemented in the form of a combination of software and hardware. In addition, in some embodiments, the present disclosure may also be implemented in the form of a computer program product in one or more computer-readable media, which contains computer-readable program code.

[0075] The computer program product of the embodiment of the present disclosure may be stored in any combination of one or more computer-readable media. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium may be, for example but not limited to, a system, device or component of electricity, magnetism, light, electromagnetic, infrared or semiconductor, or any combination thereof. More specific examples of computer-readable storage media include: an electrical connection of one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this article, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by a processing unit, a device or a device, or used in combination with it.

[0076] Computer readable signal media may include data signals propagated in baseband or as part of a chopped wave, which carry computer readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any other suitable combination. Computer readable signal media may also be any computer readable medium other than a computer readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction system, apparatus, or device.

[0077] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., and any suitable combination of the foregoing.

[0078] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A mapping table management method executed in a computing device, the computing device comprising a flash memory device and a memory device, the memory device storing at least one hot data mapping table, the flash memory device storing at least one cold data mapping table, the mapping table management method comprising: Receiving a read / write operation request, wherein the read / write operation request includes a logical address of the read / write operation; If the logical address exists in a first hot data mapping table in the at least one hot data mapping table, updating the access statistics of the first hot data mapping table; If the logical address exists in a first cold data mapping table of the at least one cold data mapping table, the access statistics of the first cold data mapping table are updated, the second hot data mapping table with the smallest access statistics is moved to the flash memory device as a new cold data mapping table, and the first cold data mapping table is moved to the memory device as a new hot data mapping table.

2. The mapping table management method according to claim 1, wherein: The updating of the visit statistics includes: updating the number of accesses to the first hot data mapping table or the first cold data mapping table within a recent time period t; and The weighted sum of the number of accesses to the first hot data mapping table or the first cold data mapping table within s consecutive time lengths t is taken as the access quantity statistical value, where s is a positive integer greater than 1.

3. The mapping table management method according to claim 2, wherein: In the weighted summation, the more recent the duration t is, the higher the weight it has.

4. The mapping table management method according to claim 2, wherein: Also includes: The pageview statistics values ​​other than the most recent s pageview statistics values ​​are periodically deleted.

5. The mapping table management method according to claim 1, wherein: The updating of the visit statistics includes: The number of accesses to the first hot data mapping table or the first cold data mapping table within a specified time period is counted, and the number of accesses is used as the access volume statistics value.

6. The mapping table management method according to claim 1, further comprising: Obtaining a corresponding physical address according to the logical address, and A read and write operation is performed on a corresponding physical space of the flash memory device according to the physical address.

7. The mapping table management method according to claim 1, further comprising: During the startup phase of the computing device, mapping relationship data is constructed, and the mapping relationship data is divided into the at least one hot data mapping table and the at least one cold data mapping table.

8. The mapping table management method according to claim 1, further comprising: The access statistics of the at least one hot data mapping table and the at least one cold data mapping table are presented on the display interface, and the mapping tables stored in the memory device and the flash memory device are presented respectively.

9. A mapping table management system executed in a computing device, the computing device comprising a flash memory device and a memory device, the memory device storing at least one hot data mapping table, the flash memory device storing at least one cold data mapping table, the mapping table management system comprising: A data communication unit, used for receiving read and write operation requests; a heat calculation unit, configured to update the access statistics of a first hot data mapping table in the at least one hot data mapping table if the logical address in the read / write operation request exists in the first hot data mapping table of the at least one hot data mapping table, and to update the access statistics of the first cold data mapping table if the logical address in the data read / write operation request exists in the first cold data mapping table of the at least one cold data mapping table; A heat control unit is used to move the second hot data mapping table with the smallest access statistics to the flash memory device as a new cold data mapping table, and move the first cold data mapping table to the memory device as a new hot data mapping table if the logical address in the read / write operation request exists in the first cold data mapping table.

10. The mapping table management system according to claim 9, wherein the updating of access statistics comprises: Update the number of accesses to the first hot data mapping table or the first cold data mapping table within a recent time period t; as well as The weighted sum of the number of accesses to the first hot data mapping table or the first cold data mapping table within s consecutive time lengths t is taken as the access quantity statistical value, where s is a positive integer greater than 1.

11. The mapping table management system according to claim 10, wherein: In the weighted summation, the more recent the duration t is, the higher the weight it has.

12. The mapping table management system according to claim 9, wherein: The updating of the access statistics includes: counting the number of accesses to the first hot data mapping table or the first cold data mapping table within a specified time period, and using the number of accesses as the access statistics.

13. A computing device comprising: A processor, a memory device and a flash memory device, wherein the memory device stores at least one hot data mapping table, the flash memory device stores at least one cold data mapping table, the processor reads computer instructions from the flash memory device, and when the computer instructions are executed, the mapping table management method according to any one of claims 1 to 8 is executed.

14. The computing device of claim 13, wherein: The computing device is an embedded system or a system on a chip.

15. A computer-readable medium storing computer instructions executable by a computing device, wherein when the computer instructions are executed, the mapping table management method according to any one of claims 1 to 8 is implemented.

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