Memory mapping method, device, electronic device and computer-readable medium of a host computer

Abstract

An embodiment of the present application provides a memory mapping method, apparatus, electronic device, and computer-readable medium for a host, relating to the field of data storage. The method includes: determining whether the starting address of the first memory reserved by the host for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table; if it is determined that the starting address is aligned with the memory size indicated by the physical page table and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then establishing a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. Through the embodiments of the present application, the mapping from the virtual space to the memory space can be accelerated, thereby improving the overall access performance of the memory.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of data storage, and in particular, to a method, an apparatus, an electronic device, and a computer-readable medium for memory mapping of a host computer. Background Art

[0002] Virtual memory technology is one of the bases of virtualization technology. Virtual memory technology can effectively improve the security of processes and the available memory capacity. Before accessing memory based on virtual memory, the virtual address needs to be mapped to a physical address, and then the physical address can be used to access memory data. As Figure 1A shown, in a structure with a four-level page table, since the page table is stored in memory, the address mapping process needs to access memory up to four times, which is very time-consuming. Specifically, it is necessary to go through four levels of page table mapping of PGD (Page Global Directory), PUD (Page Upper Directory), PMD (Page Middle Directory), and PTE (Page Table Entry) in sequence to obtain the physical address corresponding to the virtual address.

[0003] In order to accelerate the mapping from a virtual address to a physical address, a large amount of research work has been carried out in the academic and industrial communities. For example, a Translation Lookaside Buffer (hereinafter referred to as TLB) can be used. Although TLB can avoid multiple memory accesses caused by page table query operations to a certain extent, as the memory occupation of the process becomes larger and the irregular memory access operations become more frequent, the improvement of the TLB on the performance of the address mapping operation becomes more and more limited. Specifically, the Linux memory adopts a "paging mechanism" to support the fast and efficient management of a large address space. Although in principle the memory page size is configurable, the default 4KB (4096 bytes) page, that is, a small page, is adopted in the Linux kernel. When an application with a large memory demand runs on the Linux operating system, due to the default page size of 4KB it adopts, there will be more TLB failures and page faults, thus greatly affecting the performance of the application. Suppose an application needs 2MB of memory. If the operating system uses 4KB small pages, 512 pages are required, and then 512 entries are required in the TLB, and at the same time 512 page table entries are required. The operating system needs to experience at least 512 TLB failures and 512 page faults to map the entire 2MB application space to physical memory, that is, there will be more TLB failures and page faults, thus greatly affecting the performance of the application.

[0004] It can be seen that how to effectively accelerate the mapping from the virtual space to the physical space, so as to improve the overall access performance of the memory, has become a technical problem that needs to be solved urgently at present. Summary of the Invention

[0005] The purpose of the present application is to provide a memory mapping method, device, electronic device and computer-readable medium for a host computer, which are used to solve the technical problem in the prior art of how to effectively accelerate the mapping from the virtual space to the physical space, so as to improve the overall access performance of the memory.

[0006] According to the first aspect of the embodiments of the present application, a memory mapping method for a host computer is provided. The method includes: determining whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table; if it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then establish a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table.

[0007] According to the second aspect of the embodiments of the present application, a memory mapping method for a host computer is provided. The method includes: establishing a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the page global directory read and the index of the page global directory entry extracted from the first part of the starting address of the first virtual space of the application program of the host computer; if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, then based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the starting address of the first virtual space, establish a mapping relationship between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory, which is the same as the memory size indicated by the first physical page table, so as to establish a mapping relationship between the second virtual space in the first virtual space, which is the same as the memory size indicated by the first physical page table, and the second memory, where the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory.

[0008] According to a third aspect of an embodiment of the present application, a memory mapping device for a host computer is provided. The device includes: a first determination module, configured to determine whether a start address of a first memory reserved by the host computer for a first virtual space of an application program is aligned with a memory size indicated by a physical page table in the first memory, and whether a size of the first memory is an integer multiple of the memory size indicated by the physical page table; a first establishment module, configured to, if it is determined that the start address is aligned with the memory size indicated by the physical page table and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, establish a mapping relationship between a second virtual space in the first virtual space and a second memory in the first memory, where a size of the second virtual space and a size of the second memory are both the same as the memory size indicated by the physical page table.

[0009] According to a fourth aspect of an embodiment of the present application, a memory mapping device for a host computer is provided. The device includes: a second establishment module, configured to establish a mapping relationship between a page global directory entry and a physical base address of a page upper directory based on a physical base address of a read page global directory and an index of the page global directory entry extracted from a first part of a start address of a first virtual space of an application program of the host computer; a third establishment module, configured to, if it is determined that a start address of a first memory reserved for the first virtual space is aligned with a memory size indicated by a first physical page table in the first memory, establish a mapping relationship between the page upper directory entry and a physical base address of the first physical page table corresponding to a second memory in the first memory having the same memory size as that indicated by the first physical page table based on the physical base address of the page upper directory and an index of the page upper directory entry extracted from a second part of the start address of the first virtual space, so as to establish a mapping relationship between a second virtual space in the first virtual space having the same memory size as that indicated by the first physical page table and the second memory, where the physical base address of the first physical page table corresponding to the second memory is a start address of the second memory.

[0010] According to a fifth aspect of an embodiment of the present application, an electronic device is provided, including: one or more processors; a computer-readable medium configured to store one or more programs, which when executed by the one or more processors, cause the one or more processors to implement the host computer memory mapping method according to the first aspect or the second aspect of the foregoing embodiments.

[0011] According to a sixth aspect of an embodiment of the present application, a computer-readable medium is provided, on which a computer program is stored, and when the program is executed by a processor, it implements the host computer memory mapping method according to the first aspect or the second aspect of the foregoing embodiments.

[0012] According to the memory mapping method of the host computer provided by the embodiments of the present application, it is determined whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table. If it is determined that the starting address is aligned with the memory size indicated by the physical page table and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then a mapping relationship is established between the second virtual space in the first virtual space and the second memory in the first memory. Among them, the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. Compared with other existing methods, when it is determined that the starting address is aligned with the memory size indicated by the physical page table and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, by establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, the mapping from the virtual space to the memory space can be accelerated, thereby improving the overall access performance of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Other features, objects, and advantages of the present application will become more apparent by reading the detailed description of the non-limiting embodiments with reference to the following drawings:

[0014] Figure 1A Schematic diagram of the address mapping process provided according to the prior art;

[0015] Figure 1B Flowchart of the steps of the memory mapping method of the host computer in Embodiment 1 of the present application;

[0016] Figure 1C Schematic diagram of the establishment process of the memory mapping provided according to Embodiment 1 of the present application;

[0017] Figure 1D Schematic diagram of the address mapping process provided according to Embodiment 1 of the present application;

[0018] Figure 2A Flowchart of the steps of the memory mapping method of the host computer in Embodiment 2 of the present application;

[0019] Figure 2B Schematic diagram of the establishment process of the memory mapping provided according to Embodiment 2 of the present application;

[0020] Figure 2C Schematic diagram of the address mapping process provided according to Embodiment 2 of the present application;

[0021] Figure 3A Flowchart of the steps of the memory mapping method of the host computer in Embodiment 3 of the present application;

[0022] Figure 3BSchematic diagram of the establishment process of memory mapping provided in Embodiment 3 of the present application;

[0023] Figure 4 Schematic diagram of the structure of the memory mapping device of the host computer in Embodiment 4 of the present application;

[0024] Figure 5 Schematic diagram of the structure of the memory mapping device of the host computer in Embodiment 5 of the present application;

[0025] Figure 6 Schematic diagram of the structure of the electronic device in Embodiment 6 of the present application;

[0026] Figure 7 Hardware structure of the electronic device in Embodiment 7 of the present application. Detailed implementation manners

[0027] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only configured to explain the related invention, rather than limiting the invention. Additionally, it should be noted that, for the sake of convenience of description, only the parts related to the relevant invention are shown in the drawings.

[0028] It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the drawings and embodiments.

[0029] Refer to Figure 1B , which shows the flowchart of the steps of the memory mapping method of the host computer in Embodiment 1 of the present application.

[0030] Specifically, the memory mapping method of the host computer provided in this embodiment includes the following steps:

[0031] In step S101, determine whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table.

[0032] In the embodiments of the present application, the host can be understood as a real physical computer system that runs virtual machines. The first virtual space can be understood as the virtual space allocated by the operating system of the host for the application program. For example, the virtual space indicated by the virtual address segment [Vstart, Vend]. The application program can be understood as an application program running on the virtual machine of the host. The first memory can be understood as the physical memory reserved by the host for the first virtual space of the application program. The physical page table stores the physical addresses of the memory spaces in the first memory. The memory size indicated by the physical page table in the first memory can be understood as the size of the memory space corresponding to the physical addresses of the memory spaces in the first memory stored in the physical page table. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0033] In a specific example, memory spaces are all divided by bytes. Theoretically, it seems that access to any type of variable can start from any address, but in reality, when accessing a specific type of variable, it is often accessed at a specific memory address. This requires various types of data to be arranged in space according to certain rules, rather than being arranged one by one in sequence. This is alignment. Specifically, when the lower 21 bits of the starting address of the first memory are all 0, it indicates that the starting address of the first memory is aligned with the memory size of 2M BYTES indicated by the physical page table in the first memory. When the lower 30 bits of the starting address of the first memory are all 0, it indicates that the starting address of the first memory is aligned with the memory size of 1G BYTES indicated by the physical page table in the first memory. In addition, if the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then a cyclic mapping can be performed between the virtual address segment and the physical address segment of the first memory. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0034] In step S102, if it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then a mapping relationship is established between the second virtual space in the first virtual space and the second memory in the first memory.

[0035] In the embodiments of the present application, the size of the second virtual space and the size of the second memory are both the same as the memory size indicated by the physical page table. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0036] In some alternative embodiments, when establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, based on the start address of the second virtual space and the start address of the second memory, the mapping relationship between the second virtual space and the second memory is established, wherein the start address of the second memory is aligned with the memory size indicated by the physical page table. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0037] In a specific example, the memory size indicated by the physical page table is 2M BYTES. When establishing the mapping relationship between the second virtual space and the second memory based on the start address of the second virtual space and the start address of the second memory, based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the start address of the second virtual space, the mapping relationship between the page global directory entry and the physical base address of the page upper directory is established; based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the start address of the second virtual space, the mapping relationship between the page upper directory entry and the physical base address of the page middle directory is established; based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the start address of the second virtual space, the mapping relationship between the page middle directory entry and the physical base address of the physical page table corresponding to the second memory is established to establish the mapping relationship between the second virtual space and the second memory, wherein the physical base address of the physical page table is the start address of the second memory. Thus, by establishing the mapping relationship between the page middle directory entry and the physical base address of the physical page table corresponding to the second memory based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the start address of the second virtual space, the page table mapping of the physical page table of the linux kernel can be extended to support 2M BYTES large page mapping, reduce the mapping level and the number of page table entries between the virtual space and the physical space, speed up the mapping from the virtual space to the physical space, and thus effectively improve the overall memory access performance. In addition, the address mapping information stored in the TLB is in units of 2M BYTES large pages, increasing the coverage of the address mapping information in the TLB, improving the hit rate of the TLB, greatly reducing the overhead of address mapping, thus further speeding up the mapping from the virtual space to the physical space and improving the overall memory access performance. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0038] In a specific example, the physical base address of the page global directory is read from a register. The first part of the starting address of the second virtual space may be the upper 6 bits, or the upper 8 bits. The second part of the starting address of the second virtual space may be the upper 6 bits, or the upper 8 bits immediately following the first part. The third part of the starting address of the second virtual space may be the upper 6 bits, or the upper 8 bits immediately following the second part. Specifically, based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the page global bits of the starting address of the second virtual space, a mapping relationship is established between the page global directory entry and the physical base address of the page upper directory; based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the starting address of the second virtual space, a mapping relationship is established between the page upper directory entry and the physical base address of the page middle directory; based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the page middle bits of the starting address of the second virtual space, a mapping relationship is established between the page middle directory entry and the physical base address of the physical page table corresponding to the second memory, so as to establish a mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the starting address of the second memory. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations in this regard.

[0039] In a specific example, as Figure 1C shown, the host reserved memory management module (hereinafter referred to as the vmem module) adds memory page table management for the physical page table mapping of the linux kernel. When the vmem module selects a physical address segment [start, end) of a continuous memory for direct physical page table mapping of the linux kernel; its starting address start needs to be 2M BYTES aligned, and the memory space indicated by the physical address segment [start, end) needs to be an integer multiple of 2M BYTES, otherwise a failure return is made. The mapping is performed cyclically on this continuous memory, and each cycle maps 2M BYTES of memory; the mapping address starts from start (addr = start), and a virtual space of the corresponding size and a corresponding pgd page table mapping are established; then the pgd page table and the pud-level page table mapping are performed to establish the corresponding page table entries at the pud level and continue to the next level; then the pud level and the pmd level page table mapping are performed to directly establish the page table entries of the 2M BYTES large page corresponding to the pmd level page table, and then the mapping of 2M BYTES of memory is cycled until all the page table entries of the 2M BYTES large page corresponding to the pmd level page table are mapped. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations in this regard.

[0040] In some alternative embodiments, after establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, the method further includes: based on the mapping relationship between the second virtual space and the second memory, mapping the virtual address associated with the access operation of the application program to obtain the physical address corresponding to the virtual address. Thereby, based on the mapping relationship between the second virtual space and the second memory, mapping the virtual address associated with the access operation of the application program reduces the mapping levels and the number of page table entries between the virtual space and the physical space, speeds up the mapping from the virtual space to the physical space, and thus effectively improves the overall memory access performance. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0041] In a specific example, when mapping the virtual address associated with the access operation of the application program based on the mapping relationship between the second virtual space and the second memory, based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the virtual address, the physical base address of the page upper directory is extracted from the page global directory entry; based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the virtual address, the physical base address of the page middle directory is extracted from the page upper directory entry; based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the virtual address, the physical base address of the physical page table is extracted from the page middle directory entry; based on the physical base address of the physical page table and the offset within the physical page table extracted from the fourth part of the virtual address, the physical address corresponding to the virtual address is determined. Among them, the physical base address of the page global directory is read from a register. Thereby, for a large page of 2M BYTES in size, the physical memory address corresponding to the virtual address can be obtained at the page middle directory level. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0042] In a specific example, such as Figure 1DAs shown, the physical base address of the page global directory is read from register cr3, and the index of the page global directory entry of the page global directory is extracted from the page global bits of the virtual address. Then, based on the physical base address of the page global directory and the index of the page global directory entry of the page global directory, the physical address of the page global directory entry is determined. Then, based on the physical address of the page global directory entry, the physical base address of the page upper directory is extracted from the page global directory entry. Then, based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the virtual address, the physical address of the page upper directory entry is determined. Then, based on the physical address of the page upper directory entry, the physical base address of the page middle directory is extracted from the page upper directory entry. Then, based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the page middle bits of the virtual address, the physical address of the page middle directory entry is determined. Then, based on the physical address of the page middle directory entry, the physical base address of the physical page table is extracted from the page middle directory entry. Then, based on the physical base address of the physical page table and the offset within the physical page table extracted from the offset bits of the virtual address, the physical address corresponding to the virtual address is determined. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations in this regard.

[0043] In a specific example, when determining the physical address of the page global directory entry based on the physical base address of the page global directory and the index of the page global directory entry of the page global directory, the physical base address of the page global directory and the index of the page global directory entry of the page global directory are added together to obtain the physical address of the page global directory entry. When determining the physical address of the page upper directory entry based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the virtual address, the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the virtual address are added together to obtain the physical address of the page upper directory entry. When determining the physical address of the page middle directory entry based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the page middle bits of the virtual address, the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the page middle bits of the virtual address are added together to obtain the physical address of the page middle directory entry. When determining the physical address corresponding to the virtual address based on the physical base address of the physical page table and the offset within the physical page table extracted from the offset bits of the virtual address, the physical base address of the physical page table and the offset within the physical page table extracted from the offset bits of the virtual address are added together to obtain the physical address corresponding to the virtual address. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations in this regard.

[0044] In the prior art, Linux memory adopts the "paging mechanism" to support the fast and efficient management of large address spaces. Although the memory page size is configurable in principle, the default 4KB (4096 bytes) page, i.e., the small page, is adopted in the Linux kernel. That is to say, the memory size indicated by the physical page table is 4KB. At this time, the virtual address needs to go through four levels of page table mappings, namely PGD (Page Global Directory), PUD (Page Upper Directory), PMD (Page Middle Directory), and PTE (Page Table Entry), in sequence to obtain the physical address corresponding to the virtual address. In the structure of the 4-level page table, the address mapping process needs to access the memory up to 4 times. In the embodiment of the present application, in order to accelerate the mapping from the virtual space to the memory space and thus improve the overall memory access performance, the memory page size is configured as a 2M BYTES page, i.e., the large page. That is to say, the memory size indicated by the physical page table is 2M BYTES. At this time, the virtual address needs to go through three levels of page table mappings, namely PGD (Page Global Directory), PUD (Page Upper Directory), and PMD (Page Middle Directory), in sequence to obtain the physical address corresponding to the virtual address. With only the structure of the 3-level page table, the number of times the address mapping process needs to access the memory is reduced to 3 times. Compared with the prior art, the mapping from the virtual space to the memory space is accelerated, and thus the overall memory access performance is improved. That is to say, a memory size of 2M BYTES indicated by the physical page table can effectively accelerate the mapping from the virtual space to the memory space. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0045] In practical applications, for the virtual address to physical address resolution function follow_pfn similar to the kernel, a corresponding resolution function follow_pfn_huge for huge pages with a size of 2MBYTES is added, and the resolution for huge pages with a size of 2M BYTES is increased. In the kvm module, wherever the physical address is obtained using the resolution function follow_pfn, it is replaced with the resolution function follow_pfn_huge to support the mapping resolution of huge pages with a size of 2M BYTES. Similarly, the resolution function in the vfio module is also replaced accordingly. Among them, KVM is a virtualization technology based on CPU hardware support and can be implemented as a module for Linux, namely the KVM module. The vfio module is a set of user-space driver frameworks that provide two basic services: providing an interface for the user space to access hardware devices; providing an interface for the user space to configure the IOMMU. The vfio module consists of a platform-independent interface layer and a platform-dependent implementation layer. The interface layer abstracts the services into IOCTL commands, standardizes the operation process, defines common data structures, and interacts with the user space. The implementation layer completes the promised services. Accordingly, a high-performance driver supporting DMA operations can be implemented in the user space. In a virtualization scenario, device passthrough can also be fully implemented in the user space. The implementation layer of the vfio module is further divided into a device implementation layer and an IOMMU implementation layer. Currently, vfio only supports PCI devices. There are two types of IOMMU implementation layers: x86 and PowerPC. The vfio is designed flexibly and can easily add support for other types of hardware and IOMMUs. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0046] In step S103, if it is determined that the start address is not aligned with the memory size indicated by the physical page table, or the size of the first memory is not an integer multiple of the memory size indicated by the physical page table, the mapping relationship between the second virtual space and the second memory fails to be established.

[0047] Through the memory mapping method of the host computer provided by the embodiments of the present application, it is determined whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table. If it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then a mapping relationship is established between the second virtual space in the first virtual space and the second memory in the first memory. Among them, the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. Compared with other existing methods, when it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, by establishing a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, the mapping from the virtual space to the memory space can be accelerated, thereby improving the overall access performance of the memory.

[0048] The memory mapping method of the host computer in this embodiment can be executed by any suitable device with data processing capabilities, including but not limited to: cameras, terminals, mobile terminals, PCs, servers, in-vehicle devices, entertainment devices, advertising devices, personal digital assistants (PDAs), tablet computers, laptop computers, handheld game consoles, glasses, watches, wearable devices, virtual display devices, or display enhancement devices, etc.

[0049] Refer to Figure 2A , which shows the flowchart of the steps of the memory mapping method of the host computer in the second embodiment of the present application.

[0050] Specifically, the memory mapping method of the host computer provided in this embodiment includes the following steps:

[0051] In step S201, it is determined whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table.

[0052] Since the specific implementation manner of this step S201 is similar to the specific implementation manner of the above step S101, it will not be elaborated here.

[0053] In step S202, based on the starting address of the second virtual space and the starting address of the second memory, a mapping relationship is established between the second virtual space in the first virtual space and the second memory in the first memory.

[0054] In the embodiments of the present application, the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. The starting address of the second memory is aligned with the memory size indicated by the physical page table. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0055] In some alternative embodiments, the memory size indicated by the physical page table is 1G BYTES. When establishing the mapping relationship between the second virtual space and the second memory based on the starting address of the second virtual space and the starting address of the second memory, a mapping relationship between the page global directory entry and the physical base address of the page upper directory is established based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the starting address of the second virtual space; a mapping relationship between the page upper directory entry and the physical base address of the physical page table corresponding to the second memory is established based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the second virtual space, so as to establish the mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the starting address of the second memory. Thus, by establishing a mapping relationship between the page upper directory entry and the physical base address of the physical page table corresponding to the second memory based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the second virtual space, the page table mapping of the physical page table of the linux kernel can be extended to support 1G BYTES large page mapping, reducing the mapping levels and the number of page table entries between the virtual space and the physical space, accelerating the mapping from the virtual space to the physical space, and thus effectively improving the overall memory access performance. In addition, the address mapping information stored in the TLB is in units of 1G BYTES large pages, increasing the coverage of the address mapping information in the TLB, improving the hit rate of the TLB, and greatly reducing the overhead of address mapping, thereby further accelerating the mapping from the virtual space to the physical space and improving the overall memory access performance. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0056] In a specific example, the physical base address of the page global directory is read from a register. The first part of the starting address of the second virtual space may be the upper 6 bits, or the upper 8 bits. The second part of the starting address of the second virtual space may be the upper 6 bits, or the upper 8 bits that immediately follow the first part. Specifically, based on the physical base address of the read page global directory and the index of the page global directory entry of the page global directory extracted from the page global bits of the starting address of the second virtual space, a mapping relationship is established between the page global directory entry and the physical base address of the page upper directory; based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the starting address of the second virtual space, a mapping relationship is established between the page upper directory entry and the physical base address of the physical page table corresponding to the second memory, so as to establish a mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the starting address of the second memory. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations in this regard.

[0057] In a specific example, as Figure 2B shown, the host reserved memory management module (hereinafter referred to as the vmem module) adds memory page table management for the physical page table mapping of the linux kernel. When the vmem module selects a physical address segment [start, end) of a continuous memory to directly perform the physical page table mapping of the linux kernel; its starting address start needs to be 1G BYTES aligned, and the memory space indicated by the physical address segment [start, end) needs to be an integer multiple of 1G BYTES, otherwise a failure is returned. The mapping is performed on this continuous memory in a loop, and each loop maps 1G BYTES of memory; the mapping address starts from start (addr = start), and a virtual space of the corresponding size and the corresponding pgd page table mapping are established; then the pgd page table and the pud-level page table mapping are performed, and the page table entries of the 1G BYTES large page corresponding to the pud-level page table are directly established, and then 1G BYTES of memory is mapped in a loop until all the 1G BYTES large page mappings corresponding to the pud-level page table are completed. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations in this regard.

[0058] In some alternative embodiments, after establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, the method further includes: based on the mapping relationship between the second virtual space and the second memory, mapping the virtual address associated with the access operation of the application program to obtain the physical address corresponding to the virtual address. Thereby, based on the mapping relationship between the second virtual space and the second memory, mapping the virtual address associated with the access operation of the application program reduces the mapping levels and the number of page table entries between the virtual space and the physical space, speeds up the mapping from the virtual space to the physical space, and thus effectively improves the overall memory access performance. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0059] In a specific example, when mapping the virtual address associated with the access operation of the application program based on the mapping relationship between the second virtual space and the second memory, based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the virtual address, the physical base address of the page upper directory is extracted from the page global directory entry; based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the virtual address, the physical base address of the physical page table is extracted from the page upper directory entry; based on the physical base address of the physical page table and the offset within the physical page table extracted from the third part of the virtual address, the physical address corresponding to the virtual address is determined. Thereby, for a large page of 1G BYTES in size, the physical memory address corresponding to the virtual address can be obtained at the level of the page middle directory. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0060] In a specific example, such as Figure 2CAs shown, the physical base address of the page global directory is read from register cr3, and the index of the page global directory entry of the page global directory is extracted from the page global bits of the virtual address. Then, based on the physical base address of the page global directory and the index of the page global directory entry of the page global directory, the physical address of the page global directory entry is determined. Then, based on the physical address of the page global directory entry, the physical base address of the page upper directory is extracted from the page global directory entry. Then, based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the virtual address, the physical address of the page upper directory entry is determined. Then, based on the physical address of the page upper directory entry, the physical base address of the physical page table is extracted from the page upper directory entry. Then, based on the physical base address of the physical page table and the offset within the physical page table extracted from the offset bits of the virtual address, the physical address corresponding to the virtual address is determined. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0061] In a specific example, when determining the physical address of the page global directory entry based on the physical base address of the page global directory and the index of the page global directory entry of the page global directory, the physical base address of the page global directory and the index of the page global directory entry of the page global directory are added together to obtain the physical address of the page global directory entry. When determining the physical address of the page upper directory entry based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the virtual address, the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the page upper bits of the virtual address are added together to obtain the physical address of the page upper directory entry. When determining the physical address corresponding to the virtual address based on the physical base address of the physical page table and the offset within the physical page table extracted from the offset bits of the virtual address, the physical base address of the physical page table and the offset within the physical page table extracted from the offset bits of the virtual address are added together to obtain the physical address corresponding to the virtual address. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0062] In the prior art, Linux memory adopts a "paging mechanism" to support the fast and efficient management of large address spaces. Although the memory page size is configurable in principle, the default 4KB (4096 bytes) page, i.e., the small page, is adopted in the Linux kernel. That is to say, the memory size indicated by the physical page table is 4KB. At this time, the virtual address needs to go through four levels of page table mappings, namely PGD (Page Global Directory), PUD (Page Upper Directory), PMD (Page Middle Directory), and PTE (Page Table Entry), in sequence to obtain the physical address corresponding to the virtual address. In the structure of the 4-level page table, the address mapping process needs to access the memory up to 4 times. In the embodiment of the present application, in order to accelerate the mapping from the virtual space to the memory space and thus improve the overall memory access performance, the memory page size is configured as a 1G BYTES page, i.e., the large page. That is to say, the memory size indicated by the physical page table is 1G BYTES. At this time, the virtual address needs to go through two levels of page table mappings, namely PGD (Page Global Directory) and PUD (Page Upper Directory), in sequence to obtain the physical address corresponding to the virtual address. With only the structure of the 2-level page table, the number of times the address mapping process needs to access the memory is reduced to 2 times. Compared with the prior art and the memory size of 2M BYTES indicated by the physical page table, the mapping from the virtual space to the memory space is further accelerated, and the overall memory access performance is further improved. That is to say, a memory size of 1G BYTES indicated by the physical page table can effectively accelerate the mapping from the virtual space to the memory space. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0063] In practical applications, for the virtual address to physical address resolution function follow_pfn similar to the kernel, a corresponding resolution function follow_pfn_huge for huge pages of 1GBYTES in size is added, and the resolution for huge pages of 1G BYTES in size is increased. In the kvm module, wherever the physical address is obtained using the resolution function follow_pfn, it is replaced with the resolution function follow_pfn_huge to support the mapping resolution of huge pages of 1G BYTES in size. Similarly, the resolution functions in the vfio module are replaced accordingly. Among them, KVM is a virtualization technology based on CPU hardware support and can be implemented as a module for Linux, namely the KVM module. The vfio module is a set of user-space driver frameworks that provide two basic services: providing an interface for the user space to access hardware devices; providing an interface for the user space to configure the IOMMU. The vfio module consists of a platform-independent interface layer and a platform-dependent implementation layer. The interface layer abstracts the services into IOCTL commands, standardizes the operation process, defines common data structures, and interacts with the user space. The implementation layer fulfills the promised services. Accordingly, a high-performance driver supporting DMA operations can be implemented in the user space. In a virtualization scenario, device passthrough can also be fully implemented in the user space. The implementation layer of the vfio module is further divided into a device implementation layer and an IOMMU implementation layer. Currently, vfio only supports PCI devices. There are two types of IOMMU implementation layers: x86 and PowerPC. The vfio is designed flexibly and it is convenient to add support for other types of hardware and IOMMUs. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0064] In step S203, if it is determined that the start address is not aligned with the memory size indicated by the physical page table, or the size of the first memory is not an integer multiple of the memory size indicated by the physical page table, the mapping relationship between the second virtual space and the second memory fails to be established.

[0065] Through the memory mapping method of the host computer provided by the embodiments of the present application, determine whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table. If it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then based on the starting address of the second virtual space and the starting address of the second memory, establish a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory. Among them, the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. Compared with other existing methods, when it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, based on the starting address of the second virtual space and the starting address of the second memory, establish a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, which can accelerate the mapping from the virtual space to the memory space, thereby improving the overall access performance of the memory.

[0066] The memory mapping method of the host computer in this embodiment can be executed by any suitable device with data processing capabilities, including but not limited to: cameras, terminals, mobile terminals, PCs, servers, in-vehicle devices, entertainment devices, advertising devices, personal digital assistants (PDAs), tablet computers, laptop computers, handheld game consoles, glasses, watches, wearable devices, virtual display devices, or display enhancement devices, etc.

[0067] Refer to Figure 3A , which shows the step flowchart of the memory mapping method of the host computer in Embodiment 3 of the present application.

[0068] Specifically, the memory mapping method of the host computer provided in this embodiment includes the following steps:

[0069] In step S301, based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the starting address of the first virtual space of the application program of the host computer, establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory.

[0070] Since the specific implementation manner of this step S301 is similar to the specific implementation manner of establishing the mapping relationship between the page global directory entry and the physical base address of the page upper directory in the above-mentioned Embodiment 1 or Embodiment 2, it will not be elaborated here.

[0071] In step S302, if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, a mapping relationship is established between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory with the same memory size as indicated by the first physical page table, based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the first virtual space, so as to establish a mapping relationship between the second virtual space in the first virtual space with the same memory size as indicated by the first physical page table and the second memory.

[0072] In the embodiment of the present application, the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory. The memory size indicated by the first physical page table is 1G BYTES. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0073] In step S303, if it is determined that the starting address of the first memory is not aligned with the memory size indicated by the first physical page table, a mapping relationship is established between the page upper directory entry and the physical base address of the page middle directory, based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the first virtual space.

[0074] In some alternative embodiments, if it is determined that the starting address of the first memory is aligned with the memory size indicated by the second physical page table in the first memory, a mapping relationship is established between the page middle directory entry and the physical base address of the second physical page table corresponding to a third memory in the first memory that has the same memory size as indicated by the second physical page table, based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the starting address of the first virtual space, so as to establish a mapping relationship between a third virtual space in the first virtual space that has the same memory size as indicated by the second physical page table and the third memory, where the physical base address of the second physical page table corresponding to the third memory is the starting address of the third memory. The memory size indicated by the second physical page table is 2M BYTES. Thus, by establishing a mapping relationship between the page middle directory entry and the physical base address of the second physical page table corresponding to a third memory in the first memory that has the same memory size as indicated by the second physical page table, based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the starting address of the first virtual space, the page table mapping of the physical page table of the linux kernel can be extended to support large page mapping of 2M BYTES, reducing the mapping levels and the number of page table entries between the virtual space and the physical space, accelerating the mapping from the virtual space to the physical space, and thus effectively improving the overall memory access performance. In addition, the address mapping information stored in the TLB is in units of 2M BYTES large pages, increasing the coverage of the address mapping information in the TLB, improving the hit rate of the TLB, and greatly reducing the overhead of address mapping, thereby further accelerating the mapping from the virtual space to the physical space and improving the overall memory access performance. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0075] In some alternative embodiments, if it is determined that the start address of the first memory is not aligned with the memory size indicated by the second physical page table in the first memory, a mapping relationship is established between the page middle directory entry and the physical base address of the page table entry based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the start address of the first virtual space; a mapping relationship is established between the page table entry and the physical base address of the third physical page table corresponding to the fourth memory in the first memory that has the same memory size as indicated by the third physical page table based on the physical base address of the page table entry and the index of the page table entry extracted from the fourth part of the start address of the first virtual space, so as to establish a mapping relationship between the fourth virtual space in the first virtual space that has the same memory size as indicated by the third physical page table and the fourth memory, where the physical base address of the third physical page table corresponding to the fourth memory is the start address of the fourth memory. The memory size indicated by the third physical page table is 4K BYTES. It can be understood that the above description is only exemplary, and the embodiments of the present application do not make any limitations thereto.

[0076] In a specific example, such as Figure 3BAs shown, the host reserved memory management module (hereinafter referred to as the vmem module) adds memory page table management for the physical page table mapping of the linux kernel. When the vmem module selects a physical address segment [start, end) of a continuous memory and directly performs the physical page table mapping of the linux kernel. Specifically, 1. The host reserved memory management module (hereinafter referred to as the vmem module) selects a continuous memory [start, end) and directly performs the pfn page table mapping; 2. Loop through this continuous memory for mapping, and each loop will map 1g of memory; the mapping address starts from start (addr = start), and establish its corresponding pgd page table mapping; if the mapping is not completed, go to step 3, otherwise jump to step 10; 3. Perform the page table mapping at the pud level. First, check the page table alignment of the mapping address addr. If it is aligned with a 1g large page, jump to step 4, otherwise jump to step 5; 4. Directly perform the large page table mapping at the pud level, establish the corresponding page table entry of pud, and there is no need to perform the next-level page table mapping. After the mapping is completed, return to step 2; 5. Perform the normal page table mapping at the pud level, establish the corresponding page table entry of pud, but still need to perform the next-level page table mapping; 6. Perform the page table mapping at the pmd level. First, check the page table alignment of the mapping address addr. If it is aligned with a 2m large page, jump to step 7, otherwise jump to step 8; 7. Directly perform the large page table mapping at the pmd level, establish the corresponding page table entry of pmd, and there is no need to perform the next-level page table mapping. After the mapping is completed, return to step 2; 8. Perform the normal page table mapping at the pmd level, establish the corresponding page table entry of pmd, but still need to perform the next-level page table mapping; 9. Perform the normal page table mapping at the pte level, establish the corresponding page table entry of pmd, and after one page table mapping loop is completed, return to step 2; 10. Complete all page table mappings. Thus, through the new hybrid page table mapping, in a memory range, as much as possible, 1GBYTES or 2M BYTES large pages are automatically used for mapping, thereby improving the efficiency of address mapping. In addition, the hybrid mapping can automatically maximize the reduction of page table entries according to the memory size; reducing page table entries can not only reduce the memory occupancy of metadata, but also reduce the number of TLB misses and improve the memory access efficiency.

[0077] Through the memory mapping method of the host computer provided by the embodiments of the present application, based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the starting address of the first virtual space of the application program on the host computer, a mapping relationship is established between the page global directory entry and the physical base address of the page upper directory; if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the first virtual space, a mapping relationship is established between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory that has the same memory size as the memory size indicated by the first physical page table, so as to establish a mapping relationship between the second virtual space in the first virtual space that has the same memory size as the memory size indicated by the first physical page table and the second memory, wherein the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory. Compared with other existing methods, if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the first virtual space, a mapping relationship is established between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory that has the same memory size as the memory size indicated by the first physical page table, so as to establish a mapping relationship between the second virtual space in the first virtual space that has the same memory size as the memory size indicated by the first physical page table and the second memory, which can effectively reduce the mapping level from the virtual space to the physical space, can accelerate the mapping from the virtual space to the memory space, and thus improve the overall access performance of the memory.

[0078] The memory mapping method of the host computer in this embodiment can be executed by any suitable device with data processing capabilities, including but not limited to: cameras, terminals, mobile terminals, PCs, servers, in-vehicle devices, entertainment devices, advertising devices, personal digital assistants (PDAs), tablet computers, laptop computers, handheld game consoles, glasses, watches, wearable devices, virtual display devices, or display enhancement devices, etc.

[0079] Referring to Figure 4 , a schematic structural diagram of the memory mapping device of the host computer in the fourth embodiment of the present application is shown.

[0080] The memory mapping device of the host computer provided in this embodiment includes: a first determination module 401, configured to determine whether the start address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table; a first establishment module 402, configured to establish a mapping relationship between a second virtual space in the first virtual space and a second memory in the first memory if it is determined that the start address is aligned with the memory size indicated by the physical page table and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table.

[0081] Optionally, the first establishment module 402 includes: an establishment sub-module 4021, configured to establish a mapping relationship between the second virtual space and the second memory based on the start address of the second virtual space and the start address of the second memory, where the start address of the second memory is aligned with the memory size indicated by the physical page table.

[0082] Optionally, the memory size indicated by the physical page table is 2M BYTES. The establishment sub-module 4021 is specifically configured to: establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the page global directory read and the index of the page global directory entry extracted from the first part of the start address of the second virtual space; establish a mapping relationship between the page upper directory entry and the physical base address of the page middle directory based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the start address of the second virtual space; establish a mapping relationship between the page middle directory entry and the physical base address of the physical page table corresponding to the second memory based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the start address of the second virtual space, so as to establish a mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the start address of the second memory.

[0083] Optionally, the memory size indicated by the physical page table is 1G BYTES. The establishing sub-module 4021 is specifically configured to: establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the read page global directory and the index of the page global directory entry extracted from the first part of the starting address of the second virtual space; establish a mapping relationship between the page upper directory entry and the physical base address of the physical page table corresponding to the second memory based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the starting address of the second virtual space, so as to establish a mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the starting address of the second memory.

[0084] Optionally, after the first establishing module 4021, the apparatus further includes: a first mapping module 403, configured to map the virtual address associated with the access operation of the application program based on the mapping relationship between the second virtual space and the second memory, so as to obtain the physical address corresponding to the virtual address.

[0085] Optionally, the first mapping module 403 is specifically configured to: extract the physical base address of the page upper directory from the page global directory entry based on the physical base address of the read page global directory and the index of the page global directory entry extracted from the first part of the virtual address; extract the physical base address of the page middle directory from the page upper directory entry based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the virtual address; extract the physical base address of the physical page table from the page middle directory entry based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the virtual address; determine the physical address corresponding to the virtual address based on the physical base address of the physical page table and the offset within the physical page table extracted from the fourth part of the virtual address.

[0086] Optionally, after the first establishing module 402, the apparatus further includes: a second mapping module 404, configured to map the virtual address associated with the access operation of the application program based on the mapping relationship between the second virtual space and the second memory, so as to obtain the physical address corresponding to the virtual address.

[0087] Optionally, the second mapping module 404 is specifically configured to: extract the physical base address of the page upper directory from the page global directory entry based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the virtual address; extract the physical base address of the physical page table from the page upper directory entry based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the virtual address; and determine the physical address corresponding to the virtual address based on the physical base address of the physical page table and the offset within the physical page table extracted from the third part of the virtual address.

[0088] The memory mapping device of the host computer in this embodiment is used to implement the corresponding memory mapping method of the host computer in the foregoing multiple method embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be elaborated herein.

[0089] Refer to Figure 5 , which shows a schematic structural diagram of the memory mapping device of the host computer in Embodiment 5 of the present application.

[0090] The memory mapping device of the host computer provided in this embodiment includes: a second establishment module 501, configured to establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the starting address of the first virtual space of the application program of the host computer; a third establishment module 502, configured to, if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, establish a mapping relationship between the page upper directory entry and the physical base address of the first physical page table corresponding to a second memory in the first memory that has the same memory size as that indicated by the first physical page table based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the first virtual space, so as to establish a mapping relationship between a second virtual space in the first virtual space that has the same memory size as that indicated by the first physical page table and the second memory, where the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory.

[0091] Optionally, the apparatus further includes: a fourth establishment module 503, configured to, if it is determined that the start address of the first memory is not aligned with the memory size indicated by the first physical page table, establish a mapping relationship between the page upper directory entry and the physical base address of the page middle directory based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the start address of the first virtual space; a fifth establishment module 504, configured to, if it is determined that the start address of the first memory is aligned with the memory size indicated by the second physical page table in the first memory, establish a mapping relationship between the page middle directory entry and the physical base address of the second physical page table corresponding to a third memory in the first memory that has the same memory size as indicated by the second physical page table based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the start address of the first virtual space, so as to establish a mapping relationship between a third virtual space in the first virtual space that has the same memory size as indicated by the second physical page table and the third memory, where the physical base address of the second physical page table corresponding to the third memory is the start address of the third memory.

[0092] Optionally, the apparatus further includes: a sixth establishment module 505, configured to, if it is determined that the start address of the first memory is not aligned with the memory size indicated by the second physical page table in the first memory, establish a mapping relationship between the page middle directory entry and the physical base address of the page table entry based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the start address of the first virtual space; a seventh establishment module 506, configured to establish a mapping relationship between the page table entry and the physical base address of the third physical page table corresponding to a fourth memory in the first memory that has the same memory size as indicated by the third physical page table based on the physical base address of the page table entry and the index of the page table entry extracted from the fourth part of the start address of the first virtual space, so as to establish a mapping relationship between a fourth virtual space in the first virtual space that has the same memory size as indicated by the third physical page table and the fourth memory, where the physical base address of the third physical page table corresponding to the fourth memory is the start address of the fourth memory.

[0093] The memory mapping apparatus of the host computer in this embodiment is used to implement the corresponding memory mapping method of the host computer in the foregoing multiple method embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be elaborated herein.

[0094] Figure 6 FIG. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application; the electronic device may include:

[0095] One or more processors 601;

[0096] A computer-readable medium 602 that can be configured to store one or more programs,

[0097] When the one or more programs are executed by the one or more processors, the one or more processors implement the memory mapping method of the host computer as described in the first, second, or third embodiment above.

[0098] Figure 7 This is the hardware structure of the electronic device in the seventh embodiment of the present application; as Figure 7 shown, the hardware structure of the electronic device may include: a processor 701, a communication interface 702, a computer-readable medium 703, and a communication bus 704;

[0099] wherein the processor 701, the communication interface 702, and the computer-readable medium 703 complete communication with each other through the communication bus 704;

[0100] Optionally, the communication interface 702 may be an interface of a communication module, such as an interface of a GSM module;

[0101] Among them, the processor 701 can be specifically configured to: determine whether the starting address of the first memory reserved by the host for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table; if it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then establish a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. In addition, the processor 701 can also be configured to: based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the starting address of the first virtual space of the application program of the host, establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory; if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, then based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the first virtual space, establish a mapping relationship between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory with the same memory size as indicated by the first physical page table, so as to establish a mapping relationship between the second virtual space in the first virtual space with the same memory size as indicated by the first physical page table and the second memory, where the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory.

[0102] The processor 701 can be a general-purpose processor, including a central processing unit (CPU for short), a network processor (NP for short), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0103] The computer-readable medium 703 can be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc.

[0104] In particular, according to an embodiment of the present disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, an embodiment of the present disclosure includes a computer program product that includes a computer program carried on a computer-readable medium, and the computer program includes program code configured to execute the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication section and / or installed from a removable medium. When the computer program is executed by a central processing unit (CPU), the above-described functions defined in the method of the present application are performed. It should be noted that the computer-readable medium described in the present application can be a computer-readable signal medium, a computer-readable storage medium, or any combination of the two. The computer-readable medium can, for example but is not limited to, be an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples of the computer-readable storage medium can include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, a random access storage medium (RAM), a read-only storage medium (ROM), an erasable programmable read-only storage medium (EPROM or flash memory), an optical fiber, a portable compact disk read-only storage medium (CD-ROM), an optical storage medium, a magnetic storage medium, or any suitable combination of the above. In the present application, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In the present application, the computer-readable signal medium can include a data signal propagated in a baseband or as part of a carrier wave, in which the computer-readable program code is carried. Such a propagated data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The computer-readable signal medium can also be any computer-readable medium other than the computer-readable storage medium, which can send, propagate, or transmit a program configured to be used by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted by any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0105] Computer program code configured to perform the operations of this application may be written in one or more programming languages or combinations thereof. The programming languages include object-oriented programming languages such as Java, Smalltalk, C++, and also include conventional procedural programming languages such as the "C" language or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, executed as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a local area network (LAN) or a wide area network (WAN), or it may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0106] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a portion of code that contains one or more executable instructions configured to implement the specified logical function. There are specific sequential relationships in the above specific embodiments, but these sequential relationships are only exemplary. In specific implementations, these steps may be fewer, more, or the execution order may be adjusted. That is, in some alternative implementations, the functions marked in the blocks may also occur in a different order than that marked in the accompanying drawings. For example, two consecutively represented blocks may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, may be implemented by a dedicated hardware-based system configured to perform the specified functions or operations, or may be implemented by a combination of dedicated hardware and computer instructions.

[0107] The modules described in the embodiments of this application may be implemented in software or in hardware. The described modules may also be provided in a processor. For example, it may be described as: a processor includes a first determination module and a first establishment module. Among them, the names of these modules do not constitute a limitation to the module itself in some cases. For example, the first determination module may also be described as "the module that determines whether the starting address of the first memory reserved by the host for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table".

[0108] As another aspect, the present application also provides a computer-readable medium, on which a computer program is stored, and when the program is executed by a processor, it implements the memory mapping method of the host computer described in the above-mentioned Embodiment 1, Embodiment 2 or Embodiment 3.

[0109] As another aspect, the present application also provides a computer-readable medium, which may be included in the device described in the above embodiments; or may exist alone without being assembled into the device. The above computer-readable medium carries one or more programs, and when the one or more programs are executed by the device, the device is caused to: determine whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table; if it is determined that the starting address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then establish a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table. In addition, the device is also caused to: establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the read page global directory and the index of the page global directory entry extracted from the first part of the starting address of the first virtual space of the application program of the host computer; if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, then based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the starting address of the first virtual space, establish a mapping relationship between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory with the same memory size as that indicated by the first physical page table, so as to establish a mapping relationship between the second virtual space in the first virtual space with the same memory size as that indicated by the first physical page table and the second memory, where the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory.

[0110] In various embodiments of the present disclosure, the expressions "first", "second", "the first", or "the second" used may modify various components regardless of order and / or importance, but these expressions do not limit the corresponding components. The above expressions are only configured for the purpose of distinguishing an element from other elements. For example, a first user device and a second user device represent different user devices, although both are user devices. For example, without departing from the scope of the present disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0111] When an element (e.g., a first element) is referred to as "(operatively or communicatively) coupled" or "(operatively or communicatively) coupled to" or "connected to" another element (e.g., a second element), it should be understood that the one element is directly connected to the other element or the one element is indirectly connected to the other element via yet another element (e.g., a third element). Conversely, it can be understood that when an element (e.g., a first element) is referred to as "directly connected" or "directly coupled" to another element (a second element), then no element (e.g., a third element) is inserted between the two.

[0112] The above description is only a preferred embodiment of the present application and an explanation of the applied technical principles. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by the specific combination of the above technical features, and should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above inventive concept. For example, a technical solution formed by mutually replacing the above features with (but not limited to) technical features having similar functions disclosed in the present application.

Claims

1. A memory mapping method for a host computer, comprising: Determining whether the start address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table, where the alignment means that multiple address bits of the start address of the first memory are all zero; If it is determined that the start address is aligned with the memory size indicated by the physical page table, and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, then establishing a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table.

2. The method according to claim 1, wherein, The establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory includes: Based on the start address of the second virtual space and the start address of the second memory, establishing a mapping relationship between the second virtual space and the second memory, where the start address of the second memory is aligned with the memory size indicated by the physical page table.

3. The method according to claim 2, wherein, The memory size indicated by the physical page table is 2M BYTES. The establishing the mapping relationship between the second virtual space and the second memory based on the start address of the second virtual space and the start address of the second memory includes: Based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the start address of the second virtual space, establishing a mapping relationship between the page global directory entry and the physical base address of the page upper directory; Based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the start address of the second virtual space, establishing a mapping relationship between the page upper directory entry and the physical base address of the page middle directory; Based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the start address of the second virtual space, establishing a mapping relationship between the page middle directory entry and the physical base address of the physical page table corresponding to the second memory, so as to establish a mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the start address of the second memory.

4. The method according to claim 2, wherein The memory size indicated by the physical page table is 1G BYTES. The establishing the mapping relationship between the second virtual space and the second memory based on the start address of the second virtual space and the start address of the second memory includes: Based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the start address of the second virtual space, establishing a mapping relationship between the page global directory entry and the physical base address of the page upper directory; Based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the starting address of the second virtual space, establish a mapping relationship between the page upper directory entry and the physical base address of the physical page table corresponding to the second memory, so as to establish a mapping relationship between the second virtual space and the second memory, where the physical base address of the physical page table is the starting address of the second memory.

5. The method according to claim 3, wherein, After establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, the method further includes: Based on the mapping relationship between the second virtual space and the second memory, map the virtual address associated with the access operation of the application program to obtain the physical address corresponding to the virtual address.

6. The method according to claim 5, wherein, The mapping of the virtual address associated with the access operation of the application program based on the mapping relationship between the second virtual space and the second memory includes: Based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the virtual address, extract the physical base address of the page upper directory from the page global directory entry; Based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the virtual address, extract the physical base address of the page middle directory from the page upper directory entry; Based on the physical base address of the page middle directory and the index of the page middle directory entry of the page middle directory extracted from the third part of the virtual address, extract the physical base address of the physical page table from the page middle directory entry; Based on the physical base address of the physical page table and the offset within the physical page table extracted from the fourth part of the virtual address, determine the physical address corresponding to the virtual address.

7. The method according to claim 4, wherein After establishing the mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, the method further includes: Based on the mapping relationship between the second virtual space and the second memory, map the virtual address associated with the access operation of the application program to obtain the physical address corresponding to the virtual address.

8. The method according to claim 7, wherein, The mapping of the virtual address associated with the access operation of the application program based on the mapping relationship between the second virtual space and the second memory includes: Based on the physical base address of the page global directory read and the index of the page global directory entry of the page global directory extracted from the first part of the virtual address, extract the physical base address of the page upper directory from the page global directory entry; Based on the physical base address of the page upper directory and the index of the page upper directory entry of the page upper directory extracted from the second part of the virtual address, extract the physical base address of the physical page table from the page upper directory entry; Based on the physical base address of the physical page table and the offset within the physical page table extracted from the third part of the virtual address, determine the physical address corresponding to the virtual address.

9. A memory mapping method for a host computer, including: Establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the read page global directory and the index of the page global directory entry extracted from the first part of the starting address of the first virtual space of the host application; If it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, establish a mapping relationship between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory with the same memory size as indicated by the first physical page table based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the starting address of the first virtual space, so as to establish a mapping relationship between the second virtual space in the first virtual space with the same memory size as indicated by the first physical page table and the second memory, wherein the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory, and the alignment indicates that multiple address bits of the starting address of the first memory are all zero.

10. The method according to claim 9, wherein The method further includes: If it is determined that the starting address of the first memory is not aligned with the memory size indicated by the first physical page table, establish a mapping relationship between the page upper directory entry and the physical base address of the page middle directory based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the starting address of the first virtual space; If it is determined that the starting address of the first memory is aligned with the memory size indicated by the second physical page table in the first memory, establish a mapping relationship between the page middle directory entry and the physical base address of the second physical page table corresponding to the third memory in the first memory with the same memory size as indicated by the second physical page table based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the starting address of the first virtual space, so as to establish a mapping relationship between the third virtual space in the first virtual space with the same memory size as indicated by the second physical page table and the third memory, wherein the physical base address of the second physical page table corresponding to the third memory is the starting address of the third memory.

11. The method according to claim 10, wherein, The method further includes: If it is determined that the starting address of the first memory is not aligned with the memory size indicated by the second physical page table in the first memory, establish a mapping relationship between the page middle directory entry and the physical base address of the page table entry based on the physical base address of the page middle directory and the index of the page middle directory entry extracted from the third part of the starting address of the first virtual space; Based on the physical base address of the page table entry and the index of the page table entry extracted from the fourth part of the starting address of the first virtual space, establish a mapping relationship between the page table entry and the physical base address of the third physical page table corresponding to the fourth memory in the first memory with the same memory size as indicated by the third physical page table, so as to establish a mapping relationship between the fourth virtual space in the first virtual space with the same memory size as indicated by the third physical page table and the fourth memory, where the physical base address of the third physical page table corresponding to the fourth memory is the starting address of the fourth memory.

12. A memory mapping device of a host computer, the device includes: A first determination module, configured to determine whether the starting address of the first memory reserved by the host computer for the first virtual space of the application program is aligned with the memory size indicated by the physical page table in the first memory, and whether the size of the first memory is an integer multiple of the memory size indicated by the physical page table, where the alignment indicates that multiple address bits of the starting address of the first memory are all zero; A first establishment module, configured to, if it is determined that the starting address is aligned with the memory size indicated by the physical page table and the size of the first memory is an integer multiple of the memory size indicated by the physical page table, establish a mapping relationship between the second virtual space in the first virtual space and the second memory in the first memory, where the sizes of the second virtual space and the second memory are both the same as the memory size indicated by the physical page table.

13. A memory mapping device of a host computer, the device includes: A second establishment module, configured to establish a mapping relationship between the page global directory entry and the physical base address of the page upper directory based on the physical base address of the read page global directory and the index of the page global directory entry extracted from the first part of the starting address of the first virtual space of the application program of the host computer; A third establishment module, configured to, if it is determined that the starting address of the first memory reserved for the first virtual space is aligned with the memory size indicated by the first physical page table in the first memory, based on the physical base address of the page upper directory and the index of the page upper directory entry extracted from the second part of the starting address of the first virtual space, establish a mapping relationship between the page upper directory entry and the physical base address of the first physical page table corresponding to the second memory in the first memory with the same memory size as indicated by the first physical page table, so as to establish a mapping relationship between the second virtual space in the first virtual space with the same memory size as indicated by the first physical page table and the second memory, where the physical base address of the first physical page table corresponding to the second memory is the starting address of the second memory, and the alignment indicates that multiple address bits of the starting address of the first memory are all zero.

14. An electronic device, the device includes: One or more processors; A computer-readable medium, configured to store one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the memory mapping method of the host computer as described in any one of claims 1-8, or implement the memory mapping method of the host computer as described in any one of claims 9-11.

15. A computer-readable medium having stored thereon a computer program which, when executed by a processor, implements the memory mapping method of the host computer as described in any one of claims 1-8, or implements the memory mapping method of the host computer as described in any one of claims 9-11.

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