Processing tool and method for processing wafer

Abstract

The present disclosure relates to a processing tool, the processing tool comprising a first wafer mounting frame and a second wafer mounting frame. The first wafer mounting frame is configured to hold a target wafer. The second wafer mounting frame is configured to hold a masking wafer. The masking wafer includes a mask pattern consisting of a plurality of openings through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer. A deposition chamber is configured to receive the first wafer mounting frame and the second wafer mounting frame when the first wafer mounting frame is clamped together with the second wafer mounting frame to hold the target wafer and the masking wafer. The deposition chamber includes a material deposition source, the material deposition source being configured to deposit material from the material deposition source through the plurality of openings in the mask pattern to form material on the target wafer in a predetermined deposition pattern.

Description

Technical Field

[0001] Embodiments of the present invention relate to processing tools and methods of processing wafers. Background Art

[0002] An organic light emitting diode (OLED) is a light emitting diode that includes an emissive electroluminescent layer that includes organic compounds that emit light in response to an electric current. Thus, when an electric current passes through the OLED, the emissive layer emits light.

[0003] An array of such OLEDs can be formed using different organic compounds at different corresponding locations in the array to produce different colors (e.g., red, blue, and green) at those corresponding locations. Thus, by providing appropriate currents to the various OLEDs of the array, a digital image consisting of underlying regions of different colors can be produced. Summary of the invention

[0004] In some embodiments, the present disclosure relates to a processing tool. The processing tool includes: a first wafer mounting frame, including a first mating surface and a first coupling assembly. The first mating surface is configured to hold a target wafer. A second wafer mounting frame includes a second mating surface and a second coupling assembly, the second coupling assembly being configured to engage the first coupling assembly to couple the first wafer mounting frame to the second wafer mounting frame. The second wafer mounting frame is configured to hold a masking wafer on the second mating surface. The masking wafer includes a mask pattern consisting of a plurality of openings through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer. A deposition chamber is configured to receive the first wafer mounting frame and the second wafer mounting frame when the first coupling assembly is engaged with the second coupling assembly to hold the target wafer and the masking wafer. The deposition chamber includes a material deposition source, the material deposition source being configured to deposit material from the material deposition source through the plurality of openings in the mask pattern to form the material on the target wafer in the predetermined deposition pattern.

[0005] In other embodiments, the present disclosure relates to a method for processing a wafer. In the method, a target wafer is held on a first wafer mounting frame, and a first masking wafer is held on a second wafer mounting frame. The first masking wafer includes a first mask pattern consisting of a first plurality of openings through the first masking wafer. The first mask pattern corresponds to a first predetermined deposition pattern to be formed on the target wafer. A first misalignment between a target alignment mark on the target wafer and a first alignment mark on the first masking wafer is determined. At least one of the target wafer and the first masking wafer is moved to reduce the first misalignment, thereby aligning the first masking wafer with the target wafer. After the first masking wafer has been aligned with the target wafer, the first wafer mounting frame is clamped to the second wafer mounting frame. The first wafer mounting frame and the second wafer mounting frame, which include the aligned target wafer and the first masking wafer, are arranged before a first deposition source. A first material is provided from the first deposition source through the first plurality of openings on the first masking wafer to form the first material according to the first predetermined deposition pattern on the target wafer.

[0006] In yet other embodiments, the present disclosure relates to a method for processing a wafer in a cluster tool. In the method, a target wafer including an anode layer is transferred from a transfer load lock to a first processing chamber through a first transfer chamber using a first transfer robot. In the first processing chamber, a hole injection layer is formed on top of the anode layer. The target wafer including the hole injection layer is transferred from the first processing chamber to a second processing chamber using the first transfer robot. In the second processing chamber, a hole transport layer is formed on top of the hole injection layer. The target wafer including the hole transport layer is held on a first wafer mounting frame, and a first masking wafer is held on a second wafer mounting frame. The first masking wafer includes a first mask pattern consisting of a first plurality of openings passing through the first masking wafer. The first mask pattern corresponds to a first predetermined deposition pattern to be formed on the target wafer. A first misalignment amount between a target alignment mark on the target wafer and a first alignment mark on the first masking wafer is determined. At least one of the first masking wafer and the target wafer is moved to reduce the first misalignment amount, thereby aligning the first masking wafer with the target wafer. After the first masking wafer and the target wafer have been aligned, the first wafer mounting frame is clamped to the second wafer mounting frame. The first wafer mounting frame and the second wafer mounting frame, in which the aligned first masking wafer and the target wafer are clamped together, are arranged in a third processing chamber. A first emitting material is deposited through the first plurality of openings on the first masking wafer to form the first emitting material according to the first predetermined deposition pattern on the target wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The various aspects of the present disclosure will be best understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the size of the various features may be arbitrarily increased or reduced for clarity of discussion.

[0008] Figure 1A Schematic diagrams showing some embodiments of processing tools suitable for fabricating OLED devices with high precision patterning.

[0009] Figure 1B Schematic diagrams showing some other embodiments of processing tools suitable for fabricating OLED devices with high precision patterning.

[0010] Figure 2 Schematic diagram showing some embodiments of a cluster tool suitable for fabricating OLED devices with high precision patterning.

[0011] Figure 3A flow chart illustrating a method of manufacturing an OLED device using a cluster tool according to some embodiments.

[0012] Figures 4 to 19 A series of schematic diagrams showing a processing tool at different steps of wafer processing illustrate a method of fabricating OLED devices using a cluster tool according to some embodiments.

[0013] Fig. 20 A cross-sectional view of an OLED device fabricated by a processing tool is shown in accordance with some embodiments.

[0014] Fig.21 A top view of the emissive layer of an OLED according to some embodiments is shown. DETAILED DESCRIPTION

[0015] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples of components and arrangements are set forth below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following description in which a first feature is formed on or on a second feature may include an embodiment in which the first feature and the second feature are formed to be in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the present disclosure may reuse reference numbers and / or letters in various examples. This repetition is for the purpose of brevity and clarity, rather than indicating the relationship between the various embodiments and / or configurations discussed by itself.

[0016] Furthermore, for ease of description, spatially relative terms such as "beneath," "below," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or feature illustrated in the figures to another (other) element or feature. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein may be interpreted accordingly.

[0017] When current passes through the OLED, the emission layer in the OLED emits light. This emission layer is usually made by a selective deposition process to form a pixel array on a chip. For example, a first organic compound that produces blue light when biased by current is first deposited on the chip in a first pattern, then a second organic compound that produces red light when biased by current is deposited on the chip in a second pattern, and then a third organic compound that produces green light when biased by current is deposited on the chip in a third pattern. The first pattern, the second pattern, and the third pattern can be arranged to establish a pixel array on the substrate and often do not overlap each other. In addition, the first pattern, the second pattern, and the third pattern are arranged so that each pixel has a single sub-pixel area made of a first material (e.g., a blue sub-pixel), a single sub-pixel area made of a second material (e.g., a red sub-pixel), and a single sub-pixel area made of a third material (e.g., a green sub-pixel). These sub-pixels can be individually addressed on the pixel array so that each pixel in the pixel array can produce red light, green light, or blue light at a given time. Thus, when all pixels are viewed together and their respective sub-pixel regions are appropriately biased, the resultant mosaic of red, blue, and / or green light from the pixels can display a digital image composed of those underlying colors. However, typical systems and methods for manufacturing these pixels do not provide optimal alignment accuracy for the individual sub-pixels. Therefore, the present disclosure provides improved systems and methods for performing selective deposition according to a predetermined pattern in, for example, OLEDs among other devices. These improved systems and methods can enable OLED displays to have higher pixels per inch (PPI) than would otherwise be possible.

[0018] Figure 1A Some embodiments of a processing tool 100 suitable for manufacturing OLED devices and other devices with high precision patterning are illustrated. The processing tool 100 includes a wafer chuck and alignment station 120 and a deposition chamber 130. Briefly, the processing tool 100 receives a target wafer 108 on which an array of OLED pixels is to be formed, and also receives a mask wafer 116 having openings 118 through the mask wafer 116 to define a predetermined deposition pattern. After the target wafer 108 and the mask wafer 116 are clamped and aligned in the wafer chuck and alignment station 120, the mask wafer 116 is clamped over the target wafer 108 and an emissive material is deposited through the openings 118 of the predetermined deposition pattern to form substantially the same predetermined deposition pattern on the target wafer 108 in the deposition chamber 130.

[0019] More specifically, the wafer chuck and alignment station 101 includes a first wafer mounting frame 102 and a second wafer mounting frame 110. The first wafer mounting frame 102 includes a first mating surface 104 and a first coupling assembly 106, wherein the first mating surface 104 is configured to hold a target wafer 108. In some embodiments, the first wafer mounting frame 102 includes a first retaining ring 107 extending from the first mating surface and laterally surrounding the target wafer 108 to help hold the target wafer. Thus, in some aspects, the first mating surface 104 and the first retaining ring 107 create a dome-like enclosure that completely covers a top surface (e.g., a backside) of the target wafer 108 when the target wafer is held.

[0020] The second wafer mounting frame 110 may rest on a base pedestal 111 and include a second mating surface 112 and a second coupling assembly 114. The second wafer mounting frame 110 is configured to hold a masking wafer 116 on the second mating surface 112. The second mating surface 112 may take the form of an annular flange and support the outer edge of the masking wafer 116 while leaving an opening 115 below the central region of the masking wafer 116. Thus, the inner periphery of the flange is smaller than the outer periphery of the masking wafer 116, leaving the central region of the underside of the masking wafer 116 uncovered. The inner periphery of the flange is often quite close in size to the outer periphery of the masking wafer, for example, in some embodiments, the inner periphery of the flange may range between 50% and 98% of the outer periphery of the masking wafer. A second retaining ring 113 may laterally surround the masking wafer 116 to help retain the masking wafer. The second coupling assembly 114 is configured to engage the first coupling assembly 106 to couple the first wafer mounting frame 102 to the second wafer mounting frame 110 .

[0021] In some embodiments, the first coupling assembly 106 may be disposed on the first retaining ring 107 and may be in the form of an electromagnet that can be selectively energized / de-energized. The second coupling assembly 114 may be disposed on the second retaining ring 113 and may be in the form of a ferrous material or an electromagnet that selectively couples to and decouples from the first coupling assembly 106. In other embodiments, the first coupling assembly 106 and the second coupling assembly 114 may be mechanically coupled / decoupled to each other and may be in the form of, for example, a clasp, a male-female connection, a friction-fit button or other friction-fit engagement assembly, or a ball that engages a slot. The first coupling assembly 106 and the second coupling assembly 114 may also be coupled / decoupled via a groove or a suction cup that enables a vacuum fit. Error position sensors may be included in the first wafer mounting frame 102 and the second wafer mounting frame 110 to indicate whether the first coupling assembly and the second coupling assembly are properly coupled to each other.

[0022] After the target wafer 108 and the mask wafer 116 are held in the first wafer mounting frame 102 and the second wafer mounting frame 110, respectively, the first wafer mounting frame 102 and the second wafer mounting frame 110 are aligned with each other. Therefore, the wafer chuck and alignment assembly 120 includes one or more imaging devices 122 configured to measure the misalignment between the target alignment mark 124 on the target wafer 108 and the first alignment mark 126 on the first mask wafer 116. Next, at least one of the target wafer 108 and the first mask wafer 116 is moved, for example, in an x-direction 125 in a plane parallel to the target wafer and / or the mask wafer, in a y-direction 127 in the plane, and / or by an angular rotation 129 in the plane. Such movement reduces the misalignment, thereby aligning the first mask wafer 116 with the target wafer 108. The movement may be accomplished by rollers or actuators in the mating surfaces of the first wafer mounting frame and the second wafer mounting frame that contact the target wafer and / or mask wafer, by rollers or actuators that move the first and / or second retaining rings to "slide" the target wafer and / or mask wafer along the mating surfaces, and / or by one or more robotic arms that lift and / or slide the target wafer and / or mask wafer along the mating surfaces. Other movement mechanisms are also considered to be within the scope of the present disclosure.

[0023] After the target wafer 108 and the first masking wafer 116 have been aligned, the first coupling assembly 106 and the second coupling assembly 114 are activated to clamp the first wafer mounting frame 102 to the second wafer mounting frame 110, and the clamped first wafer mounting frame 102 and the second wafer mounting frame 110 are removed from the base pedestal 111 and transferred into the deposition chamber 130. In this deposition chamber 130 (which is Figure 1A ), an emitting material from a deposition source 132, which may include an organic material, for example, passes through openings 118 in a masking wafer 116 to form the emitting material according to a predetermined deposition pattern on a target wafer 108. In some embodiments, the target wafer 108 is separated from the masking wafer 116 by a vertical space, which helps prevent contaminants on the masking wafer 116 from contacting the target wafer. In some embodiments, the vertical spacing is less than 1 centimeter, but in some embodiments, the vertical spacing may be less than 1 millimeter or even less than 1 micrometer to help provide more precise patterning.

[0024] After the emissive material has been formed according to the predetermined deposition pattern 142 on the target wafer 108, the first wafer mounting frame 102 is then unclamped from the second wafer mounting frame 110 (see 140). Because the target wafer 108 and the masking wafer 116 are each aligned to each other according to their respective alignment marks prior to deposition, the resulting emissive material formed on the target wafer 108 in the predetermined deposition pattern 142 is more accurately aligned than in the prior art. For example, in some cases, the processing tool 100 can produce a 3000 pixel per inch (PPI) OLED display with an alignment error of less than 0.5 microns, which is well suited for virtual reality (VR) and / or augmented reality (AR) applications, etc.

[0025] Figure 1B Schematic diagrams showing some embodiments of processing tools suitable for fabricating OLED devices with high precision patterning. Figure 1B In the embodiment of the present invention, the mating surface of the first wafer mounting frame includes a window 131, such as a glass or other transparent window, that allows viewing of the target alignment mark 124 on the target wafer 108. For example, the target alignment mark 124 can be made of a metal such as chromium, nickel, titanium, or aluminum and can be located on the front side of the target wafer 108. In the case of viewing with ultraviolet (UV) light, the UV light passes through the window 131 and through the back side of the target wafer 108, so that the target alignment mark 124 can be viewed through the window 131 and through the target wafer 108.

[0026] In some embodiments, Figure 1A or Figure 1B The processing tool 100 may be implemented as part of a cluster tool, such as Figure 2 . Cluster tool 200 includes a first transfer chamber 202 and a second transfer chamber 204, which are generally used to build an array of OLEDs on a target wafer. The first transfer chamber 202 is connected to the second transfer chamber 204 by a first connector chamber 206. Downstream of the second transfer chamber 204 is an encapsulation chamber 208, and the encapsulation chamber 208 is configured to adhere a glass cover to a target wafer with OLEDs thereon, and thereby output a wafer corresponding to an OLED display. A second connector chamber 210 connects the second transfer chamber 204 to the encapsulation chamber 208.

[0027] A plurality of first processing chambers 212a, 212b, 212c, 212d, 212e are arranged around the first transfer chamber 202, and a plurality of second processing chambers 214a, 214b, 214c, 214d, 214e are arranged around the second transfer chamber 204. The first processing chambers 212a to 212e may have ports or seals 216a to 216e, respectively, that allow each processing chamber to perform independent processing steps; and the second processing chambers may also have ports or seals 218a to 218e, respectively, that allow the second processing chambers 214a to 214e to perform independent cleaning steps. There is also an entry load lock 220, an exit load lock 222, and designated mask storage chambers 212f, 214f.

[0028] During operation of the cluster tool 200, the control unit 224 is configured to control the first transfer robot 226 and the second transfer robot 228 (which include wafer grippers 226a, 228a and accordion-style arms 226b, 228b extending and retracting from rotatable bases 226c, 228c, respectively) according to the following sequence: various inlets; various processing chambers; and vacuum pumps for the various chambers. The control unit 224 may include memory and a microprocessor, as well as servos, actuators, etc. to facilitate the operations described below. In addition, the transfer chambers 202, 204, the connector chambers 206, 210, the encapsulation chamber 208, the processing chambers 212a to 212e and the processing chambers 214a to 214e, and the storage chambers 212f, 214f ​​are typically held under continuous vacuum during the operations described below. In other embodiments, the order of the sequence may be changed, for example, some steps may be reordered from those illustrated and described; and / or these and / or other steps may be omitted; and other steps may be inserted. In addition, in other embodiments, the location and number of the processing chambers 212a to 212e and 214a to 214e and the storage chambers 212f, 214f ​​may be rearranged and / or changed.

[0029] The glass entrance loading lock 227 is configured to receive a glass cover or other transparent cover, and the glass cleaning station 230 is configured to apply ultraviolet (UV) light to the glass cover to clean the glass cover. Glue can then be applied to one face of the glass cover in the glue application module 232, and the glass cover can then be applied to the target wafer. The glue can be dried at the drying station 234, for example, by using a heater, and then the target wafer with the OLED and the glass cover can be transferred through the exit loading lock 222.

[0030] Figure 3 A more detailed flow chart of a method 300 for performing deposition with high precision patterning according to some embodiments is shown. Figure 2 Cluster tools 200 and for Figures 5 to 19 To discuss method 300, Figures 5 to 19 A series of schematic diagrams showing a processing tool at different steps of wafer processing. Figure 2 and Figures 5 to 19 , but it should be understood that Figure 2 and Figures 5 to 19 The structure disclosed in is not limited to this method 300, but can be used independently as a structure independent of the method. Figure 2 and Figures 5 to 19 Method 300 is described, but it should be understood that the method is not limited to Figures 5 to 19 The structure disclosed in Figure 2 and Figures 5 to 19 Although the flow charts and schematics describe the cluster tool in the context of a cluster tool, it should be understood that such a cluster tool including multiple epitaxial deposition chambers is a non-limiting example and other types of cluster tools and / or processing chambers (e.g., other deposition tools or etching tools) are considered to fall within the scope of the present disclosure.

[0031] At act 302, in a cluster tool (e.g., Figure 2 A target wafer (e.g., Figure 1A108). In some embodiments, the target wafer may take the form of a disk-shaped wafer having a diameter of, for example, 1 inch (25 mm); 2 inches (51 mm); 3 inches (76 mm); 4 inches (100 mm); 5 inches (130 mm) or 125 mm (4.9 inches); 150 mm (5.9 inches, often referred to as "6 inches"); 200 mm (7.9 inches, often referred to as "8 inches"); 300 mm (11.8 inches, often referred to as "12 inches"); or 450 mm (17.7 inches, often referred to as "18 inches"). In addition, in some embodiments, the target wafer may be made of single crystal silicon, but in other embodiments, the target wafer may be made of glass, sapphire or other suitable materials. In some embodiments, the anode layer includes indium tin oxide (ITO).

[0032] At the start of the operation, a wafer carrier (e.g., a front opening unified pod (FOUP) containing a number of wafers (including the target wafer)) is placed in a load port (e.g., Figure 2 , 201). When the target wafer is located at a loading port (e.g., Figure 2 , 201), opening the external loading gate of the entrance loading gate (e.g., Figure 2 , 220a), while enabling the inner loading gate of the entrance loading gate (e.g., Figure 2 , 220b) remains closed to maintain the vacuum of the inner chamber of the cluster tool. The wafer carrier is opened on the load port and the target wafer is exposed to the surrounding factory environment and then loaded through an external load gate (e.g., Figure 2 , 220a) moves the target wafer and allows the target wafer to enter the entry load gate (e.g., Figure 2 , 220) and then close the external loading gate (e.g., Figure 2 , 220a). Then the inlet loading gate (e.g., Figure 2 , 220) is evacuated, and then the internal loading gate is opened (e.g., Figure 2 , 220b).

[0033] At act 304, a target wafer is loaded from an entry load gate (e.g., Figure 2 220) is transferred to a first processing chamber (e.g., Figure 2 212a in ). This can be performed by a first transfer robot (e.g., Figure 2226 in the example. The first processing chamber 212a in this example corresponds to a pre-cleaning station in which the target wafer is cleaned. For example, the target wafer may be cleaned or rinsed with deionized water, acetone, a surfactant; and / or another cleaning process may be used to clean the surface of the target wafer. For example, the cleaning may also include a photoresist stripping process, such as a plasma stripping process.

[0034] At action 306, a first transfer robot (e.g., Figure 2 , 226) transferring the target wafer to a first deposition chamber (e.g., Figure 2 , 212b), wherein a hole injection layer is formed on the anode layer in the first deposition chamber. Figure 2 , 212b), the first chamber opening may be closed (eg, Figure 2 , 216b), and a deposition process may be performed to form a hole injection layer on the target wafer. After the process, the first chamber port is reopened (e.g., Figure 2 , 216b), and the first transfer robot transfers the target wafer back out of the first chamber port. For the processing operations described herein, the other processing chambers are typically operated in a similar manner, opening their respective ports, inserting the target wafer and closing the ports, performing the processing, and then reopening their respective ports and removing the target wafer when the processing is completed in the processing chamber.

[0035] At action 308, a first transfer robot (e.g., Figure 2 , 226) removes the target wafer from a first deposition chamber (e.g., Figure 2 , 212b) is transferred to a second deposition chamber (e.g., Figure 2 , 212c), wherein a hole transport layer is formed on the hole injection layer in a second deposition chamber.

[0036] At action 310, a first transfer robot (e.g., Figure 2 , 226) removes the target wafer from a second deposition chamber (e.g., Figure 2 , 212c) to a wafer chuck and alignment chamber (e.g., Figure 2 , 212d). The first transfer robot (e.g., Figure 2 , 226) also removes the first mask wafer 116 from a first mask storage chamber (eg, Figure 2 , 212f) is loaded into a wafer chuck and alignment chamber (e.g., Figure 2 , 212d). Figure 4A more detailed example of a wafer chuck and alignment chamber 212d is shown, wherein a target wafer 108 is held in a first wafer mounting frame 102. In some embodiments, a series of pins 402 may extend through the engagement surface 104 of the first wafer mounting frame 102 to engage the target wafer 108. The pins 402 may use suction to engage the back side of the target wafer 108, and then may be retracted to flush the back side of the target wafer 108 with the engagement surface 104. A first masking wafer 116 is held in a second wafer mounting frame 110 resting on a base pedestal 111. The first masking wafer 116 includes a plurality of openings 118 defining a first predetermined deposition pattern. In some embodiments, a set of pins 404 may extend through a flange of a second engagement surface 112 of the second wafer mounting frame 110 and / or the base pedestal 111 to engage the first masking wafer 116. The pins 404 may use suction to engage the back side of the first masking wafer 116, and then may be retracted to flush the back side of the first masking wafer 116 with the flange of the second engagement surface 112. In some embodiments, the target wafer 108 is a first semiconductor wafer having a first outer diameter, and the first masking wafer 116 is a second semiconductor wafer having a second outer diameter, the second outer diameter being equal to the first outer diameter. Although the first masking wafer 116 may also be made of stainless steel or other materials, there are some efficiencies by using semiconductor materials for the first masking wafer because, as residue builds up on the first masking wafer during use, processing techniques compatible with semiconductor materials are already employed in other areas of the cluster tool and / or factory, and therefore this simplifies processing in some respects.

[0037] like Figure 5 As illustrated in FIG. , the wafer chuck and alignment chamber (e.g., Figure 2, 212d) aligns the target wafer 108 and the first mask wafer 116 with each other. In some embodiments, one or more imaging devices 122, such as a camera or a charge-coupled device (CCD), may be inserted between the target wafer 108 and the mask wafer 116 by a robotic arm to image the target alignment mark on the target wafer and the first alignment mark on the first mask wafer. In other embodiments, the mating surface of the first wafer mounting frame may include a window, such as a glass window, that allows viewing of the target alignment mark on the target wafer 108. For example, the target alignment mark may be made of a metal, such as chromium, nickel, titanium, or aluminum, and may be located on the front side of the target wafer. In the case where viewing is performed with ultraviolet (UV) light, the UV light passes through the window and through the target wafer, so that the target alignment mark can be viewed through the window and through the target wafer. Next, at least one of the target wafer 108 and the first masking wafer 116 is moved, for example, in an x-direction 125 in a plane parallel to the target wafer and / or the masking wafer, in a y-direction 127 in the plane, and / or by an angular rotation 129 in the plane. Such movement reduces the amount of misalignment, thereby aligning the first masking wafer 116 with the target wafer 108.

[0038] Once the target wafer is aligned with the first mask wafer, the first wafer mounting frame 102 and the second wafer mounting frame 110 holding the target wafer 108 and the first mask wafer 116 are clamped together, for example, as shown in FIG. Figure 6 Thus, a first coupling assembly 106 on a first wafer mounting frame is coupled to a second coupling assembly 114 on a second wafer mounting frame to provide such clamping.

[0039] Return to reference Figure 3 At action 312, a first transfer robot (e.g., Figure 2 , 226) then in a wafer chuck and alignment chamber (e.g., Figure 2 , 212d) picks up the first wafer mounting frame and the second wafer mounting frame clamped together from the base pedestal 111, and transfers the first wafer mounting frame and the second wafer mounting frame clamped together to a third deposition chamber (e.g., Figure 2 , 212e). Figure 7, in the third deposition chamber 212e, a first emission material is generated by the first organic deposition source 132 in the third deposition chamber, and the first emission material is passed through the opening 118 in the first masking wafer 116 to form the first emission material according to a first predetermined deposition pattern. The first predetermined deposition pattern may correspond to a sub-pixel (e.g., a blue sub-pixel) corresponding to an area of ​​the first emission material 702 now formed on the target wafer 108. When current passes through the first emission material, the first emission material may emit light of a first wavelength (e.g., blue light).

[0040] Return to reference Figure 3 At action 314, a first transfer robot (e.g., Figure 2 , 226) then remove the first wafer mounting frame and the second wafer mounting frame clamped together from a third deposition chamber (eg, Figure 2 , 212e) back to the wafer chuck and alignment chamber (e.g., Figure 2 , 212d). Figure 8 As illustrated in FIG. 1 , by decoupling the first coupling assembly and the second coupling assembly, the wafer chuck and the alignment chamber (eg, Figure 2 , 212d) to unclamp the first wafer mounting frame and the second wafer mounting frame. Then remove the first mask wafer 116 from the second wafer mounting frame 110. Then, remove the first mask wafer 116 from the first mask storage chamber (e.g., Figure 2 , 212f) pick up the second masking wafer 916, and as Fig. 9 As shown in FIG. 1 , a second masking wafer 916 is held in the second wafer mounting frame 110. The second masking wafer 916 includes a second predetermined pattern of openings 918 corresponding to a second predetermined deposition pattern according to which the second emitter material will be formed on the target wafer 108.

[0041] like Fig.10 As shown in FIG. 1 , the target wafer 108 and the second mask wafer 916 are then aligned with each other, and the first wafer mounting frame 102 and the second wafer mounting frame 110 holding the target wafer and the second mask wafer are clamped together, as shown in FIG. Fig.11 exemplified in .

[0042] At action 316, a first transfer robot (e.g., Figure 2 , 226) then remove the first wafer mounting frame and the second wafer mounting frame clamped together from the wafer chuck and alignment chamber (e.g., Figure 2 , 212d) is transferred to the second transfer robot 228 through the first connector chamber 206. The second transfer robot 228 then transfers the clamped first wafer mounting frame and the second wafer mounting frame to the fourth deposition chamber (e.g., Figure 2 , 214a). Fig.12As illustrated in FIG. 1 , in the fourth deposition chamber (eg, Figure 2 , 214a), a second emitting material is generated by a second organic deposition source 1202 in a fourth deposition chamber, and the second emitting material is passed through an opening 918 in a second masking wafer 916 to form a second emitting material 1206 according to a second predetermined deposition pattern. The second predetermined deposition pattern may correspond to a sub-pixel (e.g., a red sub-pixel) corresponding to an area of ​​the second emitting material 1206 now formed on the target wafer 108. When current passes through the second emitting material, the second emitting material may emit light of a second wavelength (e.g., red light).

[0043] At action 318, a second transfer robot (e.g., Figure 2 , 228) then passes the target wafer through a first connector chamber (e.g., Figure 2 , 206) transferred back to the first transfer robot (e.g., Figure 2 , 226), the first transfer robot then transfers the clamped first wafer mounting frame and the second wafer mounting frame back to the wafer chuck and alignment chamber (e.g., Figure 2 , 212d), wherein the first wafer mounting frame and the second wafer mounting frame are not clamped together (see Fig.13 ). Then remove the second mask wafer from the second wafer mounting frame. From the mask storage chamber (e.g., Figure 2 , 212f) pick up the third masking wafer 1516, and as Fig.14 As shown, the third masking wafer 1516 is held in the second wafer mounting frame 110. The third masking wafer 1516 includes a third predetermined pattern of openings 1518 corresponding to a third predetermined deposition pattern, and the third emission material will be formed on the target wafer 108 according to the third predetermined deposition pattern. Next, the target wafer and the third masking wafer are aligned with each other (see Fig.15 ), and clamp the first wafer mounting frame and the second wafer mounting frame holding the target wafer and the third masking wafer together (see Fig.16 ).

[0044] At action 320, the first transfer robot then removes the first wafer mounting frame and the second wafer mounting frame clamped together from the wafer chuck and alignment chamber (eg, Figure 2 , 212d) through the first connector chamber (e.g., Figure 2 , 206) to a second transfer robot (e.g., Figure 2 , 228). The second transfer robot then transfers the first wafer mounting frame and the second wafer mounting frame clamped together to a fifth deposition chamber (e.g., Figure 2 , 214b). Fig.17 As illustrated in FIG. 1 , in the fifth deposition chamber (eg, Figure 2, 214b), a third emitting material is generated by a third organic deposition source 1702 in a fifth deposition chamber, and the third emitting material is passed through an opening 1518 in a third masking wafer 1516 to form a third emitting material 1704 according to a third predetermined deposition pattern. The third predetermined deposition pattern may correspond to a sub-pixel (e.g., a green sub-pixel) corresponding to an area of ​​the third emitting material 1704 now formed on the target wafer 108. When current passes through the third emitting material, the third emitting material may emit light of a third wavelength (e.g., green light).

[0045] At action 322, the second transfer robot then passes the first wafer mounting frame and the second wafer mounting frame, which hold the target wafer and the third masking wafer, through the first connector chamber (eg, Figure 2 , 206) transferred back to the first transfer robot (e.g., Figure 2 , 226), the first transfer robot then transfers the clamped first wafer mounting frame and the second wafer mounting frame back to the wafer chuck and alignment chamber (e.g., Figure 2 , 212d), wherein the first wafer mounting frame and the second wafer mounting frame are not clamped together (see Fig.18 ). Next, the target wafer is removed from the first wafer mounting frame, for example by pins extending through the engagement surface of the first wafer mounting frame (see Fig.19 ), and remove the third masking wafer 1516 from the second wafer mounting frame. The third masking wafer is transferred by the first transfer robot (e.g., Figure 2 , 226) returned to the mask storage room (e.g., Figure 2 , 212f). The target wafer is transferred by a first transfer robot (e.g., Figure 2 , 226) through the first connector chamber (e.g., Figure 2 , 206) to a second transfer robot (e.g., Figure 2 , 228), the second transfer robot then transfers the target wafer to a sixth deposition chamber (e.g., Figure 2 , 214c), wherein an electron transport layer is formed on the first emission material, the second emission material and the third emission material in a sixth deposition chamber.

[0046] At action 324, a second transfer robot (e.g., Figure 2 , 228) removes the target wafer from a sixth deposition chamber (e.g., Figure 2 , 214c) is transferred to a seventh deposition chamber (e.g., Figure 2 , 214d), wherein an electron injection layer is formed on the electron transport layer in a seventh deposition chamber.

[0047] At action 326, the second transfer robot moves the target wafer from the seventh deposition chamber (eg, Figure 2, 214d) is transferred to an eighth deposition chamber (e.g., Figure 2 , 214e), wherein a metal cathode layer is formed on the electron injection layer in an eighth deposition chamber.

[0048] At act 328, a glass cover is attached to the metal cathode layer. Figure 2 In the process, the glass cover can be loaded into the glass inlet loading lock (e.g., Figure 2 , 227), the glass cover is then cleaned by applying ultraviolet (UV) light to the glass cover (e.g., Figure 2 , 230). Figure 2 , glue may then be applied to one side of the glass cover and used to adhere the glass cover to the wafer at 232; the glue may be dried, for example, by using a heater at 234. The wafer with the OLED and the glass cover may then be transferred through the exit load lock 222.

[0049] Fig. 20 A cross-sectional view 2000 of some embodiments of an OLED device is shown, which includes an emission layer made of a plurality of different organic materials arranged according to a predetermined deposition pattern. The OLED device includes a substrate 2002, which can be made of single crystal silicon, glass, sapphire, or another suitable material. An anode layer 2004 (e.g., a TIO anode) is disposed above the substrate 2002. A hole injection layer 2006 is disposed above the anode layer 2004, and a hole transport layer 2008 is disposed above the hole injection layer 2006. An emission layer 2010 made of various different emission materials located at the same height above the substrate 2002 is disposed above the hole transport layer 2008. Brief reference Fig.21 As can be seen from the exemplary top view of the emissive layer 2010, the emissive layer 2010 includes the first emissive material 702, the second emissive material 1206, and the third emissive material 1704, which are arranged according to respective patterns to create an OLED pixel array. As shown in some embodiments, the area of ​​the first emissive material 702 has an edge adjacent to the corresponding edge of the second emissive material 1206 and the third emissive material 1704. The area of ​​the first emissive material 702, the second emissive material 1206, and the third emissive material 1704 is Fig.21 1204 may correspond to a third organic compound that may generate green light. Return to reference Fig. 20An electron transport layer 2012 is disposed on the emission layer, and an electron injection layer 2014 is disposed on the electron transport layer. A cathode 2016 is disposed on the electron injection layer 2014, and a glass cover 2018 or other transparent cover is disposed on the cathode 2016.

[0050] In some embodiments, the present disclosure relates to a processing tool. The processing tool includes: a first wafer mounting frame, including a first mating surface and a first coupling assembly. The first mating surface is configured to hold a target wafer. A second wafer mounting frame includes a second mating surface and a second coupling assembly, the second coupling assembly being configured to engage the first coupling assembly to couple the first wafer mounting frame to the second wafer mounting frame. The second wafer mounting frame is configured to hold a masking wafer on the second mating surface. The masking wafer includes a mask pattern consisting of a plurality of openings through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer. A deposition chamber is configured to receive the first wafer mounting frame and the second wafer mounting frame when the first coupling assembly is engaged with the second coupling assembly to hold the target wafer and the masking wafer. The deposition chamber includes a material deposition source, the material deposition source being configured to deposit material from the material deposition source through the plurality of openings in the mask pattern to form the material on the target wafer in the predetermined deposition pattern. In some embodiments, the processing tool further comprises: a robotic assembly configured to arrange an imaging device between the target wafer and the mask wafer, the imaging device configured to determine the location of the target alignment mark on the target wafer and the location of the mask alignment mark on the mask wafer; and an alignment assembly configured to move at least one of the mask wafer and the target wafer along a first linear axis, move the at least one wafer along a second linear axis, and / or move the at least one wafer by rotation on the face of the at least one wafer so that the target alignment mark is aligned with the mask alignment mark, the first linear axis being along the face of the at least one wafer, the second linear axis being along the face of the at least one wafer and perpendicular to the first linear axis. In some embodiments, the first mating surface comprises a window through the first mating surface, the window being configured to allow viewing of the target alignment mark on the target wafer. In some embodiments, the processing tool further includes: an imaging device, configured to image the target alignment mark on the target wafer and the mask alignment mark on the mask wafer through the window; and an alignment assembly, configured to move the mask wafer and at least one of the target wafers along a first linear axis, move the at least one wafer along a second linear axis, and / or move the at least one wafer by rotating on the surface of the at least one wafer so that the target alignment mark is aligned with the mask alignment mark, the first linear axis being along the surface of the at least one wafer, and the second linear axis being along the surface of the wafer and perpendicular to the first linear axis.In some embodiments, the first wafer mounting frame includes a first retaining ring extending from the first mating surface to laterally surround the target wafer; and wherein the second wafer mounting frame includes a second retaining ring extending from the second mating surface to laterally surround the mask wafer. In some embodiments, the first coupling assembly is arranged on the first retaining ring. In some embodiments, the second coupling assembly is arranged on the second retaining ring. In some embodiments, the target wafer is a first semiconductor wafer having a first outer diameter, and the mask wafer is a second semiconductor wafer having a second outer diameter, the second outer diameter being equal to the first outer diameter.

[0051] In other embodiments, the present disclosure relates to a method for processing a wafer. In the method, a target wafer is held on a first wafer mounting frame, and a first masking wafer is held on a second wafer mounting frame. The first masking wafer includes a first mask pattern consisting of a first plurality of openings through the first masking wafer. The first mask pattern corresponds to a first predetermined deposition pattern to be formed on the target wafer. A first misalignment between a target alignment mark on the target wafer and a first alignment mark on the first masking wafer is determined. At least one of the target wafer and the first masking wafer is moved to reduce the first misalignment, thereby aligning the first masking wafer with the target wafer. After the first masking wafer has been aligned with the target wafer, the first wafer mounting frame is clamped to the second wafer mounting frame. The first wafer mounting frame and the second wafer mounting frame, which include the aligned target wafer and the first masking wafer, are arranged before a first deposition source. A first material is provided from the first deposition source through the first plurality of openings on the first masking wafer to form the first material according to the first predetermined deposition pattern on the target wafer. In some embodiments, the first misalignment amount between the target alignment mark and the first alignment mark is measured while the target wafer is held in the first wafer mounting frame and the first mask wafer is held in the second wafer mounting frame. In some embodiments, moving at least one of the first mask wafer and the target wafer includes moving the at least one wafer along a first linear axis, moving the at least one wafer along a second linear axis, and moving the at least one wafer by rotation on a face of the at least one wafer, the first linear axis being along the face of the at least one wafer, the second linear axis being along the face of the at least one wafer and perpendicular to the first linear axis. In some embodiments, the method further includes: after the first material has been formed according to the first predetermined deposition pattern on the target wafer, unclamping the first wafer mounting frame from the second wafer mounting frame; and removing the first mask wafer from the second wafer mounting frame.In some embodiments, the method further includes: holding a second masking wafer on the second wafer mounting frame, wherein the second masking wafer includes a second mask pattern formed by a second plurality of openings passing through the second masking wafer, the second mask pattern corresponding to a second predetermined deposition pattern to be formed on the target wafer and different from the first mask pattern; measuring a second misalignment amount between the target alignment mark on the target wafer and the second alignment mark on the second masking wafer, and moving at least one of the second masking wafer and the target wafer to reduce the second misalignment amount, thereby aligning the second masking wafer with the target wafer; clamping the first wafer mounting frame to the second wafer mounting frame while the target wafer is aligned with the second masking wafer; arranging the first wafer mounting frame and the second wafer mounting frame, which include the aligned target wafer and the second masking wafer, clamped together, in front of a second deposition source; and providing a second material from the second deposition source through the second plurality of openings on the second masking wafer to form the second material according to the second predetermined deposition pattern on the target wafer. In some embodiments, the first material of the first deposition source corresponds to a first emissive material for an organic light emitting diode, and wherein the second material of the second deposition source corresponds to a second emissive material for the organic light emitting diode, the first emissive material being different from the second emissive material. In some embodiments, the first emissive material is a first organic material configured to emit light of a first color and the second emissive material is a second organic material configured to emit light of a second color, the second color being different from the first color.

[0052] In yet other embodiments, the present disclosure relates to a method for processing a wafer in a cluster tool. In the method, a target wafer including an anode layer is transferred from a transfer load lock to a first processing chamber through a first transfer chamber using a first transfer robot. In the first processing chamber, a hole injection layer is formed on top of the anode layer. The target wafer including the hole injection layer is transferred from the first processing chamber to a second processing chamber using the first transfer robot. In the second processing chamber, a hole transport layer is formed on top of the hole injection layer. The target wafer including the hole transport layer is held on a first wafer mounting frame, and a first masking wafer is held on a second wafer mounting frame. The first masking wafer includes a first mask pattern consisting of a first plurality of openings passing through the first masking wafer. The first mask pattern corresponds to a first predetermined deposition pattern to be formed on the target wafer. A first misalignment amount between a target alignment mark on the target wafer and a first alignment mark on the first masking wafer is determined. At least one of the first masking wafer and the target wafer is moved to reduce the first misalignment amount, thereby aligning the first masking wafer with the target wafer. After the first masking wafer has been aligned with the target wafer, the first wafer mounting frame is clamped to the second wafer mounting frame. The first wafer mounting frame and the second wafer mounting frame, in which the aligned first masking wafer and the target wafer are clamped together, are arranged in a third processing chamber. A first emission material is deposited through the first plurality of openings on the first masking wafer to form the first emission material according to the first predetermined deposition pattern on the target wafer. In some embodiments, the method further includes: after the first emission material has been formed according to the first predetermined deposition pattern on the target wafer, the first wafer mounting frame is unclamped from the second wafer mounting frame; and the first masking wafer is removed from the second wafer mounting frame.In some embodiments, the method further includes: holding a second masking wafer on the second wafer mounting frame, wherein the second masking wafer includes a second mask pattern formed by a second plurality of openings passing through the second masking wafer, the second mask pattern corresponding to a second predetermined deposition pattern to be formed on the target wafer and different from the first mask pattern; measuring a second misalignment amount between the target alignment mark on the target wafer and the second alignment mark on the second masking wafer, and moving at least one of the second masking wafer and the target wafer to reduce the second misalignment amount, thereby aligning the second masking wafer with the target wafer; clamping the first wafer mounting frame to the second wafer mounting frame while the target wafer is aligned with the second masking wafer; and arranging the first wafer mounting frame and the second wafer mounting frame, which include the aligned target wafer and the second masking wafer, clamped together, in front of a second deposition source; and providing a second material from the second deposition source through the second plurality of openings on the second masking wafer to form the second material according to the second predetermined deposition pattern on the target wafer. In some embodiments, the first emissive material corresponds to a first organic material for an organic light emitting diode, and wherein the second emissive material corresponds to a second organic material for the organic light emitting diode, the first organic material being different from the second organic material. In some embodiments, the first organic material is configured to emit light of a first color and the second organic material is configured to emit light of a second color, the second color being different from the first color.

[0053] The features of several embodiments are summarized above so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art will understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to implement the same purposes and / or achieve the same advantages as the embodiments described herein. Those skilled in the art will also recognize that these equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions and modifications herein without departing from the spirit and scope of the present disclosure.

[0054] [Explanation of Symbols]

[0055] 100: Processing Tools

[0056] 101: Wafer chuck and alignment station

[0057] 102: First wafer mounting frame

[0058] 104: First mating surface / mating surface

[0059] 106: First coupling assembly

[0060] 107: First retaining ring

[0061] 108: Target chip

[0062] 110: Second wafer mounting frame

[0063] 111: Basic base

[0064] 112: Second meshing surface

[0065] 113: Second retaining ring

[0066] 114: Second coupling assembly

[0067] 115, 118, 918, 1518: Open

[0068] 116: Masking wafer / first masking wafer

[0069] 120: Wafer chuck and alignment station / wafer chuck and alignment assembly

[0070] 122: Imaging Devices

[0071] 124: Target alignment mark

[0072] 125: x direction

[0073] 126: First alignment mark

[0074] 127: y direction

[0075] 129: Angular rotation

[0076] 130: Sedimentation Chamber

[0077] 131: Window

[0078] 132: Sedimentation Source

[0079] 140: Unclamp

[0080] 142: Predetermined deposition pattern

[0081] 200: Cluster Tools

[0082] 201: Loading port

[0083] 202: First Transfer Room / Transfer Room

[0084] 204: Second transfer room / transfer room

[0085] 206: First connection room / connection room

[0086] 208: Encapsulation Room

[0087] 210: Second connection room / connection room

[0088] 212a: First processing room / processing room

[0089] 212b: First processing chamber / processing chamber / first deposition chamber

[0090] 212c: First processing chamber / processing chamber / second deposition chamber

[0091] 212d: First processing chamber / processing chamber / wafer chuck and alignment chamber

[0092] 212e: First processing chamber / processing chamber / third deposition chamber

[0093] 212f: Mask storage room / first mask storage room / storage room

[0094] 214a: Second processing chamber / processing chamber / fourth deposition chamber

[0095] 214b: Second processing chamber / processing chamber / fifth deposition chamber

[0096] 214c: Second processing chamber / processing chamber / sixth deposition chamber

[0097] 214d: Second processing chamber / processing chamber / seventh deposition chamber

[0098] 214e: Second processing chamber / processing chamber / eighth deposition chamber

[0099] 214f: Mask storage room / storage room

[0100] 216a, 216c, 216d, 216e, 218a, 218b, 218c, 218d, 218e: mouth or seal

[0101] 216b: Port or seal / first chamber port

[0102] 220: Entrance loading gate

[0103] 220a: External loading gate

[0104] 220b: Internal loading gate

[0105] 222: Exit loading gate

[0106] 224: Control unit

[0107] 226: First Transfer Robot

[0108] 226a, 228a: Wafer gripper

[0109] 226b, 228b: Accordion arms

[0110] 226c, 228c: Rotatable base

[0111] 227: Glass entry loading gate

[0112] 228: Second transfer robot

[0113] 230: Glass cleaning station

[0114] 232: Glue application module

[0115] 234: Drying Station

[0116] 300: Methods

[0117] 302, 304, 306, 308, 310, 312, 314, 316, 318, 320, 322, 324, 326, 328: Action

[0118] 402, 404: Sales

[0119] 702: First Emission Material

[0120] 916: Second masking wafer

[0121] 1202: Second organic deposition source

[0122] 1206: Second emission material

[0123] 1516: Third masking wafer

[0124] 1702: The third organic deposition source

[0125] 1704: Third Emission Material

[0126] 2000: Sectional View

[0127] 2002: Substrate

[0128] 2004: Anodic layer

[0129] 2006: Hole injection layer

[0130] 2008: Hole transport layer

[0131] 2010: Launch Layer

[0132] 2012: Electron Transport Layer

[0133] 2014: Electron injection layer

[0134] 2016: Cathode

[0135] 2018: Glass cover

Claims

1. A processing tool comprising: a first wafer mounting frame comprising a first engagement surface and a first coupling assembly, wherein the first engagement surface is configured to hold a target wafer; a second wafer mounting frame comprising a second engagement surface and a second coupling assembly, the second coupling assembly being configured to engage the first coupling assembly to couple the first wafer mounting frame to the second wafer mounting frame, the second wafer mounting frame being configured to hold a masking wafer on the second engagement surface, wherein the masking wafer comprises a mask pattern formed by a plurality of openings passing through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer; as well as A deposition chamber is configured to receive the first wafer mounting frame and the second wafer mounting frame when the first coupling assembly is engaged with the second coupling assembly to hold the target wafer and the mask wafer, and the deposition chamber includes a material deposition source, and the material deposition source is configured to deposit material from the material deposition source through the plurality of openings in the mask pattern to form the material on the target wafer in the predetermined deposition pattern.

2. The processing tool according to claim 1, further comprising: a robotic assembly configured to position an imaging device between the target wafer and the mask wafer, the imaging device configured to determine a location of a target alignment mark on the target wafer and a location of a mask alignment mark on the mask wafer; as well as An alignment assembly is configured to move at least one of the mask wafer and the target wafer along a first linear axis, move the at least one wafer along a second linear axis, and / or move the at least one wafer by rotation on the face of the at least one wafer so that the target alignment mark is aligned with the mask alignment mark, wherein the first linear axis is along the face of the at least one wafer, and the second linear axis is along the face of the at least one wafer and is perpendicular to the first linear axis.

3. The processing tool of claim 1, wherein the first engagement surface comprises a window therethrough, the window being configured to allow viewing of a target alignment mark on the target wafer.

4. The processing tool according to claim 3, further comprising: an imaging device configured to image the target alignment mark on the target wafer and to image the mask alignment mark on the mask wafer through the window; as well as An alignment assembly is configured to move at least one of the mask wafer and the target wafer along a first linear axis, move the at least one wafer along a second linear axis, and / or move the at least one wafer by rotation on the face of the at least one wafer so that the target alignment mark is aligned with the mask alignment mark, wherein the first linear axis is along the face of the at least one wafer, and the second linear axis is along the face of the wafer and is perpendicular to the first linear axis.

5. The processing tool according to claim 1, wherein the first wafer mounting frame comprises a first retaining ring extending from the first engagement surface to laterally surround the target wafer; and The second wafer mounting frame includes a second retaining ring extending from the second engagement surface to laterally surround the masking wafer.

6. The processing tool of claim 5, wherein the first coupling assembly is disposed on the first retaining ring.

7. The processing tool according to claim 5, wherein the second coupling assembly is disposed on the second retaining ring.

8. The processing tool of claim 1, wherein the target wafer is a first semiconductor wafer having a first outer diameter, and the mask wafer is a second semiconductor wafer having a second outer diameter, the second outer diameter being equal to the first outer diameter.

9. A method for processing a wafer, comprising: holding the target wafer on the first wafer mounting frame; holding a first masking wafer on a second wafer mounting frame, wherein the first masking wafer includes a first mask pattern formed by a first plurality of openings passing through the first masking wafer, the first mask pattern corresponding to a first predetermined deposition pattern to be formed on the target wafer; measuring a first misalignment between a target alignment mark on the target wafer and a first alignment mark on the first mask wafer, and moving at least one of the target wafer and the first mask wafer to reduce the first misalignment, thereby aligning the first mask wafer with the target wafer; clamping the first wafer mounting frame to the second wafer mounting frame after the first masking wafer has been aligned with the target wafer; Arranging the first wafer mounting frame and the second wafer mounting frame, which clamp the aligned target wafer and the first masking wafer together, in front of a first deposition source; as well as A first material is provided from the first deposition source through the first plurality of openings on the first masking wafer to form the first material according to the first predetermined deposition pattern on the target wafer.

10. The method of claim 9, wherein the first misalignment amount between the target alignment mark and the first alignment mark is measured while the target wafer is held in the first wafer mounting frame and the first mask wafer is held in the second wafer mounting frame.

11. The method of claim 9, wherein moving at least one of the first masking wafer and the target wafer comprises moving the at least one wafer along a first linear axis, moving the at least one wafer along a second linear axis, and moving the at least one wafer by rotation on a face of the at least one wafer, wherein the first linear axis is along the face of the at least one wafer, and the second linear axis is along the face of the at least one wafer and is perpendicular to the first linear axis.

12. The method according to claim 9, further comprising: After the first material has been formed according to the first predetermined deposition pattern on the target wafer, unclamping the first wafer mounting frame from the second wafer mounting frame; as well as The first masking wafer is removed from the second wafer mounting frame.

13. The method according to claim 12, further comprising: holding a second masking wafer on the second wafer mounting frame, wherein the second masking wafer includes a second mask pattern formed by a second plurality of openings through the second masking wafer, the second mask pattern corresponding to a second predetermined deposition pattern to be formed on the target wafer and different from the first mask pattern; measuring a second misalignment between the target alignment mark on the target wafer and a second alignment mark on the second mask wafer, and moving at least one of the second mask wafer and the target wafer to reduce the second misalignment, thereby aligning the second mask wafer with the target wafer; clamping the first wafer mounting frame to the second wafer mounting frame while the target wafer is aligned with the second masking wafer; Arranging the first wafer mounting frame and the second wafer mounting frame clamped together, including the aligned target wafer and the second masking wafer, in front of a second deposition source; and A second material is provided from the second deposition source through the second plurality of openings on the second masking wafer to form the second material according to the second predetermined deposition pattern on the target wafer.

14. The method of claim 13, wherein the first material of the first deposition source corresponds to a first emission material for an organic light emitting diode, and wherein the second material of the second deposition source corresponds to a second emission material for the organic light emitting diode, the first emission material being different from the second emission material.

15. The method of claim 14, wherein the first emissive material is a first organic material configured to emit light of a first color and the second emissive material is a second organic material configured to emit light of a second color, the second color being different from the first color.

16. A method of processing a wafer in a cluster tool, comprising: transferring a target wafer including an anode layer from a transfer load lock through a first transfer chamber to a first process chamber using a first transfer robot; forming a hole injection layer on the anode layer in the first processing chamber; transferring the target wafer including the hole injection layer from the first process chamber to a second process chamber using the first transfer robot; forming a hole transport layer on the hole injection layer in the second processing chamber; In a third processing chamber, holding the target wafer including the hole transport layer on a first wafer mounting frame; holding a first masking wafer on a second wafer mounting frame, wherein the first masking wafer includes a first masking pattern formed by a first plurality of openings passing through the first masking wafer, the first masking pattern corresponding to a first predetermined deposition pattern to be formed on the target wafer; measuring a first misalignment between a target alignment mark on the target wafer and a first alignment mark on the first mask wafer, and moving at least one of the first mask wafer and the target wafer to reduce the first misalignment, thereby aligning the first mask wafer with the target wafer; After the first mask wafer has been aligned with the target wafer, clamping the first wafer mounting frame to the second wafer mounting frame; and The first wafer mounting frame and the second wafer mounting frame, which clamp the aligned first masking wafer and the target wafer together, are arranged in a third processing chamber, and a first emission material is deposited through the first plurality of openings on the first masking wafer to form the first emission material according to the first predetermined deposition pattern on the target wafer.

17. The method according to claim 16, further comprising: after the first emitter material has been formed according to the first predetermined deposition pattern on the target wafer, unclamping the first wafer mounting frame from the second wafer mounting frame; as well as The first masking wafer is removed from the second wafer mounting frame.

18. The method according to claim 17, further comprising: holding a second masking wafer on the second wafer mounting frame, wherein the second masking wafer includes a second mask pattern formed by a second plurality of openings through the second masking wafer, the second mask pattern corresponding to a second predetermined deposition pattern to be formed on the target wafer and different from the first mask pattern; measuring a second misalignment between the target alignment mark on the target wafer and a second alignment mark on the second mask wafer, and moving at least one of the second mask wafer and the target wafer to reduce the second misalignment, thereby aligning the second mask wafer with the target wafer; clamping the first wafer mounting frame to the second wafer mounting frame while the target wafer is aligned with the second masking wafer; as well as Arranging the first wafer mounting frame and the second wafer mounting frame clamped together, including the aligned target wafer and the second masking wafer, in front of a second deposition source; and A second material is provided from the second deposition source through the second plurality of openings on the second masking wafer to form the second material according to the second predetermined deposition pattern on the target wafer.

19. The method of claim 18, wherein the first emitting material corresponds to a first organic material for an organic light emitting diode, and wherein the second material corresponds to a second organic material for the organic light emitting diode, the first organic material being different from the second organic material.

20. The method of claim 19, wherein the first organic material is configured to emit light of a first color and the second organic material is configured to emit light of a second color, the second color being different from the first color.

Images