Sensor chip and distance measuring device

Abstract

The sensor chip of an embodiment of the present disclosure includes: a semiconductor substrate having a pixel array portion in which a plurality of pixels are arranged in an array; a light receiving element, which is provided in the semiconductor substrate for each pixel and includes a multiplication region in which a carrier avalanche is multiplied by a high electric field region; and a first pixel separation portion, which is provided between pixels, the first pixel separation portion extending from one surface of the semiconductor substrate to another surface opposite to the one surface and having a bottom in the semiconductor substrate.

Description

Technical Field

[0001] The present disclosure relates to a sensor chip using, for example, an avalanche photodiode and a distance measuring device including the sensor chip. Background Art

[0002] In a distance measuring image sensor (distance measuring device) using a single photon avalanche diode (SPAD), light emission in a high electric field region of a pixel during carrier multiplication causes photons to be incident on adjacent pixels, resulting in unexpected detection of signals in adjacent pixels. To solve this problem, for example, Patent Document 1 discloses a sensor chip in which a pixel separation portion that physically separates a pixel from another adjacent pixel is provided in a semiconductor substrate on which an avalanche photodiode element is formed.

[0003] Citation list

[0004] Patent Literature

[0005] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2018-88488 Summary of the invention

[0006] At the same time, there is a need to reduce the pixel size of a sensor chip constituting a distance measuring device.

[0007] It is desirable to provide a sensor chip and a distance measuring device that can reduce the pixel size.

[0008] The sensor chip of the embodiment of the present disclosure includes: a semiconductor substrate having a pixel array portion in which a plurality of pixels are arranged in an array; a light receiving element, which is arranged in the semiconductor substrate for each of the pixels and has a multiplication region in which a carrier avalanche is multiplied by a high electric field region; and a first pixel separation portion, which is arranged between the pixels, the first pixel separation portion extending from one surface of the semiconductor substrate to another opposite surface and having a bottom in the semiconductor substrate.

[0009] The distance measuring device of the embodiment of the present disclosure includes an optical system, a sensor chip and a signal processing circuit, and the signal processing circuit calculates the distance to the measurement target object according to the output signal of the sensor chip. The distance measuring device includes the sensor chip of the embodiment of the present disclosure as the sensor chip.

[0010] According to the sensor chip and the distance measuring device of each embodiment of the present disclosure, in the pixel array section of the semiconductor substrate in which a plurality of pixels are arranged in an array, the first pixel separation section extending from one surface to the other surface between the pixels has a bottom provided in the semiconductor substrate. Therefore, the semiconductor substrate is shared on the other surface side in the pixel array section. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a schematic cross-sectional view showing an example of a schematic configuration of a sensor chip according to an embodiment of the present disclosure.

[0012] Figure 2 It is shown Figure 1 Schematic plan view of an example of the configuration of a pixel array section of a sensor chip shown.

[0013] Figure 3 It is shown Figure 1 A block diagram showing an example of the configuration of a sensor chip is shown.

[0014] Figure 4 yes Figure 1 An example of an equivalent circuit diagram of a pixel of a sensor chip is shown.

[0015] Figure 5 Yes Description Figure 1 Schematic diagram of the structure of the pixel separation part of the sensor chip shown.

[0016] Figure 6 Schematic cross-sectional view showing an example of a schematic configuration of a sensor chip as a reference example.

[0017] Figure 7 Yes Description Figure 1 Schematic cross-sectional view of the effect of the sensor chip shown.

[0018] Figure 8 : is a schematic cross-sectional view showing an example of a schematic configuration of a sensor chip according to Modification 1 of the present disclosure.

[0019] Fig. 9 : is a schematic cross-sectional view showing an example of a schematic configuration of a sensor chip according to Modification 1 of the present disclosure.

[0020] Fig. 10A It is along Figure 8 and Fig. 9 A schematic plan view of the sensor chip taken along line II' is shown.

[0021] Fig. 10B It is along Figure 8 and Fig. 9 A schematic plan view of the sensor chip taken along line II-II' is shown.

[0022] Fig.11 : is a schematic cross-sectional view showing another example of the schematic configuration of the sensor chip according to the modification 1 of the present disclosure.

[0023] Fig.12 : is a schematic cross-sectional view showing another example of the schematic configuration of the sensor chip according to the modification 1 of the present disclosure.

[0024] Fig.13 : is a schematic cross-sectional view showing an example of a schematic configuration of a sensor chip according to Modification 2 of the present disclosure.

[0025] Fig.14 : is a schematic cross-sectional view showing an example of a schematic configuration of a sensor chip according to Modification 3 of the present disclosure.

[0026] Fig.15 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0027] Fig.16 It is a diagram for assisting in explaining an example of the installation positions of the vehicle exterior information detection unit and the imaging unit. DETAILED DESCRIPTION

[0028] Below, the embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The following description is a specific example of the present disclosure, and the present disclosure is not limited to the following embodiments. In addition, the present disclosure is not limited to the arrangement, size, and size ratio of each component shown in the accompanying drawings. It should be noted that the description is given in the following order.

[0029] 1. Embodiment (Example of a sensor chip in which a p-well is shared by pixels on the light receiving surface side)

[0030] 1-1. Sensor chip structure

[0031] 1-2. Method for manufacturing sensor chip

[0032] 1-3. Operation of sensor chip

[0033] 1-4. Action and Effect

[0034] 2. Modifications

[0035] 2-1. Modification 1 (Example in which a pixel separation section is further provided on the light incident surface side)

[0036] 2-2. Modification 2 (Example in which wiring is connected to a pixel separation portion)

[0037] 2-3. Modification 3 (Example in which a semiconductor substrate and an inter-pixel light shielding film are electrically connected to each other in a peripheral portion)

[0038] 3. Application examples

[0039] <1. Implementation Plan>

[0040] Figure 1 An example of a cross-sectional configuration of a sensor chip (sensor chip 1 ) according to an embodiment of the present disclosure is schematically shown. Figure 2 Schematically shows Figure 1 An example of a planar configuration of the pixel array section R1 of the sensor chip 1 is shown. Figure 3 It is shown Figure 1 The block diagram of the structure of the sensor chip 1 shown in FIG. Figure 4 Shows Figure 1 An example of an equivalent circuit of a pixel P of the sensor chip 1 is shown. The sensor chip 1 is configured as a distance image sensor (distance measuring device) or an image sensor suitable for performing distance measurement by a ToF (Time-of-Flight) method, for example.

[0041] The sensor chip 1 includes, for example, a pixel array portion R1 in which a plurality of pixels P are arranged in an array shape, and a peripheral portion R2 arranged around the pixel array portion R1. Each of the plurality of pixels P includes, for example, a light receiving element 20, a p-type MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) 26, and a CMOS inverter 27. In addition, the sensor chip 1 has, for example, a structure in which a sensor substrate 10 and a logic substrate 30 are stacked on each other. The sensor substrate 10 has a stacked structure including a semiconductor substrate 11 provided with a light receiving element 20 and a wiring layer 13, the semiconductor substrate 11 being provided with a light receiving element 20, and the wiring layer 13 being provided on the front side (surface 11S1) of the semiconductor substrate 11. The logic substrate 30 is stacked on the wiring layer 13 (surface 13S1 side of the wiring layer 13). The sensor chip 1 of the present embodiment has a structure in which a pixel separation section 12 is provided between pixels, the pixel separation section 12 extending from the surface 11S1 of the semiconductor substrate 11 toward the back surface (surface 11S2, light receiving surface) opposite to the surface 11S1, and having a bottom 12S in the semiconductor substrate 11. The pixel separation section 12 corresponds to a specific example of the “first pixel separation section” of the present disclosure.

[0042] (1-1. Configuration of sensor chip)

[0043] The sensor chip 1 is, for example, a so-called back-illuminated sensor chip, in which a logic substrate 30 is stacked on the front side of the sensor substrate 10 (for example, the front side (surface 11S1) side of the semiconductor substrate 11) and receives light from the back side of the sensor substrate 10 (for example, the back side (surface 11S2) side of the semiconductor substrate 11).

[0044] The sensor substrate 10 includes a semiconductor substrate 11 composed of, for example, a silicon substrate, and a wiring layer 13. The semiconductor substrate 11 of the present embodiment includes a p-well 21 shared by a plurality of pixels P on the back side (surface 11S2, light receiving surface). In the semiconductor substrate 11, for example, the p-type or n-type impurity concentration is controlled for each pixel P, thereby forming a light receiving element 20 for each pixel P. In addition, as described above, the semiconductor substrate 11 is provided with a pixel separation portion 12 extending from the front side (surface 11S1) of the semiconductor substrate 11 to the back side (surface 11S2) thereof. The pixel separation portion 12 has a bottom 12S in the semiconductor substrate 11, whereby the p-well 21 is shared by a plurality of pixels P. The wiring layer 13 is provided on the front side (surface 11S1) of the semiconductor substrate 11.

[0045] The light receiving element 20 includes a multiplication region (avalanche multiplication region) in which carriers are avalanche multiplied by a high electric field region. The light receiving element 20 is a SPAD element capable of forming an avalanche multiplication region when a large negative voltage is applied to an anode and avalanche multiplying electrons generated by incidence of a single photon.

[0046] The light receiving element 20 includes, for example, an n-type semiconductor region 22, an n-type diffusion region 23, and a p-type diffusion region 24 formed in the semiconductor substrate 11. In the light receiving element 20, an avalanche multiplication region X is formed by a depletion layer formed in a region where the n-type diffusion region 23 and the p-type diffusion region 24 are connected to each other.

[0047] The n-type semiconductor region 22 is a region in which the impurity concentration of the semiconductor substrate 11 is controlled to be n-type. The n-type semiconductor region 22 is provided in a portion of the front surface (surface 11S1) of the semiconductor substrate and in its vicinity. In the n-type semiconductor region 22, an electric field is formed for transmitting electrons generated by photoelectric conversion in the light receiving element 20 to the avalanche multiplication region X.

[0048] The n-type diffusion region 23 is an n-type semiconductor region (n-type semiconductor region 22) formed near the front surface (surface 11S1) of the semiconductor substrate 11 and having an impurity concentration higher than that of the n-type semiconductor region 22. +). The n-type diffusion region 23 is formed to extend over almost the entire surface of the pixel P. In addition, a portion of the n-type diffusion region 23 is in a protruding shape facing the front surface (surface 11S1) of the semiconductor substrate 11 so as to be electrically connected to the contact electrode 17 (cathode).

[0049] The p-type diffusion region 24 is a p-type semiconductor region (p-type semiconductor region) formed near the front surface (surface 11S1) of the semiconductor substrate 11 in the n-type semiconductor region 22. + ), and the p-type diffusion region 24 is formed on the light receiving surface (surface 11S2) side relative to the n-type diffusion region 23. Similar to the n-type diffusion region 23, the p-type diffusion region 24 is formed to extend over almost the entire surface of the pixel P.

[0050] The avalanche multiplication region X is a high electric field region formed in the interface between the n-type diffusion region 23 and the p-type diffusion region 24 by applying a large negative voltage to the anode (in the present embodiment, the contact electrode 17 connected to the p-well in the peripheral portion R2). In the avalanche multiplication region X, electrons (e - ) is multiplied.

[0051] The pixel separation section 12 is provided between pixels on the front side (surface 11S1) of the semiconductor substrate 11, and is used to electrically and optically separate adjacent pixels P from each other on the front side (surface 11S1) of the semiconductor substrate 11. The pixel separation section 12 is formed, for example, by filling a separation groove 11H1 with a light shielding film 12A and an insulating film 12B, and the separation groove 11H1 extends in the thickness direction (Y-axis direction) of the semiconductor substrate 11 in the p-well 21 between the pixels. In other words, the pixel separation section 12 includes a light shielding film 12A and an insulating film 12B, and the insulating film 12B is provided to cover the surface (side surface and bottom surface) of the light shielding film 12A. The light shielding film 12A corresponds to a specific example of the "first light shielding film" of the present disclosure.

[0052] The separation groove 11H1 is formed from the front surface (surface 11S1) to the back surface (surface 11S2) of the semiconductor substrate 11, and its bottom remains in the semiconductor substrate 11 having the p-well 21. That is, the depth (d2) of the separation groove 11H1 is less than or equal to the thickness (d1) of the semiconductor substrate 11. As a result, the p-well 21 is shared by a plurality of pixels P.

[0053] The light shielding film 12A includes a conductive material having a light shielding property. Examples of such a material include tungsten (W), silver (Ag), copper (Cu), aluminum (Al), and alloys of aluminum and copper (Cu). Figure 5 As shown, for example, a gap V may be formed inside the light shielding film 12A. The insulating film 12B is made of, for example, silicon oxide (SiO x ) and so on.

[0054] The semiconductor substrate 11 is also provided in the peripheral portion R2 with, for example, n-type semiconductor regions 25A and 25B with the p-well 21 interposed therebetween.

[0055] The wiring layer 13 is arranged to be in contact with the front surface (surface 11S1) of the semiconductor substrate 11, and the wiring layer 13 includes, for example, an interlayer insulating film 14, wirings 15A and 15B, and pad portions 16A and 16B. The wirings 15A and 15B and the pad portions 16A and 16B are used, for example, to provide a voltage applied to the p-well 21 and the light receiving element 20, and to extract charges (for example, electrons) generated in the light receiving element 20. For example, the wiring 15A is electrically connected to the n-type diffusion region 23 via the contact electrode 17, and the pad portion 16A is electrically connected to the wiring 15A via the contact electrode 18. In the peripheral portion R2, the wiring 15B is electrically connected to the p-well 21 via the contact electrode 17, and the pad portion 16B is electrically connected to the wiring 15B via the contact electrode 18. It is to be noted that although Figure 1 An example is shown in which a single layer of wiring (wiring 15A and 15B) is formed in the wiring layer 13, but the total number of wirings in the wiring layer 13 is not limited, and wirings including two or more layers may be formed. Hereinafter, the same applies to Modifications 1 to 3 ( Figure 8 , Fig. 9 and Figure 11 to Figure 14 ).

[0056] The interlayer insulating film 14 is made of, for example, silicon oxide (SiO x )、TEOS、Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) etc. or a laminated film consisting of two or more of these.

[0057] Wiring 15A and 15B are formed in the interlayer insulating film 14. Wiring 15A is formed, for example, in a range wider than the avalanche multiplication region X so as to cover the avalanche multiplication region X, and wiring 15A also serves as a reflection plate for reflecting light transmitted through the light receiving element 20 to the light receiving element 20. Wiring 15A corresponds to a specific example of the "light reflecting portion" of the present disclosure. Wiring 15B is electrically connected to p-well 21 with contact electrode 17 as an anode in the peripheral portion R2, for example. Wiring 15A and 15B are composed of, for example, aluminum (Al), copper (Cu), tungsten (W), or the like.

[0058] The pad portions 16A and 16B are exposed on the bonding surface of the interlayer insulating film 14 and the logic substrate 30 (for example, the surface 13S1 of the wiring layer 13), and are used, for example, for connection with the logic substrate 30. The pad portions 16A and 16B are composed of, for example, copper (Cu) pads.

[0059] The logic substrate 30 includes a wiring layer 31 that contacts a bonding surface of the sensor substrate 10 (e.g., the surface 13S1 of the wiring layer 13) and a semiconductor substrate (not shown) in which a bias voltage applying section 51 (see FIG. Figure 3 ) and a p-type MOSFET 26 and a CMOS inverter 27 constituting the pixel P, and the semiconductor substrate not shown is opposed to the sensor substrate 10. The wiring layer 31 includes an interlayer insulating film 32, an insulating film 33, pad portions 34A and 34B, and pad electrodes 35A and 35B.

[0060] The wiring layer 31 includes an interlayer insulating film 32 and an insulating film 33 in order from the sensor substrate 10 side. The interlayer insulating film 32 and the insulating film 33 are provided to be stacked on each other. Similar to the interlayer insulating film 14, the interlayer insulating film 32 and the insulating film 33 include, for example, silicon oxide (SiO x )、TEOS、Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) etc. or a laminated film consisting of two or more of these.

[0061] The pad portions 34A and 34B are exposed on the bonding surface of the interlayer insulating film 32 and the sensor substrate 10 (for example, the surface 31S2 of the wiring layer 31), and the pad portions 34A and 34B are used, for example, for connection with the sensor substrate 10. The pad portions 34A and 34B are composed of, for example, copper (Cu) pads. The pad electrodes 35A and 35B are used, for example, for connection with the semiconductor substrate of the logic substrate 30, and the pad electrodes 35A and 35B are composed of, for example, aluminum (Al), copper (Cu), or tungsten (W). The pad portions 34A and 34B and the pad electrodes 35A and 35B are used, for example, to provide a voltage to be applied from the bias voltage applying section 51 to the p-well 21 and the light receiving element 20, and to extract charges (for example, electrons) generated in the light receiving element 20. For example, the pad portions 34A and 34B are electrically connected to the pad electrodes 35A and 35B, respectively, via the contact electrodes 36.

[0062] In the sensor chip 1, for example, Cu-Cu bonding is established between the pad portions 16A and 16B and the pad portions 34A and 34B. As a result, for example, the pad electrode 35A in the pixel array portion R1 is electrically connected to the n-type diffusion region 23 via, for example, the contact electrode 36, the pad portion 34A, the pad portion 16A, the contact electrode 18, the wiring 15A, and the contact electrode 17. In addition, the pad electrode 35B in the peripheral portion R2 is electrically connected to the p-well 21 via, for example, the contact electrode 36, the pad portion 34B, the pad portion 16B, the contact electrode 18, the wiring 15B, and the contact electrode 17.

[0063] The bias voltage applying section 51 applies a bias voltage to each of the plurality of light receiving elements 20 arranged for each pixel P in the pixel array section R1. When the voltage generated by the avalanche multiplied electrons in the light receiving element 20 reaches a negative voltage (V BD ), the p-type MOSFET 26 performs quenching to release the electrons avalanche-multiplied in the light receiving element 20, thereby restoring the initial voltage. The CMOS inverter 27 forms a voltage generated by the electrons avalanche-multiplied in the light receiving element 20, thereby outputting a light receiving signal (APD OUT) generated by a pulse waveform starting from the arrival time of a single photon.

[0064] For example, on the light receiving surface (the back surface (surface 11S2) of the semiconductor substrate 11) side of the sensor substrate 10, an on-chip lens 42 is provided via a passivation film 41 for each pixel P. In addition, an inter-pixel light shielding film 43 is provided between pixels.

[0065] The passivation film 41 is used to protect the back surface (surface 11S2) of the semiconductor substrate 11. In addition, the passivation film 41 may have an anti-reflection function, for example. The passivation film 41 includes a silicon nitride (SiN) film, an aluminum oxide (AlO x ) film, silicon oxide (SiO x ) film, tantalum oxide (TaO x ) film or hafnium oxide (HfO x ), titanium oxide (TiO x ) or STO oxide film.

[0066] The on-chip lens 42 is used to converge light incident from above onto the light receiving element 20, and is made of, for example, silicon oxide (SiO x ) etc. The inter-pixel shading film 43 is used to suppress the crosstalk of oblique incident light between adjacent pixels. The inter-pixel shading film 43 is, for example, disposed between adjacent pixels P in the pixel array portion R1, and the inter-pixel shading film 43 has, for example, a lattice shape. Similar to the shading film 12A, the inter-pixel shading film 43 also includes a conductive material having a light-shielding property. Specifically, the inter-pixel shading film 43 includes tungsten (W), silver (Ag), copper (Cu), aluminum (Al), or an alloy of aluminum and copper (Cu), etc.

[0067] As described above, the sensor chip 1 includes a pixel array section R1 and a peripheral section R2 provided around the pixel array section R1. In the pixel array section R1, a plurality of pixels P are arranged in an array, and each pixel P is provided with the above-mentioned light receiving element 20, p-type MOSFET 26, CMOS inverter 27, etc. In the peripheral section R2, for example, n-type semiconductor regions 25A and 25B are provided with a p-well 21 therebetween. The wiring 15B, the pad sections 16B and 34B, and the pad electrode 35B are connected to the p-well 21 between the n-type semiconductor region 25A and the n-type semiconductor region 25B in sequence, for example, via the contact electrodes 17, 18, and 36. The pad electrode 35B is connected to the ground (GND), for example.

[0068] (1-2. Method for manufacturing sensor chip)

[0069] For example, the sensor chip 1 can be manufactured in the following manner. First, the p-type or n-type impurity concentration of the semiconductor substrate 11 is controlled by ion implantation to form the p-well 21, the n-type semiconductor region 22, the n-type diffusion region 23, and the p-type diffusion region 24. Subsequently, for example, a silicon-based material such as SiO x The front side (surface 11S1) of the semiconductor substrate 11 is patterned using an oxide film or a nitride film as a hard mask, and then a separation groove 11H1 is formed from the front side (surface 11S1) by etching. Subsequently, an insulating film 12B and a light shielding film 12A are sequentially formed on the side and bottom of the separation groove 11H1, for example, by a CVD (Chemical Vapor Deposition) method, a PVD (Physical Vapor Deposition) method, an ALD (Atomic Layer Deposition) method, or a vapor deposition method. Next, the light shielding film 12A and the insulating film 12B on the front side (surface 11S1) of the semiconductor substrate 11 are removed by, for example, CMP (Chemical Mechanical Polishing) using a hard mask as a barrier layer, and then a wiring layer 13 is formed on the front side (surface 11S1) of the semiconductor substrate 11. Thereafter, a separately formed logic substrate 30 is bonded to the wiring layer 13. At this time, the pad portions 16A and 16B exposed on the bonding surface 13S1 of the wiring layer 13 and the pad portions 34A and 34B exposed on the bonding surface 31S2 of the wiring layer 31 on the logic substrate 30 side are bonded to each other by Cu-Cu bonding. Subsequently, the back surface (surface 11S2) of the semiconductor substrate 11 is polished by, for example, CMP, and then the passivation film 41, the inter-pixel light shielding film 43, and the on-chip lens 42 are formed in order. This completes Figure 1 The sensor chip 1 is shown.

[0070] (1-3. Operation of sensor chip)

[0071] In the light receiving element 20, when a large negative voltage (V BD ) is applied to the anode (the contact electrode 17 connected to the p-well in the peripheral portion R2), the depletion layer expands from the pn junction surface between the n-type diffusion region 23 and the p-type diffusion region 24 connected thereto, thereby forming an avalanche multiplication region X. In the avalanche multiplication region X, electrons generated by the incidence of a single photon can be avalanche multiplied. The avalanche multiplied electrons are extracted as signal charges and signal processing is performed by the signal processing circuit.

[0072] The sensor chip 1 can be used as a distance measuring sensor by the ToF method. In the ToF method, the signal delay time between the signal generated by the signal charge and the reference signal is converted into the distance to the measurement target object. The signal processing circuit calculates the signal delay time, for example, based on the signal generated by the signal charge obtained from each pixel P and the reference signal. The obtained signal delay time is converted into a distance. The distance to the measurement target object is thus measured.

[0073] (1-4. Actions and Effects)

[0074] In the sensor chip 1 of the present embodiment, between the pixels in the pixel array section R1 in which the plurality of pixels P are arranged in an array, a pixel separation section 12 extending from the front surface (surface 11S1) to the back surface (surface 11S2) in the semiconductor substrate 11 and having a bottom 12S in the semiconductor substrate 11 is provided, whereby the p-well 21 formed in the semiconductor substrate 11 is shared by the plurality of pixels. Therefore, it is not necessary to provide an anode for each pixel P, and the plurality of pixels can share the anode. This will be described below.

[0075] Figure 6 The cross-sectional structure of a general sensor chip 100 as a reference example is schematically shown. As described above, in a general sensor chip including an avalanche photodiode element for each pixel P, an inter-pixel separation portion is provided to physically separate a pixel from another adjacent pixel in order to prevent color mixing due to hot carrier light emission between adjacent pixels. Figure 6 The pixel separation unit 1200 shown is the same, and the pixel separation unit penetrates the semiconductor substrate 1100, and the semiconductor substrate 1100 is divided into units of pixels P. Therefore, in the sensor chip 100, an anode 2110 and wiring connected to the anode 2110 need to be provided for each pixel P.

[0076] In the sensor chip having the above-described configuration, it is necessary to ensure a region in which an anode is to be formed in the pixel P, and thus it is difficult to reduce the pixel size.

[0077] In contrast, in the present embodiment, the bottom 12S of the pixel separation portion 12 is provided in the semiconductor substrate 11, and the p-well 21 formed in the semiconductor substrate 11 is shared by a plurality of pixels P on the back surface (surface 11S2) side of the semiconductor substrate 11. Therefore, it is not necessary to form an anode for each pixel P, and the pixel size can be reduced by the size of the anode formation region described above.

[0078] Alternatively, while maintaining the pixel size, the area of ​​the n-type diffusion region 23 and the p-type diffusion region 24 can be increased by the size of the anode formation region. As a result, the size of the avalanche multiplication region X can be increased. Figure 6 As shown in the sensor chip 100, the wiring structure C connected to the anode 2110 is provided, so the reflection plate (wiring 15A) for reflecting the light transmitted through the semiconductor substrate 11 to the light receiving element 20 can be formed in a larger size. Therefore, the photon detection efficiency (PDE) can be improved.

[0079] In addition, in a typical sensor chip 100, as Figure 6 As shown in FIG. 1 , the pixel separation unit 1200 and the inter-pixel light shielding film 4300 provided between pixels on the light receiving surface (surface 1100S) side of the semiconductor substrate 1100 are integrated. In contrast, in the sensor chip 1 of the present embodiment, the pixel separation unit 1200 and the inter-pixel light shielding film 4300 are formed independently of each other. Figure 7 As shown by arrow A, the on-chip lens 42 and the inter-pixel light shielding film 43 can be easily shifted relative to the pixel P. That is, the degree of freedom in designing the on-chip lens 42 and the inter-pixel light shielding film 43 relative to the pixel P is improved. Therefore, pupil correction can be easily performed.

[0080] Next, a modification of the present disclosure will be described. Hereinafter, the same components as those in the above-described embodiment are denoted by the same reference numerals, and description thereof is appropriately omitted.

[0081] <2. Modifications>

[0082] (2-1. Modification 1)

[0083] Figure 8 An example of a cross-sectional configuration of a sensor chip (sensor chip 2 ) according to Modification 1 of the present disclosure is schematically shown. Fig. 9 An example of a cross-sectional configuration at another position in the sensor chip 2 is schematically shown. Fig. 10A Schematically shows the Figure 8 and Fig. 9 The plane cut by the line II' shown is composed of: Fig. 10B Schematically shows the Figure 8 and Fig. 9 The plane formed by the line II-II' shown. It should be noted that Figure 8 Shown along Fig. 10A and Fig. 10B The cross section taken along the line AA' shown, Fig. 9 Shown along Fig. 10A and Fig. 10B The cross section is taken along the line BB' shown in FIG. 2 . Similar to the sensor chip 1 of the aforementioned embodiment, the sensor chip 2 is configured as, for example, a distance image sensor (distance measuring device) suitable for distance measurement by the ToF method. The sensor chip 2 of this modification is different from the aforementioned embodiment in that a pixel separation portion 61A extending from the back side (surface 11S2) of the semiconductor substrate 11 to the front side (surface 11S1) opposite to the back side is provided between pixels. The pixel separation portion 61A corresponds to a specific example of the "second pixel separation portion" of the present disclosure.

[0084] The pixel separation portion 61A is used to electrically separate adjacent pixels P from each other on the back side (surface 11S2) of the semiconductor substrate 11. The pixel separation portion 61A is formed by filling a separation groove 61H with a passivation film 61 for protecting the back side (surface 11S2) of the semiconductor substrate 11, and the separation groove 61H extends from the back side (surface 11S2) of the semiconductor substrate 11 in the thickness direction (Y-axis direction). Similar to the aforementioned passivation film 41, the passivation film 61 may have an anti-reflection function, for example. The passivation film 61 includes, for example, a silicon nitride (SiN) film or a material such as aluminum oxide (AlO x ) film, silicon oxide (SiO x ) film or tantalum oxide (TaO x ) film or the like. It is to be noted that the pixel separation section 61A may not have the above-described configuration, and may have a configuration in which an anti-reflection film is embedded in an oxide film. Specifically, the inter-pixel light shielding film 43 may be embedded together with the oxide film (see Fig.11 ).

[0085] like Figure 8 As shown, the bottom 61S of the pixel separation section 61A contacts the bottom 12S of the pixel separation section 12 extending from the front surface (surface 11S1) of the semiconductor substrate 11 in the thickness direction (Y-axis direction). Fig. 10A As shown, for example, the pixel separation section 61A is provided in the pixel array section R1 arranged in, for example, 5 rows×2 columns, except for the intersections I between adjacent pixels. As a result, the p well 21 of the semiconductor substrate 11 is shared by a plurality of pixels P at the intersections I between adjacent pixels.

[0086] As described above, in this modification, a pixel separation portion 61A extending from the back surface (surface 11S2) of the semiconductor substrate 11 to the front surface (surface 11S1) opposite to the back surface is provided between pixels. Therefore, in addition to providing the effects of the aforementioned embodiment, the light confinement effect on the incident light in the pixel P is improved.

[0087] In addition, if Fig.11 As shown, the inter-pixel light shielding film 43 may extend in the pixel separation portion 61A. Therefore, the light confinement effect on the incident light in the pixel P can be further improved.

[0088] In addition, if Fig.12 As shown, a gap G may be provided between the bottom 61S of the pixel separation section 61A and the bottom 12S of the pixel separation section 12. In this case, the p-well 21 of the semiconductor substrate 11 is shared by a plurality of pixels P via the gap G, and thus Fig. 10B The planar shape of the pixel separation section 12 shown is similar, and the pixel separation section 61A can also be provided at the intersection I between adjacent pixels.

[0089] (2-2. Modification 2)

[0090] Fig.13 An example of a cross-sectional configuration of a sensor chip (sensor chip 3) according to a second modification of the present disclosure is schematically shown. Similar to the sensor chip 1 of the aforementioned embodiment, the sensor chip 3 is configured as, for example, a distance image sensor (distance measuring device) suitable for distance measurement by a ToF method. The sensor chip 3 of this modification is different from the aforementioned embodiment in that wiring is connected to the pixel separation unit 12.

[0091] Wiring 15C, pad portions 16C and 34C, and pad electrode 35C are electrically connected to the pixel separation portion 12 of this modification via contact electrodes 17, 18, and 36, and voltage can be applied to the pixel separation portion 12 independently of the anode (contact electrode 17 in the peripheral portion R2) and the cathode (contact electrode 17 in the pixel array portion R1). As a result, pinning can be performed, thereby suppressing the generation of dark current. In addition, the electric field applied to the insulating film 12B between the shading film 12A and the semiconductor substrate 11 can be reduced, thereby preventing the degradation of the insulating film 12B. Therefore, in addition to providing the effects of the aforementioned embodiment, reliability can also be improved.

[0092] (2-3. Modification 3)

[0093] Fig.14An example of a cross-sectional configuration of a sensor chip (sensor chip 4) according to a modification example 3 of the present disclosure is schematically shown. Similar to the sensor chip 1 of the aforementioned embodiment, the sensor chip 4 is configured as, for example, a distance image sensor (distance measuring device) suitable for distance measurement by a ToF method. The sensor chip 4 of this modification example is different from the aforementioned embodiment in that the inter-pixel light shielding film 43 extends to the peripheral portion R2, and in the peripheral portion R2, the inter-pixel light shielding film 43 is electrically connected to the p-well 21 of the semiconductor substrate 11 via an opening 41H provided in the passivation film 41.

[0094] Furthermore, in the sensor chip 4 of the present modification, as described above, the inter-pixel light shielding film 43 is electrically connected to the p-well 21 of the semiconductor substrate 11 in the peripheral portion R2. In the peripheral portion R2, the contact electrode 17 is connected to the p-well 21 as an anode, and is electrically connected to the bias voltage applying portion 51 via the wiring 15B, the contact electrode 18, the pad portions 16B and 34B, the contact electrode 36, and the pad electrode 35B. Therefore, the anode potential can be applied also to the inter-pixel light shielding film 43.

[0095] Furthermore, in the peripheral portion R2, as Fig.14 As shown, for example, an insulating film 19 penetrating the semiconductor substrate 11 may be provided, and different potentials may be applied to the inner and outer sides of the insulating film 19. The outer side of the insulating film 19 may be connected to the ground (GND), for example. Therefore, in the aforementioned embodiment, the influence on the connection of the lower substrate (for example, the logic substrate 30) and the like due to the application of a potential to the peripheral portion R2 may be reduced.

[0096] <3. Application Examples>

[0097] (Application example of mobile object)

[0098] The technology according to the present disclosure is applicable to various products. For example, the technology according to the present disclosure can be implemented as a device installed on any type of mobile body such as a car, an electric car, a hybrid electric car, a motorcycle, a bicycle, a personal mobile device, an airplane, a drone, a ship, a robot, etc.

[0099] Fig.15 : is a block diagram showing a schematic configuration example of a vehicle control system as an example of a moving body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0100] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig.15In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown as the functional configuration of the integrated control unit 12050.

[0101] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 serves as a control device for the following devices: a drive force generating device such as an internal combustion engine or a drive motor for generating a drive force for the vehicle; a drive force transmitting mechanism for transmitting the drive force to the wheels; a steering mechanism for adjusting the steering angle of the vehicle; and a braking device for generating a braking force for the vehicle, etc.

[0102] The body system control unit 12020 controls the operation of various devices provided to the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a taillight, a brake light, a turn signal light, or a fog light. In this case, radio waves transmitted from a portable device as a substitute for a key or signals of various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls the door lock device, the power window device, and lights of the vehicle.

[0103] The vehicle exterior information detection unit 12030 detects information about the exterior of the vehicle having the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to image the exterior of the vehicle and receives the imaged image. Based on the received image, the vehicle exterior information detection unit 12030 can perform detection processing on objects such as people, vehicles, obstacles, signs, or symbols on the road surface, or detection processing of the distance to these objects.

[0104] The imaging unit 12031 is an optical sensor for receiving light and outputting an electrical signal corresponding to the amount of light received. The imaging unit 12031 may output the electrical signal as an image, or may output the electrical signal as information about the measured distance. In addition, the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared rays.

[0105] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 that detects the driver's state. The driver state detection unit 12041 includes, for example, a camera that images the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0106] The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information about the inside or outside of the vehicle (the information is obtained by the outside information detection unit 12030 or the inside information detection unit 12040), and output the control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform the coordinated control aimed at realizing the functions of the advanced driver assistance system (ADAS), which includes: collision avoidance or collision mitigation of the vehicle, following driving based on the vehicle-to-vehicle distance, vehicle speed maintenance driving, vehicle collision warning or vehicle lane departure warning, etc.

[0107] In addition, the microcomputer 12051 can perform collaborative control intended for autonomous driving, which enables the vehicle to drive autonomously by controlling a driving force generating device, a steering mechanism, or a braking device, etc. based on information about the interior or exterior of the vehicle (the information is obtained by the exterior information detection unit 12030 or the interior information detection unit 12040), without relying on the driver's operation.

[0108] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 based on information about the exterior of the vehicle, which is obtained by the exterior information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to change from high beam to low beam according to the position of the preceding vehicle or the oncoming vehicle detected by the exterior information detection unit 12030.

[0109] The sound / image output unit 12052 transmits an output signal of at least one of sound and image to an output device that can visually or auditorily notify the vehicle's passengers or the outside of the vehicle of information. Fig.15 In the example of FIG. 1 , an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown as output devices. For example, the display portion 12062 may include at least one of an in-vehicle display and a head-up display.

[0110] Fig.16 12031 is a diagram showing an example of the installation position of the camera unit 12031.

[0111] exist Fig.16 In the figure, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0112] The camera units 12101, 12102, 12103, 12104 and 12105 are, for example, arranged at positions on the front nose, side mirrors, rear bumper and rear door of the vehicle 12100 and at positions on the upper part of the windshield inside the vehicle. The camera unit 12101 arranged on the front nose and the camera unit 12105 arranged on the upper part of the windshield inside the vehicle mainly obtain images in front of the vehicle 12100. The camera units 12102 and 12103 arranged on the side mirrors mainly obtain images on the sides of the vehicle 12100. The camera unit 12104 arranged on the rear bumper or rear door mainly obtains images at the rear of the vehicle 12100. The camera unit 12105 arranged on the upper part of the windshield inside the vehicle is mainly used to detect vehicles in front, pedestrians, obstacles, signals, traffic signs or lanes, etc.

[0113] By the way, Fig.16 An example of the photographing range of the camera units 12101 to 12104 is shown. The photographing range 12111 indicates the photographing range of the camera unit 12101 provided to the front nose. The photographing ranges 12112 and 12113 respectively indicate the photographing ranges of the camera units 12102 and 12103 provided to the side mirrors. The photographing range 12114 indicates the photographing range of the camera unit 12104 provided to the rear bumper or the rear door. For example, by superimposing the image data photographed by the camera units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above is obtained.

[0114] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0115] For example, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the time change of the distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting the nearest three-dimensional object as the leading vehicle, in particular, the three-dimensional object exists on the driving path of the vehicle 12100 and travels in substantially the same direction as the vehicle 12100 at a predetermined speed (e.g., equal to or greater than 0 km / h). In addition, the microcomputer 12051 can pre-set the inter-vehicle distance to be maintained in front of the leading vehicle, and perform automatic braking control (including follow-up stop control) or automatic acceleration control (including follow-up start control), etc. Therefore, cooperative control intended for automatic driving can be performed, which allows the vehicle to travel autonomously without relying on the driver's operation, etc.

[0116] For example, the microcomputer 12051 can classify the three-dimensional object data about the three-dimensional object into three-dimensional object data of two-wheeled vehicles, standard-sized vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on the distance information obtained from the camera units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be visually identified by the driver of the vehicle 12100 and obstacles that are difficult for the driver of the vehicle 12100 to visually identify. Then, the microcomputer 12051 determines the collision risk representing the risk of collision with each obstacle. When the collision risk is equal to or higher than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering through the drive system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid collision.

[0117] At least one of the camera units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether there is a pedestrian in the captured images of the camera units 12101 to 12104. For example, such identification of pedestrians is performed by a program that extracts feature points in the captured images of the camera units 12101 to 12104 that are infrared cameras and a program that determines whether it is a pedestrian by performing pattern matching processing on a series of feature points representing the outline of an object. When the microcomputer 12051 determines that there is a pedestrian in the captured images of the camera units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so that a square contour line for emphasis is displayed in a manner superimposed on the identified pedestrian. The sound / image output unit 12052 may also control the display unit 12062 so that an icon or the like representing a pedestrian is displayed at a desired position.

[0118] The above description has been given with reference to the embodiment and modification examples 1 to 3; however, the content of the present disclosure is not limited to the aforementioned embodiment, etc., and can be modified in various ways. For example, in the aforementioned embodiment, etc., an example in which electrons are used as signal charges has been described; however, holes can also be used as signal charges.

[0119] Furthermore, in the aforementioned embodiments, etc., the semiconductor substrate 11 including the p-well 21 has been described as an example; however, in the semiconductor substrate 11, an n-well in which the impurity concentration is controlled to be n-type may be formed instead of the p-well 21. Furthermore, in the aforementioned embodiments, etc., an example in which a negative potential is applied to the anode has been described; however, the respective potentials are not limited as long as a reverse bias is applied between the anode and the cathode to cause avalanche multiplication.

[0120] Furthermore, the effects described in the foregoing embodiments and the like are merely exemplary, and may be any other effects, or may further include any other effects.

[0121] It should be noted that the present disclosure may have the following configuration. According to the present disclosure having the following configuration, in a pixel array portion of a semiconductor substrate in which a plurality of pixels are arranged in an array, a first pixel separation portion extending from one surface to another surface between pixels has a bottom provided in the semiconductor substrate. Therefore, the semiconductor substrate is shared on the other surface side. As a result, for example, there is no need to provide an anode for each pixel, and thus the anode can be used in common between a plurality of pixels. Therefore, the pixel size can be reduced.

[0122] (1) A sensor chip comprising:

[0123] a semiconductor substrate having a pixel array portion in which a plurality of pixels are arranged in an array;

[0124] a light receiving element provided in the semiconductor substrate for each of the pixels and having a multiplication region in which carriers are avalanche multiplied by a high electric field region; and

[0125] A first pixel separation portion is provided between the pixels, the first pixel separation portion extends from one surface of the semiconductor substrate to the other opposite surface and has a bottom in the semiconductor substrate.

[0126] (2) The sensor chip according to (1), wherein

[0127] The semiconductor substrate has a well for each of the pixels, and

[0128] The well is shared by a plurality of the pixels on the other surface side of the semiconductor substrate.

[0129] (3) The sensor chip according to (1) or (2), further including a light reflecting portion stacked on the one surface side of the semiconductor substrate and provided to cover at least a portion of the high electric field region.

[0130] (4) A sensor chip according to any one of (1) to (3), wherein the first pixel separation portion is composed of a first light-shielding film and an insulating film, the first light-shielding film includes a conductive material with light-shielding properties, and the insulating film covers a surface of the first light-shielding film in the semiconductor substrate.

[0131] (5) The sensor chip according to any one of (2) to (4), wherein the well is electrically connected to an anode provided in a peripheral portion around the pixel array portion.

[0132] (6) The sensor chip according to (5), wherein the anode is commonly used by the plurality of pixels.

[0133] (7) The sensor chip according to any one of (1) to (6), wherein the semiconductor substrate further includes a second pixel separation portion that is provided between the pixels and extends from the other surface to the one surface.

[0134] (8) The sensor chip according to (7), wherein the second pixel separation portion is formed of an oxide film.

[0135] (9) The sensor chip according to (7) or (8), wherein, in the semiconductor substrate, a bottom portion of the second pixel separation portion is in contact with a bottom portion of the first pixel separation portion.

[0136] (10) The sensor chip according to any one of (7) to (9), wherein the second pixel separation section has an opening at an intersection of the plurality of adjacent pixels.

[0137] (11) The sensor chip according to (7) or (8), wherein a gap exists between a bottom of the first pixel separation portion and a bottom of the second pixel separation portion.

[0138] (12) The sensor chip according to any one of (1) to (11), further comprising a second light shielding film between the pixels on the other surface of the semiconductor substrate.

[0139] (13) The sensor chip according to (12), wherein the second light shielding film is electrically connected to the semiconductor substrate in the peripheral portion.

[0140] (14) The sensor chip according to any one of (7) to (13), further comprising a second light shielding film between the pixels on the other surface of the semiconductor substrate,

[0141] Part of the second light shielding film extends in the second pixel separation portion.

[0142] (15) The sensor chip according to any one of (4) to (14), further comprising a voltage applying unit,

[0143] Here, a voltage is applied from the voltage applying section to the first light shielding film.

[0144] (16) The sensor chip according to any one of (1) to (15), wherein

[0145] The semiconductor substrate includes a peripheral portion around the pixel array portion, and

[0146] The pixel array section and the peripheral section are electrically separated from each other by an insulating film.

[0147] (17) The sensor chip according to any one of (1) to (16), further including an on-chip lens stacked on the other surface side of the semiconductor substrate.

[0148] (18) A distance measuring device comprising an optical system, a sensor chip, and a signal processing circuit, wherein the signal processing circuit calculates the distance to a measurement target object based on an output signal of the sensor chip.

[0149] Wherein, the sensor chip comprises:

[0150] a semiconductor substrate having a pixel array portion in which a plurality of pixels are arranged in an array;

[0151] a light receiving element provided in the semiconductor substrate for each of the pixels and having a multiplication region in which carriers are avalanche multiplied by a high electric field region; and

[0152] A first pixel separation portion is provided between the pixels, the first pixel separation portion extends from one surface of the semiconductor substrate to the other opposite surface and has a bottom in the semiconductor substrate.

[0153] This application claims priority from Japanese Patent Application No. 2019-065375 filed in the Japan Patent Office on March 29, 2019, the entire contents of which are incorporated herein by reference.

[0154] Those skilled in the art should understand that various modifications, combinations, sub-combinations and alterations may be made depending on design requirements and other factors as long as these modifications, combinations, sub-combinations and alterations are within the scope of the appended claims or the equivalents thereof.

Claims

1. A sensor chip, comprising: a semiconductor substrate having a pixel array portion in which a plurality of pixels are arranged in an array; a light receiving element provided in the semiconductor substrate for each of the pixels and having a multiplication region in which carriers are avalanche multiplied by a high electric field region; and a first pixel separation portion, which is disposed between the pixels, and extends from one surface of the semiconductor substrate to another opposite surface and has a bottom in the semiconductor substrate, wherein: The semiconductor substrate has a well for each of the pixels, The well is shared by a plurality of the pixels on the other surface side of the semiconductor substrate, and The well is electrically connected to an anode provided in a peripheral portion around the pixel array portion. 2 . The sensor chip according to claim 1 , further comprising a light reflecting portion which is stacked on the one surface side of the semiconductor substrate and is provided to cover at least a part of the high electric field region.

3. The sensor chip according to claim 1, wherein: The first pixel separation portion is composed of a first light-shielding film including a conductive material having a light-shielding property and an insulating film covering a surface of the first light-shielding film in the semiconductor substrate.

4. The sensor chip according to claim 1, wherein: The anode is commonly used by the plurality of pixels.

5. The sensor chip according to claim 1, wherein: The semiconductor substrate further includes a second pixel separating portion provided between the pixels and extending from the other surface toward the one surface.

6. The sensor chip according to claim 5, wherein: The second pixel separation portion is formed of an oxide film.

7. The sensor chip according to claim 5, wherein: In the semiconductor substrate, a bottom portion of the second pixel separating portion is in contact with a bottom portion of the first pixel separating portion.

8. The sensor chip according to claim 5, wherein: The second pixel separation portion has an opening at an intersection of the plurality of adjacent pixels.

9. The sensor chip according to claim 5, wherein: A gap is provided between a bottom of the first pixel separating portion and a bottom of the second pixel separating portion. 10 . The sensor chip according to claim 1 , further comprising a second light shielding film between the pixels on the other surface of the semiconductor substrate.

11. The sensor chip according to claim 10, wherein: The second light shielding film is electrically connected to the semiconductor substrate in the peripheral portion.

12. The sensor chip according to claim 5, further comprising a second light shielding film between the pixels on the other surface of the semiconductor substrate, in, A portion of the second light shielding film extends in the second pixel separating portion.

13. The sensor chip according to claim 3, further comprising a voltage applying unit, in, A voltage is applied to the first light shielding film from the voltage applying section.

14. The sensor chip according to claim 1, wherein: The semiconductor substrate includes the peripheral portion, and The pixel array section and the peripheral section are electrically separated from each other by an insulating film. 15 . The sensor chip according to claim 1 , further comprising an on-chip lens stacked on the other surface side of the semiconductor substrate. 16 . A distance measuring device comprising an optical system, a sensor chip according to claim 1 , and a signal processing circuit, wherein the signal processing circuit calculates the distance to a measurement target object based on an output signal of the sensor chip.

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