Encapsulated, surface mountable, stackable electronic power device and circuit package

Abstract

The present disclosure relates to a packaged, surface mountable, stackable electronic power device and circuit arrangement. The surface mountable power device has a leadframe including a die attachment support and at least one first lead and one second lead. A die of semiconductor material is bonded to the die attachment support, and an insulating material and a parallelepiped-shaped package enclose the die and at least partially enclose the die attachment support and has a package height. The first and second leads have an outer portion outside the package extending from two opposite side surfaces of the package. The outer portions of the leads have a lead height greater than the package height, extend through the package height and have respective portions protruding from a first base.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a packaged stackable electronic power device and circuit arrangement for surface mounting, the circuit arrangement comprising a plurality of electronic power devices packaged and mutually stacked. BACKGROUND

[0002] For example, the following devices can operate at high voltage (even up to 1700V) with fast-switchable current: such as silicon carbide devices or silicon devices, or MOSFETs, super-junction MOSFETs, IGBTs, etc., whether in bridge (half-bridge or full-bridge) configuration or in AC switching configuration, PFC (Power Factor Correction) circuits, SMPS (Switched Mode Power Supply) devices, for example.

[0003] For such electronic power devices, specific packages have been designed that enable high dissipation. These packages are generally formed by a rigid insulator (for example, resin) having a parallelepiped shape, which embeds the dies that integrate the electronic component(s), and a dissipation structure arranged between the dies, facing the surface of the package and generally occupying most of the main base of the parallelepiped shape. The dissipation structure is sometimes formed by a support structure of metal, called "lead frame", which carries the dies and has a plurality of leads for external connection. Typically, in this case, the lead frame has a surface that faces directly the outside.

[0004] For example, in the case of a packaged device comprising a MOSFET or an IGBT, the die that integrates the MOSFET generally has a drain contact pad on its own first main surface and at least two contact pads (respectively, source and gate pads) on a second main surface, opposite the first surface. The transistor contact pad, typically the drain pad, is fixed to a support portion of the lead frame. The other contact pads, typically the gate and source pads, are coupled to other leads by means of bonding wires or clips. This standard package generally envisages arranging the leads on the same side of the dissipation structure and thus generally enables downward dissipation.

[0005] Due to the proper configuration of the support portion of the leadframe and of the leads, the Applicant has further developed a package that enables an upward cooling. In particular, this solution envisages a leadframe formed by a DBC (Direct Bonded Copper) multilayer that enables the side-by-side arrangement of two or more dies, each coupled to a different portion of one of the conductive layers of the DBC support multilayer, using its own drain pad, the different portions being electrically insulated from the adjacent ones. Drain leads are fixed to the respective portions of the conductive layer, the other contact pads (source and drain pads) being connected to their own lead. When many dies are provided, this solution, which allows to form different circuit topologies and assemblies, generally exploiting large areas, is allowed due to the side-by-side arrangement thereof.

[0006] Italian patent application No. 102019000013743, filed in the name of the Applicant on August 1, 2019, describes a packaged electronic power device that allows arranging various dies on different levels using an electrically insulating and thermally conductive multilayer support.

[0007] However, the above-described solution is very effective for devices with bridge connections, but is complex to some extent in the case of simpler circuits or when high power is required, thus requiring dissipating high heat. SUMMARY

[0008] In various embodiments, the present disclosure provides devices that overcome the limitations of the prior art.

[0009] According to the present disclosure, a stackable packaged electronic power device and circuit arrangement for surface mounting are provided.

[0010] In at least one embodiment, a power device for surface mounting is provided, the power device comprising a leadframe including a die attachment support, a first lead, and a second lead. A die of semiconductor material is bonded to the die attachment support. A package comprising an insulating material having a parallelepiped shape. The package has a first side surface, a second side surface, a first base, and a second base, and the first side surface and the second side surface define a package height. The package encloses the die and at least partially encloses the die attachment support. The first lead and the second lead have an external portion extending outside the package from the first side surface and the second side surface of the package, respectively. The external portion of the leads has a lead height and has a respective portion protruding from the first base, the lead height being greater than the package height and extending throughout the package height.

[0011] In at least one embodiment, a packaged electronic device is provided that includes a power device. The power device includes a leadframe that includes a die attach support, a first lead, and a second lead. A die of semiconductor material is bonded to the die attach support. An encapsulant of insulating material having a parallelepiped shape is included. The encapsulant has a first side surface, a second side surface, a first base, and a second base, and the first side surface and the second side surface define an encapsulant height. The encapsulant encloses the die and at least partially encloses the die attach support. An insulating substrate has a first face and a second face. A first heat sink is in contact with the second base of the encapsulant. The first lead and the second lead have external portions that extend outside the encapsulant from the first side surface and the second side surface, respectively, of the encapsulant. The external portions of the leads have a lead height and have respective portions that protrude from the first base, the lead height being greater than the encapsulant height and extending through the encapsulant height. The power device is bonded to the first face of the insulating substrate with the first base of the encapsulant facing the substrate, and the external portions of the leads of the power device are in contact with the first face of the substrate.

[0012] In at least one embodiment, a circuit arrangement is provided that includes a substrate and a first plurality of power devices. Each of the first plurality of power devices includes a leadframe that includes a die attach support, a first lead, and a second lead. A die of semiconductor material is bonded to the die attach support. An encapsulant of insulating material having a parallelepiped shape is included. The encapsulant has a first side surface, a second side surface, a first base, and a second base, and the first side surface and the second side surface define an encapsulant height. The encapsulant encloses the die and at least partially encloses the die attach support. The power device further includes a heat sink of thermally conductive material. The first lead and the second lead have external portions that extend outside the encapsulant from the first side surface and the second side surface, respectively, of the encapsulant. The external portions of the leads have a lead height and have respective portions that protrude from the first base, the lead height being greater than the encapsulant height and extending through the encapsulant height. A first power device of the first plurality of power devices is bonded to a first face of the substrate, and the power devices of the first plurality of power devices are stacked to form a first stack of stacked power devices. The external portions of the first lead and the second lead of each power device of the first stack are arranged on top of each other and are bonded to the external portions of the first lead and the second lead, respectively, of the power devices arranged at the bottom in the first stack. A first heat sink is arranged between the stacked power devices in the first stack. BRIEF DESCRIPTION OF DRAWINGS

[0013] For a better understanding of the present disclosure, some embodiments thereof will now be described, purely by way of non-limiting example, with reference to the annexed drawings, wherein:

[0014] FIG. 1 is a perspective view of a packaged power device according to the present invention;

[0015] FIGS. 2-6 are respectively FIG. 1 top, bottom, front, left side and right side views of the power device of

[0016] FIG. 7 is a partial isometric side view of the power device of FIG. 1

[0017] FIG. 7A shows a variant of the side view of FIG. 7

[0018] FIG. 8 is a perspective view of the device of FIG. 1 without the package;

[0019] FIG. 9 is a perspective view of the power device of FIG. 1 mounted on a support in a configuration;

[0020] FIG. 10 is a side view of the power device of FIG. 1 mounted on a support and having a rear heat sink;

[0021] FIG. 11 is a partial isometric perspective view of the mounting configuration of FIG. 10

[0022] is a perspective view of the power device of FIG. 12 mounted on a support in another configuration; FIG. 1

[0023] FIG. 13 is a side view of the power device of FIG. 12 after mounting with a rear heat sink;

[0024] FIG. 14 and FIG. 15 are respectively a perspective view and a bottom view of the power device after packaging according to different embodiments;

[0025] FIG. 16 is a cross-sectional view of the power device of FIG. 14 and FIG. 15 before packaging, taken along the line XVI-XVI of FIG. 15

[0026] FIGS. 17-18 are respectively a top plan view and a top perspective view of the power device of FIG. 14 and FIG. 15 before packaging;

[0027] FIG. 19 is a perspective view of the power device of FIGS. 14-18 ​​​​perspective view of the power device mounted on a support;

[0028] FIG. 20 in different configurations, FIGS. 14-18 perspective view of the power device mounted on a support;

[0029] FIG. 21 perspective view of the power device mounted on a support according to different embodiments;

[0030] FIG. 22 is FIG. 21 perspective view of the power device mounted on a support; FIG. 21 cross-sectional view of the partial phantom of the power device taken along line XXII-XXII of

[0031] FIG. 23 in different configurations, FIG. 21 perspective view of the power device mounted on a support;

[0032] FIG. 24 in different configurations, FIG. 21 perspective view of the power device mounted on a support;

[0033] FIG. 25 is a top plan view of another embodiment of the present packaged power device;

[0034] FIG. 26 is FIG. 25 perspective view of the power device mounted on a support; FIG. 25 cross-sectional view of the power device with ghosted portions taken along line XXVI-XXVI of

[0035] FIG. 27 shows an equivalent circuit diagram of the circuit arrangement obtainable by stacking FIGS. 1-20 and FIGS. 25-26 perspective view of the power device mounted on a support;

[0036] FIG. 28 is a front view of a stack of power devices mounted on a support, similar to FIG. 4 in a configuration for implementing a circuit arrangement of FIG. 27 perspective view of the power device mounted on a support;

[0037] FIG. 29 is a left side view of a stack of power devices, similar to FIG. 5 , FIG. 28 perspective view of the power device mounted on a support;

[0038] FIG. 30 is a front view of a stack of power devices mounted on a support, similar to FIG. 4 in another configuration for implementing a circuit arrangement of FIG. 27 perspective view of the power device mounted on a support;

[0039] FIG. 31 is a front view of a stack of power devices mounted on a support, similar toFIG. 4 A front view of two stacks of power devices mounted on a support for implementing different circuit arrangements;

[0040] FIG. 32 It is similar to FIG. 31 A front view of a stack of power devices mounted on a support, depending on the configuration.

[0041] FIG. 33 It shows how stacking FIGS. 25-26 Equivalent circuit diagrams of different circuit configurations obtainable from power devices; and

[0042] FIG. 34 It is similar to FIG. 4 In the implementation FIG. 33 In the configuration of the circuit device, it is mounted on the support. FIGS. 25-26 A front view of a stack of power devices of the type shown. Detailed Implementation

[0043] In the following description, spatial indications such as “above,” “below,” “top,” “bottom,” “above,” “below,” “left,” “right,” etc. refer to the accompanying drawings and are understood only in a relative sense.

[0044] FIGS. 1-8 Power device 1 is shown, such as a silicon carbide or silicon MOSFET, for example, but the following description applies to different types of devices, such as superjunction MOSFETs, IGBTs, etc., and power circuits that include such devices, such as circuits in bridge (half-bridge or full-bridge) configurations or AC switching configurations, PFC (power factor correction) circuits, and SMPS (switching mode power supply) devices.

[0045] Power device 1 includes embedded die 6 ( FIG. 7 and FIG. 8 The die 6 is an encapsulation of an electrically insulating material (such as resin). The die 6 has a first surface 6A (in... FIG. 7 (at the top) and the second side 6B (at FIG. 7 At the bottom), contact pads are formed in a known manner on the second surface 6B, wherein FIG. 8 The gate contact pad 10A and source contact pad 10B are shown only schematically. The gate contact pad 10A and source contact pad 10B are arranged on the first surface 6A; the drain pad 10C is arranged on the second surface 6B. FIG. 3 The gate contact pads, source pads, and drain pads (10A-10C) are not visible and are schematically represented using dashed lines. They are connected to the support structure in a known manner as described in more detail below, i.e., integrally composed of 15 ( FIG. 7The so-called lead frame, represented by 4A-4C, includes leads (represented here by 4A-4C), which are partially embedded in and partially protrude from the package 2 and are configured to enable surface mounting.

[0046] In detail, leads 4A-4C here form a gate lead 4A, three source leads 4B and a drain lead 4C.

[0047] Package 2 has a generally parallelepiped shape, slightly expanded here, with a first base 2A (here indicated as the top) parallel to a first plane XY of the Cartesian coordinate system, a second base 2B also parallel to the first plane XY, and four side surfaces 2C-2F extending transversely to the first plane XY. Since the first base 2A, the second base 2B, and the side surfaces 2C-2F of package 2 also form the top and bottom surfaces and the side surfaces (except for the outer portions of the leads) of power device 1, for simplicity, even in the embodiments shown and discussed below, the various surfaces of power device 1 will be indicated by the same reference numerals as the first base 2A, the second base 2B, and the side surfaces 2C-2F of package 2, the top and bottom surfaces of power device 1 being partially occupied by conductive structures, and the outer portions of the leads extending on the side surfaces.

[0048] exist FIGS. 1-8 In the illustrated embodiment, the area of ​​the second base 2B is slightly larger than the area of ​​the first base 2A; four side surfaces define a first side surface 2C, a second side surface 2D (opposite to the first side surface 2C), a third side surface 2E, and a fourth side surface 2F (opposite to the third side surface 2E). The gate lead 4A and the source lead 4B are arranged equidistantly from each other along the first side surface 2C (along the first Cartesian axis Y of the Cartesian coordinate system, which also has a second Cartesian axis X and a third Cartesian axis Z); as detailed below, the drain lead 4C is arranged on the second side surface 2D.

[0049] Gate lead 4A and source lead 4B have corresponding external portions protruding from package 2 (also referred to below as pins 14A and 14B) and in FIG. 8 The internal portions 24A and 24B are visible and embedded in the package 2.

[0050] Here, the pins 14A and 14B of the gate lead 4A and the source lead 4B are formed of a sheet that is much thinner than the other dimensions (and is therefore essentially planar), has an equal shape (typically rectangular), and extends perpendicular to the first side surface 2C (parallel to the second plane XZ of the Cartesian coordinate system).

[0051] The pins 14A and 14B of the gate and source leads 4A and 4B have a greater height (in a direction parallel to the third Cartesian axis Z of the Cartesian reference system) than the package 2, with a first edge (bottom edge in FIGS. 4-7 ) flush with the second base 2B of the package 2 and a second edge (top edge in FIGS. 4-7 ) protruding with respect to the first base 2A of the package 2.

[0052] The pins 14A and 14B of the gate and source leads 4A and 4B each also have a respective gate / source protrusion 7 facing the outside of the package 2 (see in particular FIG. 4 and FIG. 7 ). These protrusions can be useful for positioning the tip of the tester probe during the measurements.

[0053] The inner portions 24A and 24B of the gate and source leads 4A and 4B extend parallel to the first plane XY ( FIG. 8 ).

[0054] In detail, the inner portion 24A of the gate lead 4A is formed by a thick lamella portion having an approximate parallelepiped shape with a base parallel to the first plane XY and a width (in a direction parallel to the first Cartesian axis Y) greater than the respective outer portion, for soldering the first electrical bond wires 11A to the gate contact pads 10A ( FIG. 8 ).

[0055] The inner portion 24B of the source leads 4B is common, having an approximate parallelepiped shape with a base parallel to the first plane XY, elongated in a direction parallel to the first Cartesian axis Y, and rigidly and electrically connected with the outer portions of all three source leads 4B. The inner portion 24B of the source leads 4B is also electrically connected to the source pads 10B by one or more wires 11B (one of which is shown in FIG. 8 ).

[0056] As an alternative to the wire bonds 11B, as shown in FIG. 7A , the inner portion 24B of the source leads 4B can be electrically connected to the source pads 10B by a flat metal area or clamp 17 (parallelepiped shape) embedded in the resin of the package 2 which forms the first base 2A and here extends between the metal area or clamp 17 and the first base 2A. The flat metal area or clamp 17 is fixed by an adhesive layer 18 (e.g. solder paste), as described in detail in the following with reference to FIG. 16 (see in particular the second conductive layer 39 described here).

[0057] The drain lead 4C has an outer portion extending along the second lateral surface 2D of the package 2 and a bottom portion facing the second base 2B of the package 2.

[0058] In detail, the side portion of the drain lead 4C is bar-shaped (hence also referred to as bar 14C hereinafter) and adjoins the second side surface 2D of the package 2 and extends through its length substantially parallel to the third plane YZ of the Cartesian coordinate system (on the first base 2A, at the FIG. 2 indicated by L and measured parallel to the first Cartesian axis Y).

[0059] The bar 14C of the drain lead 4C has the same height (in the direction of the third Cartesian axis Z) as the pins 14A and 14B of the gate lead 4A and the source lead 4B and thus has a first edge (bottom edge in FIGS. 4-7 ) that is flush with the second base 2B of the package 2 and a second edge (top edge in FIGS. 4-7 ) that protrudes from the first base 2A of the package 2.

[0060] The bar 14C of the drain lead 4C is also provided with a drain protrusion 8 (see in particular FIG. 4 and FIG. 7 ) that faces outside the package 2.

[0061] The bottom portion of the drain lead 4C forms a die attachment support (hence also referred to as die attachment support 24C hereinafter and also as “die attachment pad”) and is formed by a metal die having a rectangular area that is partially embedded in the package 2 such that its bottom (exposed) surface is flush with the second base 2B. In particular, the die attachment support 24C has a length (parallel to the first Cartesian axis Y) that is substantially equal to the length L of the bar 14C and extends (in the direction of the second Cartesian axis X of the Cartesian coordinate system) from the bar 14C up to the vicinity of the inner portions 24A and 24B of the gate lead 4A and the source lead 4B to occupy most of the area of the second base 2B of the package 2 (see also FIG. 3 ), but the die attachment support 24C complies with the so-called creepage distance at a safe distance from the gate lead 4A and the source lead 4B in a manner known to the person skilled in the art, taking into account operating parameters such as the voltages foreseen during operation and possibly other conditions.

[0062] The die attachment support 24C carries the die 6, which is bonded to its top surface via a first adhesive layer 16 (for example, conductive solder paste) that enables electrical contact between the drain pads (not shown, 10C in FIG. 3 ) arranged in a known manner on the second base 2B of the die 6 and the die attachment support 24C.

[0063] As already mentioned, as FIGS. 4-6It is seen that the pins 14A and 14B and the stem 14C of the gate lead 4A and the source lead 4B have the same height, higher than the package 2 and protruding from the first base 2A thereof. In particular, with reference to FIG. 4 If H1 is the height of the package 2 and H2 is the height of the gate lead 4A, the source lead 4B and the stem 14C, then H2 > H1. Therefore, the distance between the first base 2A of the package 2 and the protruding edge of the outer portion of the leads is H3 = H2 - H1 (spacing distance). For example, in one embodiment, the package 2 can have a height H1 of 2.3 mm and the pins 14A, 14B and the stem 14C can have a height H2 of 3 mm - 4.3 mm; therefore, H3 can be 0.7 mm - 1 mm.

[0064] Due to the above characteristics, as discussed in detail hereinafter, the power device 1 can be mounted on a substrate, mounted on both sides of a substrate, can be coupled to a heat sink and can be stacked.

[0065] For example, FIG. 9 A configuration is shown in which the power device 1 is fixed to a substrate 20, the lead frame 15 faces downwards and a heat sink is arranged on top of the power device 1. It is emphasized that the expression "the lead frame 15 faces downwards" indicates that the die attachment support 24C faces downwards, i.e. towards the substrate 20 (the first base 2A faces upwards, the second base 2B of the package 2 faces downwards) and the pins 14A and 14B and the stem 14C of the gate lead 4A and the source lead 4B protrude upwards.

[0066] The substrate 20, for example a printed circuit board of FR4, is typically insulated, in a known and not shown manner, for example by glass fibers and has inserted conductive layers for the connections. In the configuration of FIG. 9 The leads are fixed to the substrate 20, in a not shown manner and in a per se known manner, for example by soldering to the conductive paths (not shown).

[0067] A heat sink (heat plate) 21 is fixed to the first base 2A of the package 2, for example glued or screwed to the substrate 20, via a support not shown in the figure.

[0068] The heat sink 21 is formed by a sheet of conductive material, typically a metal such as copper or aluminum. The heat sink 21 has, for example, a rectangular shape, with a length (parallel to the first Cartesian axis Y) greater than the length L of the bar 14C and of the package 2, and a width (parallel to the second Cartesian axis X) less than the package 2. Moreover, the heat sink 21 is fixed at a distance from the gate lead 4A, from the drain lead 4C, from the source lead 4B; in particular, the first distance D1 (creepage distance) of the heat sink 21 from the gate lead 4A and from the source lead 4B is appropriately selected, in a manner known to the person skilled in the art, taking into account operating parameters such as the voltages encountered during operation and other possible conditions. Likewise, the second distance D2 (creepage distance) between the heat sink 21 and the bar 14C is selected at the design stage FIG. 9 , so as to meet the creepage indices, if necessary or desired.

[0069] The heat sink 21 also has a thickness, for example equal to the spacing distance H3, even if in this configuration the thickness is not critical.

[0070] The heat sink 21 is therefore in physical contact directly with the first base 2A of the package 2 and enables the power device 1 to dissipate heat upwards.

[0071] In order to increase the heat dissipation of the power device 1, it can be thermally coupled to a dissipation sheet arranged on the opposite side of the substrate 20, thus also obtaining a downward dissipation of heat, as shown in the configuration of FIG. 10 and FIG. 11 .

[0072] In FIG. 10 and FIG. 11 , the substrate 20 (here also, for example, a printed circuit board) has a first face 20A and a second face 20B. The power device 1 can be fixed to the first face 20A of the substrate 20 by means of an adhesive layer not shown, such as, for example, a solder paste. A connection via 30, for example made of a metal such as copper, extends through the substrate 20 and is thermally and electrically conductive. The connection via 30, as shown in dashed lines in FIG. 10 , extends between the first and second faces 20A, 20B of the substrate 20 and, on the first face 20A, is in physical contact (possibly by means of an adhesive layer not shown) with the second base 2B of the package 2 and therefore with the drain pad 10C FIG. 3 and therefore with the dissipation sheet 31 extending on the second face 20B of the substrate 20.

[0073] The dissipation sheet 31 can have any shape, typically having a greater area than the power device 1 to provide high heat dissipation. To this end, the dissipation sheet 31 is made of a thermally conductive material, for example, a metal such as copper. Therefore, in this configuration, the dissipation sheet 31 is in electrical contact with the drain pad 10C FIG. 3 of the power device 1.

[0074] Thus compared to the configuration of FIG. 9 , FIG. 10 and FIG. 11 the configuration offers an increased dissipation.

[0075] FIG. 12 and FIG. 13 shows a configuration in which the power device 1 is fixed to the substrate 20 with the leadframe 15 facing upwards (at a distance from the substrate 20) and the heat sinks are arranged on top of and below the power device 1.

[0076] It should be noted that the expression "leadframe 15 facing upwards" indicates that the die attach support 24C faces upwards (the first base 2A of the package 2 faces downwards, towards the substrate 20, and the second base 2B of the package 2 faces upwards), and the pins 14A and 14B and the stem 14C protrude downwards.

[0077] In this way, in the configuration of FIGS. 12-13 , the package 2 of the power device 1 is elevated by a spacing distance H3 with respect to the substrate 20.

[0078] In the configuration of FIGS. 12-13 , the first heat sink 22 is fixed to the second base 2B of the package 2 (on top of it) and the second heat sink 23 is fixed to the first base 2A of the package 2, in the gap between the substrate 20 and the package 2.

[0079] The first heat sink 22 and the second heat sink 23 here have a thickness equal to the spacing distance H3. Moreover, they can have any shape, for example a simple rectangular shape. In the embodiment shown, they have the same shape, generally C-shaped, with a main portion 26 having a rectangular shape elongated in a direction parallel to the first Cartesian axis Y and a pair of legs 27 extending from adjacent edges of the long sides of the main portion 26, the legs 27 facing the stem 14C. The length of the heat sinks 22, 23 (in the direction of the first Cartesian axis Y) is greater than the length L( FIG. 2 ) of the package 2, and the legs 27 extend side by side outside the package 2 and at a distance from the stem 14C. The heat sinks 22, 23 are also arranged vertically on top of each other.

[0080] As discussed in detail hereinafter, therefore, a vertical wall 29 (indicated in dashed lines in FIG. 13 ) can be arranged, as required, in thermal contact with the first heat sink 22 and the second heat sink 23 and possibly the drain lead 4C, but insulated with respect to the gate and source leads 4A, 4B, to comply with the creepage distance.

[0081] In the configuration of FIG. 13In particular, the vertical wall 29 is arranged alongside the power device 1, facing the stem 14C, with the main extension parallel to the third plane YZ of the Cartesian reference system (and therefore perpendicular to the substrate 20).

[0082] The first 22 and second 23 heat sinks (and the vertical wall 29, if present) are made of a conductive material, typically a metal such as copper or aluminum; moreover, the thickness of the heat sinks 22, 23 is preferably equal to the spacing distance H3.

[0083] Therefore, the main portion 26 of the second heat sink 23 is arranged laterally between the protruding portions of the leads 4A-4C.

[0084] Additionally, the main portion 26 is arranged vertically between the first base 2A of the package 2 and the substrate 20, in physical direct contact with them, and enables the power device 1 to dissipate heat downwards.

[0085] Also in this case, the substrate 20 can have a connection via 30 connecting the second heat sink 23 to the dissipation lamina 31.

[0086] As mentioned above, the first heat sink 22 is fixed to the second base 2B of the package 2, in particular to the die attach support 24C. Since the die 6 (not visible here) is directly on the die mount support 24C, the first heat sink 22 is not electrically insulated from the die 6. Moreover, in the presence of the vertical wall 29 connecting the first 22 and second 23 heat sinks, the latter is also not electrically insulated from the die 6.

[0087] Note that, in the configuration of FIG. 13 , the vertical wall 29 is arranged at a distance from the drain protrusion 8 of the stem 14C, although in this case this is not necessary since the vertical wall 29 is electrically connected to the drain pad 10C( FIG. 3 ) by the first heat sink 22.

[0088] In practice, the heat sinks 22, 23, the vertical wall 29 (if present) and the dissipation lamina 31 (if present) form a thermal dissipation structure of the die 6. In this way, in the configuration of FIG. 12 and FIG. 13 , the power device 1 provides high thermal dissipation.

[0089] Also, FIGS. 12-13 the structure of the power device 1 is designed to respect the creepage distance, which relates to the first distance D1 between the first heat sink 22 and the gate and source pins 14A, 14B( FIG. 12 ), the third distance between the second heat sink 23 and the gate and source pins 14A, 14B( FIG. 13 ), and the fourth distance D4 between the second heat sink 23 and the stem 14C( FIG. 13 ).

[0090] FIGS. 14-18 A power device 35 is shown having an internal dissipating sheet insulated with respect to the die 6.

[0091] The base structure of the power device 35 is similar to FIGS. 1-8 the base structure of the power device 1 shown, so that identical parts are denoted by identical reference numerals and will not be described again.

[0092] FIGS. 14-18 The power device 35 (in the following side view with FIG. 3 and FIGS. 4-6 the power device 1 shown, so that these views are not presented again) comprises an insulated dissipating area 36 (also referred to as insulated clamp) which is embedded in the package 2 and extends between the die 6 and the first base 2A of the package 2.

[0093] The insulated dissipating area 36 is here a DCB (Direct Copper Bonding) substrate; i.e. it is formed by three layers including a first conductive layer 37, an intermediate insulating layer 38 and a second conductive layer 39 as specifically visible in FIG. 8 .

[0094] Here, the first conductive layer 37 has a top surface extending flush with the first base 2A of the package 2 and occupies most of the area of the first base 2A. The intermediate insulating layer 38 extends below the first conductive layer 37 and has a greater area than the first conductive layer 37. The second conductive layer 39 is bonded to the die 6 by a second adhesive layer 40 as explained in detail in the following.

[0095] The first and second conductive layers 37, 39 are made of a conductive and thermally conductive material, typically a metal such as copper. The intermediate insulating layer 38 can be aluminum oxide (AI2O3) which has excellent electrical insulation properties but is a good thermal conductor so that the first base 2A of the package 2 is electrically insulated from but thermally connected to the die 6 even at high voltages.

[0096] The second adhesive layer 40, obtained for example from a conductive solder paste, is patterned to form a first adhesive portion 40A and a second adhesive portion 40B. The first adhesive portion 40A extends between the second conductive layer 39 and the die 6 to be in direct contact with the source pad 10B FIGS. 16-18 ). The second adhesive portion 40B extends between the second conductive layer 39 and the internal portion 24B of the source lead 4B. In fact, in this embodiment, the second conductive layer 39 of the insulated dissipating area 36 enables electrical contact between the source pad 10B (not visible in FIG. 17 ) and the source lead 4B.

[0097] Also in this embodiment, asFIG. 18 and FIGS. 14-18 As shown, the gate contact pads 10A are connected to the respective gate leads 4A via bonding wires 11A.

[0098] Due to the presence of the insulating dissipation areas 36,the power device 35 thus provides an even higher heat dissipation capability. FIGS. 14-18

[0099] FIGS. 9-13 The power device 35 can be mounted on a substrate, on both sides of the substrate, with the leadframe 15 facing upwards or downwards, as discussed above with reference to FIG. 19 The power device 35 can be coupled to an external heat sink and can be stacked, as discussed above with reference to

[0100] In particular, FIG. 9 A configuration is shown in which the power device 35 is bonded to the substrate 20 with the leadframe 15 facing downwards, the insulating dissipation areas 36 facing upwards, and the heat sinks 45 arranged on top of the power device 35. In this case, as shown, the pins 14A and 14B of the gate leads 4A and source leads 4B and the stem 14C of the gate lead 4C protrude upwards. FIG. 12

[0101] In this case, the heat sinks 45 have the C-shape described with reference to the first heat sink 22 and the second heat sink 23 of FIG. 9 but can have the same rectangular shape as the heat sink 21 of FIG. 19

[0102] In FIG. 20 , the heat sinks 45 are in direct contact with the insulating dissipation areas 36 and thus increase their dissipation capability.

[0103] FIG. 12 A configuration is shown in which the power device 35 is bonded to the substrate 20 with the leadframe 15 facing upwards, the insulating dissipation areas 36 facing downwards (towards the substrate 20) and the heat sinks are arranged on top of and below the power device 35, as shown in the configuration of FIG. 20

[0104] In particular, in FIG. 3 , the first heat sink 22 is bonded to and in contact with the die attach support 24C and thus arranged at the same voltage as the drain pads (10C in FIGS. 12-13 The second heat sink 23 is due to the protruding leads 4A-4C (as referenced above with reference to FIG. 19 ​​​extends in the gap between the power device 35 and the substrate 20 and is in contact with the insulating dissipation region 36; the second heat sink 23 is thus electrically insulated from the die 6. Also in this case, the heat sinks 22, 23, the vertical wall 29 (if present) and the heat dissipation fins 31 (if present) form a thermal dissipation structure for the die 6 (not visible). In this way, in the configuration of FIG. 20 and FIGS. 19-20 , the power device 1 has a high thermal dissipation. Also, particularly in the presence of the vertical wall 29, FIG. 21 , the structure is designed to comply with the creepage index, whether or not in contact with the stem 14C.

[0105] FIG. 22 and FIGS. 1-8 shows a power device 451 having internal dissipation fins not insulated with respect to the die 6.

[0106] In particular, the power device 451 has a basic structure similar to the power devices 1 and 35 shown in FIGS. 14-18 and FIGS. 21-22 , so that the same parts are indicated by the same reference numerals and will not be described again.

[0107] FIG. 3 The power device 451 (having the same following side view as the power device 1 of FIGS. 4-6 and FIG. 8 , so that these views are not presented again) has a die 6 directly bonded to the lead frame 15 using its second face 6B (having the drain pad 10C of FIG. 16 ) and comprises, in addition to the top surface, a conductive dissipation region 46 (also called conductive clamp) embedded into the package 2, which is flush with the first base 2A of the package 2.

[0108] The conductive dissipation region 46 is here formed as a monolithic region, for example made of copper, and extends between the first base 2A on one side and the die 6 on the other side. As described with reference to the second conductive layer 39, FIG. 22 the conductive dissipation region 46 is in contact with the source pad 10B (not visible in FIG. 8 ) through the first adhesive portion 40A of the second adhesive layer 40 (not visible in FIG. 18 ) and with the internal portion 24B of the source lead 4B through the second adhesive portion 40B. Similarly to the second conductive layer 39 in FIG. 18 , the conductive dissipation region 46 thus electrically connects the source pad 10B and the source lead 4B. Additionally, here, similarly to the first insulating dissipation region 36 in FIG. 8 , the conductive dissipation region 46 is insulated with respect to the gate contact pad 10A (FIG. 17 ) transversely staggered. As FIG. 18 and FIGS. 21-22 illustrated, the gate contact pads 10A and the gate leads 4A are in electrical contact with each other by means of copper wires, in a manner that is not visible.

[0109] Thus, in this embodiment, the conductive dissipation region 46 is in direct electrical and thermal contact with the source region (not shown) of the power device 451 and provides a high thermal dissipation both on the bottom side (second base 2B of the package 2) and on the upper side (first base 2A of the package 2).

[0110] However, the conductive dissipation region 46 is not electrically insulated from the die 6. Thus, during the sizing, the distance between the conductive dissipation region 46 and the stem 14C is designed to meet the insulation conditions provided (creepage).

[0111] To this end, in the embodiment illustrated in FIG. 22 , the conductive dissipation region 46 is shaped so that its top surface has a width (in the direction parallel to the second Cartesian axis X, i.e. along the distance between the gate pin 14A and the source pin 14B and the stem 14C) that is greater at the base of its contact with the die 6 than at the portion facing the first base 2A of the package 2.

[0112] In particular, with this configuration, the fifth creepage distance D5 FIG. 8 between the edge of the conductive dissipation region 46 (at the first base 2A of the package 2) and the stem 14C, as well as the sixth distance D6 between the edge of the die attachment support 24C and the base of the pins 14A, 14B of the gate and source leads 4A, 4B, are suitably selected during the design phase.

[0113] The conductive dissipation region 46 can have a length (parallel to the first Cartesian axis Y) that is approximately equal to that of the source pads 10B FIGS. 21-22 of the die 6.

[0114] FIG. 23 The power device 451 can be mounted on the substrate 20 so that the lead frame 15 faces downwards (the leads 4A-4C protrude upwards), as illustrated in FIG. 24 , or so that the lead frame 15 faces upwards (the leads 4A-4C protrude downwards), as illustrated in FIG. 23 .

[0115] In FIG. 9 , as illustrated in FIG. 8 , the heat sink 41 is bonded to the first base 2A of the package 2, for example, soldered or screwed to the insulating material thereof.

[0116] Here, the heat sink 41 is connected to the conduction dissipation region 46 (not visible) and therefore to the source pad 10B ( FIG. 23 Electrical contact and thermal contact.

[0117] In this way, due to the heat sink 41 (arranged at the top) and the lead frame 15 (in FIG. 10 The contact between the (invisible) and the back of the substrate 20 results in double-sided cooling, where, for example FIG. 10 As shown, dissipative sheet 31 ( FIG. 9 It can be arranged to be thermally and electrically coupled via the connection via 30.

[0118] Here, during the design phase, the creepage distance between the heatsink 41 and the rod 14C (similar to...) FIG. 8 The second creepage distance D2, but due to FIG. 24 The connection between the heat sink 41 and the source pad 10B is much larger. Use known specifications to select.

[0119] exist FIG. 12 In, similar to FIG. 3 The gap extends between the power device 451 and the substrate 20; the first heat sink 42 is fixed to the second base 2B (on top of it) of the package 2, and the second heat sink 43 (having a rectangular shape) is bonded to the first base 2A of the package 2, located in the gap between the substrate 20 and the package 2.

[0120] Here, the first heat sink 42 is in electrical and thermal contact with the drain pad 10C. FIG. 8 The second heat sink 43 is in electrical and thermal contact with the source pad 10B. FIG. 12 ).

[0121] Dual-sided cooling is also achieved here.

[0122] The creepage distance here is the distance from the first heat sink 42 to the gate lead 4A and the source lead 4B (similar to...). FIG. 25 The third creepage distance (D3), the distance from the second radiator 43 to the rod 14C (seventh creepage distance D7), and the distance between the first radiator 42 and the second radiator 43 (equal to the thickness of the radiator 45) are given.

[0123] FIG. 26 and FIG. 25 The device 55 has a first base 2A and a second base 2B of a die 6 that are electrically insulated from each other. The die 6 is electrically connected to the outside world only through leads 4A-4C.

[0124] In detail, as in FIG. 26 In the view below and in FIG. 14of the cross-section of the non-packaged device, the power device 55 (having the same top view as the power device 35 of FIGS. 4-6 and the same side view as the power device 1 shown in FIGS. 14-18 ) has a die attach support 24C separated from the stem 14C.

[0125] In detail, the power device 55 has a similar structure as the power device 35 of FIG. 16 with the difference that the die attach support 24C is separated as described above and that there is a second insulating dissipation region 56, in addition to the insulating dissipation region 36, which is referred to in the following as first insulating dissipation region 36 for the sake of clarity.

[0126] The second insulating dissipation region 56 has a similar structure as the first insulating dissipation region 36 and is here formed as a DCB substrate comprising a first conductive layer 57, an intermediate insulating layer 58 and a second conductive layer 59 formed as described in detail for the corresponding layers 37-39 of the first insulating dissipation region 36. FIGS. 25-26

[0127] In a variant not shown, the second insulating dissipation region 56 can form and thus replace the die attach support 24C itself.

[0128] In the embodiment of FIG. 8 , the first conductive layer 57 of the second insulating dissipation region 56 is bonded, in particular glued, to the second face 6B of the die 6 by means of a third conductive adhesive layer 60, in particular a conductive solder paste. The area (in a plane parallel to the first plane XY of the Cartesian coordinate system) of the second insulating dissipation region 56, in particular of the first conductive layer 57 of the latter, and of the third conductive adhesive layer 60 is greater than the area of the die 6 and laterally protrudes beyond the die 6 (in the direction of the second Cartesian axis X) towards the stem 14C. The second conductive layer 59 of the second insulating dissipation region 56 is bonded to the die attach support 24C. Thus, in this embodiment, the die attach support 24C is no longer electrically connected to the drain pad 10C( FIG. 3 ) of the power device 55.

[0129] The drain lead 4C has here a bonding protrusion 34 extending from the stem 14C towards the interior of the package 2 so as to partially overlap the first conductive layer 57 of the second insulating dissipation region 56. The bonding protrusion 34 is glued to the third conductive adhesive layer 60 at the protruding portion of the third conductive adhesive layer 60.

[0130] In this way, the drain pad 10C( FIG. 19 ​), the third conductive adhesive layer 60 and the drain lead 4C are electrically connected; in contrast, the second base 2B of the power device 55 (formed by the die attach support 24C) is electrically insulated from the die 6 by the intermediate insulating layer 58 of the second insulating dissipation region 56, which provides high thermal conductivity to the die.

[0131] However, the die 6 is thermally connected upwards (to the first base 2A of the package 2) by the first insulating dissipation region 36 (whose exposed top surface is electrically insulated due to the first conductive layer 37) and downwards (to the second base 2B) by the second insulating dissipation region 56.

[0132] Similarly to the power device 35 as shown in FIG. 20 and FIG. 25 , the power device 55 as shown in FIG. 26 and FIGS. 19-20 may be mounted in a not shown way so that the leadframe 15 faces upwards or downwards.

[0133] However, in this case, the first heat sink 22, which is fixed to the second base 2B of the package 2, in particular to the die attach support 24C, is insulated with respect to the die 6, which is not directly located on the die attach support 24C. Even in the presence of the vertical wall 29 connecting the first heat sink 22 to the second heat sink 23, the second heat sink 23 will be electrically insulated, since it is in contact only with the first insulating dissipation region 36, which is insulated with respect to the die 6. Also in this case, FIG. 27 the structure of the power device 1, 35 and 55 is designed to comply with the creepage index, in particular in the presence of the vertical wall 29, whether in contact with the stem 14C or not.

[0134] FIGS. 1-20 A parallel circuit arrangement 63 is shown, which can be implemented by stacking and connecting in parallel a plurality of power devices, denoted as a whole by 65, each of which can be formed by one of the power devices 1, 35 and 55 as shown in FIGS. 24-25 and FIG. 27 . Preferably, the stacked power devices 65 are all of the same type.

[0135] In detail, FIGS. 28-30 the parallel circuit arrangement 63 comprises a plurality of power devices 65 (three are shown here), which have mutually coupled gate terminals G, mutually coupled drain terminals D and mutually coupled source terminals.

[0136] The circuit arrangement 63 can be implemented as shown in FIGS. 28-29 .

[0137] FIG. 7 It is shown that the power devices 65 are stacked in the leadframe 15 ( FIG. 8 ,FIGS. 16-18 、 FIG. 27 ) the possibility of a configuration with the pins 14A, 14B and the bars 14C protruding upwards. The power devices 65 (including the bottom power device 65', the intermediate power device 65" and the top power device 65'" and, when necessary or otherwise distinguished, using the apostrophe) form a stack 64, arranged vertically on top of each other and bonded to the first face 20A of the substrate 20, with the gate pins 14A aligned with each other and in direct contact with each other (possibly through the insertion of an adhesive not shown, such as solder paste) in the vertical direction (parallel to the third Cartesian axis Z), the source pins 14B aligned with each other and in direct contact with each other (possibly through the insertion of an adhesive not shown, such as solder paste), and the bars 14C aligned with each other and in direct contact with each other (possibly through the insertion of an adhesive not shown, such as solder paste).

[0138] Thanks to the mutual contact of the gate pins 14A, the source pins 14B and the bars 14C of the power devices 65, they are connected in parallel as shown in FIG. 4 .

[0139] Here, the pins 14A, 14B protrude downwards so that the package 2 of the bottom power device 65' is arranged at a distance from the substrate 20, i.e. a gap 67, the height of which is equal to the spacing distance H3 FIG. 12 . In addition, the intermediate power device 65" and the top power device 65'" are arranged at a distance equal to the value of the gap 67 from the bottom power device 65' and the intermediate power device 65", respectively.

[0140] The heat sink 66 is arranged between the power devices 65, in the gap 67, below the bottom power device 65' (where the heat sink is denoted by 66'), between the bottom power device 65' and the substrate 20, between the intermediate power device 65" and the top power device 65'" and above the top power device 65"'. The heat sink 66 is similar to the first heat sink 22 and the second heat sink 23 of, for example FIG. 13 、 FIG. 29 , with the legs 27 extending laterally (before and after the plane of FIG. 29 ) to the bars 14C and also aligned with each other.

[0141] The first vertical wall 68 extends laterally to the power devices 65, throughout the height of the stack 64, in contact with the drain protrusion 8; the horizontal wall 69 extends above the stack 64 of power devices 65, in direct contact with the heat sink 66 arranged at the top of the first vertical wall 68 and with the top edge.

[0142] To comply with the creepage distance, the width of the horizontal wall 69 (in a direction parallel to the second Cartesian axis X) is smaller than and in any case does not exceed the profile of the lead frame 15 of the underlying power device 65 and the profile of the corresponding heat sink 66 (aligned along the first Cartesian axis Y with the profile of the lead frame 15). Additionally, as shown in FIG. 29 the length of the horizontal wall 69 (in a direction parallel to the first Cartesian axis Y) is greater than the length of the power device 65, with the first vertical wall 68 being represented by a dashed line.

[0143] The stud element 71 extends above and in contact with the horizontal wall 69 to increase the dissipative surface.

[0144] The horizontal wall 69, the first vertical wall 68, the heat sink 66 and the stud element 71 are in direct contact with each other and form a dissipative structure 70 that encloses the stack 64 of power devices 65.

[0145] The dissipative structure 70 can further comprise a further vertical wall perpendicular to the first vertical wall 68 to further increase the dissipative capacity of the dissipative structure 70. For example, FIG. 29 A second vertical wall 72 is shown, represented using a dashed line and arranged on the right side of the dissipative structure 70 (on the side close to the gate lead 4A), adjacent to and in contact with the heat sink 66. Possibly, a third vertical wall 73 can be provided, also represented using a dashed line in FIGS. 1-8 and arranged on the left side of the dissipative structure 70, close to the source lead 4B, and also adjacent to and in contact with the heat sink 66.

[0146] Additionally, in the arrangement shown, in the case where the drain protrusion 8 is in contact with the first vertical wall 68, there is thermal and electrical continuity between the drain lead 4C and the dissipative structure 70.

[0147] If the first vertical wall 68 extends at a distance from the drain protrusion 8, there is electrical connection between the drain lead 4C and the dissipative structure 70 only if the power device 65 is manufactured like FIGS. 14-18 and FIG. 25 The drain lead 4C and the dissipative structure 70 are electrically connected only if the power device 65 is manufactured like the power devices 1 and 35 of

[0148] When the power device 65 is manufactured like the power device 55 of FIG. 26 and FIGS. 28-29 and the first vertical wall 68 is arranged at a distance from the drain protrusion 8, the dissipative structure 70 is electrically insulated from the drain lead 4C. Also in the embodiment of FIG. 29 , as shown in FIG. 10 , the substrate 10 can comprise a through hole 74, as shown in FIG. 11 and FIG. 30The connection vias 30 shown as well as the dissipative sheet 31 are fixed to the second face 20B of the substrate 20.

[0149] FIG. 27 A possible implementation of the circuit arrangement of FIG. 7 is shown, wherein the power devices 65 are stacked in the following configuration: the lead frames 15( FIG. 8 , FIGS. 16-18 and FIG. 28 ) are arranged facing downwards (towards the substrate 20) and the pins 14A, 4B and the bar 14C protrude upwards.

[0150] Here, the power devices 65 are stacked on top of each other, wherein, as described above with reference to FIG. 29 and FIG. 9 , the gate lead 4A, the source lead 4B and the drain lead 4C contact each other even if they are inverted upside down, and the heat sink 66 (e.g. having the same shape as the first heat sink 22 and the second heat sink 23 of FIG. 19 and FIG. 9 ) extends between the bottom power device 65’ and the middle power device 65”, between the middle power device 65” and the top power device 65”’, and above the top power device 65”’. As in the configuration of FIG. 19 and FIG. 31 , the bottom power device 65’ is directly fixed to the substrate 20.

[0151] FIG. 27 A possible implementation of the circuit arrangement of FIG. 31 is shown, wherein six power devices 65 are arranged on both sides of the substrate 20.

[0152] In detail, in FIG. 28 , three power devices 65 are stacked on top of each other, similar to what is described with reference to FIG. 29 and FIGS. 12-13 , to form a first stack 77 bonded to the first face 20A of the substrate 20. Three other power devices 65 are stacked on top of each other to form a second stack 78 bonded to the second face 20B of the substrate 20 and having a mirror structure with respect to the substrate 20. Accordingly, the components of the second stack 78 are denoted by the same reference numerals as the components of the first stack 77.

[0153] In both stacks 77 and 78, the power devices 65 are mounted in the configuration of FIG. 20 and FIG. 7 , i.e. the power devices 65 use the lead frames 15( FIG. 31) are bonded to the substrate 20 (upward in the first stack 77 and downward in the second stack 78), and the pins 14A and 14B and the stem 14C protrude towards the substrate 20 (downward in the first stack 77 and upward in the second stack 78).

[0154] The substrate 20 has conductive vias connecting the power devices 65 of the first stack 77 and of the second stack 78 to each other.

[0155] In detail, a first conductive via 79 extends through the substrate 20 between the gate pin 14A of the bottom power device 65' of the first stack 77 and the gate pin 14A of the bottom power device 65' of the second stack 78, thereby electrically connecting the gate pins 14A together.

[0156] A second conductive via 80 (hidden in FIG. 31 from the first conductive via 79, aligned with it in a direction parallel to the first Cartesian axis Y) extends through the substrate 20 between the source pin 14B of the bottom power device 65' of the first stack 77 and the source pin 14B of the bottom power device 65' of the second stack 78, thereby electrically connecting the source pins 14B together.

[0157] A third conductive via 81 extends through the substrate 20 between the stem 14C of the bottom power device 65' of the first stack 77 and the stem 14C of the bottom power device 65' of the second stack 78, thereby electrically connecting the stems 14C together (note that in FIG. 12 , see for example FIG. 29 , the portion of the stem 14C of the bottom power transistor 65' protruding with respect to the first base 2A is hidden by the leg 27 of the heat sink 66).

[0158] As shown in FIG. 27 , the power devices 65 of each of the first stack 77 and of the second stack 78 are thus connected in parallel. Moreover, the first, second and third conductive vias 79-82 connect the two stacks 77 and 78 in parallel.

[0159] In fact, according to the electrical scheme of FIG. 31 , in this configuration with six power devices 65, the first, second and third conductive vias 79-81 electrically connect the gate B, source S and drain D terminals of the power devices 65.

[0160] In FIG. 32 , a fourth conductive via 82 extends through the substrate 20 between the heat sink 66' of the first stack 77, of the second stack 78, thereby directly contacting the substrate 20. The fourth conductive via 82 thermally connects but does not electrically connect the power amplifiers 65 of the first stack 77 and of the second stack 78.

[0161] FIG. 27 is shownFIG. 31 The six power devices 65 are arranged upside down with respect to each other in the different possible implementations of the circuit arrangement of the six power devices 65. FIG. 32 The upside-down arrangement is on both sides of the substrate 20.

[0162] In detail, in the configuration of the power device 65 according to FIGS. 9-11 In the configuration of the power device 65 according to FIG. 19 and FIG. 7 The power devices 65 are mounted to form a third stack 83 and a fourth stack 84, wherein the power devices 65 are fixed to the substrate 20, the leadframe 15 FIG. 31 ) is in a position closer to the substrate 20 (downward in the third stack 83 and upward in the fourth stack 84), and the pins 14A and 14B and the bar 14C protrude with respect to the substrate 20 (upward in the third stack 83 and downward in the fourth stack 84).

[0163] The third stack 83 and the fourth stack 84 are similar to the ones described with reference to FIG. 32 and are coupled to respective dissipation structures, which have the same shape and arrangement as the dissipation structures 70 described above and are therefore indicated with the same reference numerals.

[0164] Additionally, the first, second and third conductive vias 79-81 extend through the substrate 20 to electrically couple the gate pin 14A and the source pin 14B and the bar 14C. Also here, the fourth conductive via 82 extends through the substrate 20 and electrically and thermally couples the bottom device 65’ in contact with the substrate 20.

[0165] With the configuration of the power device 65 according to FIGS. 1-8 when the power device 65 is manufactured as described with reference to FIGS. 14-18 and FIG. 32 wherein the die attach support 24C (not visible in FIG. 7 ) is exposed and faces the respective second base 2B of the package 2 (see, for example, FIGS. 25-26 ), the drain lead 4C is also electrically connected through the fourth conductive via 82.

[0166] When the power device 65 is manufactured as described with reference to FIG. 32 wherein the second insulating dissipation region 56 is arranged between the die attach support 24C and the respective second base 2B, the fourth conductive via 82 always provides a thermal dissipation path.

[0167] Also, the first, second and third conductive vias 79-81 contribute to the thermal dissipation.

[0168] For the remaining part, FIG. 31 the configuration is similar to the one of the power device 65 according to FIG. 33 .

[0169] FIGS. 25-26 It shows that it can be made by, for example FIG. 32 The half-bridge circuit 85 is implemented by stacking power devices such as power devices 55 and power devices 65.

[0170] Specifically, the half-bridge circuit 85 includes a first MOSFET 86 and a second MOSFET 87, which are connected in series between the first node and the second node with reference potentials 91 and 92. The intermediate node 93 between the first MOSFET 86 and the second MOSFET 87 forms the output terminal of the half-bridge circuit 85.

[0171] The drain terminal D of the first MOSFET 86 is coupled to a first node at a reference potential 91, its source terminal S is coupled to an intermediate node 93, and its gate terminal G is coupled to a first control node 94. The drain terminal D of the second MOSFET 87 is coupled to the intermediate node 93 and the source terminal S of the first MOSFET 86, its source terminal S is coupled to a second node at a reference potential 92, and its gate terminal G is coupled to a second control node 95.

[0172] The first MOSFET 86 and the second MOSFET 87 can be respectively made by FIG. 34 This is achieved using the third stack 83 and the fourth stack 84, where, as FIG. 34 As shown and described below, the third stack 83 and the fourth stack 84 are connected here.

[0173] exist FIGS. 25-26 In, as referenced FIG. 26 The power device 65 is manufactured as described, such that the die of the power transistor 65 is attached to the support 24C. FIG. 33 (In particular, the die attachment support 24C of the bottom power transistor 65') is insulated relative to the rod 14C.

[0174] Here, the fifth conductive via 96 extends through the substrate 20 between the first surface 20A and the second surface 20B. Specifically, the fifth conductive via 96 extends between the source pin 14B of the bottom power transistor 65' of the third stack and the rod 14C of the bottom power transistor 65' of the fourth stack 84, and electrically connects them together to form... FIG. 26 The intermediate node is 93.

[0175] Furthermore, one or more sixth vias 97 extend through the substrate 20 (without intersecting with the fifth via 96) and connect the power devices 65 of the third stack 83 and the fourth stack 84 thermally rather than electrically, because the bottom base 2B (in contact with the substrate 20) of the bottom power transistor 65' is insulated. FIG. 27 ).

[0176] The power devices 1, 35, 45, 55 described herein have many advantages.

[0177] In particular, the protruding structure of the external portions of the gate, source and drain leads (pins 14A, 14B and bar 14C) allows to arrange the power device in two positions encompassing a horizontal axis rotation of 180° and to couple only one or two heat sinks 21, 22, 23, thus increasing the dissipative surface.

[0178] Moreover, the protruding portions of the gate, source and drain leads 4A, 4B and 4C allow to stably stack different power devices (in particular in presence of heat sinks) and to easily connect them to improve their overall electrical performance (if they are connected in parallel as shown), or to provide more complex circuit configurations (such as, for example, half-bridge arrangements as shown) for the power device 55, thus enabling a higher thermal dissipation. FIGS. 25-26 FIG. 33 FIGS. 9-11

[0179] The manufacturing of the described power devices requires only a simple modification to the structure of the lead frame and, therefore, can be obtained at a cost comparable to that of power devices manufactured using the same technology.

[0180] The described power devices can be easily connected according to different circuit arrangements.

[0181] Finally, it is clear that modifications and changes can be made to the power devices and to the circuit arrangements described and shown herein without departing from the scope of the present disclosure as defined in the appended claims. For example, the various embodiments described can be combined to provide further solutions.

[0182] Additionally, the heat sinks 21, 22 and 23 can have any shape. In particular, FIG. 13 The heat sink 21 can be C-shaped, thus ensuring a creepage distance in the direction of the first Cartesian axis Y. In this case, one or more vertical walls, such as the vertical wall 29 or the second vertical wall 72 can be provided. FIG. 29 FIG. 34

[0183] By assembling several power devices 65 in two stacks, one stack of power devices can be rotated by 180° around the vertical axis (parallel to the third Cartesian axis Z) of the first stack 77, of the second stack 78 or of the third stack 83, of the fourth stack 84 to specifically provide different circuit arrangements.

[0184] For example, in the case of the power device 55, FIG. 31 ​​​​​In the half-bridge configuration, all power devices 65 (memory is provided as power devices 55) on the same stack can be rotated 180°. Furthermore, these can be arranged in reverse and have [specific features]. FIG. 31 The arrangement shown in the second stack 78 and the first stack 77.

[0185] For example, FIG. 34 As shown in the first stack 77 (and the corresponding dissipation structure 70), by arranging all power devices in the top stack, and as... FIG. 33 As shown in the fourth stack 84 (and corresponding dissipation structure 70), all power devices are arranged in the bottom stack, although different arrangements can also be used. In this case, because the power devices in the same stack are connected in parallel, the connections can be obtained through the fifth conductive via 96 and the sixth conductive via 97 to form... FIG. 30 The half-bridge topology.

[0186] Additionally, although only two different circuit arrangements that can be obtained using power devices and power device stacks are shown and described, other circuits may be advantageously provided.

[0187] Finally, similar to FIG. 31 The vertical dissipation structure of the first vertical wall 68 can be arranged in FIG. 32 , FIG. 34 and ​ The source lead 4B in the first stack 77, the second stack 78, the third stack 83, and the fourth stack 84 is stacked on one side, but can be arranged on the opposite side and only in contact with the three stacks of the source pin 14B (and thus insulated from the stack of the gate pin 14A).

[0188] The various embodiments described above can be combined to provide other embodiments. These and other changes can be made to the embodiments based on the detailed description above. Generally, the terminology used in the appended claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full scope of equivalents claimed by such claims. Therefore, the claims are not limited by the disclosure.

Claims

1. A power device for surface mounting, comprising: a leadframe comprising a die attach support, a first lead, and a second lead; a die of semiconductor material bonded to the die attach support; and a package of insulating material having a parallelepiped shape, the package having a first side surface, a second side surface, a first base, and a second base, and the first side surface and the second side surface defining a package height, the package enclosing the die and at least partially enclosing the die attach support, wherein the first lead and the second lead have external portions extending outside the package from the first side surface and the second side surface of the package, respectively, the external portions of the leads having a lead height greater than the package height, extending throughout the package height, and having respective portions protruding from the first base; wherein the first side surface and the second side surface are opposite each other and are discontinuous; and wherein the power device comprises a three-terminal device comprising a first terminal, a second terminal, and a third terminal, wherein the first terminal is coupled to the first lead, the second terminal is coupled to the second lead, and the third terminal is coupled to a third lead having its own external portion, the external portion of the second lead forming a stem extending perpendicular to the first base and to the second base of the package and extending to the second base of the package and parallel to and along the second side surface, and the external portions of the first lead and the third lead being formed by a tab protruding from the first side surface, perpendicular to the first base and the second base of the package, and spaced apart from each other by a distance.

2. The power device of claim 1, wherein the die attach support is electrically coupled to the external portion of the second lead and has a first surface flush with the second base of the package and a second surface coupled to the die, and the package occupies a gap between the die and the first base.

3. The power device of claim 1, further comprising a first multi-layer dissipation region having a first surface coupled to a first face of the die and a second surface flush with the first base of the package, wherein the die attach support is electrically coupled to the external portion of the second lead and has a first surface flush with the second base of the package and a second surface coupled to a second face of the die. ​ 4. The power device of claim 1, further comprising a non-insulated dissipation region of conductive material having a first surface coupled to the first face of the die and coupled to the first lead, and a second surface extending flush with the first base of the package, and wherein the die attach support is electrically coupled to the outer portion of the second lead and has a first surface flush with the second base of the package and a second surface coupled to a second face of the die.

5. The power device of claim 4, wherein the second surface of the non-insulated dissipation region has a smaller area than the first surface of the non-insulated dissipation region, and the second surface of the non-insulated dissipation region extends at a greater distance from the second lead than the first surface.

6. The power device of claim 1, further comprising a first multi-layer dissipation region having a first surface coupled to the first face of the die and coupled to the first lead, and a second surface extending flush with the first base of the package, and a second multi-layer dissipation region having a first surface coupled to a second face of the die and coupled to the second lead, and a second surface coupled to the die attach support, and the die attach support is electrically decoupled from the outer portion of the second lead.

7. A mounted electronic device, comprising: a power device, comprising: a lead frame comprising a die attach support, a first lead, and a second lead; a die of semiconductor material bonded to the die attach support; a package of insulating material having a parallelepiped shape, the package having a first side surface, a second side surface, a first base, and a second base, and the first side surface and the second side surface defining a package height, the package enclosing the die and at least partially enclosing the die attach support; an insulating substrate having a first face and a second face; and a first heat sink in contact with the second base of the package, wherein: the first lead and the second lead have outer portions extending outside the package from the first side surface and the second side surface of the package, respectively, the outer portions of the leads having a lead height greater than the package height, extending throughout the package height, and having respective portions protruding from the first base; the power device is bonded to the first face of the insulating substrate with the first base of the package facing the substrate, and the outer portions of the leads of the power device are in contact with the first face of the substrate; and a second heat sink between and in contact with the first base of the package and the first face of the substrate, the second heat sink parallel to the first heat sink and vertically aligned with the first heat sink.

8. The mounted electronic device of claim 7, further comprising: a cross-wall extending perpendicular to the first and second heat sinks and transverse to the power devices, in contact with the first and second heat sinks.

9. The mounted electronic device of claim 8, further comprising: a third heat sink in contact with the second face of the substrate and vertically aligned with the first heat sink; and a conductive via extending through the substrate between the second and third heat sinks.

10. A circuit arrangement comprising: a substrate; a first plurality of power devices, each of the first plurality of power devices comprising: a leadframe comprising a die attach support, a first lead, and a second lead; a die of semiconductor material bonded to the die attach support; and a package of insulating material having a parallelepiped shape, the package having a first side surface, a second side surface, a first base, and a second base, and the first and second side surfaces defining a package height, the package enclosing the die and at least partially enclosing the die attach support; and a first heat sink of thermally conductive material, wherein the first and second leads of each of the first plurality of power devices have external portions extending outside the package from the first side surface of the package and the second side surface of the package, respectively, the external portions of the leads having a lead height greater than the package height, extending through the package height, and having respective portions protruding from the first base, and wherein a first power device of the first plurality of power devices is bonded to a first face of the substrate, and the power devices of the first plurality of power devices are stacked to form a first stack of stacked power devices, wherein the external portions of the first and second leads of each power device in the first stack are arranged on top of each other and are bonded to the external portions of the first and second leads of the power device arranged at the bottom in the first stack, respectively, and wherein the first heat sink is arranged between the stacked power devices in the first stack; and wherein the power devices of the first stack are arranged with the first base facing the substrate, and a base heat sink extends between the first base of the first power device of the first stack and the substrate.

11. The circuit arrangement of claim 10, further comprising a first dissipation structure comprising a first lateral dissipation wall extending laterally to the first stack of power devices and a first top dissipation wall extending over and in contact with the first stack, the first lateral dissipation wall and the first top dissipation wall being in physical and thermal contact with each other and in physical and thermal contact with the first heat sink.

12. The circuit arrangement of claim 10, wherein the power devices of the first stack are arranged with the second base facing the substrate, and the first power device of the first stack has its own second base bonded to the first face of the substrate.

13. The circuit arrangement of claim 11, wherein each first heat sink is C-shaped and includes a main portion and a pair of legs, the main portion has a polygonal shape and a length in a first direction, the first direction is parallel to the first side surface and the second side surface, the length of the main portion is greater than the length of the package of the power device in the first direction, and the pair of legs protrude laterally from the main portion to the second leads of the power devices of the first stack and are coupled to the first lateral dissipation wall.

14. The circuit arrangement of claim 10, further comprising a second plurality of power devices, wherein the substrate includes a second face opposite the first face, a first power device of the second plurality of power devices is bonded to the second face of the substrate, the power devices of the second plurality of power devices are stacked to form a second stack of power devices arranged on top of each other, wherein the external portions of the first leads and the second leads of each power device in the second stack are arranged on top of each other and are respectively bonded to the external portions of the first leads and the second leads of the power devices arranged at the bottom in the second stack, and wherein a second heat sink of thermally conductive material is arranged between the stacked power devices in the second stack.

15. The circuit arrangement of claim 14, further comprising: a second dissipation structure including a second lateral dissipation wall and a second top dissipation wall, the second lateral dissipation wall extends laterally to the second stack of power devices, the second top dissipation wall extends over and in contact with the second stack, the second lateral dissipation wall and the second top dissipation wall are in physical and thermal contact with each other, and the second lateral dissipation wall and the second top dissipation wall are in physical and thermal contact with the second heat sink.

16. The circuit arrangement of claim 14, wherein the substrate includes at least one first electrical connection via and at least one second electrical connection via, the at least one first electrical connection via extends through the substrate between the first face and the second face of the substrate and electrically connects the first leads of the power devices in the first stack and the second stack, and the at least one second electrical connection extends through the substrate between the first face and the second face of the substrate and electrically connects the second leads of the power devices in the first stack and the second stack to form a circuit arrangement with parallel connected power devices.

17. The circuit arrangement of claim 14, wherein the substrate includes at least one electrical connection via extending through the substrate between the first and second faces of the substrate and electrically connecting the first lead of the first stacked power device with the second lead of the second stacked power device to form a circuit arrangement having a half-bridge configuration.

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