Use the absolute Z height value for tool synergy

Abstract

The present disclosure discloses a semiconductor review tool that receives an absolute Z-height value of a semiconductor wafer, such as an absolute Z-height value of a semiconductor wafer having beveled edges. The absolute Z-height value can be determined by a semiconductor inspection tool. The semiconductor review tool reviews the semiconductor wafer within a Z-height based on the absolute Z-height value. The focus can be adjusted to be within the Z-height.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims priority to an Indian patent application filed on April 6, 2019 and assigned Indian Provisional Application No. 201941013944, and to a provisional patent application filed on May 17, 2019 and assigned U.S. Application No. 62 / 849,401, the disclosures of which are hereby incorporated by reference. Field of the Invention

[0003] This disclosure relates to the inspection and review of semiconductor wafers. Background of the Invention

[0004] The evolution of the semiconductor manufacturing industry has placed higher demands on yield management and, in particular, on metrology and inspection systems. Critical dimensions continue to shrink, and the industry needs to reduce the time required to achieve high yields and high-value production. Minimizing the total time from detecting a yield issue to correcting it determines the return on investment for semiconductor manufacturers.

[0005] Manufacturing semiconductor devices such as logic and memory devices typically involves processing semiconductor wafers using a large number of manufacturing processes to form various features and multiple levels of the semiconductor device. For example, lithography is a semiconductor manufacturing process that involves transferring a pattern from a photomask to a photoresist disposed on a semiconductor wafer. Additional examples of semiconductor manufacturing processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation. Multiple semiconductor devices can be fabricated on a single semiconductor wafer that is divided into individual semiconductor devices.

[0006] Inspection processes are used at various steps during semiconductor manufacturing to detect defects on the wafer to facilitate higher yields and thus higher profits in the manufacturing process. Inspection has always been an important part of manufacturing semiconductor devices such as integrated circuits (ICs). However, as the size of semiconductor devices decreases, inspection becomes even more important for the successful manufacture of acceptable semiconductor devices because smaller defects can cause device failure. For example, as the size of semiconductor devices decreases, it has become necessary to detect defects of decreasing size because even relatively small defects can cause unwanted aberrations in semiconductor devices.

[0007] However, as design rules shrink, semiconductor manufacturing processes can operate closer to the limits of the process's performance capabilities. Additionally, as design rules shrink, smaller defects can have an impact on the electrical parameters of the device, driving more sensitive inspection. As design rules shrink, the total number of potential yield-related defects detected by inspection increases significantly, and the total number of disturbing point defects detected by inspection also increases significantly. Therefore, more defects can be detected on a wafer, and correcting the process to eliminate all defects can be difficult and expensive. Determining which defects actually have an impact on the electrical parameters and yield of the device can allow process control methods to focus on those defects and largely ignore other defects. Additionally, at smaller design rules, in some cases, process-induced failures tend to be systematic. That is, process-induced failures tend to fail under a predetermined design pattern that typically repeats many times within the design. Eliminating spatially systematic, electrically related defects can have an impact on yield.

[0008] Many semiconductor wafers have beveled edges. A beveled edge on a wafer means that the top surface is not completely flat. Beveled edges can affect the accuracy and speed of measurement. Beveled edges can also complicate inspection and review.

[0009] Automatic focusing in the Z direction of wafers with beveled edges can be performed. The Z direction is the thickness of the wafer, which is affected by the bevel. Existing Z-height autofocus uses the feasible bevel angles under SEMI standards as an assumption. As shown in Figure 1, the feasible angles are in the range from θ max to θ min . The range of Z-direction values increases as moving radially outward along the bevel from the center of the wafer.

[0010] In the example of Figure 1, Zn is the nominal height in the Z direction at which the height sensor locks onto the front surface of the wafer for a specific defect site. Zn is measured at the same angular position as the defect at a radius (e.g., 145 mm). Rd is the radial position of the defect, which can be from a data file, such as KLARF used by KLA Corporation. Rb is the radius of the beveled circle along the inner edge. For most beveled defects, Rd is greater than Rb. According to SEMI standards, θ min and θ max are the minimum and maximum bevel angles, respectively. For example, θ min can be 25.5 and θ max can be 19.5.

[0011] Z-sweep autofocus is not always implemented in the area (e.g., area 1) before the bevel at the wafer edge. As shown in the table of Figure 2, a Z sweep of 30 μm is required to focus the image. As Rd increases, the Z-sweep range will increase.

[0012] As shown in Figure 2, for bevel usage cases, θ min(ThMin) and θ max (ThMax) are the minimum and maximum bevel angles. The SEMI standards for these are -25.5 and -19.5 respectively. Zn is the nominal Z height at which the height sensor locks onto the front surface of the wafer for a specific defect site. It is measured at the same angular position as the defect at a radius of 145 mm. For the sake of simplicity of this example, it is assumed to be at -500 μm. Rd is the radial position of the defect (e.g., from a data file such as KLARF). Rb is the radius of the bevel circle at the inner edge. For many "real" bevel defects, Rd is greater than Rb. Considering a defect at a radial distance Rd of 149800 μm and a radius Rb of the bevel inner circle of 149700 μm (or as calculated during alignment), the Z height sweep range will be between -464.09 μm and -439.45 μm. Zs and Ze are the lower and upper limits of the Z height sweep respectively. The total sweep range Zd will be the difference between Zs and Ze and for the example numbers above will result in 24.65 μm. To leave some room for better focus stability, a Z height sweep of 30 μm will be required to obtain focus for a defect at a radial distance Rd of 149800 μm.

[0013] Figure 3 illustrates the edge exclusion region of a typical wafer. Older semiconductor wafer inspection tools do not inspect 5000 μm from the edge. Newer semiconductor wafer inspection tools do not inspect 1500 μm from the edge and include a bevel inspection from 40 μm to 50 μm from the edge. The region closest to the edge is not as flat as most of the wafer surface, such that there can be a height difference between points at different radial distances. Even for the same radial distance, depending on the polar angle, the Z height offset between points can be different.

[0014] Z height autofocus is required in the bevel region for optimal focus of the image. This is a slow process. For example, based on the assumption of the bevel roll angle θ, only 30 sites can be imaged per hour. In the example, θ is the actual angle between the wafer bevel at θ max and θ min . This forces semiconductor manufacturers to perform a wide range of Z height sweeps to focus and / or sharpen the image of the bevel region because the roll angle assumption is inaccurate.

[0015] In addition to having low processing capabilities, existing methods are blind to the actual Z-height of defects. Therefore, it is difficult to obtain a clear defect signal. The defect signal is important for review and inspection. Without knowing the actual Z-height of the defect, a large autofocus range is required. The SEMI standard does not provide sufficient guidance for the processing capabilities required for next-generation semiconductor manufacturing. The sweep range for focusing defects increases when moving radially outwards. However, the SEMI standard is a guiding principle. The accuracy of the SEMI standard cannot be guaranteed and semiconductor manufacturers do not monitor the actual bevel surface parameters on processed wafers or all inspection layers.

[0016] Therefore, an improved inspection system and method are needed. Summary of the Invention

[0017] In a first embodiment, a system is provided. The system includes: a particle beam generator that generates a particle beam; a platform configured to hold a semiconductor wafer; a detector configured to receive the particle beam reflected from the semiconductor wafer; and a processor in electronic communication with the detector. The processor is configured to receive the absolute Z-height value of the semiconductor wafer and send instructions to review the semiconductor wafer within the Z-height based on the absolute Z-height value using the particle beam. In an example, the semiconductor wafer has a beveled edge.

[0018] The processor may receive the azimuth value and the polar angle value along with the absolute Z-height value.

[0019] The particle beam may be a photon beam or an electron beam.

[0020] The processor may further be configured to adjust the focus within the Z-height.

[0021] The processor may further be configured to determine the correlation between the Z-height and the Z-height value of a semiconductor inspection tool separate from the system. The correlation may be determined at the azimuth value and the polar angle value.

[0022] In a second embodiment, a method is provided. The method includes receiving the absolute Z-height value of a semiconductor wafer at a semiconductor review tool. Reviewing the semiconductor wafer using the semiconductor review tool. The review starts at the absolute Z-height value and includes sweeping the Z-height over the semiconductor wafer. In an example, the semiconductor wafer has a beveled edge.

[0023] The semiconductor review tool may receive the azimuth value and the polar angle value along with the absolute Z-height value.

[0024] The method may further include: inspecting the semiconductor wafer using a semiconductor inspection tool; and determining the absolute Z-height value using measurements from the semiconductor inspection tool.

[0025] The method may further include determining a correlation between a Z-height value from the second semiconductor inspection tool and the Z-height using the semiconductor inspection tool. The semiconductor review tool may receive an azimuth value and a polar angle value along with the absolute Z-height value. The correlation is performed at a position at the azimuth value and the polar angle value.

[0026] In a third embodiment, a non-transitory computer-readable storage medium is provided. The non-transitory computer-readable storage medium includes one or more programs for performing the following steps on one or more computing devices. Receiving an absolute Z-height value of a semiconductor wafer. Sending an instruction. The instruction is to review the semiconductor wafer within a Z-height based on the absolute Z-height value using a particle beam.

[0027] The step may include adjusting a focus to be within the Z-height. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] To more fully understand the nature and objects of the present disclosure, reference should be made to the following detailed description taken in conjunction with the accompanying drawings, in which:

[0029] FIG. 1 illustrates an existing autofocus method;

[0030] FIG. 2 is a variable table;

[0031] FIG. 3 illustrates an edge exclusion region of a typical wafer;

[0032] Figure 4 is a table showing the absolute Z-height of certain defects from sample CIRCL KLARF;

[0033] Figure 5 is a block diagram of a method according to the present disclosure; and

[0034] Figure 6 is a system according to the present disclosure. DETAILED DESCRIPTION

[0035] Although the claimed subject matter will be described in accordance with specific embodiments, other embodiments (including embodiments that do not provide all of the benefits and features set forth herein) are also within the scope of the present disclosure. Various structural, logical, process step, and electronic changes can be made without departing from the scope of the present disclosure. Accordingly, the scope of the present disclosure is defined only by reference to the appended claims.

[0036] The embodiments disclosed herein use the absolute Z-height (Z-ABS) from CIRCL manufactured by KLA Corporation or other semiconductor wafer inspection tools. The absolute Z-height can be used as an accurate starting point for z-height based autofocus on a scanning electron microscope tool. Additionally, the azimuth of a wafer or a point on the wafer (e.g., a defect) The azimuth angle and the polar angle (θ) can be used for improvements to the review tool, such as one or more calibrations or alignments of the Z-height of an inspection tool based on the polar angle and / or azimuth angle with the Z-height of the review tool. Although CIRCL and other bevel inspection tools are disclosed, the embodiments disclosed herein can be used with any bare or unpatterned wafer inspection, review, or processing tool.

[0037] The embodiments disclosed herein create a pipeline between semiconductor wafer inspection and review tools to use the absolute Z-height value, azimuth angle value, and polar angle value from the inspection tool in the review tool. Instead of relying on the SEMI standard to eliminate the range of Z-heights for expected defect focusing, the absolute Z-height value from the inspection tool (e.g., CIRCL) is used. When the inspection tool inspects and reports the defect location, it also reports the absolute Z-height value along with other defect location information such as the azimuth angle value and the polar angle value. The absolute Z-height value can be used as the starting point for the swept Z-height.

[0038] Instead of being blind to the actual Z-height of the defect, the absolute Z-height value from a previous measurement is used. Compared to the prior art, the focusing signal from the defect can be obtained more consistently. The embodiments disclosed herein provide a processing power improvement that reduces the cost of ownership for bevel review. Instead of a wide range of Z-sweeps to focus the defect, the Z-height of the defect based on the absolute Z-height value can be determined. A correlation can be obtained between the absolute Z-height value and the Z-height for optimal focus in the review tool.

[0039] The embodiments disclosed herein also avoid the Z-sweep extending radially outwards, which increases the amount of time required to focus the defect. Such sweeps are limited for a wide range of focusing. For example, the previous 30-μm sweep can be achieved using the absolute Z-height value and a sweep of a few microns to fine-tune the focus if needed.

[0040] Figure 5 is a block diagram of method 100. At 101, a semiconductor review tool receives the absolute Z-height value of a semiconductor wafer. The absolute Z-height is the height of a defect present on the wafer as reported in the bevel inspector of another inspection tool. The absolute Z-height can be relative to a reference. The reference can be anything that does not change in the context of an experiment or measurement. For example, the reference can be the height of the floor on which the tool stands. Here, the reference height starts from a fixed inspection tool assembly. For the sake of brevity, the reference is the top flat portion of the wafer.

[0041] It may not be necessary to process data from KLARF or other data files. The heights received in KLARF are in standard units (e.g., μm or nm). Other data files may require further processing.

[0042] The height measured by the bevel checker is the height of the defect. The semiconductor wafer can have beveled edges. At 102, a semiconductor review tool is used to begin reviewing the semiconductor wafer at (a number of) absolute Z-height values. A series of absolute Z-height values can be used in an example. The semiconductor inspection tool can sweep the Z-height on the semiconductor wafer (e.g., starting at an absolute Z-height value). The swept Z-height can be in the range of values shown in, for example, FIG. 2. Thus, the absolute Z-height value can be used to determine the Z-height of the defect.

[0043] The semiconductor review tool can also receive an azimuth value and a polar angle value along with the absolute Z-height value. The azimuth value and the polar angle value can be used to inspect the wafer using the semiconductor review tool.

[0044] Method 100 can further include inspecting the semiconductor wafer using a semiconductor inspection tool (e.g., CIRCL). Using measurements from the semiconductor inspection tool, the absolute Z-height value can be determined. When inspecting a defect, the Z-height value can be measured.

[0045] The absolute Z-height value, the azimuth value, and the polar angle value can be used to form an empirical correlation plot between the absolute Z-height value and the Z-height value for best focus for various absolute Z-height values, azimuth values, and polar angle values. For correlation, the difference between the two numbers can be the same. Several defect locations are needed for this empirical correlation. For example, three to five defect locations can be used. This can eliminate or limit the need to sweep a wide Z-sweep range to focus the image. The Z-height reported on the inspection tool can be determined for best focus at various azimuth values and polar angle values. For example, a conventional method of Z-height sweeping based on SEMI standards can be used to determine the Z-height for best focus. A correlation can be established between the two at some defect locations at different azimuths and polar angles. This calibration can eliminate the need to sweep the Z-height on the review tool after the correlation is established.

[0046] In an example, a correlation can be determined between the Z-height value from the semiconductor inspection tool and the Z-height using the semiconductor review tool. The semiconductor review tool can receive an azimuth value and a polar angle value along with the absolute Z-height value. The correlation can be performed at the locations at the azimuth value and the polar angle value.

[0047] For example, previous methods may suggest a 30 μm sweep range because the Z-height of the defect can be anywhere in this range based on the roll-off angle at the wafer. Instead of elimination, the embodiments disclosed herein use the absolute Z-height value from the inspection tool and sweep a few microns in Z-height.

[0048] In an example, for certain defects, data from a CIRCL tool is used to highlight the absolute Z height value. The CIRCL tool can measure the surface of a semiconductor wafer from Z1 to Z5, as illustrated in Figure 3, and can provide a map of dimensions, angles, and / or topography. Prior art uses the X and Y positions of defects to find Rd. A wide range of Z sweeps are estimated based on the roll-off angle from the SEMI standard. This Z sweep is used to determine the positions where defects can be focused. Instead, the absolute Z height value and the correlation between the absolute Z height value and the Z height used for best focus in a review tool are used to obtain the best focus Z height of the defects.

[0049] The relationship between the absolute Z height value and the Z height used for best focus of defects on a review tool can be determined. This can be done by selecting a number of defects and plotting the absolute Z height value against the Z height used for best focus on the review tool and determining the correlation between them.

[0050] If there are n defects, then the correlation disclosed herein and the absolute Z height value from an inspection tool can be used to obtain the best focus Z height on the review tool. A sweep over a few microns across this range can be used to focus the image in the review.

[0051] The sweep range can potentially be reduced to 1 / 7. For example, 30 μm used for a full sweep can be reduced to 4 μm for focus fine-tuning, which increases the bevel review throughput and reduces the bevel review ownership cost. In addition to increasing throughput, the embodiments disclosed herein can reduce false positives because of the use of a narrow sweep range.

[0052] In an example, a system (e.g., a review tool) includes a particle beam generator that generates a particle beam. The particle beam can be an electron beam or a photon beam. The system further includes: a platform configured to hold a semiconductor wafer; a detector configured to receive the particle beam reflected from the semiconductor wafer; and a processor in electronic communication with the detector. The processor is configured to receive the absolute Z height value of the semiconductor wafer and send instructions to review the semiconductor wafer using the particle beam at a Z height based on the absolute Z height value. The semiconductor wafer can have a beveled edge. The review can include imaging the semiconductor wafer and grading, classifying, or otherwise analyzing the defects.

[0053] The processor can receive the azimuth value and the polar angle value along with the absolute Z height value.

[0054] The processor can further be configured to adjust the focus within the Z height.

[0055] The processor can also further be configured to determine the correlation between the Z height and the Z height value of a semiconductor inspection tool separate from the system. The correlation can be determined at the azimuth value and the polar angle value.

[0056] Figure 6FIG. 0 is a block diagram of an embodiment of a system 200 that can implement the embodiments disclosed herein. System 200 includes a wafer inspection tool (which includes an electron column 201) configured to generate an image of a wafer 204.

[0057] The wafer inspection tool includes an output acquisition subsystem that includes at least one energy source and a detector. The output acquisition subsystem can be an electron beam-based output acquisition subsystem. For example, in one embodiment, the energy directed to the wafer 204 includes electrons, and the energy detected from the wafer 204 includes electrons. In this way, the energy source can be an electron beam source. In Figure 6 one such embodiment shown in FIG. 5, the output acquisition subsystem includes an electron column 201 that is coupled to a computer subsystem 202. A stage 210 can hold the wafer 204.

[0058] Also as Figure 6 shown in FIG. 10, the electron column 201 includes an electron beam source 203 configured to generate electrons that are focused onto the wafer 204 by one or more elements 205. The electron beam source 203 can include, for example, a cathode source or an emitter tip. The one or more elements 205 can include, for example, gun lenses, anodes, aperture stops, gate valves, beam current selection apertures, objective lenses, and scanning subsystems, all of which can include any such suitable elements known in the art.

[0059] Electrons (e.g., secondary electrons) returning from the wafer 204 can be focused by one or more elements 206 onto the detector 207. The one or more elements 206 can include, for example, a scanning subsystem that can be the same scanning subsystem included in the (several) elements 205.

[0060] The electron column 201 can also include any other suitable elements known in the art.

[0061] Although in Figure 6 FIG. 21 the electron column 201 is shown configured such that electrons are directed onto the wafer 204 at an oblique incident angle and scattered from the wafer 204 at another oblique angle, the electron beam can be directed onto the wafer 204 and scattered from the wafer 204 at any suitable angle. Additionally, the electron beam-based output acquisition subsystem can be configured to generate an image of the wafer 204 using multiple modes (e.g., using different illumination angles, collection angles, etc.). The multiple modes of the electron beam-based output acquisition subsystem can be different in any image generation parameter of the output acquisition subsystem.

[0062] The computer subsystem 202 can be coupled to the detector 207, as described above. The detector 207 can detect electrons returned from the surface of the wafer 204, thereby forming an electron beam image of the wafer 204. The electron beam image can include any suitable electron beam image. The computer subsystem 202 can be configured to perform any of the functions described herein using the output of the detector 207 and / or the electron beam image. The computer subsystem 202 can be configured to perform any additional steps described herein. The system 200 including the output acquisition subsystem shown in Figure 6 can be further configured as described herein.

[0063] It should be noted that the configurations provided herein Figure 6 are generally illustrative of the configurations of electron beam-based output acquisition subsystems that can be used in the embodiments described herein. The configurations of the electron beam-based output acquisition subsystems described herein can be modified to optimize the performance of the output acquisition subsystem as is typically done when designing a commercial output acquisition system. Additionally, the systems described herein can be implemented using existing systems (e.g., by adding the functionality described herein to an existing system). For some such systems, the methods described herein can be provided as optional functionality of the system (e.g., in addition to other functionality of the system). Alternatively, the systems described herein can be designed as new systems.

[0064] Although the output acquisition subsystem is described above as being an electron beam-based output acquisition subsystem, the output acquisition subsystem can be an ion beam-based output acquisition subsystem. This output acquisition subsystem can be configured as shown in Figure 6 , with the exception that any suitable ion beam source known in the art can be used to replace the electron beam source. Additionally, the output acquisition subsystem can be any other suitable ion beam-based output acquisition subsystem, such as the output acquisition subsystems included in commercially available focused ion beam (FIB) systems, helium ion microscope (HIM) systems, and secondary ion mass spectrometry (SIMS) systems.

[0065] The computer subsystem 202 includes a processor 208 and an electronic data storage unit 209. The processor 208 can include a microprocessor, a microcontroller, or other device.

[0066] The computer subsystem 202 can be coupled to the components of the system 200 in any suitable manner (e.g., via one or more transmission media, which may include wired and / or wireless transmission media) such that the processor 208 can receive the output. The processor 208 can be configured to perform several functions using the output. The wafer inspection tool can receive instructions or other information from the processor 208. Optionally, the processor 208 and / or the electronic data storage unit 209 can communicate electronically with another wafer inspection tool, wafer metrology tool, or wafer review tool (not shown) to receive additional information or send instructions.

[0067] The processor 208 communicates electronically with a wafer inspection tool (such as the detector 207). The processor 208 can be configured to process an image generated using measurements from the detector 207. For example, the processor can execute an embodiment of method 100 or method 200.

[0068] The computer subsystem 202, other systems, or other subsystems described herein can be part of various systems, including personal computer systems, image computers, main computer systems, workstations, network devices, Internet devices, or other apparatuses. The subsystem or systems can also include any suitable processor (such as a parallel processor) known in the art. Additionally, the subsystem or system can include a platform with high-speed processing and software (as a stand-alone or networked tool).

[0069] The processor 208 and the electronic data storage unit 209 can be disposed in the system 200 or another device or otherwise be part of the system 200 or another device. In an example, the processor 208 and the electronic data storage unit 209 can be part of a stand-alone control unit or in a centralized quality control unit. Multiple processors 208 or electronic data storage units 209 can be used.

[0070] In practice, the processor 208 can be implemented by any combination of hardware, software, and firmware. Moreover, its functions as described herein can be performed by one unit or divided among different components, each of which can be implemented by any combination of hardware, software, and firmware. The program code or instructions for the processor 208 to implement various methods and functions can be stored in a readable storage medium (such as a memory in the electronic data storage unit 209 or other memory).

[0071] If system 200 includes more than one computer subsystem 202, then the different subsystems can be coupled to each other such that images, data, information, instructions, etc. can be sent between the subsystems. For example, one subsystem can be coupled to one or more additional subsystems through any suitable transmission medium that can include any suitable wired and / or wireless transmission media known in the art. Two or more of such subsystems can also be effectively coupled through a shared computer-readable storage medium (not shown).

[0072] Processor 208 can be configured to perform several functions using the output of system 200 or other outputs. For example, processor 208 can be configured to send the output to electronic data storage unit 209 or another storage medium. Processor 208 can be further configured as described herein.

[0073] Processor 208 or computer subsystem 202 can be part of a defect review system, an inspection system, a metrology system, or some other type of system. Thus, the embodiments disclosed herein describe some configurations that can be customized in several ways for systems with different capabilities that are more or less suitable for different applications.

[0074] Processor 208 can be configured according to any of the embodiments described herein. Processor 208 can also be configured to perform other functions or additional steps using the output of system 200 or using images or data from other sources.

[0075] Processor 208 can be communicatively coupled to any of the various components or subsystems of system 200 in any way known in the art. In addition, processor 208 can be configured to receive and / or obtain data or information (e.g., inspection results or absolute Z-height values from an inspection system, a remote database containing design data, and the like) from other systems through a transmission medium that can include wired and / or wireless portions. In this way, the transmission medium can serve as a data link between processor 208 and other subsystems of system 200 or systems external to system 200.

[0076] The various steps, functions, and / or operations of the system 200 and method disclosed herein are performed by one or more of the following: electronic circuits, logic gates, multiplexers, programmable logic devices, ASICs, analog or digital controls / switches, microcontrollers, or computing systems. Program instructions for implementing the methods described herein may be transmitted via a carrier medium or stored on a carrier medium. The carrier medium may include storage media such as read-only memory, random access memory, magnetic or optical disks, non-volatile memory, solid-state memory, magnetic tape, and the like. The carrier medium may include transmission media such as wires, cables, or wireless transmission links. For example, the various steps described throughout this disclosure may be performed by a single processor 208 (or computer subsystem 202) or alternatively by multiple processors 208 (or multiple computer subsystems 202). Additionally, different subsystems of the system 200 may include one or more computing or logic systems. Thus, the foregoing description should not be construed as a limitation on this disclosure but merely as illustrative.

[0077] Additional embodiments relate to a non-transitory computer-readable medium storing program instructions executable on a processor. Specifically, a processor (such as processor 208) may be coupled to a memory in an electronic data storage medium (such as electronic data storage unit 209) having a non-transitory computer-readable medium containing executable program instructions. The computer-implemented method may include any of the steps of any of the methods described herein. For example, processor 208 may be programmed to perform some or all of the steps of method 100. The memory in electronic data storage unit 209 may be a storage medium such as a magnetic or optical disk, magnetic tape, or any other suitable non-transitory computer-readable medium known in the art.

[0078] The program instructions may be implemented in any of a variety of ways, including process-based techniques, component-based techniques, and / or object-oriented techniques, etc. For example, the program instructions may be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (MFC), Streaming SIMD Extensions (SSE), or other techniques or methodologies as desired.

[0079] In an embodiment, one or more programs are included on a non-transitory computer-readable storage medium (such as electronic data storage unit 209). The one or more programs are for performing steps on one or more computing devices. For example, the steps may include receiving an absolute Z-height value of a semiconductor wafer and sending instructions to review the semiconductor wafer within a Z-height based on the absolute Z-height value using a particle beam. The focus may be adjusted to be within the Z-height.

[0080] Although specific tools using electron beams are described, the embodiments disclosed herein may be used with systems using electron beams, detectors, and a platform configured to hold a wafer.

[0081] Although the present disclosure has been described with respect to one or more particular embodiments, it should be understood that other embodiments of the present disclosure may be made without departing from the scope of the present disclosure. Accordingly, the present disclosure is considered to be limited only by the appended claims and their reasonable interpretations.

Claims

1. A system, comprising: A particle beam generator in a semiconductor inspection tool, which generates a particle beam; A platform in the semiconductor inspection tool, which is configured to hold a semiconductor wafer; A detector in the semiconductor inspection tool, which is configured to receive the particle beam reflected from the semiconductor wafer; And A processor, which is in electronic communication with the detector, wherein the processor is configured to: Receive the absolute Z height value, azimuth value, and polar angle value of the semiconductor wafer relative to the tool components of the semiconductor inspection tool from a first semiconductor inspection tool; Send an instruction to inspect the semiconductor wafer within a Z height using the particle beam, wherein the Z height is determined based on the absolute Z height value at the position of the azimuth value and the polar angle value, and use the absolute Z height value as the starting point for sweeping the Z height; And During the inspection of the semiconductor wafer, adjust the focus of the semiconductor inspection tool within the Z height.

2. The system according to claim 1, wherein the semiconductor wafer has a beveled edge.

3. The system according to claim 1, wherein the particle beam is a photon beam.

4. The system according to claim 1, wherein the particle beam is an electron beam.

5. The system according to claim 1, wherein the processor is further configured to determine the correlation between the Z height from the first semiconductor inspection tool and the Z height value of a second semiconductor inspection tool separate from the system.

6. The system according to claim 5, wherein the correlation is determined at the position of the azimuth value and the polar angle value.

7. A method, comprising: Receiving, at a semiconductor inspection tool, the absolute Z height value, azimuth value, and polar angle value of a semiconductor wafer relative to the tool components of the semiconductor inspection tool from a first semiconductor inspection tool; Inspecting the semiconductor wafer using the semiconductor inspection tool at the position of the azimuth value and the polar angle value, wherein the Z height is determined based on the absolute Z height value at the position of the azimuth value and the polar angle value, and use the absolute Z height value as the starting point for sweeping the Z height; And During the inspection of the semiconductor wafer, adjust the focus of the semiconductor inspection tool within the Z height.

8. The method according to claim 7, wherein the semiconductor wafer has a beveled edge.

9. The method according to claim 7, further comprising: Inspecting a semiconductor wafer using a second semiconductor inspection tool; And Determining the Z height value of the second semiconductor inspection tool using measurements from the second semiconductor inspection tool.

10. The method according to claim 9, further comprising determining the correlation between the Z height using the first semiconductor inspection tool and the Z height value of the second semiconductor inspection tool.

11. The method according to claim 10, wherein the semiconductor inspection tool receives the azimuth value and the polar angle value and the absolute Z height value, and wherein the correlation is performed at the position of the azimuth value and the polar angle value.

12. A non-transitory computer-readable storage medium comprising one or more programs for performing the following steps on one or more computing devices: Receiving an absolute Z-height value, an azimuth value, and a polar angle value of a semiconductor wafer from a semiconductor inspection tool with respect to a tool assembly of a semiconductor review tool; Send instructions to review the semiconductor wafer within the Z height using a particle beam, wherein, The Z-height is determined based on the absolute Z-height value at the position of the azimuth value and the polar angle value, and the absolute Z-height value is used as a starting point for sweeping the Z-height; And During the review of the semiconductor wafer, adjusting the focus of the semiconductor review tool within the Z-height.

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