Resistive bridge sensor with temperature compensation

Abstract

Embodiments of the present disclosure relate to a resistive bridge sensor with temperature compensation. A bridge driver circuit applies a bias voltage across a first input node and a second input node of a resistive bridge circuit, the resistive bridge circuit being configured to measure a physical property such as pressure and motion. A sensing circuit senses a bridge current flowing through the resistive bridge circuit in response to the applied bias voltage. A temperature-dependent sensitivity of the resistive bridge circuit is determined by processing the sensed bridge current. Voltage outputs at a first output node and a second output node of the resistive bridge circuit are processed to determine a value of the physical property. The processing also involves applying a temperature correction in response to the determined temperature-dependent sensitivity.

Description

Technical Field

[0001] The present disclosure relates generally to resistive bridge circuits, and more particularly to circuits for providing temperature compensation for signals output by resistive bridge circuits. Background Art

[0002] refer to Figure 1 , Figure 1 A top view of a microelectromechanical system (MEMS) device 10 is shown, which is configured to support oscillations around an axis 12. The device 10 includes a body 14, which includes a mirror surface 16 in a given system scanning application. The body 14 is suspended on a cavity (not explicitly shown in this top view) by a first torsion (spring) arm 18 between it and an anchor structure 22 and a second torsion (spring) arm 20 between it and the anchor structure 24, respectively. A drive component 26 (e.g., a capacitive type) having a configuration well known to those skilled in the art is provided at each torsion arm 18, 20. Actuation of the drive component 26 in response to a drive signal (e.g., an AC signal) causes an oscillatory motion of the body 14 around the axis 12. The mirror surface 16 receives a laser signal and reflects the received laser signal toward a target surface. The oscillation around the axis 12 causes the reflected laser signal to scan across the target surface.

[0003] It is important to know the mechanical angle of the oscillatory motion of the body 14 about the axis 12 in order to support precise operation of the control loop that drives the oscillation of the mirror. A physical property (such as pressure / angle) sensor 30 is mounted at or near a rotational spring anchor point between at least one of the torsion (spring) arms 18 and 20 and a corresponding one of the anchor structures 22 and 24. The sensor 30 is typically formed by a resistive type sensor element, wherein the resistance of the resistive type sensor element depends on the mechanical stress and therefore changes (preferably substantially linearly) with changes in the mechanical angle θ of the oscillatory motion of the body 14 about the axis 12. The sensor 30 responds to changes in the mechanical angle of the body with a change in resistance value, which change in resistance value can be sensed and processed. The resistive type sensor element is typically formed by a Wheatstone bridge circuit 40, such as Figure 2Schematically shown in . A bias voltage Vbias is applied between input nodes 42 and 44, and an output voltage Vout is generated between output nodes 46 and 48. A first resistor R1 is connected between node 42 and node 46. A second resistor R2 is connected between node 42 and node 48. A third resistor R3 is connected between node 44 and node 46. A fourth resistor R4 is connected between node 44 and node 48. Resistors R1 to R4 all have the same nominal resistance value R. However, in response to mechanical stress caused by the oscillating motion of the body 14 at the sensor 30, there is a resistance value change ΔR for one or more of the resistors R1 to R4, which causes a change in the output voltage Vout according to the following equation:

[0004]

[0005] The value of Vout therefore depends on the operating state σ(t) (i.e., the mechanical angle θ) of the MEMS device 10, the temperature-dependent sensitivity S(T) of the MEMS device 10, and the bias voltage Vbias applied to the bridge circuit 40 according to the following equation:

[0006] Vout=S(T)·σ(t)·Vbias

[0007] Where: ΔR / R is equal to the temperature-dependent sensitivity of the bridge, S(T), multiplied by the reflector angle, σ(t).

[0008] Therefore, in addition to knowing the bias voltage Vbias applied to the bridge and the output voltage Vout from the bridge, accurate measurement of the operating state of the MEMS device 10 also requires knowing the sensitivity S(T) of the temperature dependence of the MEMS device 10, which is given by the following equation:

[0009] S(T)=S0(1+α S1 ·ΔT+α S2 ΔT 2 )

[0010] Where: α S1 is the first-order temperature coefficient relating sensitivity to temperature; and α S2 is the second-order temperature coefficient relating sensitivity to temperature.

[0011] It is then necessary to compensate for the sensitivity over the temperature range for operation of the MEMS device 10. This can only be done if the temperature change ΔT, ie the difference between the actual temperature and some reference temperature, is known.

[0012] Reference again Figure 1, then a temperature sensor 32 is typically also included in the MEMS device 10. As an example, the temperature sensor 32 may be located in the anchor structure 22 or 24, wherein the resistance of the sensor element is temperature dependent and therefore varies (preferably substantially linearly) with changes in temperature at the MEMS device. The thermally dependent resistive effect of the sensor 32 converts temperature into a change in resistance value that can be sensed and processed. The sensor element is typically comprised of a separate Wheatstone bridge circuit (similar in configuration to, for example, Figure 2 In this case, the value of the bridge Vout depends on the temperature, and from the sensed voltage, the actual temperature of the MEMS device 10 can be calculated. Thus, the temperature change is known, and the sensitivity can then be determined by the aforementioned equation and used to compensate for the operating state of the MEMS device 10.

[0013] There are many disadvantages to this system configuration, including: a) more electrical connections to the MEMS device 10 are required to support the application of bias voltages and the sensing of output voltages from two different Wheatstone bridge circuits (one for pressure / angle and the other for temperature); b) increased complexity in manufacturing the MEMS device 10 due to additional masks and process steps; c) added manufacturing costs; d) lack of accuracy due to temperature sensing being performed near, but not exactly at, the location of pressure / angle sensing; and e) increased circuit area occupied due to the inclusion of an additional temperature sensing bridge circuit.

[0014] Therefore, there is a need in the art to provide a better solution for supporting temperature compensation using a pressure / angle sensing resistive bridge circuit. Summary of the invention

[0015] In an embodiment, the circuit includes: a bridge driver circuit configured to apply a bias voltage across a first input node and a second input node of a resistive bridge circuit; a sensing circuit configured to sense a bridge current flowing through the resistive bridge circuit in response to the applied bias voltage; a first processing circuit configured to determine a temperature-dependent sensitivity of the resistive bridge circuit based on the sensed bridge current; and a second processing circuit configured to process voltage outputs at a first output node and a second output node of the resistive bridge circuit and apply a temperature correction in response to the determined temperature-dependent sensitivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in conjunction with the accompanying drawings, in which:

[0017] Figure 1 is a top view of a micro-electromechanical system (MEMS) device;

[0018] Figure 2 is a schematic diagram of a Wheatstone bridge circuit;

[0019] Figure 3 is a schematic diagram of a MEMS sensing system;

[0020] Figure 4 Shown for Figure 3 Additional circuit details of the circuit;

[0021] Figure 5 shows a block diagram for a gain and offset correction circuit;

[0022] Figure 6 shows a circuit diagram for an ADC driver circuit;

[0023] Figure 7 A block diagram showing dithering of an analog signal processed by an ADC circuit;

[0024] Figure 8 A circuit diagram for a 1-bit digital-to-analog converter (DAC) circuit is shown;

[0025] Fig. 9 Spectral representation showing the advantages achieved through the use of ADC dithering;

[0026] Fig.10 shows a block diagram of a DSP; and

[0027] Fig.11 It is the block diagram of DSP algorithm. DETAILED DESCRIPTION

[0028] In different drawings, the same elements have been designated with the same reference numerals. In particular, structural and / or functional elements common to different embodiments may be designated with the same reference numerals and may have exactly the same structure, size and material properties.

[0029] Throughout this disclosure, the term "connected" is used to specify a direct electrical connection between circuit elements without intermediate elements other than conductors, while the term "coupled" is used to specify an electrical connection between circuit elements, which may be a direct electrical connection or may be an electrical connection via one or more intermediate elements.

[0030] The terms "about," "substantially," and "approximately" are used herein to designate a tolerance of plus or minus 10% (preferably plus or minus 5%) of the value in question.

[0031] Reference now Figure 3 , Figure 3A schematic diagram of a MEMS sensing system 100 is shown. The system 100 includes a resistive Wheatstone bridge circuit 102 biased by a driver circuit 104. The resistive Wheatstone bridge circuit 102 includes input nodes 142 and 144 and output nodes 146 and 148. The driver circuit 104 applies a bias voltage Vbias across the input nodes 142 and 144. An output voltage Vout is generated across the output nodes 146 and 148. A first resistor R1 is connected between the node 142 and the node 146. A second resistor R2 is connected between the node 142 and the node 148. A third resistor R3 is connected between the node 144 and the node 146. A fourth resistor R4 is connected between the node 144 and the node 148. The resistors R1 to R4 all have the same nominal resistance value R. In one embodiment, the Wheatstone bridge circuit 102 forms a pressure / angle sensor 30 (see Figure 1 ).

[0032] The driver circuit 104 includes an operational amplifier 110 having non-inverting and inverting inputs and a single-ended non-inverting output including two voltage-shifted output signals 117, 119. An amplified output stage for the driver circuit 104 includes a first transistor 116 controlled by one of the voltage-shifted output signals 117 of the amplifier 110 and connected to an input node 142 of the bridge. The output stage also includes a second transistor 118 controlled by the other of the voltage-shifted output signals 119 of the amplifier 110, connected to an input node 144 of the bridge.

[0033] The first transistor 116 and the second transistor 118 may, for example, comprise bipolar transistor devices having collector terminals connected to input nodes 142 and 144, respectively. The collector terminals of the first transistor 116 and the second transistor 118 respectively form differential output nodes of the driver circuit 104 for applying a differential voltage bias Vbias to the bridge 102, wherein the transistor 116 provides a corresponding driver circuit current Ipbias and the transistor 118 draws a corresponding driver current Inbias, where the currents Ipbias and Inbias are the necessary currents to satisfy the bias conditions applied by the driver circuit 104 that cause the bias voltage Vbias to occur between nodes 142 and 144. The first transistor 116 has an emitter coupled to a supply voltage node (Vdd) and a base driven by one of the output signals 117 from the amplifier 110, wherein the collector is coupled to provide the current Ipbias to the input node 142 of the bridge circuit 102. The second transistor 118 has an emitter coupled to the ground node and a base driven by another output signal in the output signal 119 from the amplifier 110, wherein the collector is coupled to draw a current Inbias from the input node 144 of the bridge circuit 102. Bipolar transistor devices are preferably used for transistors 116, 118 because bipolar transistor devices can eliminate flicker noise. However, it will be understood that in some applications, MOSFET devices can be used for transistors 116, 118.

[0034] Feedback resistor R1fb is connected between the non-inverting input of amplifier 110 and input node 142 of bridge circuit 102 (at one of the differential output nodes of driver circuit 104). Feedback resistor R2fb is connected between the inverting input of amplifier 110 and input node 144 of bridge circuit 102 (at the other of the differential output nodes of driver circuit 104). Feedback resistors R1fb and R2fb have the same resistance value (Rfb) and set the closed-loop gain of the amplification provided by the driver circuit. The first current source 112 is connected to provide a current Ibias generated by a power supply voltage node (e.g., Vdd) to the non-inverting input of amplifier 110, which is configured to flow through feedback resistor R1fb to the driver circuit at input node 142 of the bridge circuit. The second current source 114 is connected to sink a current Ibias at the non-inverting input of the amplifier 110 to a ground node, which bias current is configured to flow from the driver circuit output at the input node 144 of the bridge circuit through the feedback resistor R2fb. With this circuit configuration, the bias voltage Vbias applied between the input nodes 142 and 144 of the bridge circuit 102 is therefore equal to 2*Rfb*Ibias.

[0035] Due to the differential structure adopted for the driver circuit 104, common-mode feedback is required to set the common-mode voltage of the output of the amplifier 110. The common-mode current Icm flows through the common-mode resistor divider circuit 200, which is formed by resistors R5 and R6 connected in series between the input nodes 142 and 144 of the bridge circuit 102. Resistors R5 and R6 have the same resistance value. The tap node at the series connection of resistors R5 and R6 is coupled to the input of the feedback amplifier 202, which acts as a buffer circuit. The output of the amplifier 202 is coupled to set the common-mode voltage of the amplifier 110.

[0036] Therefore, the current Ipbridge flowing into bridge circuit 102 at input node 142 is equal to bias current Ibias plus drive circuit current Ipbias minus common mode current Icm. The current Inbridge flowing out of bridge circuit 102 at input node 144 is equal to bias current Ibias plus drive circuit current Inbias minus common mode current Icm.

[0037] The output voltage Vout from the bridge circuit 102 is processed to determine the action state measurement (e.g., the deflection angle θ) of the MEMS. The differential signal Vout is processed by an analog front end (AFE) circuit 500, which conditions the signal for further processing. For example, the AFE circuit 500 performs amplification and filtering of the differential signal Vout to achieve a desired signal-to-noise ratio. A sigma-delta analog-to-digital converter (ADC) 502 converts the analog signal output from the AFE circuit 500 into a digital signal Vadc. The digital signal Vadc represents the angular deflection of the MEMS. A digital signal processing (DSP) circuit 504 processes the digital signal Vadc to generate a digital signal 506 representing the angular deflection θ of the MEMS. The DSP processing operation is well known to those skilled in the art.

[0038] Note, however, that the differential signal Vout is also affected by the temperature-dependent behavior of the bridge circuit 102 (as discussed above). The circuit 185 is configured to process the obtained current information 187 about the driver circuit and the bridge circuit to detect the temperature-dependent sensitivity S(T) of the bridge circuit 102 and generate a sensitivity signal S186. The digital signal processing (DSP) circuit 504 can then process the digital signal Vadc and use the sensitivity S output by the circuit 185 to correct for temperature and generate a digital signal 506 representing the true angular deflection θ of the MEMS. The DSP processing operations are well known to those skilled in the art. As an example, the DSP processing function for determining the action state includes: converting the output of the AFE into a digital signal using a 5-bit sigma delta analog-to-digital converter (ADC). These digital signal samples are then averaged by a third-order SINC filter, which provides the sampling factor required to achieve the required data rate. After this downsampling stage, the output is multiplied by the inverse of the sensitivity (1 / S) and a set of digital quartic filters performs a finer filtering action that allows for a cleaner recovery of the angular deflection θ of the MEMS.

[0039] Therefore, it will be noted that in this implementation, for the purpose of obtaining temperature-dependent sensitivity S(T) data, the same bridge circuit 102 is used to sense the actuation state of the MEMS and to detect the temperature of the MEMS. As previously mentioned, the temperature-dependent sensitivity S(T) of the MEMS device 10 is obtained by calibration and is given by the following equation:

[0040] S(T)=S0(1+α S1 ·ΔT+α S2 ΔT 2 )

[0041] In order to utilize this equation, a measurement of the temperature of bridge circuit 102 must be obtained by circuit 185. Since we do not want to add additional temperature sensing circuitry (e.g., see Figure 1 32 in the figure), so a different temperature sensing technique must be used. It will be noted that the temperature of the bridge circuit 102 can be measured indirectly by measuring the resistance of the bridge. The resistance of the Wheatstone bridge depends on the temperature according to the following formula:

[0042] R(T)=R0(1+α R1 ·ΔT+α R2 ΔT 2 )

[0043] Where: ΔT = T-T0 is the temperature change relative to the reference temperature T0 of 27°C; R0 is the resistance value at the reference temperature; and α R1 and α R2is the thermal coefficient that depends on the technology - more specifically: α R1 is the first-order temperature coefficient relating the bridge resistance to temperature; and α R2 is the second-order temperature coefficient relating the bridge resistance to temperature.

[0044] In response to the application of a known, and constant voltage (i.e., Vbias) applied across the input nodes 142 and 144 of the bridge, the bridge resistance value is then extracted by circuit 185 by measuring the current flowing through the bridge itself (i.e., current Ipbridge=Inbridge). As mentioned above, the current through the bridge circuit (Ipbridge or Inbridge) depends on the bias current Ibias, the driver circuit current Ipbias, Inbias, and the common-mode current Icm (collectively referred to herein as current information 187). Circuit 185 collects current information 187, for example, by using a known current Ibias set by current sources 112 and / or 114, sensing the driver circuit current Ipbias and / or Inbias, and sensing the current Icm. These current collection operations can be implemented, for example, using a suitably configured current mirror circuit, and the determination of the current flowing through the bridge is accomplished by a suitable current summing (e.g., subtraction) circuit.

[0045] Reference now Figure 4 , Figure 4 The current sensing and temperature dependent sensitivity circuit 185 is shown in more detail. It will be noted that Figure 4 Illustration of some of the circuit arrangements for the driver 104 is omitted.

[0046] The first current mirror circuit 120 mirrors the driver circuit current Ipbias flowing into the input node 142, so that the current source 126 generates a mirrored bridge bias current Ip, which is equal to the driver output current Ipbias scaled by the scale factor j (i.e., Ip=Ipbias / j). The second current mirror circuit 122 mirrors the driver circuit current Inbias drawn from the input node 144, so that the current source 128 generates a mirrored bridge bias current In, which is equal to the bridge bias current Inbias scaled by the scale factor j (i.e., In=Inbias / j). The first current mirror circuit 120 and the second current mirror circuit 122 enable the collection of the driver circuit currents Ipbias and Inbias by the temperature-dependent sensitivity circuit 185 (reference numeral 187). The current sources 126 and 128 can be implemented, for example, using bipolar transistor devices having a common emitter and base connected to the bipolar transistors 116 and 118, respectively. The current source transistor 126 has an emitter coupled to the supply voltage node (Vdd), a base driven by one of the output signals 117 from the amplifier 110 (forming a current mirror 120 relationship scaled by the mirror factor j with the transistor 116), and a collector coupled to provide the mirrored driver circuit current Ip. The current source transistor 128 has an emitter coupled to the ground node, a base driven by another of the output signals 119 from the amplifier 110 (forming a current mirror 122 relationship scaled by the mirror factor j with the transistor 118), and a collector coupled to draw the mirrored driver circuit current In. Bipolar transistor devices are preferably used for the current sources 126 and 128. The reason for this is that bipolar transistor devices can eliminate flicker noise. However, it will be understood that in some applications, MOSFET devices can be used for the current sources 126 and 128.

[0047] The third current mirror circuit 210 senses the common-mode current Icm flowing through the common-mode resistor divider circuit 200 and subtracts the current scaled by the mirror factor j from the mirrored driver circuit current Ip (i.e., the subtracted current is Icm / j). The fourth current mirror circuit 212 senses the common-mode current Icm flowing through the common-mode resistor divider circuit 200 and subtracts the current scaled by the mirror factor j from the mirrored driver circuit current In (i.e., the subtracted current is Icm / j). The third current mirror circuit 210 and the fourth current mirror circuit 212 enable the collection of the common-mode current Icm by the temperature-dependent sensitivity circuit 185 (reference numeral 187). In this context, the currents Ipbias and Inbias are affected by the error caused by the common-mode current Icm, and the current mirror circuits 210 and 212 effectively cancel the error.

[0048] The fifth current mirror circuit 214 is used to obtain a copy of the bias current Ibias from the current source 112 (i.e., this is the current flowing through the resistor R1fb) and subtract this current scaled by the mirror factor j from the mirrored driver circuit current Ip (i.e., the subtracted current is Ibias / j). The sixth current mirror circuit 216 is used to obtain a copy of the bias current Ibias from the current source 114 (i.e., this is the current flowing through the resistor R2fb) and subtract this current scaled by the mirror factor j from the mirrored driver circuit current In (i.e., the subtracted current is Ibias / j). The fifth current mirror circuit 214 and the sixth current mirror circuit 216 enable the collection of the bias current Ibias by the temperature-dependent sensitivity circuit 185 (reference numeral 187). In this case, the currents Ipbias and Inbias are affected by the error caused by the feedback current Ibias, and the current mirror circuits 214 and 216 effectively cancel the error.

[0049] Subtraction of the common mode current Icm and the bias current Ibias from the mirrored bridge bias current Ip produces a sensed source bridge current Ipsbr (substantially equal to Ipbridge / j). Similarly, subtraction of the common mode current Icm and the bias current Ibias from the mirrored bridge bias current In produces a sensed sink bridge current Insbr (substantially equal to Inbridge / j). These operations enable collection of the bridge current by the temperature dependent sensitivity circuit 185 (reference numeral 187).

[0050] It will be noted that the scaling factor j may take any suitable integer or fractional value. In order to significantly reduce power consumption in the circuit 185, values ​​much larger than 1 are preferred.

[0051] The circuit 185 also includes a transimpedance amplifier 152 having a non-inverting input and an inverting input. A feedback resistor R3fb is connected between the non-inverting input of the transimpedance amplifier 152 and the inverting output of the transimpedance amplifier 152. A feedback resistor R4fb is connected between the inverting input of the transimpedance amplifier 152 and the non-inverting output of the transimpedance amplifier 152. The feedback resistors R3fb and R4fb have the same resistance value.

[0052] A current digital-to-analog converter (DAC) circuit 130 receives the sensed bridge current Ipsbr and outputs a scaled current 134 in response to a digital control signal 135 that specifies a scaling factor m to be applied to the sensed bridge current Ipsbr by the DAC circuit 130. The scaled current 134 is equal to m*Ipsbr, where m is the scaling factor specified by the digital control signal 135. The scaled current 134 is applied to the non-inverting input of the transimpedance amplifier 152.

[0053] The current digital-to-analog converter (DAC) circuit 132 receives the sensed bridge current Insbr and outputs a scaled current 136 in response to a digital control signal 135 that specifies a scaling factor m to be applied to the sensed bridge current Insbr by the DAC circuit 132. The scaled current 136 is equal to m*Insbr. The scaled current 136 is applied to the inverting input of the transimpedance amplifier 152.

[0054] An offset current Ipoffset is generated independently of a temperature-dependent current source 140. A current digital-to-analog converter (DAC) circuit 143 receives the offset current Ipoffset and outputs a scaled current 148 in response to a digital control signal 149 that specifies a scaling factor k to be applied to the offset current Ipoffset by the DAC circuit 143. The scaled current 148 is equal to k*Ipoffset, where k is the scaling factor specified by the digital control signal 149. The scaled current 148 is applied to the non-inverting input of a transimpedance amplifier 152.

[0055] A temperature-independent current source 141 generates an offset current Inoffset. A current digital-to-analog converter (DAC) circuit 146 receives the offset current Inoffset and outputs a scaled current 150 in response to a digital control signal 149 that specifies a scaling factor k to be applied to the offset current Inoffset by the DAC circuit 146. The scaled current 150 is equal to k*Inoffset. The scaled current 150 is applied to the inverting input of a transimpedance amplifier 152. In one embodiment, Ipoffset may be equal to Inoffset.

[0056] The driver circuit includes an operational amplifier 160 having a non-inverting input and an inverting input. An input resistor R1in is coupled between the inverting output of the amplifier 152 and the non-inverting input of the amplifier 160. An input resistor R2in is coupled between the non-inverting output of the amplifier 152 and the inverting input of the amplifier 160. The input resistors R1in and R2in have the same resistance value, and in an embodiment, the resistance may be variable. A feedback resistor R5fb is connected between the non-inverting input of the amplifier 160 and the inverting output of the amplifier 160. A feedback resistor R6fb is connected between the inverting input of the amplifier 160 and the non-inverting output of the amplifier 160. Feedback resistors R5fb and R6fb have the same resistance value.

[0057] The driver circuit is configured to drive an analog-to-digital converter (ADC) circuit 170 with an analog output voltage Vout(T). The ADC circuit 170 includes differential inputs respectively coupled to an inverting output and a non-inverting output of the amplifier 160. The ADC circuit 170 generates a digital output signal Vadc.

[0058] ADC dither circuit 172 applies a dither signal 174 to ADC circuit 170 .

[0059] The digital signal processor (DSP) circuit 180 processes the digital output signal Vadc to generate an indicative bridge current Ibridge norm A signal 182 indicating a temperature change (ΔTnorm) of the bridge circuit 102 , a signal 184 indicating a temperature change (ΔTnorm) of the bridge circuit 102 , and a signal 186 indicating a sensitivity (S) of the bridge circuit 102 .

[0060] As mentioned previously, the resistance of a Wheatstone bridge depends on the temperature according to the following formula:

[0061] R(T)=R0(1+α R1 ·ΔT+α R2 ΔT 2 )

[0062] The current flowing through the bridge circuit is:

[0063]

[0064] in: is the offset, and is the signal, and further, for simplicity, only the linear coefficients are considered.

[0065] It is necessary to apply corrections to both gain and offset in order to adapt the signal to the dynamic range of ADC 170. Correction for gain is performed by scaling factor m and the operation of DACs 130 and 132. Correction for offset is performed by scaling factor k and the operation of DACs 143 and 146.

[0066] Reference now Figure 5 , Figure 51 shows a block diagram of a gain and offset correction circuit arrangement. A digital control signal Data_in_m is applied to a first modulator circuit 230. The digital control signal Data_in_m may be, for example, an 8-bit signal, and the first modulator circuit 230 is therefore an 8-bit modulator that operates to generate a digital control signal 135, which is applied to control the operation of DACs 130 and 132. The digital control signal 135 may be, for example, a 4-bit signal. The DAC 130 also receives a current Ipsbr (i.e., a scaled bridge current Ipbridge / j), and in response to the logic state of the bits of the digital control signal 135, the DAC 130 scales the current Ipsbr by a factor m to generate a current signal 134, which is provided to the non-inverting input of the amplifier 152. DAC 132 also receives current Insbr (ie, scaler bridge current Inbridge / j), and in response to the logic state of the bits of digital control signal 135 , DAC 132 scales current Insbr by a factor m to generate current signal 136 , which is drawn from the inverting input of amplifier 152 .

[0067] The digital control signal Data_in_k is also applied to the second modulator circuit 232. The second modulator circuit 232 may also be an 8-bit modulator that operates to generate a digital control signal 149 that is applied to control the operation of DACs 143 and 146. The digital control signal 149 may be, for example, a 4-bit signal. DAC 143 also receives a current Ipoffset, and in response to the logic state of the bits of the digital control signal 149, DAC 143 scales the current Ipoffset by a factor k to generate a current signal that is provided to the non-inverting input of amplifier 152. DAC 146 also receives a current Inoffset, and in response to the logic state of the bits of the digital control signal 149, DAC 146 scales the current Inoffset by a factor k to generate a current signal that is drawn from the inverting input of amplifier 152.

[0068] Figure 5 The operating concept of the circuit arrangement shown in is to provide current to the differential inputs of the amplifier 152 (based on the current Ipsbr) and to draw current from the differential inputs of the amplifier 152 (based on the current Insbr). The currents Ipsbr and Insbr directly represent the Wheatstone resistor bridge currents Ipbridge and Inbridge. These currents must be converted into voltage signals for amplification, filtering and conversion to the digital domain in order to be processed in conjunction with determining the temperature-dependent sensitivity.

[0069] The full-scale currents Ipsbr and Insbr are not suitable for direct processing by the analog front end due to the presence of gain and offset errors which will severely limit the accuracy of the readout itself.

[0070] The measurement must consist of the change in the bridge current due to the temperature change. As the currents Ipsbr and Insbr are scaled versions of the bridge currents (Ipbridge and Inbridge respectively), the change in these currents must be read. However, this change is of a magnitude significantly lower than the "absolute" value of the current itself. Therefore, initially analog processing is performed on the currents Ipsbr and Insbr in order to subtract a certain DC value and adjust their gain relative to the temperature. In practice, it is advantageous to subtract an offset equal to the current value at room (reference) temperature and adjust the gain so that, over the temperature range (from Tmin to Tmax), the current shows a change (from Imin to Imax) that is able to exploit all the available dynamic range of the analog front end.

[0071] DACs 142 and 143 are tailored to subtract the offset current (starting from a temperature independent current) until DACs 126 and 128 receive currents Ipsbr and Insbr, respectively, and apply the gain factor. As a general approach, any of the current DACs can perform these operations (i.e., offset generation and gain variation for subtraction). Figure 5 The circuits shown in are only examples of possible (advantageous) implementations for these operations. Since the two DACs must provide two DC (constant) values ​​with non-negligible accuracy, the best solution is to deal with an oversampling (i.e., sigma-delta) scheme. The m-modulator receives a code (Data_in_m) representing the gain factor to be applied with a given resolution (i.e., 8 bits), and it provides the DAC with a modulated code (to the appropriate modulation frequency) with a lower number of bits. This is known as oversampling. It is useful to allow the design of a DAC with a limited number of bits (i.e., 4 bits) that can in any case (due to the sigma-delta modulation) achieve a higher resolution (i.e., 8 bits). The same concept applies to the k-modulator, which will work from a different dedicated code (Data_in_k) representing the offset to be provided.

[0072] Figure 4 A driver circuit for an ADC circuit 170 is shown that includes a single operational amplifier stage (reference numeral 160). In an alternative embodiment, Figure 6As shown in FIG. 1 , the driver circuit for ADC circuit 170 can be configured with two amplification stages. The driver circuit includes a first stage having an operational amplifier 160 a having a non-inverting input and an inverting input. An input resistor R1ain is coupled to amplifier 152 ( Figure 4 ) between the inverting output of amplifier 152 ( Figure 4 ) between the non-inverting output of amplifier 160a and the inverting input of amplifier 160a. Input resistors R1ain and R2ain have the same resistance value. In one embodiment, input resistors R1ain and R2ain may be variable resistors. Feedback resistor R5afb is connected between the non-inverting input of amplifier 160a and the inverting output of amplifier 160a. Feedback resistor R6afb is connected between the inverting input of amplifier 160a and the non-inverting output of amplifier 160a. Feedback resistors R5afb and R6afb have the same resistance value. The driver circuit also includes a second stage having an operational amplifier 160b, which has a non-inverting input and an inverting input. Input resistor R1bin is coupled between the inverting output of amplifier 160a and the non-inverting input of amplifier 160b. Input resistor R2bin is coupled between the non-inverting output of amplifier 160a and the inverting input of amplifier 160b. Input resistors R1bin and R2bin have the same resistance value. In an embodiment, input resistors R1bin and R2bin may be variable resistors. Feedback resistor R5bfb is connected between the non-inverting input of amplifier 160b and the inverting output of amplifier 160b. Feedback resistor R6bfb is connected between the inverting input of amplifier 160b and the non-inverting output of amplifier 160b. Feedback resistors R5bfb and R6bfb have the same resistance value.

[0073] With this configuration, the output voltage Vout(T) applied to the input of the ADC circuit 170 is given by the following equation:

[0074]

[0075] Where: M can be defined as the number of bits used for the m-modulator, where 2 M is the relevant (maximum) number of levels that can be generated by the gain DAC. Thus, m is the number of levels that can be effectively selected for the m-DAC in the specific case. Therefore, the ratio (m / 2 M ) defines the gain factor provided by the m-DAC. The value k can be defined as the number of bits used for the k modulator, where 2 Kis the relevant (maximum) number of levels that can be generated by the offset DAC. Therefore, k is the number of levels that can be effectively selected for the k-DAC in the specific case. Therefore, the ratio (k / 2 K ) defines the factor provided by the k-DAC (i.e., each I OS Vbias,ref is the reference voltage. Gbias is the gain that can be applied to the bias driver 104. In other words, the bias voltage applied to the sensor bridge can be programmed using the Gbias value. It is useful to bias the bridge to different voltages depending on the tradeoff between consumption and noise. G1 is the gain of amplifier 160a. G2 is the gain of amplifier 160b. Different gains can be selected to better utilize the dynamic range of the analog front end. The value j is the mirror factor for the bridge bias current. The value R0 is the resistance value at the reference temperature. The value α R1 is the thermal coefficient as mentioned above. The value ΔT is the temperature change relative to the reference temperature. The value Rtia is the resistance of the feedback resistors R3fb, R4fb of the amplifier 152.

[0076] More specifically:

[0077]

[0078] G2 = constant, where the value of the constant is taken from a set of possible values ​​selected to appropriately match the dynamic range requirements.

[0079] Operational amplifier 160 a is used to compensate for the used V bias range, and operational amplifier 160 b is used to compensate for the technology spread of the feedback resistor of amplifier 152 .

[0080] The expression for Vout(T) at the input of ADC 170 can be rewritten in a more simplified form as:

[0081]

[0082] Where: A, B and C are three coefficients that must be known along with the scale factors m and k that best match the dynamic range of the ADC circuit 170. A calibration process may be performed to determine the best values ​​for the scale factors m and k.

[0083] The calibration process is as follows:

[0084] a) Starting from reasonable values ​​for the scaling factors m and k (referred to as m0 and k0), and with the temperature T at the reference temperature T0 (i.e., T=T0, and therefore ΔT=0), the control signals 135 and 149 are set to achieve scaling by m0 and k0, and a first measurement of the output voltage Vout1(T) is made according to the following equation:

[0085] Vout1=m0·A+k0·C

[0086] b) Now choosing a different reasonable value for the scaling factor k (referred to as k1), and with the temperature T at the reference temperature T0 (i.e., T=T0, and hence ΔT=0), setting the control signals 135 and 149 to achieve scaling by m0 and k1, and taking a second measurement of the output voltage Vout2(T) according to the following equation:

[0087] Vout2=m0·A+k1·C

[0088] c) Solve the linear system:

[0089]

[0090] It has two variables A and C and two equations to obtain A and C.

[0091] d) Now that A and C are known, a temperature T different from T0 is applied (i.e., T≠T0 and therefore ΔT exists), and control signals 135 and 149 are set to achieve scaling by m0 and k1 and a third measurement of the output voltage Vout3(T) is made according to the following equation:

[0092]

[0093] All terms except B are known.

[0094] e) Solve the above equation to obtain B.

[0095] f) Now that A, B, and C are known, the values ​​of m and k that best match the dynamic range of the ADC circuit 170 are obtained by solving the linear system:

[0096]

[0097] Where: Tmin is the minimum operating temperature, and Tmax is the maximum operating temperature, to determine the scaling factors mbest and kbest. Then, the control signals 135 and 149 are set to achieve scaling according to mbest and kbest, and the calibration process is ended.

[0098] Once the parameters A, B and C are calculated, all the "physical" parameters of the equation defining the output voltage are known. The values ​​of m and k to be used next can in any case be freely chosen.

[0099] The calibration procedure allows to define A, B and C with only one temperature measurement different from the room (reference) and then know all the physical values ​​needed to solve the equations.

[0100] As mentioned previously, m and k are set by the user / designer. Since they are known from the beginning, they are not relevant to the equation. The values ​​of m and k are simply chosen and then used in the equation and can be taken into account in the evaluation of the results. The key point of the calibration is to extract the A, B and C values.

[0101] Therefore, the question is how m and k must be chosen once A, B, and C are evaluated. The idea is to utilize all the dynamic range available in the analog front end. The output voltage Vout will be limited by the headroom in the analog front end op amps 152, 160. For example, it is clear that Vout will be limited between ground and the op amp 160 supply voltage. To optimize the dynamic range (i.e., improve the signal-to-noise ratio), one skilled in the art can design the system so that in the operating range, Vout will cover all the available voltage range.

[0102] Then, m and k will be chosen accordingly so that for Tmin, it results in V(Tmin)=min_voltage, and for Tmax, it results in V(Tmax)=mV(Tmax)=max_voltage, where min_voltage and max_voltage are respectively the minimum voltage and maximum voltage that can be linearly managed by the amplifier 160. Therefore, in the digital domain, assuming that the ADC 170 will output a normalized result of -1 when min_voltage is applied and a normalized result of +1 when max_voltage is applied, the same concept leads to the above solution.

[0103] Reference now Figure 7 ,Should Figure 7 A block diagram of dithering for an analog signal processed by the ADC circuit 170 is shown. The ADC dither circuit 172 includes a triangle wave generator 340 configured to output a triangle wave signal 342. The triangle wave signal 342 is input to a 1-bit sigma-delta modulator 344, which outputs a modulated signal 346. The modulated signal 346 is input to a 1-bit digital-to-analog converter (DAC) circuit 348, which outputs a dither signal 350.

[0104] The ADC circuit 170 includes an analog summing circuit 360 having a first input that receives the output voltage Vout(T) from the driver circuit and a second input that receives the dither signal 350. The output of the analog summing circuit 360 is a triangular dithered analog output voltage signal 362 that is input to a successive approximation register (SAR) ADC converter circuit 364. As an example, the SAR ADC converter circuit 364 can be a 12-bit circuit that generates a 12-bit digital signal 366. The effect of the triangular dithering of the output voltage Vout(T) is a uniform excitation of several ADC levels within the SAR ADC converter circuit 364. An averaging function can then be used to filter thermal noise and increase the signal resolution to 16 bits. As an example, the averaging function can be implemented by an N-point averager, where N>2048. The digital output signal from the ADC circuit 170 is then processed by the DSP circuit 180.

[0105] Figure 8 A circuit diagram for a 1-bit digital-to-analog converter (DAC) circuit 348 is shown. A 1-bit sigma-delta modulator 344 modulates a triangular wave signal 342 to generate a modulated signal 346 as a single bit signal dout and its logical complement doutb. The DAC circuit 348 includes a first current source 370 coupled between a power supply voltage node (Vdd) and a first input node 372. A first transistor switch 374 is coupled between the node 372 and a first output node 376 and driven by a signal dout. A second transistor switch 378 is coupled between the node 372 and a second output node 380 and driven by a signal doutb. A second current source 382 is coupled between a ground node and a second input node 384. A third transistor switch 386 is coupled between the node 384 and the first output node 376 and driven by a signal doutb. A fourth transistor switch 388 is coupled between the node 384 and the second output node 380 and driven by a signal dout.

[0106] The first output node 376 is coupled to a first input of a transimpedance amplifier 390. The second output node 380 is coupled to a second input of the transimpedance amplifier 390. A first feedback resistor Rfb1 is coupled between the first input and the first output of the transimpedance amplifier 390. A second feedback resistor Rfb2 is coupled between the second input and the second output of the transimpedance amplifier 390. The differential signal generated at the first output of the transimpedance amplifier 390 and the second output of the transimpedance amplifier 390 is summed with a differential output voltage Vout(T) from the driver circuit by an analog summing circuit 360.

[0107] To save area and power, a preferred embodiment will use amplifier 160b and resistors R5bfb and R6bfb to provide amplifier 390 and resistors Rfb1 and Rfb2. In other words, in this implementation, output nodes 376 and 380 are coupled to the non-inverting and inverting inputs of amplifier 160b, respectively.

[0108] The transimpedance amplifier 390 acts as a low pass filter. Since the temperature of the bridge circuit 102 is a slow frequency signal, the conversion can be obtained from the average of N samples (>2048). The averaging time must be an integer multiple of the period of the triangular waveform signal 342 generated by the circuit 340.

[0109] The dither signal is a (sequence of) triangular waveforms. This signal has an average value equal to zero in one cycle. Therefore, if this signal is added to the effective signal at the input of the ADC, in order not to change the value of the effective signal itself, the ADC result must be averaged over an integer number of triangular waveform cycles. As described in the time domain, this operation is Fig. 9 , which presents a spectrum representation achieved by advantageously using ADC dithering. Signal 400 represents the temperature signal from bridge circuit 102. Signal 402 represents the noise involved in the SAR input. Signal 404 represents the triangular dithering. The frequency fconv is the ADC conversion frequency. Therefore, the frequency f conv / 2 is the well-known Nyquist frequency. Signal 406 represents the filtering operation performed by the averaging function. Signal 408 represents the noise referenced by the SAR input reduced by the filtering operation. Frequency f conv / N is the conversion frequency divided by the number of samples used for averaging, N. In this context, it will be noted that the noise involved in the SAR input is reduced by Fig. 9 The diagram shows how the quantization noise of the ADC (upper part of the diagram) is reduced (see, lower part of the diagram) when an equivalent filter function is applied. As shown, the filter function is a sinc(1) frequency transform averaged in the time domain. The sinc(1) theory dictates that the equivalent bandwidth will be reduced by a factor of N.

[0110] Reference now Fig.10 , Fig.10A block diagram of the DSP 180 is shown. The digital signal Vadc output by the ADC circuit 170 is processed by a fractional averager operation 420 to produce an average digital signal AVGout. The analog signal provided as an input to the SAR ADC can be considered to be affected by two different interferences that will prevent the DSP from giving accurate results. One interference is represented by a dither noise that is added to the analog signal in order to improve the ADC resolution, while the other interference is generated by the action component of the mirror image that is superimposed on the current signal processing chain processed by the analog signal (i.e., from the bridge circuit to the SAR ADC). These interferences must be filtered out to prevent them from affecting the DSP calculations, thereby ensuring maximum accuracy of the DSP output results. The fractional averager operation 420 therefore performs this filtering function.

[0111] In order to provide adequate filtering for both interferences, a first order SINC filter proves to be very suitable, since it can theoretically average over N ADC output samples in such a way that the averaging window exactly matches an integer number of mirror periods. For example, if the sampling period of the SAR ADC is Ts (where Fs = 1 / Ts), then an N*Ts averaging window is performed according to the well-known formula:

[0112]

[0113] To filter out both the dither noise and the image motion components, it is important that N*Ts equals an integer number of image periods Tm (where Fm=1 / Tm is the image frequency).

[0114] In any conventional SINC filter, the average number N is an integer value. However, in the present case, N can also be a fractional number. This plays a key role in filtering applications because it allows the use of the same SAR ADC with the same Fs when there is always a value of N, so that for some integer values ​​of M, N*Ts equals M*Tm. This enables support for sensing any MEMS mirror, regardless of its oscillation frequency. This is obtained using a slight modification to the averaging formula, where the first (i=1) and last (i=N) samples are dynamically given a weight less than the whole at each averaging cycle. The weights are calculated inside the fractional averager operation 420 starting with an evaluation of the ratio Fs / Fm. Each weight conforms to the amount of time that the sample contributes to the averaging window (less than one sample time). In doing so, the equivalent averaging time changes from the conventional N*Ts to (w_left+N-2+w_right)*Ts, where w_left and w_right are the above-mentioned weights. The programmable averaging window of the fractional averager operation 420 is thus adapted to the required input / output data rate in order to filter out the dither spectral components, and the output data rate of the averaged digital signal AVGout is adapted to the SAR sampling frequency.

[0115] As mentioned previously, the temperature dependence of resistance is expressed as:

[0116] R(T)=R0(1+α R1 ·ΔT+α R2 ΔT 2 )

[0117] Therefore, the normalized resistance is:

[0118]

[0119] The bridge current Ibridge is defined as:

[0120]

[0121] Therefore, the normalized bridge current is defined as:

[0122]

[0123] The input received from ADC circuit 170 can be represented as:

[0124]

[0125] Where: Ibridge(T) is known; Gcurr = m / (j*2 m ), where m is defined during calibration as discussed above (along with k); Rtia is the resistance of the feedback resistor for the transimpedance amplifier that sets the gain Gtia; Vref is the reference voltage that sets the full scale for the SAR DAC; and Ios is the current necessary to eliminate the offset as explained previously, which is equal to k times the least significant bit of the current-DAC, where k is defined during calibration as discussed above (along with m).

[0126] Therefore, the voltage Vadc can be expressed as:

[0127]

[0128] This represents the starting point of the DSP process.

[0129] Targeting Ibridge norm Solving the above equation reveals:

[0130]

[0131] in:

[0132] as well as

[0133]

[0134] Then, in response to the signals Gdsp and OSdsp, the average digital signal AVGout is processed by the DSP algorithm 422 to generate a first digital signal Ibridge norm , the first digital signal Ibridge norm is the normalized current flowing through the bridge circuit 102 according to:

[0135] Ibridge norm =(Vadc+OSdsp)·(Gdsp)

[0136] Since the analog settings are known after calibration, the DSP is programmed with values ​​for Gdsp and OSdsp.Knowing these values, the normalized current through the bridge circuit 102 can be calculated from samples of the voltage Vadc output by the fractional averager.

[0137] Once the normalized current is determined, the calculation of the temperature and the inverse of the sensitivity are key to performing the mathematical operations. The second order equation relating the normalized bridge current to the normalized resistance must be solved for temperature. Once the temperature is known, the inverse value of the sensitivity is calculated by:

[0138]

[0139] Note: Due to the fixed point representation of values ​​in the DSP, direct solution of the second order equation may lead to erroneous and unstable results. As will be discussed in this article, it is preferable to use multiple intermediate steps in performing the calculations.

[0140] Fig.11 A block diagram of the DSP processing operation 422 is shown. A more in-depth description of the DSP algorithm is now provided.

[0141] After the digital signal Vadc is processed by the fractional averager, a sample of the signal Vadc (signal AVGout) is provided as input to the DSP block that executes the main processing algorithm. The first part of the algorithm involves the summation of the input with OSdsp (reference numeral 430) and the multiplication result with Gdsp (reference numeral 432). As previously explained, this will produce a first digital signal, which is the normalized bridge current (Ibridge norm ).

[0142] The next step is to calculate the temperature value starting from the normalized current. Since the DSP only implements fixed-point calculations, it is calculated by 1 / Ibridge norm =(1+α R1 ·ΔT+α R2 ΔT 2) will suffer from rounding errors that will make the result wrong or unstable. For this reason, we manipulate it by defining some intermediate values ​​that depend only on the α coefficient and are programmable through registers instead of being calculated at run time. This involves a number of steps as follows:

[0143] a) the normalized current value is processed (reference numeral 434) to calculate its reciprocal value (1 / X), which is the normalized resistance (Rbnorm); and

[0144] b) performing an R2A process (reference numeral 436) that solves a second order equation to generate a second digital signal ΔTnorm according to the following function:

[0145] ΔTnorm=α S1 ΔT

[0146] in:

[0147] Here the process is performed by the following intermediate steps: i) calculate Rbnorm-1; ii) sum the result of step i) with C2 and multiply the result by C1; iii) calculate the square root of the result from step ii); iv) multiply the result from step iii) by and v) summing the result of step iv) with -C0.

[0148] It will be noted that h, C0, C1, C2, C3 are pre-calculated coefficients that depend only on the mechanical coefficients, which in turn are technology dependent. The equations for the coefficients are as follows:

[0149]

[0150] Where: α R1 is the first-order temperature coefficient relating the bridge resistance to temperature; α R2 is the second-order temperature coefficient relating the bridge resistance to temperature; α S1 is the first-order temperature coefficient relating sensitivity to temperature; and α S2 is the second-order temperature coefficient relating sensitivity to temperature. R and α S There is no specific relationship between the coefficients.

[0151] Once ΔTnorm = α S1 The ΔT product is calculated, and the R2A process (reference numeral 436) also calculates 1+α S1 ΔT+α S2 ΔT 2 Polynomial equivalents:

[0152]

[0153] The result is passed as signal 438 for processing by a 1 / X function (reference numeral 440) which acts to calculate the reciprocal of the value. The result is the value of the reciprocal of the sensitivity S. It will be noted that the reciprocal of the sensitivity (i.e., 1 / S) rather than the sensitivity (S) itself is necessary for making the sensitivity correction. The reason for this is that the multiplication of the reciprocal of the sensitivity of Vout = S(t)·σ(t)·Vbia will directly give the actuation state of the MEMS:

[0154]

[0155] It will be noted that, as a result, only the time-varying action component σ(t) and the multiplicative constant remain.

[0156] Again, as previously mentioned, DSP 180 implements only fixed-point calculations. Therefore, a fast solution to the above equation will suffer from rounding errors that will make the result wrong or unstable. For this reason, the calculations are handled by defining some intermediate values ​​that depend only on the α coefficients and have been made programmable through registers rather than calculated at run time.

[0157] However, it will be appreciated that a suitable polynomial approximation for mapping the value of the current directly to the output gain and temperature may be used instead. The advantage of this solution is reduced area and computational effort, for a more efficient design.

[0158] Although the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary rather than restrictive; the invention is not limited to the disclosed embodiments. The invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments may be understood and effected by one skilled in the art in practicing the claimed invention from a study of the drawings, the disclosure, and the appended claims.

Claims

1. A circuit comprising: a bridge driver circuit configured to apply a bias voltage across a first input node and a second input node of the resistive bridge circuit; a sensing circuit configured to sense a bridge current flowing through the resistive bridge circuit in response to an applied bias voltage; wherein the sensing circuit senses the bridge current indirectly by sensing a driving current applied to the first input node by the bridge driver circuit, sensing a bias current of the bridge driver circuit, and sensing a common-mode current of the bridge driver circuit, and generating a source current for determining the bridge current according to a sum of the sensed driving current, the sensed bias current, and the sensed common-mode current; a first processing circuit configured to determine a temperature-dependent sensitivity of the resistive bridge circuit based on the source current; as well as A second processing circuit is configured to process the voltage output at the first output node and the second output node of the resistive bridge circuit and apply a temperature correction in response to the determined temperature-dependent sensitivity.

2. The circuit of claim 1, wherein the resistive bridge circuit is configured to sense a physical property, and wherein the second processing circuit processes the voltage output to generate an output signal indicative of the sensed physical property. The circuit of claim 2 , wherein the physical property is pressure. The circuit of claim 2 , wherein the physical property is motion. The circuit of claim 4 , wherein the movement is a deflection angle.

6. The circuit of claim 1 , wherein the sensing circuit comprises a first current mirror circuit, a second current mirror circuit, and a third current mirror circuit, the first current mirror circuit being configured to sense the drive current applied to the first input node, the second current mirror circuit being configured to sense the bias current of the bridge driver circuit, and the third current mirror circuit being configured to sense the common-mode current of the bridge driver circuit.

7. The circuit of claim 1 , wherein the bridge driver circuit applies a first drive current to the first input node of the resistive bridge circuit, applies a first bias current to the first input node of the resistive bridge circuit, and draws a first common-mode current from the first input node of the resistive bridge circuit, and wherein the sensing circuit generates the source current based on sensing of the first drive current, the first bias current, and the first common-mode current. 8 . The circuit of claim 7 , wherein the source current is generated by subtracting the sensed first bias current and the sensed first common-mode current from the sensed first drive current.

9. The circuit of claim 7, wherein the first processing circuit processes the source current to determine the temperature-dependent sensitivity.

10. The circuit of claim 9, wherein processing the source current comprises: determining a normalized bridge current for the resistive bridge circuit based on the source current; determining a normalized resistance of the resistance bridge circuit according to the normalized bridge current; calculating a normalized temperature of the resistance bridge circuit according to the normalized resistance; as well as The temperature-dependent sensitivity is output as a function of the normalized temperature.

11. The circuit of claim 1 , wherein the first processing circuit processes the source current to determine the temperature-dependent sensitivity by: determining a temperature of the resistive bridge circuit based on a relationship between the determined bridge current and the resistance of the resistive bridge circuit; and The temperature-dependent sensitivity is determined as a function of the determined temperature.

12. The circuit of claim 11 , wherein the first processing circuit comprises: a first current digital-to-analog conversion circuit configured to scale the source current by a first factor to perform gain adjustment of the source current; a second current digital-to-analog conversion circuit configured to scale the temperature-independent source current by a second factor to perform an offset adjustment of the source current; as well as The first processing circuit determines the temperature-dependent sensitivity of the resistor bridge circuit based on the gain-adjusted and offset-adjusted source current.

13. The circuit of claim 11, wherein determining the source current comprises subtracting a sensed bias current of the bridge driver circuit from the sensed drive current.

14. The circuit of claim 11, wherein determining the source current comprises subtracting the sensed common-mode current of the bridge driver circuit from the sensed drive current.

15. The circuit of claim 12, wherein the first factor and the second factor are set using a calibration process.

16. The circuit of claim 15, wherein the calibration process determines values ​​of the first factor and the second factor that will produce a voltage signal in response to the source current having a particular dynamic range.

17. The circuit of claim 16, wherein the calibration process comprises: selecting starting values ​​for the first factor and the second factor using the resistive bridge circuit at a first temperature and generating a first value for the voltage signal; changing a value of one of the first factor and the second factor using the resistive bridge circuit at the first temperature and generating a second value of the voltage signal; changing the temperature of the resistive bridge circuit to a first temperature and generating a third value of the voltage signal; processing the first, second, and third values ​​of the voltage signal to determine coefficients relating the voltage signal to temperature changes of the resistive bridge circuit; Values ​​of the first factor and the second factor are selected that will produce the particular dynamic range for the voltage signal.

18. A circuit comprising: a bridge driver circuit configured to apply a bias voltage across a first input node and a second input node of the resistive bridge circuit; wherein the bridge driver circuit applies a first drive current to the first input node of the resistive bridge circuit and applies a second drive current to the second input node of the resistive bridge circuit; a sensing circuit configured to sense the first drive current and the second drive current applied to the resistance bridge circuit; wherein the sensing circuit generates a sensed source current based on the sensing of the first drive current and generates a sensed sink current based on the sensing of the second drive current; A first processing circuit configured to determine a temperature-dependent sensitivity of the resistive bridge circuit based on the sensed source current and sink current, wherein the first processing circuit comprises: an analog-to-digital converter circuit configured to convert the sensed source and sink currents into digital signals; and a digital signal processing circuit configured to process the digital signal to generate the temperature-dependent sensitivity; and A second processing circuit is configured to process the voltage outputs at the first output node and the second output node of the resistive bridge circuit and apply a temperature correction in response to the determined temperature-dependent sensitivity.

19. The circuit of claim 18, wherein the digital signal processing circuit is configured to: determining a bridge current of the resistance bridge circuit according to the digital signal; determining a temperature of the resistive bridge circuit based on a relationship between the determined bridge current and the resistance of the resistive bridge circuit; and The temperature-dependent sensitivity is determined as a function of the determined temperature.

20. The circuit of claim 18, wherein the first processing circuit further comprises: a first current digital-to-analog conversion circuit configured to scale the sensed source current; a second current digital-to-analog conversion circuit configured to scale the sensed draw current; Wherein the scaling of the sensed source current and sink current performs a gain adjustment of the sensed source current and sink current.

21. The circuit of claim 20, wherein the first processing circuit further comprises: a third current digital-to-analog conversion circuit configured to scale a temperature-independent source current, the scaled temperature-independent source current being subtracted from the scaled sensed source current; a fourth current digital-to-analog conversion circuit configured to scale a temperature-independent current draw, the scaled temperature-independent current draw being subtracted from the scaled sensed current draw; Wherein said scaling of said temperature independent source and sink currents performs an offset adjustment of the sensed source and sink currents.

22. The circuit of claim 21, wherein the analog-to-digital converter circuit converts the gain-adjusted and offset-adjusted source and sink currents to generate the digital signal.

23. The circuit of claim 18, wherein the digital signal processing circuit is configured to perform filtering of the digital signal to generate a filtered signal, and to apply a digital signal algorithm to the filtered signal to generate the temperature-dependent sensitivity.

24. The circuit of claim 23, wherein filtering comprises performing fractional averaging of the digital signal.

25. The circuit of claim 23, wherein the digital signal algorithm operates to: generating a normalized bridge current based on the filtered signal; determining a normalized resistance of the resistance bridge circuit according to the normalized bridge current; calculating the normalized temperature of the resistance bridge circuit according to the normalized resistance; as well as The temperature-dependent sensitivity is output as a function of the normalized temperature.

26. The circuit of claim 25, wherein the normalized bridge current is generated as a function of the filtered signal and the bias voltage applied to the resistive bridge circuit.

27. The circuit of claim 25, wherein the normalized resistance is determined as a function of the inverse of the normalized bridge current.

28. The circuit of claim 25, wherein calculating the normalized temperature comprises solving a second order equation relating the normalized bridge current to the normalized resistance.

29. The circuit of claim 25, wherein the output is the normalized temperature (T norm The temperature-dependent sensitivity of the function of ) depends on the following function: where C3 is a constant that depends on the second-order temperature coefficient relating sensitivity to temperature.

30. The circuit of claim 18, further comprising the resistive bridge circuit.

31. The circuit of claim 30, wherein the resistive bridge circuit is a Wheatstone bridge.

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