An ultra-low range dimming LED drive circuit based on PWM and current dual regulation
Through the LED driving circuit based on PWM and current dual adjustment, combined with the constant current driver chip and signal processing circuit, the problems of small dimming range, large color offset and large circuit volume in the prior art are solved, and efficient and concise LEDs are achieved Dimming control, suitable for in-machine dimming lighting fixtures.
Patent Information
- Application Number
- CN202010456308.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-05-26
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2040-05-26
AI Technical Summary
The existing LED dimming driving technology has problems such as small dimming range, large color shift caused by current dimming, large PWM dimming microcontroller circuit size and delayed power on lighting, which is difficult to meet the efficiency and simplicity of dimming and lighting fixtures in the machine. , reliability, wide dimming range, uniformity and small color deviation requirements.
Using ultra-low-range dimming LED driving circuit based on PWM and current dual adjustment, including dimming signal dual processing circuit unit and LED constant current driving circuit unit. Through voltage conversion, signal filtering, dimming curve correction and PWM generation circuit, it outputs Dual adjustable current and PWM signals achieve 1% to 100% adjustment of LED brightness, combined with constant current driver chip and signal threshold amplitude circuit to ensure dimming consistency and efficiency.
A brightness adjustment of a wide dimming range of 1% to 100%, conforms to the visual human-machine function, no significant delay in power-on, full hardware analog circuit, simple circuit structure, suitable for multiple lamps at the same time, good dimming consistency, adaptable Different LED driver current adjustment requirements.
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Figure CN113727494B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to an LED dimming circuit, in particular to an ultra-low range dimming LED driving circuit based on PWM and current dual regulation. Background Art
[0002] At present, LED lamps with dimming functions are widely used in various types of aircraft. There are three commonly used LED dimming driving methods: voltage dimming, current dimming and PWM dimming. Voltage dimming adjusts the brightness by changing the voltage across the LED, but the dimming range is small, and the brightness consistency is poor when dimming multiple lamps; because the current increases after the LED heats up, it affects the reliability of the LED, and is only suitable for lamps with low power and low heat generation. Current dimming adjusts the brightness by changing the driving current of the LED, and can achieve a wide range of brightness adjustment from 1% to 100%. It is suitable for independent lamps with built-in dimming functions, but the large current change will bring about the problem of large color shift. It is not suitable for lamps with high color range requirements. The current deviation is large at ultra-low brightness. When using one dimming signal to control multiple lamps at the same time, the low brightness of each lamp is quite different. PWM dimming adjusts the brightness by controlling the on-off ratio of the LED under constant current. It has high efficiency and dimming accuracy, but only single-chip microcomputers and software can achieve stable 1% to 100% wide range brightness adjustment and uniform dimming human-machine efficiency. The circuit is relatively complex and large in size. It is generally used for large lamps. The power-on delay of the single-chip microcomputer will cause a significant delay in the lighting of the lamp. When multiple lamps are dimmed at the same time, the length of the lines of each lamp is different and the voltage drop is different, which makes the brightness of each lamp slightly different. At ultra-low brightness, the brightness inconsistency perceived by the human eye is more obvious. Summary of the invention
[0003] The purpose of the present invention is to provide an ultra-low range dimming LED driving circuit based on PWM and current dual regulation for in-machine dimming lighting fixtures with high efficiency, simple structure, high reliability, wide dimming range, good dimming consistency, small color deviation, and no power-on delay. It can solve the problems of low voltage dimming efficiency and small dimming range, large current dimming color deviation and poor ultra-low brightness consistency, and large volume of PWM dimming single-chip circuit and obvious delay in power-on lighting.
[0004] In order to achieve this purpose, the technical solution of the present invention is as follows: an ultra-low range dimming LED drive circuit based on PWM and current dual regulation, characterized in that it includes a dimming signal dual processing circuit unit and an LED constant current drive circuit unit, the dimming signal dual processing circuit unit is used to receive a dimming signal from the outside and output a corresponding PWM adjustment signal and a current adjustment signal according to the dimming signal, the LED constant current drive circuit unit is used to receive the PWM adjustment signal and the current adjustment signal from the dimming signal dual processing circuit unit and output a corresponding LED drive signal according to the PWM adjustment signal and the current adjustment signal, if the adjustment range of the PWM adjustment signal is defined as a to 100%, and the adjustment range of the current adjustment signal is defined as b to 100%, then the adjustment range of the LED drive signal is a*b to 100%, wherein a and b are both greater than 0 and less than 1.
[0005] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the dimming signal dual processing circuit unit comprises a voltage conversion and reference circuit subunit, a signal filtering circuit subunit, a dimming curve correction circuit subunit, a PWM generating circuit subunit and a signal threshold amplitude circuit subunit. The voltage conversion and reference circuit subunit is used to receive a power supply voltage from an external source and convert the power supply voltage to provide a working voltage and / or a reference voltage to the signal filtering circuit subunit, the dimming curve correction circuit subunit, the PWM generating circuit subunit and the signal threshold amplitude circuit subunit respectively. The signal filtering circuit subunit is used to The dimming signal is received and converted into a filtered dimming signal. The dimming curve correction circuit subunit is used to receive the filtered dimming signal from the signal filtering circuit subunit and output a corresponding corrected dimming signal according to the filtered dimming signal. The PWM generating circuit subunit is used to receive the corrected dimming signal from the dimming curve correction circuit subunit and output a corresponding PWM adjustment signal according to the corrected dimming signal. The signal threshold amplitude circuit subunit is used to receive the filtered dimming signal from the signal filtering circuit subunit and output a corresponding current adjustment signal according to the filtered dimming signal.
[0006] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the voltage conversion and reference circuit subunit has an input terminal VIN and four output terminals VCC, VF1, VF2, and VF3; wherein the input terminal VIN is respectively connected to one end of the capacitor C1, the input end of the three-terminal voltage regulator U1, and the cathode of the rectifier diode D1; the anode of the rectifier diode D1 is respectively connected to the output end of the three-terminal voltage regulator U1, one end of the resistor R1, one end of the capacitor C3, the cathode of the rectifier diode D2, one end of the resistor R3, and the output terminal VCC; the other end of the resistor R1 is respectively connected to the adjustment terminal of the three-terminal voltage regulator U1. The positive terminal, the positive electrode of the rectifier diode D2, one end of the capacitor C2 and one end of the resistor R2 are connected; the other end of the resistor R3, the positive terminal and the adjustment terminal of the reference source U2, one end of the capacitor C4, one end of the resistor R4 and the resistor R6 are all connected to the output terminal VF3; the other end of the resistor R4 and one end of the resistor R5 are all connected to the output terminal VF1; the other end of the resistor R6 and one end of the resistor R7 are all connected to the output terminal VF2; the other end of the capacitor C1, the other end of the capacitor C2, the other end of the resistor R2, the other end of the capacitor C3, the negative terminal of the reference source U2, the other end of the capacitor C4, the other end of the resistor R5 and the other end of the resistor R7 are all connected to GND.
[0007] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the signal filtering circuit subunit has three input terminals VJI, VCC, and VF1, and one output terminal VJO; wherein the input terminal VJI is respectively connected to one end of the resistor R9, one end of the resistor R10, and one end of the resistor R11; the input terminal VCC is respectively connected to the other end of the resistor R9, the cathode of the rectifier diode D3, the positive power supply terminal of the operational amplifier U3A, and one end of the capacitor C6; the other end of the resistor R11 is respectively connected to the anode of the rectifier diode D3, the cathode of the rectifier diode D4, one end of the capacitor C5, the cathode of the operational amplifier U3A, and the cathode of the operational amplifier U3A. The inverting terminal of the operational amplifier U3A is connected to the output terminal of the operational amplifier U3A and the positive electrode of the Schottky diode D6 respectively; the input terminal VF1 is connected to the inverting terminal of the operational amplifier U3B; the inverting terminal and the output terminal of the operational amplifier U3B are connected to the positive electrode of the Schottky diode D5; the cathode of the Schottky diode D6, the cathode of the Schottky diode D5 and one end of the capacitor C7 are connected to the output terminal VJO, and the other end of the resistor R10, the positive electrode of the rectifier diode D4, the other end of the capacitor C5, the negative power supply terminal of the operational amplifier U3A, the other end of the capacitor C6 and the other end of the capacitor C7 are all connected to GND.
[0008] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the dimming curve correction circuit subunit has three input terminals VJDI, VCC, and VF2, and one output terminal VJDO; wherein the input terminal VJDI is connected to one end of the resistor R12; the other end of the resistor R12 is respectively connected to one end of the resistor R13 and the in-phase terminal of the operational amplifier U4A; the inverting terminal and output terminal of the operational amplifier U4A, the positive terminal and adjustment terminal of the reference source U7 are all connected to one end of the resistor R14; the other end of the resistor R14, the negative end of the reference source U7, and one end of the resistor R15 are all connected to the in-phase terminal of the operational amplifier U5B; the inverting terminal and output terminal of the operational amplifier U5B are all connected to one end of the resistor R17; the other end of the resistor R17 and one end of the resistor R16 are connected to the in-phase terminal of the operational amplifier U5A; the input terminal VF2 is connected to the in-phase terminal of the operational amplifier U4B; the inverting terminal and output terminal of the operational amplifier U4B are all connected to the resistor R1 6; the inverting end of the operational amplifier U5A is respectively connected to one end of the resistor R18 and one end of the resistor R19; the other end of the resistor R19, the output end of the operational amplifier U5, and the non-inverting end of the operational amplifier U6A are connected; the inverting end and the output end of the operational amplifier U6A are both connected to one end of the resistor R20; the other end of the resistor R20 and one end of the resistor R21 are both connected to the output end VJDO; the input end VCC is respectively connected to one end of the capacitor C8, one end of the capacitor C9, one end of the capacitor C10, the positive power supply end of the operational amplifier U4A, the positive power supply end of the operational amplifier U5A and the positive power supply end of the operational amplifier U6A; the other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10, the other end of the resistor R13, the other end of the resistor R15, the other end of the resistor R18, the other end of the resistor R21, the negative power supply end of the operational amplifier U4A, the negative power supply end of the operational amplifier U5A and the negative power supply end of the operational amplifier U6A are connected to GND.
[0009] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the PWM generating circuit subunit has two input terminals MOD and VCC, and one output terminal DM; wherein the input terminal MOD is connected to one end of a capacitor C11 and the MOD terminal of a PWM generator LTC6992S6-1; the V+ terminal of the PWM generator, one end of a resistor R24 and one end of a capacitor C12 are all connected to the input terminal VCC; the OUT terminal of the PWM generator is connected to the output terminal DM; the other end of the resistor R24 and one end of the resistor R23 are both connected to the DIV terminal of the PWM generator; the SET terminal of the PWM generator is connected to one end of a resistor R22; the other end of the resistor R22, the other end of the resistor R23, the GND terminal of the PWM generator, the other end of the capacitor C11 and the other end of the capacitor C12 are all connected to GND.
[0010] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the signal threshold amplitude circuit subunit has three input terminals VJDI, VCC, and VF3, and one output terminal VJTO; wherein the input terminal VF3 is connected to the non-inverting terminal of an operational amplifier U13B; the inverting terminal and the output terminal of the operational amplifier U13B are both connected to one end of a resistor R27; the input terminal VJDI is connected to one end of a resistor R25; the other end of the resistor R25 is respectively connected to one end of a resistor R26 and the non-inverting terminal of the operational amplifier U13A; the inverting terminal and the output terminal of the operational amplifier U13A are both connected to one end of a resistor R28; the other end of the resistor R28 and the other end of the resistor R27 are both connected to the non-inverting terminal of an operational amplifier U14B; the inverting terminal of the operational amplifier U14B is respectively connected to one end of a resistor R29 and one end of a resistor R30; the other end of the resistor R30 and the output terminal of the operational amplifier U14 The output ends of B are all connected to the non-inverting end of the operational amplifier U14A; the inverting end and the output end of the operational amplifier U14A are all connected to one end of the resistor R31; the other end of the resistor R31 and one end of the resistor R32 are all connected to the non-inverting end of the operational amplifier U15A; the inverting end and the output end of the operational amplifier U15A are all connected to the output end VJTO; the input end VCC is respectively connected to one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C15, the positive power supply end of the operational amplifier U13A, the positive power supply end of the operational amplifier U14A, and the positive power supply end of the operational amplifier U15A; the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the resistor R26, the other end of the resistor R29, the other end of the resistor R32, the negative power supply end of the operational amplifier U13, the negative power supply end of the operational amplifier U14, and the negative power supply end of the operational amplifier U15 are all connected to GND.
[0011] As a preferred solution of an ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the LED constant current driving circuit unit has three input terminals VIN, VDM, VIM, and one output terminal Io+ and Io-; wherein the input terminal VIN is respectively connected to one end of the capacitor C16, one end of the detection resistor RS1, the IN terminal of the constant current driving chip U16 (MAX16832C), and the cathode of the Schottky diode D7; the other end of the detection resistor RS1, the CS terminal of the constant current driving chip U16, and one end of the capacitor C18 are connected to the output terminal Io+; the anode of the Schottky diode D7, The Lx1 and Lx2 ends of the constant current driver chip U16 are connected to one end of the power inductor L1; the other end of the power inductor L1 and the other end of the capacitor C18 are connected to the output end Io-; the input end VDM is connected to one end of the resistor R33; the other end of the resistor R33 is connected to one end of the resistor R34 and the DIM end of the constant current driver chip U16; the input end VIM is connected to one end of the capacitor C17 and the TEMP end of the constant current driver chip U16; the other end of the capacitor C16, the other end of the capacitor C17, the other end of the resistor R34 and the PGND and GND ends of the constant current driver chip U16 are all connected to GND.
[0012] Compared with the prior art, the beneficial effects of the present invention are at least: the achievable dimming range is as wide as 1% to 100%, which meets the visual human-machine efficacy, there is no obvious delay when the power is turned on, the full hardware analog circuit, and the circuit structure is simple. The circuit includes a dual-processing circuit for optical signals and a constant-current driving circuit for LEDs. With the LED constant-current driving chip as the core device, a dual-processing circuit for dimming signals is used to convert a single-channel dimming signal into a dual-channel adjustable current regulation signal and a PWM regulation signal, and the amplitude and duty cycle of the driving current are changed at the same time to adjust the brightness of the LED. The dual-processing circuit for signals includes a dimming curve correction circuit, and the dimming effect meets the visual human-machine efficacy; it includes a signal filtering circuit to filter out the voltage range in which the dimming signal is susceptible to interference and line voltage drop, and the dimming consistency is good. The circuit of this patent is flexible to adjust, and the circuit parameters can be appropriately changed to meet the different adjustment ranges of the LED driving current. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a block diagram of the working principle of the present invention.
[0014] Figure 2 It is a circuit structure diagram of the dimming signal dual processing circuit unit of the present invention.
[0015] Figure 3 It is a circuit structure diagram of the voltage conversion and reference circuit subunit of the present invention.
[0016] Figure 4 It is a circuit structure diagram of the signal filtering circuit subunit of the present invention.
[0017] Figure 5 This is a circuit structure diagram of the dimming curve correction circuit subunit of the present invention.
[0018] Figure 6 It is a circuit structure diagram of the PWM generating circuit subunit of the present invention.
[0019] Figure 7 It is a circuit structure diagram of the signal threshold amplitude circuit subunit of the present invention.
[0020] Figure 8 It is a circuit structure diagram of the LED constant current driving circuit unit of the present invention. DETAILED DESCRIPTION
[0021] The present invention is further described in detail below by means of specific embodiments connected with the accompanying drawings. It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0022] See also Figures 1 to 8 , shown in the figure is an ultra-low range dimming LED drive circuit based on PWM and current dual regulation. It includes a dimming signal dual processing circuit unit and an LED constant current drive circuit unit. The dimming signal dual processing circuit unit is used to receive a dimming signal (0VDC~15VDC) from the outside and output a corresponding PWM adjustment signal and a current adjustment signal according to the dimming signal. The LED constant current drive circuit unit is used to receive the PWM adjustment signal and the current adjustment signal from the dimming signal dual processing circuit unit and output a corresponding LED drive signal according to the PWM adjustment signal and the current adjustment signal. After the dimming signal is converted by the dimming signal dual processing circuit unit, the PWM adjustment signal and the current adjustment signal are provided at the same time and given to the LED constant current drive circuit unit to adjust the current amplitude output range and duty cycle range of the constant current source output.
[0023] See also Figure 2The dimming signal dual processing circuit unit comprises a voltage conversion and reference circuit subunit, a signal filtering circuit subunit, a dimming curve correction circuit subunit, a PWM generation circuit subunit and a signal threshold amplitude circuit subunit. The voltage conversion and reference circuit subunit is used to receive a power supply voltage from an external source and convert the power supply voltage to provide a working voltage and / or a reference voltage to the signal filtering circuit subunit, the dimming curve correction circuit subunit, the PWM generation circuit subunit and the signal threshold amplitude circuit subunit respectively. The signal filtering circuit subunit is used to receive the dimming signal and convert the dimming signal The dimming curve correction circuit subunit is used to receive the filtered dimming signal from the signal filtering circuit subunit and output a corresponding corrected dimming signal according to the filtered dimming signal. The PWM generating circuit subunit is used to receive the corrected dimming signal from the dimming curve correction circuit subunit and output a corresponding PWM regulating signal according to the corrected dimming signal. The signal threshold amplitude circuit subunit is used to receive the filtered dimming signal from the signal filtering circuit subunit and output a corresponding current regulating signal according to the filtered dimming signal.
[0024] See also Figure 3, the voltage conversion and reference circuit subunit has an input terminal VIN and four output terminals VCC, VF1, VF2, and VF3. Among them, the input terminal VIN is respectively connected to one end of the capacitor C1, the input terminal of the three-terminal voltage regulator U1, and the negative electrode of the rectifier diode D1, and the positive electrode of the rectifier diode D1 is respectively connected to the output terminal of the three-terminal voltage regulator U1, one end of the resistor R1, one end of the capacitor C3, the negative electrode of the rectifier diode D2, one end of the resistor R3, and the output terminal VCC. The other end of the resistor R1 is respectively connected to the adjustment terminal of the three-terminal voltage regulator U1, the positive electrode of the rectifier diode D2, one end of the capacitor C2, and one end of the resistor R2. The other end of the resistor R3, the positive end and the adjustment end of the reference source U2, one end of the capacitor C4, one end of the resistor R4, and the resistor R6 are all connected to the output terminal VF3. The other end of the resistor R4 and one end of the resistor R5 are all connected to the output terminal VF1. The other end of the resistor R6 and one end of the resistor R7 are all connected to the output terminal VF2. The other end of capacitor C1, the other end of capacitor C2, the other end of resistor R2, the other end of capacitor C3, the negative end of reference source U2, the other end of capacitor C4, the other end of resistor R5 and the other end of resistor R7 are all connected to GND. The voltage conversion and reference circuit subunit uses a three-terminal regulator to provide a stable operating voltage, and the VCC voltage value can be set by R1 and R2. The reference circuit uses a high-precision reference source to provide a reference voltage VF3 (2.5VDC), and then obtains a reference voltage VF1 (1VDC) through a voltage divider of resistors R4 and R5, and obtains a reference voltage VF2 (0.3VDC) through a voltage divider of resistors R6 and R7.
[0025] See also Figure 4, the signal filter circuit subunit has three input terminals VJI, VCC, VF1, and one output terminal VJO. Among them, the input terminal VJI is respectively connected to one end of the resistor R9, one end of the resistor R10 and one end of the resistor R11. The input terminal VCC is respectively connected to the other end of the resistor R9, the negative electrode of the rectifier diode D3, the positive power supply terminal of the operational amplifier U3A and one end of the capacitor C6. The other end of the resistor R11 is respectively connected to the positive electrode of the rectifier diode D3, the negative electrode of the rectifier diode D4, one end of the capacitor C5, and the non-inverting end of the operational amplifier U3A. The inverting end of the operational amplifier U3A is respectively connected to the output end of the operational amplifier U3A and the positive electrode of the Schottky diode D6. The input terminal VF1 is connected to the non-inverting end of the operational amplifier U3B. The inverting end and the output end of the operational amplifier U3B are connected to the positive electrode of the Schottky diode D5. The cathode of Schottky diode D6, the cathode of Schottky diode D5 and one end of capacitor C7 are connected to the output terminal VJO, and the other end of resistor R10, the anode of rectifier diode D4, the other end of capacitor C5, the negative power supply terminal of operational amplifier U3A, the other end of capacitor C6 and the other end of capacitor C7 are all connected to GND. The signal filtering circuit subunit converts the input dimming signal 0VDC to 15VDC voltage range into 0.7VDC to 14.7VDC voltage range. In order to ensure the stability and consistency of the lamp at ultra-low brightness, the low voltage segment of the dimming signal 0VDC to 0.7VDC is filtered out. The circuit filters out the low voltage segment of the dimming signal through an integrated operational amplifier, a reference voltage of 1VDC and a Schottky diode.
[0026] See also Figure 5, the dimming curve correction circuit subunit has three input terminals VJDI, VCC, VF2, and one output terminal VJDO. Among them, the input terminal VJDI is connected to one end of the resistor R12. The other end of the resistor R12 is respectively connected to one end of the resistor R13 and the non-inverting end of the operational amplifier U4A. The inverting end and output end of the operational amplifier U4A, the positive end and adjustment end of the reference source U7 are all connected to one end of the resistor R14. The other end of the resistor R14, the negative end of the reference source U7, and one end of the resistor R15 are all connected to the non-inverting end of the operational amplifier U5B. The inverting end and output end of the operational amplifier U5B are all connected to one end of the resistor R17. The other end of the resistor R17 and one end of the resistor R16 are connected to the non-inverting end of the operational amplifier U5A. The input terminal VF2 is connected to the non-inverting end of the operational amplifier U4B. The inverting end and output end of the operational amplifier U4B are all connected to the other end of the resistor R16. The inverting end of the operational amplifier U5A is connected to one end of the resistor R18 and one end of the resistor R19 respectively. The other end of the resistor R19, the output end of the operational amplifier U5, and the inverting end of the operational amplifier U6A are connected. The inverting end and the output end of the operational amplifier U6A are both connected to one end of the resistor R20. The other end of the resistor R20 and one end of the resistor R21 are both connected to the output end VJDO. The input end VCC is respectively connected to one end of the capacitor C8, one end of the capacitor C9, one end of the capacitor C10, the positive power supply end of the operational amplifier U4A, the positive power supply end of the operational amplifier U5A, and the positive power supply end of the operational amplifier U6A. The other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10, the other end of the resistor R13, the other end of the resistor R15, the other end of the resistor R18, the other end of the resistor R21, the negative power supply end of the operational amplifier U4A, the negative power supply end of the operational amplifier U5A, and the negative power supply end of the operational amplifier U6A are connected to GND. The dimming curve correction circuit subunit converts the input dimming signal 0.7VDC to 14.7VDC voltage range into 0.12 VDC to 0.9VDC voltage range. The dimming curve correction circuit subunit performs curve correction on the adjustable voltage signal. A high-precision reference source (2.5V, LT431) and an operational amplifier are used for curve correction. The corrected dimming curve is close to the human eye's photosensitivity curve, and the dimming effect basically meets the requirements of the lighting fixture's human-machine efficacy. The required voltage range is then obtained through voltage division by resistors R20 and R21, which matches the adjustment voltage range required by the PWM generation circuit subunit.
[0027] See also Figure 6, the PWM generating circuit subunit has two input terminals MOD and VCC, and one output terminal DM. Among them, the input terminal MOD is connected to one end of the capacitor C11 and the MOD end of the PWM generator LTC6992S6-1. The V+ end of the PWM generator, one end of the resistor R24 and one end of the capacitor C12 are all connected to the input terminal VCC. The OUT end of the PWM generator is connected to the output terminal DM. The other end of the resistor R24 and one end of the resistor R23 are all connected to the DIV end of the PWM generator. The SET end of the PWM generator is connected to one end of the resistor R22. The other end of the resistor R22, the other end of the resistor R23, the GND end of the PWM generator, the other end of the capacitor C11 and the other end of the capacitor C12 are all connected to GND. The PWM generating circuit subunit mainly uses the PWM control chip (LTC6992HS6-1) as the core circuit to convert the dimming voltage signal into a corresponding duty cycle signal. The operating frequency of the PWM control signal is set by resistors R22, R23 and R24. When the dimming voltage signal changes from 0.12V to 0.9VDC, the duty cycle of the PWM control signal changes from 2.5% to 100%.
[0028] See also Figure 7, the signal threshold amplitude circuit subunit has three input terminals VJDI, VCC, VF3, and one output terminal VJTO. Among them, the input terminal VF3 is connected to the non-inverting terminal of the operational amplifier U13B. The inverting terminal and the output terminal of the operational amplifier U13B are both connected to one end of the resistor R27. The input terminal VJDI is connected to one end of the resistor R25. The other end of the resistor R25 is respectively connected to one end of the resistor R26 and the non-inverting terminal of the operational amplifier U13A. The inverting terminal and the output terminal of the operational amplifier U13A are both connected to one end of the resistor R28. The other end of the resistor R28 and the other end of the resistor R27 are both connected to the non-inverting terminal of the operational amplifier U14B. The inverting terminal of the operational amplifier U14B is respectively connected to one end of the resistor R29 and one end of the resistor R30. The other end of the resistor R30 and the output terminal of the operational amplifier U14B are both connected to the non-inverting terminal of the operational amplifier U14A. The inverting terminal and output terminal of the operational amplifier U14A are both connected to one end of the resistor R31. The other end of the resistor R31 and one end of the resistor R32 are both connected to the non-inverting terminal of the operational amplifier U15A. The inverting terminal and output terminal of the operational amplifier U15A are both connected to the output terminal VJTO. The input terminal VCC is respectively connected to one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C15, the positive power supply terminal of the operational amplifier U13A, the positive power supply terminal of the operational amplifier U14A, and the positive power supply terminal of the operational amplifier U15A. The other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the resistor R26, the other end of the resistor R29, the other end of the resistor R32, the negative power supply terminal of the operational amplifier U13, the negative power supply terminal of the operational amplifier U14, and the negative power supply terminal of the operational amplifier U15 are all connected to GND. The signal threshold amplitude circuit subunit converts the input dimming signal 0.7VDC to 14.7VDC voltage range into a voltage range with adjustable amplitude at both ends. A high-precision op amp, reference voltage (2.5VDC) and resistors are used to form a summing circuit to adjust the dimming analog voltage signal to a voltage range of 1.2VDC to 2VDC. The voltage amplitude of the dimming analog voltage signal can be adjusted by voltage division by resistors R25 and R26.
[0029] See also Figure 8, the LED constant current drive circuit unit has three input terminals VIN, VDM, VIM, and one output terminal Io+ and Io-. Among them, the input terminal VIN is respectively connected to one end of the capacitor C16, one end of the detection resistor RS1, the IN terminal of the constant current drive chip U16 (MAX16832C), and the negative electrode of the Schottky diode D7. The other end of the detection resistor RS1, the CS terminal of the constant current drive chip U16, and one end of the capacitor C18 are connected to the output terminal Io+. The positive electrode of the Schottky diode D7, the Lx1 terminal and the Lx2 terminal of the constant current drive chip U16 are connected to one end of the power inductor L1. The other end of the power inductor L1 and the other end of the capacitor C18 are connected to the output terminal Io-. The input terminal VDM is connected to one end of the resistor R33. The other end of the resistor R33 is connected to one end of the resistor R34 and the DIM terminal of the constant current drive chip U16. The input terminal VIM is connected to one end of the capacitor C17 and the TEMP terminal of the constant current drive chip U16. The other end of capacitor C16, the other end of capacitor C17, the other end of resistor R34, and the PGND end and GND end of constant current driver chip U16 are all connected to GND. The LED constant current driver circuit unit mainly uses the constant current source chip (MAX16832C) as the core circuit, and sets the maximum output current through resistor RS1. When the dimming analog voltage signal changes from 1.2VDC to 2VDC, the output current changes from 40% to 100% of the maximum output current. When the duty cycle dimming signal changes from 2.5% to 100%, the output current duty cycle changes from 2.5% to 100%. Therefore, the average output current of the constant current driver circuit changes from 1% to 100%, thereby achieving the adjustment of the brightness of the LED light source from 1% to 100%.
[0030] The above only expresses the implementation mode of the present invention, and its description is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.
Claims
1. An ultra-low range dimming LED drive circuit based on PWM and current dual regulation, characterized in that: The invention comprises a dimming signal dual processing circuit unit and an LED constant current driving circuit unit, wherein the dimming signal dual processing circuit unit is used to receive a dimming signal from an outside and output a corresponding PWM adjustment signal and a current adjustment signal according to the dimming signal, and the LED constant current driving circuit unit is used to receive the PWM adjustment signal and the current adjustment signal from the dimming signal dual processing circuit unit and output a corresponding LED driving signal according to the PWM adjustment signal and the current adjustment signal. If the adjustment range of the PWM adjustment signal is defined as a to 100%, and the adjustment range of the current adjustment signal is defined as b to 100%, then the adjustment range of the LED driving signal is a*b to 100%, wherein , a, b are both greater than 0 and less than 1; the dimming signal dual processing circuit unit comprises a voltage conversion and reference circuit subunit, a signal filtering circuit subunit, a dimming curve correction circuit subunit, a PWM generating circuit subunit and a signal threshold amplitude circuit subunit, the voltage conversion and reference circuit subunit is used to receive a power supply voltage from an external source and convert the power supply voltage to provide a working voltage and / or a reference voltage to the signal filtering circuit subunit, the dimming curve correction circuit subunit, the PWM generating circuit subunit and the signal threshold amplitude circuit subunit respectively, the signal filtering circuit subunit is used to receive the dimming signal and convert the dimming signal into a filtered dimming signal, the dimming curve correction ... The subunit is used to receive the filtered dimming signal from the signal filtering circuit subunit and output the corresponding corrected dimming signal according to the filtered dimming signal, the PWM generating circuit subunit is used to receive the corrected dimming signal from the dimming curve correction circuit subunit and output the corresponding PWM regulating signal according to the corrected dimming signal, and the signal threshold amplitude circuit subunit is used to receive the filtered dimming signal from the signal filtering circuit subunit and output the corresponding current regulating signal according to the filtered dimming signal; the signal threshold amplitude circuit subunit has three input terminals VJDI, VCC, VF3 and one output terminal VJTO; wherein the input terminal VF3 is connected to Connected to the non-inverting terminal of the operational amplifier U13B; the inverting terminal and the output terminal of the operational amplifier U13B are connected to one end of the resistor R27; the input terminal VJDI is connected to one end of the resistor R25; the other end of the resistor R25 is respectively connected to one end of the resistor R26 and the non-inverting terminal of the operational amplifier U13A; the inverting terminal and the output terminal of the operational amplifier U13A are both connected to one end of the resistor R28; the other end of the resistor R28 and the other end of the resistor R27 are both connected to the non-inverting terminal of the operational amplifier U14B; the inverting terminal of the operational amplifier U14B is respectively connected to one end of the resistor R29 and one end of the resistor R30; the other end of the resistor R30 and the output terminal of the operational amplifier U14B are both connected to the non-inverting terminal of the operational amplifier U14A;The inverting terminal and output terminal of the operational amplifier U14A are connected to one end of the resistor R31; the other end of the resistor R31 and one end of the resistor R32 are connected to the non-inverting terminal of the operational amplifier U15A; the inverting terminal and output terminal of the operational amplifier U15A are connected to the output terminal VJTO; the input terminal VCC is respectively connected to one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C15, the positive power supply terminal of the operational amplifier U13A, the positive power supply terminal of the operational amplifier U14A, and the positive power supply terminal of the operational amplifier U15A; the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the resistor R26, the other end of the resistor R29, the other end of the resistor R32, the negative power supply terminal of the operational amplifier U13, the negative power supply terminal of the operational amplifier U14, and the negative power supply terminal of the operational amplifier U15 are all connected to GND. ; 2. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation according to claim 1, characterized in that: The voltage conversion and reference circuit subunit has an input terminal VIN and four output terminals VCC, VF1, VF2, and VF3; wherein the input terminal VIN is respectively connected to one end of the capacitor C1, the input end of the three-terminal voltage regulator U1, and the negative electrode of the rectifier diode D1; the positive electrode of the rectifier diode D1 is respectively connected to the output end of the three-terminal voltage regulator U1, one end of the resistor R1, one end of the capacitor C3, the negative electrode of the rectifier diode D2, one end of the resistor R3, and the output terminal VCC; the other end of the resistor R1 is respectively connected to the adjustment end of the three-terminal voltage regulator U1, the positive electrode of the rectifier diode D2, the positive electrode of the capacitor C2, and the negative electrode of the rectifier diode D2. One end of the resistor R3 is connected to the positive end and the adjustment end of the reference source U2, one end of the capacitor C4, one end of the resistor R4, and the resistor R6 are all connected to the output terminal VF3; the other end of the resistor R4 and one end of the resistor R5 are all connected to the output terminal VF1; the other end of the resistor R6 and one end of the resistor R7 are all connected to the output terminal VF2; the other end of the capacitor C1, the other end of the capacitor C2, the other end of the resistor R2, the other end of the capacitor C3, the negative end of the reference source U2, the other end of the capacitor C4, the other end of the resistor R5 and the other end of the resistor R7 are all connected to GND.
3. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation according to claim 1, characterized in that: The signal filtering circuit subunit has three input terminals VJI, VCC, and VF1, and one output terminal VJO; wherein the input terminal VJI is respectively connected to one end of the resistor R9, one end of the resistor R10, and one end of the resistor R11; the input terminal VCC is respectively connected to the other end of the resistor R9, the cathode of the rectifier diode D3, the positive power supply terminal of the operational amplifier U3A, and one end of the capacitor C6; the other end of the resistor R11 is respectively connected to the anode of the rectifier diode D3, the cathode of the rectifier diode D4, one end of the capacitor C5, and the in-phase terminal of the operational amplifier U3A; the operational amplifier U3A The inverting end of is respectively connected to the output end of the operational amplifier U3A and the anode of the Schottky diode D6; the input end VF1 is connected to the non-inverting end of the operational amplifier U3B; the inverting end and the output end of the operational amplifier U3B are connected to the anode of the Schottky diode D5; the cathode of the Schottky diode D6, the cathode of the Schottky diode D5 and one end of the capacitor C7 are connected to the output end VJO, and the other end of the resistor R10, the anode of the rectifier diode D4, the other end of the capacitor C5, the negative power supply end of the operational amplifier U3A, the other end of the capacitor C6 and the other end of the capacitor C7 are all connected to GND.
4. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation according to claim 1, characterized in that: The dimming curve correction circuit subunit has three input terminals VJDI, VCC, and VF2, and one output terminal VJDO; wherein the input terminal VJDI is connected to one end of the resistor R12; the other end of the resistor R12 is respectively connected to one end of the resistor R13 and the in-phase terminal of the operational amplifier U4A; the inverting terminal and the output terminal of the operational amplifier U4A, the positive terminal and the adjustment terminal of the reference source U7 are all connected to one end of the resistor R14; the other end of the resistor R14, the negative end of the reference source U7, and one end of the resistor R15 are all connected to the in-phase terminal of the operational amplifier U5B; the inverting terminal and the output terminal of the operational amplifier U5B are all connected to one end of the resistor R17; the other end of the resistor R17 and one end of the resistor R16 are connected to the in-phase terminal of the operational amplifier U5A; the input terminal VF2 is connected to the in-phase terminal of the operational amplifier U4B; the inverting terminal and the output terminal of the operational amplifier U4B are all connected to the other end of the resistor R16; the inverting terminal of the operational amplifier U5A The ends are respectively connected to one end of resistor R18 and one end of resistor R19; the other end of resistor R19, the output end of operational amplifier U5, and the in-phase end of operational amplifier U6A are connected; the inverting end and the output end of operational amplifier U6A are both connected to one end of resistor R20; the other end of resistor R20 and one end of resistor R21 are both connected to output end VJDO; the input end VCC is respectively connected to one end of capacitor C8, one end of capacitor C9, one end of capacitor C10, the positive power supply end of operational amplifier U4A, the positive power supply end of operational amplifier U5A, and the positive power supply end of operational amplifier U6A; the other end of capacitor C8, the other end of capacitor C9, the other end of capacitor C10, the other end of resistor R13, the other end of resistor R15, the other end of resistor R18, the other end of resistor R21, the negative power supply end of operational amplifier U4A, the negative power supply end of operational amplifier U5A, and the negative power supply end of operational amplifier U6A are connected to GND.
5. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation according to claim 1, characterized in that: The PWM generating circuit subunit has two input terminals MOD and VCC, and one output terminal DM; wherein the input terminal MOD is connected to one end of the capacitor C11 and the MOD terminal of the PWM generator LTC6992S6-1; the V+ terminal of the PWM generator, one end of the resistor R24 and one end of the capacitor C12 are all connected to the input terminal VCC; the OUT terminal of the PWM generator is connected to the output terminal DM; the other end of the resistor R24 and one end of the resistor R23 are both connected to the DIV terminal of the PWM generator; the SET terminal of the PWM generator is connected to one end of the resistor R22; the other end of the resistor R22, the other end of the resistor R23, the GND terminal of the PWM generator, the other end of the capacitor C11 and the other end of the capacitor C12 are all connected to GND.
6. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation according to claim 1, characterized in that: The LED constant current driving circuit unit has three input terminals VIN, VDM, VIM, and one output terminal Io+ and Io-; wherein the input terminal VIN is respectively connected to one end of the capacitor C16, one end of the detection resistor RS1, and the constant current driving chip U16. The IN terminal of MAX16832C and the negative electrode of Schottky diode D7 are connected; the other end of the detection resistor RS1, the CS terminal of the constant current driver chip U16 and one end of the capacitor C18 are connected to the output terminal Io+; the positive electrode of Schottky diode D7, the Lx1 terminal and Lx2 terminal of the constant current driver chip U16 are connected to one end of the power inductor L1; the other end of the power inductor L1 and the other end of the capacitor C18 are connected to the output terminal Io-; the input terminal VDM is connected to one end of the resistor R33; the other end of the resistor R33 is connected to one end of the resistor R34 and the DIM terminal of the constant current driver chip U16; the input terminal VIM is connected to one end of the capacitor C17 and the TEMP terminal of the constant current driver chip U16; the other end of the capacitor C16, the other end of the capacitor C17, the other end of the resistor R34 and the PGND terminal and GND terminal of the constant current driver chip U16 are all connected to GND.
Citation Information
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