Optimize process sequences for product unit manufacturing

By obtaining the characteristics of previous and subsequent processes in the lithography process sequence, determining the predicted performance parameters, and performing process sequence optimization and correction, the problems of deposition thickness changes and etching fingerprints in the lithography process are solved, and process accuracy and yield are improved.

CN113741155BActive Publication Date: 2025-03-14ASML NETHERLANDS BV
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Patent Information

Application Number
CN202111042020.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2017-04-28
Filing Date
2018-03-28
Publication Date
2025-03-14
Estimated Expiration
2038-03-28

AI Technical Summary

Technical Problem

Modern lithography processes are complex, which leads to the difficulty of traceability and correction of etching fingerprints on critical dimensions after etching, affecting yield and product quality.

Method used

By obtaining the characteristics of previous and subsequent processes in the process sequence, predicted performance parameters of product units associated with these processes are determined and optimized correction of the process sequence is performed based on these parameters.

Benefits of technology

It improves the accuracy and output of the lithography process, reduces the adverse impact of fingerprints, and achieves higher production efficiency and product quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure relates to optimizing a process sequence for manufacturing a product unit. A method for optimizing a process sequence for manufacturing a product unit includes: associating (406) measurements of performance parameters (fingerprints) with recorded process characteristics (context); acquiring (408) characteristics (context) of a previous process (e.g., deposition) that has been performed on the product unit in the sequence; acquiring (410) characteristics (context) of a subsequent process (exposure) to be performed on the product unit in the sequence; determining (412) predicted performance parameters (fingerprints) of the product unit associated with the sequence of previous and subsequent processes by using the acquired characteristics to retrieve measurements of performance parameters (fingerprints) corresponding to the recorded characteristics; and determining (414, 416) corrections to be applied (418) to future processes (e.g., exposure, etching) to be performed on the product unit in the sequence based on the determined predicted performance parameters.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is a divisional application of the invention patent application with international application number PCT / US2018 / 057961, international application date March 28, 2018, date of entry into the Chinese national phase October 25, 2019, Chinese national application number 201880027429.6, and invention name “Optimizing process sequence for product unit manufacturing”.

[0003] This application claims priority to EP / US application 17168734.6 filed on April 28, 2017, the entire contents of which are incorporated herein by reference. Technical Field

[0004] The present invention relates to a method for optimizing a process sequence for the manufacture of a product unit, which method can be used, for example, for the manufacture of semiconductor device wafers by photolithography. The present invention also relates to an associated computer program and computer program product and apparatus. Background Art

[0005] A lithographic apparatus is a machine that applies a desired pattern to a substrate (usually to a target portion of a substrate). A lithographic apparatus can be used, for example, in the manufacture of an integrated circuit (IC). In this case, a patterning device (which is alternatively referred to as a mask or reticle) can be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred to a target portion (e.g., a portion including one or more dies) on a substrate (e.g., a silicon wafer). The transfer of the pattern is usually performed via imaging onto a layer of radiation-sensitive material (resist) disposed on the substrate. Typically, a single substrate will contain a network of adjacent target portions that are continuously patterned. These target portions are typically referred to as "fields." Wafers are batched or processed in batches by various devices in a semiconductor manufacturing facility (fab). Integrated circuits are built layer by layer by the lithography steps performed by the lithography apparatus at each layer, and other manufacturing processes are performed between the lithography steps.

[0006] Prior to the imaging step, various chemical and / or physical processing steps are used to form and prepare the layers for patterning. After the imaging step defines the pattern, further chemical and / or physical processing steps work through the pattern to create the functional features of the integrated circuit. The imaging and processing steps are repeated in a multi-layer process to build the integrated circuit.

[0007] The accurate placement of patterns on substrates is a major challenge in reducing the size of circuit components and other products that can be produced by lithography. In particular, the challenge of accurately measuring features on already laid-down substrates is a critical step in enabling successive layers of features to be aligned accurately enough to produce working devices at high throughput rates. Typically, in today's submicron semiconductor devices, the so-called overlay should be within tens of nanometers, and down to a few nanometers in the most critical layers.

[0008] Modern lithography equipment therefore involves extensive measurement or "mapping" operations prior to the step of actually exposing or otherwise patterning the substrate at target locations. So-called advanced alignment models have been and continue to be developed to more accurately model and correct for non-linear distortions of the wafer "grid" caused by processing steps and / or the lithography equipment itself. However, not all distortions are correctable during exposure, and therefore it remains important to track down and eliminate the causes of such distortions.

[0009] Modern multi-layer lithography processes and products are so complex that problems caused by processing are difficult to trace back to their root causes. Therefore, monitoring wafer integrity and designing appropriate correction strategies is a time-consuming and laborious task.

[0010] International patent application WO 2015049087, which is incorporated herein by reference in its entirety, discloses a method for obtaining diagnostic information related to an industrial process. Alignment data or other measurements are performed at various stages during the execution of a lithography process to obtain object data representing positional deviations or other parameters measured at points distributed across the space of each wafer. Overlay and alignment residuals typically show a pattern across the entire wafer, called a fingerprint. The object data is used to obtain diagnostic information by performing multivariate analysis to decompose a set of vectors representing a wafer in a multidimensional space into one or more component vectors. Diagnostic information about the industrial process is extracted using the component vectors. The performance of the industrial process for subsequent wafers can be controlled based on the extracted diagnostic information.

[0011] In semiconductor manufacturing, the critical dimension (CD) performance parameter fingerprint can be corrected using a simple control loop. Typically, a feedback mechanism uses a scanner (a type of lithography equipment) as an actuator to control the average dose per wafer. Similarly, for the overlay performance parameter overlay, the fingerprint caused by the process tool can be corrected by adjusting the scanner actuator.

[0012] However, the disadvantage of this approach is that the granularity of the correction is still limited. Every wafer in the batch gets the same correction, i.e., batch-level correction. Also, only the most appropriate of the available actuators (e.g., scanner or etcher) is used to correct the interfering fingerprint.

[0013] Wafer-to-wafer variations are large, and optimization of the entire lithography process (CMP / deposition / coating / exposure / development / etch / deposition / ...etc.) is not optimal given the available sensor and metrology data and the degrees of freedom of the actuators to make corrections. Summary of the invention

[0014] The inventors have devised a method to optimize the process sequence. For example, it can be used in the manufacture of devices by photolithography to reduce the adverse effects of fingerprints, such as deposition thickness variations and etch fingerprints on the CD after etching, thereby improving yields while avoiding or at least mitigating one or more of the above-mentioned related problems.

[0015] In a first aspect, the present invention provides a method for optimizing a process sequence for manufacturing a product unit, the method comprising:

[0016] (a) obtaining characteristics of previous processes that have been performed on the product unit in the sequence;

[0017] (b) obtaining characteristics of subsequent processes to be performed on the product unit in the sequence;

[0018] (c) using the acquired characteristics to determine predicted performance parameters of a product unit associated with a sequence of preceding and succeeding processes; and

[0019] (d) determining a first correction to a first future process to be performed on the product unit in the sequence based on the determined predicted performance parameter.

[0020] The step (c) of determining the predicted performance parameter may comprise the following steps:

[0021] (c1) obtaining recorded characteristics of a process performed on a plurality of product units in a sequence;

[0022] (c2) obtaining a measurement result of a performance parameter for each of the plurality of product units;

[0023] (c3) associating the measurements of the performance parameters with the corresponding recorded characteristics; and

[0024] (c4) determining a predicted performance parameter of a product unit associated with the sequence of the preceding process and the succeeding process by using the acquired characteristics to retrieve a measurement result of a performance parameter corresponding to the recorded characteristics.

[0025] In a second aspect, the present invention provides a computer program comprising computer readable instructions which, when executed on a suitable computer device, cause said computer device to perform the method of the first aspect.

[0026] The invention of the third aspect provides a computer program product, which includes the computer program of the second aspect.

[0027] In a fourth aspect, the present invention provides an apparatus particularly adapted to perform the steps of the method of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which:

[0029] Figure 1 Lithographic equipment is depicted, along with other tools that form a production facility for semiconductor devices.

[0030] Figure 2 A high level flow diagram of measurements of performance parameters associated with recorded characteristics of a process sequence in accordance with an embodiment of the present invention is depicted.

[0031] Figure 3 Describes the method for determining the Figure 2 A high level flow chart of the correction of two processes in a sequence and applying the correction.

[0032] Figure 4 is a flow chart of a method according to an embodiment of the present invention.

[0033] Figure 5 A computing device is shown that may be used to implement the methods disclosed herein. DETAILED DESCRIPTION

[0034] Before describing embodiments of the present invention in detail, it is helpful to present an example environment in which embodiments of the present invention may be implemented.

[0035] Figure 1 At 100, a lithographic apparatus LA is shown as part of an industrial facility implementing a high-volume lithographic manufacturing process. In this example, the manufacturing process is suitable for manufacturing semiconductor products (integrated circuits) on substrates such as semiconductor wafers. The skilled person will appreciate that in variations of the process, a wide variety of products can be manufactured by processing different types of substrates. Taking the production of semiconductor products purely as an example, this is of great commercial significance today.

[0036] In a lithographic apparatus (or simply "lithography tool" 100), a measurement station MEA is shown at 102, and an exposure station EXP is shown at 104. A control unit LACU is shown at 106. In this example, each substrate visits a measurement station and an exposure station to apply a pattern. For example, in an optical lithographic apparatus, a projection system is used to transfer a product pattern from a patterning device MA to a substrate using conditioned radiation and a projection system. This is done by forming an image of the pattern in a layer of radiation-sensitive resist material.

[0037] The term "projection system" as used herein should be broadly interpreted to cover any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, to suit the exposure radiation used or other factors (such as the use of immersion liquid or the use of vacuum). The patterned MA device can be a mask or reticle that imparts a pattern to a radiation beam transmitted or reflected by the patterning device. Well-known operating modes include stepping mode and scanning mode. As is well known, the projection system can be coordinated with the support and positioning system for the substrate and the patterning device in a variety of ways to apply the desired pattern to many target portions on the entire substrate. A programmable patterning device can be used instead of a mask with a fixed pattern. The radiation can, for example, include electromagnetic radiation in the deep ultraviolet (DUV) or extreme ultraviolet (EUV) bands. The present disclosure is also applicable to other types of lithography processes, such as imprint lithography and direct write lithography, such as by electron beam.

[0038] The lithographic apparatus control unit LACU controls all movements and measurements of the various actuators and sensors, causing the apparatus to receive the substrate W and the mask MA and to implement the patterning operation. The LACU also includes signal processing and computing capabilities to implement the desired calculations related to the operation of the apparatus. In practice, the control unit LACU will be implemented as a system consisting of many subunits, each of which handles real-time data acquisition, processing and control of a subsystem or component in the apparatus.

[0039] Before the pattern is applied to the substrate at the exposure station EXP, the substrate is processed at the measurement station MEA so that various preparation steps can be performed. The preparation steps may include using a level sensor to map the surface height of the substrate and using an alignment sensor to measure the position of alignment marks on the substrate. The alignment marks are usually arranged in a regular grid pattern. However, due to the inaccuracies in producing the marks and due to the deformations that occur to the substrate throughout its processing, the marks deviate from the ideal grid. Therefore, in addition to measuring the position and orientation of the substrate, the alignment sensor must actually measure the position of many marks in detail over the entire substrate area if the device is to print product features in the correct position with very high accuracy.

[0040] The lithographic apparatus LA may be a so-called dual-stage type having two substrate tables, each having a positioning system controlled by a control unit LACU. While one substrate on one substrate table is exposed at an exposure station EXP, another substrate may be loaded onto another substrate table at a measuring station MEA, so that various preparation steps may be performed. Therefore, the measurement of alignment marks is very time-consuming, and providing two substrate tables greatly improves the productivity of the apparatus. If the position sensor IF cannot measure the position of the substrate table when it is at the measuring station and the exposure station, a second position sensor may be provided to track the position of the substrate table at the two stations. When the lithographic apparatus LA is a so-called dual-stage type having two substrate tables, the exposure station and the measuring station may be different positions, between which the substrate table may be exchanged. However, this is only one possible arrangement, and the measuring station and the exposure station do not have to be so different. For example, it is known to have a single substrate table to which the measuring station is temporarily coupled during the pre-exposure measurement phase. The present disclosure is not limited to any type of system.

[0041] Within a production facility, the apparatus 100 forms part of a "lithography cell" or "lithography cluster" which also includes a coating device 108 (COA) for applying photoresist and other coatings to a substrate W for patterning by the apparatus 100. On the output side of the apparatus 100, a baking device 110 and a developing device 112 are provided for developing the exposure pattern into a physical resist pattern. Between all these devices, the substrate handling system is responsible for supporting the substrates and transferring them from one device to another. These devices, which are generally collectively referred to as "tracks", are under the control of a track control unit, which itself is controlled by a supervisory control system SCS, which also controls the lithography equipment via a lithography equipment control unit LACU. Thus, different devices can be operated to maximize throughput and processing efficiency. The supervisory control system SCS receives recipe information R which provides a definition of the steps performed to create each patterned substrate in more detail.

[0042] Once the pattern is applied and developed in the lithography unit, the patterned substrate 120 is transferred to other processing equipment such as shown in 122, 124, and 126. In a typical production facility, various facilities perform various processing steps. For illustrative purposes, the equipment 122 in this embodiment is an etching station (ETC), and the equipment 124 performs a post-etching thermal annealing step (ANN). Further physical and / or chemical processing steps are applied to other equipment 126, etc. Making a real device may require multiple types of operations, such as material deposition (DEP), modification of surface material properties (oxidation, doping, ion implantation, etc.), chemical mechanical polishing (CMP), etc. In practice, the equipment 126 can represent a series of different processing steps performed in one or more equipment.

[0043] As is well known, the manufacture of semiconductor devices involves many repetitions of such processing to construct device structures with appropriate materials and patterns layer by layer on a substrate. Thus, the substrates 130 that arrive at the lithography cluster may be newly prepared substrates, or they may be substrates that have been previously processed in the cluster or in another device entirely. Similarly, depending on the processing required, substrates 132 that leave the device 126 may be returned to the same lithography cluster for subsequent patterning operations, may be designated for patterning operations in a different cluster, or may be made into finished products to be sent for cutting and packaging.

[0044] Each layer of the product structure requires a different set of processing steps, and the type of equipment 126 used at each layer can be completely different. In addition, even in the case where the processing steps to be applied by the equipment 126 are nominally the same, in a large facility there may be several supposedly identical machines working in parallel to perform steps 126 on different substrates. Slight differences in the settings or failures between these machines can mean that they affect different substrates in different ways. Even steps that are relatively common to each layer, such as etching (equipment 122), can be implemented by several etching equipment that are nominally the same but work in parallel to maximize throughput. Moreover, in practice, different layers require different etching processes, such as chemical etching, plasma etching, depending on the details of the material to be etched and special requirements (such as, for example, anisotropic etching).

[0045] As described above, previous and / or subsequent processes may be performed in other lithographic equipment, and may even be performed in different types of lithographic equipment. For example, certain layers that are very demanding in the device manufacturing process, such as resolution and coverage, may be performed in more advanced lithography tools than other layers that are less demanding. Thus, some layers may be exposed in an immersion lithography tool, while other layers are exposed in a "dry" tool. Some layers may be exposed in a tool operating at a DUV wavelength, while other layers are exposed using EUV wavelength radiation.

[0046] In order to ensure that the substrates exposed by the lithographic equipment are correctly and consistently exposed, it is desirable to check the exposed substrates to measure characteristics such as overlay errors between subsequent layers, line widths, critical dimensions (CD), etc. Therefore, the manufacturing facility in which the lithography unit LC is located also includes a metrology system MET, which accommodates some or all substrates W that have been processed in the lithography unit. The metrology results are provided directly or indirectly to a supervisory control system (SCS) 138. If an error is detected, the exposure of subsequent substrates can be adjusted, especially when metrology can be performed as quickly and quickly as possible so that other substrates in the same batch can still be exposed. Moreover, the already exposed substrates can be stripped and reprocessed to increase the yield, or discarded to avoid further processing of substrates that are known to be defective. In the case where only some target portions of the substrate are defective, only those good target portions can be further exposed.

[0047] Figure 1 Also shown is a metrology device 140 (MET) provided for measuring product parameters at desired stages in the manufacturing process. A common example of a metrology device in a modern lithography production facility is a scatterometer, such as an angle-resolved scatterometer or a spectral scatterometer, and it can be applied to measure the properties of a developed substrate at 120 before etching in the device 122. Using the metrology device 140, it can be determined that, for example, important performance parameters such as overlay or critical dimension (CD) do not meet specified accuracy requirements in the developed resist. Prior to the etching step, there is an opportunity to strip the developed resist and reprocess the substrate 120 through the lithography cluster. It is known that the metrology results 142 from the device 140 can be used to maintain accurate performance of the patterning operation in the lithography cluster by supervisory control system SCS and / or control unit LACU106 making small adjustments 166 over time, thereby minimizing the risk of producing defective products and requiring rework. Of course, the metrology device 140 and / or other metrology devices (not shown) can be applied to measure the properties of processed substrates 132, 134 and incoming substrates 130.

[0048] Traditionally, semiconductor manufacturers create a process thread and try to keep wafers in that process thread. A thread is a series of specific tools that a wafer is to use as it undergoes a series of processes in a facility. All wafers then acquire a constant fingerprint, and per-batch calibrations can be made to control the fingerprint. To obtain the best throughput, it is best not to be dedicated to any process flow. In practice, it is impossible to process every wafer with the same tool. This is especially impossible when considering each chamber in an etch tool as a separate tool, since many wafers can be split into multiple, say, six, etch chambers. Each chamber may result in a slightly different fingerprint. For example, in semiconductor memory device processing, where throughput is very important, different wafers in a batch may be processed by different etch tools and by different chambers of one etch tool.

[0049] Embodiments of the present invention decouple the contribution of individual processes from performance parameters (e.g., post-etch coverage and CD fingerprints). This is accomplished by recording performance parameter results (fingerprints) obtained for many different threads. The performance parameter results (fingerprints) are generated over a time frame that is smaller than a stable process. The method can use statistical methods to retrieve the context of the performance model. For example, a CD uniformity optimization application uses threads: coating tool #1 + scanner tool #3 + etching tool #1 + deposition tool #12 to retrieve the performance model CD(1,3,1,12) to predict the fingerprint.

[0050] When the context (e.g., threads per wafer) varies greatly, it is possible to associate performance measurements (coverage / CD fingerprints) with specific context parameters (e.g., tool ID (#), tool parameters, etc.). Create a context-to-performance model that is able to derive the predicted performance of the entire lithography process (post-etch) from the specific context. Figure 2 Describe the creation of such a model.

[0051] This context-to-performance model has great utility as it allows process (e.g., scanner and etch) corrections to be made for subsequent process steps (e.g., next layer).

[0052] Once the model is created, it can be used to correct fingerprints on wafers in progress in the facility. Having recorded the previous thread of the wafer and predicted the contribution of the process including post-exposure processes, exposure corrections can be calculated taking into account the contribution to CD / coverage of: a) substrate history and b) future processing.

[0053] For example, using the context of known process N-1, the coverage fingerprint increment due to processes N+1,... can be predicted, and therefore process N (exposure) can be corrected based on the predicted coverage fingerprint increment and the expected correction applied to process N+M (etching).

[0054] Therefore, the drive to make corrections for each process is continuously evolving based on the wafer history and future process characteristics. All corrections can be made per wafer, minimizing wafer-to-wafer variation. By adopting this strategy, the full benefit of the multi-tool correction potential can be captured at a high granularity (per wafer, per group of wafers with similar context).

[0055] Figure 2 A high-level flow chart depicting the measurement results of performance parameters associated with the recorded characteristics of a process sequence for the manufacture of a product unit. In this example, Figure 2 and 3 As shown, the product unit is a wafer of semiconductor devices. The characteristics of the process are context data. The context data represents one or more processing parameters of the product unit, such as a tool identifier or a measured process parameter. In addition, in this example, the measurement result of the performance parameter is a fingerprint of the measurement. Therefore, the performance parameter includes a fingerprint of the variation across the wafer of the object data, which represents one or more parameters measured across the wafer.

[0056] refer to Figure 2 , a sequence of processes 202 is performed on the wafer. These processes include, for example, chemical mechanical polishing (CMP), deposition (DEP), thermal annealing (ANN), and resist coating (COA) at 204. These processes also include exposure (EXP) on multiple scanner tools at 206; etching (ETC) on multiple etch tools (including different etch chambers) at 208; and metrology (MET) at 210, such as post-etch inspection (AEI) for CD and cover layer measurement. These processes correspond to Figure 1 Processes shown have the same reference numbers (COA, EXP, ETC, etc.).

[0057] The application 212 is set up to acquire the recorded characteristics of processes 204 (e.g., CMP / DEP / ANN / COA), 206 (EXP), and 208 (ETC) performed on many wafers in the sequence 202. For example, the deposition context is acquired from the process 204, the exposure context is acquired from the process 206, and the etching context is acquired from the process 208. Since no film thickness is available, the deposition fingerprint is used as an example of the application of the present invention. The thickness of the deposited amorphous carbon layer can vary across the wafer and from deposition chamber to deposition chamber. The measurement tool cannot distinguish between thickness and hardness, which are related to the thin film optical properties (refractive index (n) and extinction coefficient (k)).

[0058] The setup application 212 obtains the measurement results of the performance parameters of each wafer in a number of wafers whose context is recorded. For example, the post-etch inspection CD (AEI CD) is obtained from the metrology tool 210.

[0059] The application 212 is set up to obtain the AEI CD with the corresponding context recorded. For example, this can be done by calculating the deposition, scanner, and etch fingerprints, and storing the fingerprints of each context in one or more databases. Thus, 214 is a database with CD fingerprints for each CMP / DEP / ANN / COA context, 216 is a database with CD fingerprints for each exposure context, and 218 is a database with etch chamber fingerprints for each exposure context. Although depicted as three separate databases, other suitable storage schemes may be used, such as storage in one database or in a matrix in computer memory.

[0060] Figure 3 Depicted in Figure 2 A high level flow chart for determining corrections to two processes for manufacturing a wafer and applying the corrections in a sequence 202 of FIG. The corrections are determined based on characteristics of a previous process 304 performed on the wafer and characteristics of future processes 306, 308 to be performed.

[0061] The CD uniformity (CDU) optimization application 320 acquires characteristics (eg, deposition context) of a previous process 304 (eg, DEP) in the sequence 302 that has been performed on the wafer.

[0062] The CDU optimization application 320 obtains characteristics (exposure context) of a subsequent process 306 (EXP) to be performed on the wafer in the sequence 302. In this example, the etch optimization application 334 also obtains characteristics (etch context) of another subsequent process 308 (ETC) in the sequence 202 to be performed on the wafer. The CDU optimization application 320 can obtain the context of several exposure and etch tools available for use, so that fingerprints can be predicted for several potential processing threads that may be scheduled by a particular set of tools (as described below). Corrections can be determined for the potential process thread with the least severe predicted fingerprint. Alternatively, different corrections can be determined for different potential process threads and the most practical or effective correction is selected.

[0063] The CDU optimization application 320 uses the acquired characteristics to determine predicted performance parameters (fingerprints in this example) of the wafer associated with the sequence of previous processes 304 and subsequent processes 306, 308. In this embodiment, this is accomplished by retrieving a measurement fingerprint corresponding to the recorded context using the acquired context. The retrieved measurement fingerprints are then combined to generate a predicted fingerprint, given the processes that have been performed on the wafer and the subsequent processes that will be performed in the future.

[0064] In this example, the CDU optimization application 320 uses the deposition context to query the database 214 (represented by the arrow from 320 to 214). In response to the query, the deposition fingerprint is retrieved from the database 214 (represented by the arrow from 214 back to 320).

[0065] The CDU optimization application 320 uses the exposure context to query the database 216 (represented by the arrow from 320 to 216). In response to the query, an exposure fingerprint is retrieved from the database 216 (represented by the arrow from 216 back to 320).

[0066] The etch optimization application 334 uses the etch context to query the database 218 (represented by the arrow from 334 to 218). In response to the query, the exposure fingerprint is retrieved from the database 218 (represented by the arrow from 218 back to 334).

[0067] Although the CDU optimization application 320 and the etch optimization application 334 are depicted as separate applications, they may be parts of one application or may themselves be separated into multiple software applications or programs.

[0068] The CDU optimization application 320 determines a predicted fingerprint (i.e., performance parameter) for the wafer associated with the sequence 302 of the previous process 304 and the subsequent processes 306, 308. The application 320 evaluates a deposition fingerprint 322 and an exposure fingerprint 330. The predicted fingerprint is a linear combination 324 of the deposition fingerprint 322 and the exposure fingerprint 330. The predicted fingerprint is combined 326 with the dose sensitivity 332, and then the scanner dose correction is calculated 328. In this way, the CDU optimization application 320 determines a first correction for a first future process 306 (EXP) to be performed on the wafer in the sequence 302 based on the determined predicted fingerprint. When the wafer is subjected to this process, the correction is applied to the exposure process 306, as indicated by the arrow from 320 to 306.

[0069] The etch optimization application 334 determines a predicted fingerprint (i.e., performance parameter) for the wafer associated with the sequence 302 of the previous process 304 and the subsequent processes 306, 308. The application 334 evaluates the etch fingerprint 336. The predicted fingerprint is used to calculate a correction 338 for a future etch process. In this manner, the etch optimization application 334 determines a second correction for a second future process 308 (ETC) in the sequence that follows the first future process (EXP) to be performed on the wafer based on the determined predicted fingerprint. When the wafer is subjected to this process, the correction is applied to the etch process 308 by transferring the etch recipe to the etch tool, as indicated by the arrow from 334 to 308.

[0070] Figure 4 is a flowchart of a method for optimizing a product unit manufacturing process sequence according to an embodiment of the present invention.

[0071] refer to Figure 4 as well as Figure 2 and 3 , the method has the following steps:

[0072] 402 : Obtain the recorded context of the processes 204 (eg, CMP / DEP / ANN / COA), 206 (EXP), and 208 (ETC) performed on a plurality of wafers in the sequence 202 .

[0073] 404 : Obtain a measured fingerprint (ie, measurement results of a performance parameter) for each wafer in the plurality of wafers from the metrology tool 210 .

[0074] 406: Associate the measured fingerprint with the corresponding recorded context. Figure 2 Steps 402 to 406 are described. The result is a database 214, 216, 218.

[0075] 408: Get the context of the previous process 304 (eg, DEP) that has been performed on the wafer in the sequence.

[0076] 410: Get the context of one or more subsequent processes 306, 308 (EXP, ETC) to be performed on the wafer in the sequence.

[0077] 412: Using the acquired context, determine a predicted fingerprint for the wafer associated with the sequence of previous and subsequent processes. In this embodiment, this is accomplished by using the acquired context to retrieve a measured fingerprint corresponding to the recorded context. This step may involve deriving a model from a statistical analysis of fingerprints for multiple contexts for processes in the sequence.

[0078] 414 : Based on the determined predicted fingerprint, determine a first correction 328 to a future process 306 (EXP) to be performed on the wafer in the sequence 302 .

[0079] 416: Based on the determined predicted fingerprint, determine a second correction 338 for a second future process 308 (ETC) to be performed on the wafer in the sequence 302, which in this example follows the first future process 306 (EXP). The first correction 328 may involve variations across multiple tools (e.g., averages) of the predicted fingerprint associated with the second future process 308 (ETC), and the second correction 338 involves variations for a specific tool 308 (e.g., an etch chamber). Thus, the corrections are based on optimal distribution corrections at the individual tool level (here using scanners and etcher). For example, the scanner may correct for an average etch fingerprint, while the etcher correction may bring the variations between chambers close to zero.

[0080] 418: Apply the determined first correction 328 and second correction 338 to the processes 306, 308 in the sequence for the wafer. Figure 3 Steps 408 to 418 are described.

[0081] The benefit of splitting the correction between the scanner and the etcher is that it provides more degrees of freedom. It is advantageous to compensate for certain fingerprints both at the etcher stage and at the previous scanner stage. Compensation can be done at the etcher as the last step, but then we know that some of these fingerprints cannot be compensated by the etcher. One should consider what the etcher can compensate for and what the scanner can compensate for. The scanner has the most degrees of freedom. For some fingerprints, the etcher compensates better. Fortunately, the etcher may also cause the type of fingerprint to be corrected. If the fingerprint caused by the etcher is known, it can be compensated for at the etcher and the fingerprint will tend to zero.

[0082] An example of an actuated etcher is changing the temperature profile in the etch chuck. For CD, it is putting the temperature profile on the chuck. For coverage, it is moving the outer ring up or down. This affects the direction of the electric field at the edge of the wafer. So, in effect, the edge of the wafer is extended with a ring, which is also etched. The height of the ring can be adjusted to match the top of the wafer. By moving the ring up and down, the coverage at the edge of the wafer can be affected.

[0083] Thus, embodiments utilize both the scanner tool and the etcher tool as actuators and jointly optimize their individual actuation efforts to minimize post-etch fingerprints without requiring specific wafer routing. For example, in the actuation of the scanner, the average etcher contribution may be considered. If the etcher actuation is a limiting factor due to a limit on the number of changes to the etching process, and the average etcher contribution is taken care of on the scanner, the etcher will only need to correct for cavity-related deltas relative to the average etching contribution.

[0084] Embodiments allow estimating the change in deposition tool layer thickness after etching CD without explicitly measuring the layer thickness.

[0085] The granularity of correction can now be at the wafer level rather than the batch level.

[0086] Embodiments use contextual information from multiple facility processing tools such as etcher, CMP, RTA, resist spin and coating, etc. The coverage fingerprints generated by these tools on the resist layer can be precisely measured for each tool or tool room that contributes to the fingerprint.

[0087] Advantages of embodiments include providing higher throughput, less metrology time due to efficient aggregation of available information, more efficient actuation, and no need for dedicated wafer wiring.

[0088] Another advantage of this approach is that no dedicated wafer wiring is required.

[0089] Embodiments of the present invention may be implemented using a computer program comprising one or more machine-readable instruction sequences, as described above, which describe a method for optimizing a process sequence for manufacturing a product unit. The computer program may be implemented in a computer program such as Figure 1 A data storage medium (eg semiconductor memory, magnetic disk or optical disk) in which such a computer program is stored may also be provided.

[0090] Other embodiments of the present disclosure are disclosed in the following numbered clause list:

[0091] 1. A method for optimizing a product unit manufacturing process sequence, the method comprising:

[0092] (a) obtaining (408) characteristics of a previous process in the sequence that has been performed on a product unit;

[0093] (b) obtaining (410) characteristics of a subsequent process to be performed on the product unit in the sequence;

[0094] (c) using the acquired characteristics, determining (412) predicted performance parameters of the product unit associated with the sequence of the preceding process and the succeeding process; and

[0095] (d) determining (414) a first correction to a first future process to be performed on the product unit in the sequence based on the determined predicted performance parameter.

[0096] 2. A method according to clause 1, wherein the step (c) of determining a predicted performance parameter comprises: deriving a model from a statistical analysis of multiple measurements of the performance parameter for multiple characteristics of the process in the sequence.

[0097] 3. The method according to clause 1, wherein step (c) of determining the predicted performance parameter comprises the following steps:

[0098] (c1) obtaining characteristics of a record (402) of a process performed on a plurality of product units in the sequence;

[0099] (c2) obtaining a measurement result (404) of a performance parameter for each of the plurality of product units;

[0100] (c3) associating the measurements of the performance parameters with corresponding recorded characteristics (406); and

[0101] (c4) determining (412) a predicted performance parameter of the product unit associated with the sequence of the preceding and succeeding processes by using the acquired characteristics to retrieve measurements of performance parameters corresponding to the recorded characteristics.

[0102] 4. A method according to any of the preceding clauses, wherein the characteristics include contextual data representing one or more processing parameters of the product unit.

[0103] 5. The method of any of the preceding clauses, wherein the performance parameter comprises a fingerprint of variations of object data across product units, the fingerprint representing one or more parameters measured across product units.

[0104] 6. The method according to any of the preceding clauses, further comprising the step of applying the determined first correction to a process in the sequence for a product unit.

[0105] 7. The method according to any of the preceding clauses, further comprising the step of determining (416) a second correction to a second future process to be performed on the product unit in the sequence based on the determined predicted performance parameter.

[0106] 8. The method according to clause 7, further comprising the step of applying the determined second correction to a process in the sequence for a product unit.

[0107] 9. The method of clause 7 or clause 8, wherein the first correction involves variation across multiple tools of the determined predicted performance parameter associated with the second future process, and the second correction involves variation to a specific tool.

[0108] 10. A method according to any of the preceding clauses, wherein the product unit is a substrate.

[0109] 11. The method according to any of the preceding clauses, wherein the previous process comprises a process on a product unit selected from the group consisting of: chemical mechanical polishing, deposition, thermal annealing, and resist coating.

[0110] 12. The method according to any of the preceding clauses, wherein the first future process or the second future process comprises exposure of a product unit.

[0111] 13. The method according to any of the preceding clauses, wherein the first future process or the second future process comprises etching of a product unit.

[0112] 14. A computer program comprising computer readable instructions which, when executed on a suitable computer device, cause the computer device to perform the method according to any one of clauses 1 to 13.

[0113] 15. A computer program product comprising a computer program according to clause 14.

[0114] The control unit LACU may include Figure 5 The computer assembly shown. In an embodiment of the apparatus according to the invention, the computer assembly may be a dedicated computer in the form of a control unit, or alternatively may be a central computer controlling the lithographic apparatus. The computer assembly may be arranged for loading a computer program product comprising computer executable code. When downloading the computer program product, this may enable the computer assembly to control the aforementioned use of the lithographic apparatus with embodiments of the level and alignment sensors AS, LS.

[0115] The memory 529 connected to the processor 527 may include a plurality of memory components, such as a hard disk 561, a read-only memory (ROM) 562, an electrically erasable programmable read-only memory (EEPROM) 563, and a random access memory (RAM) 564. Not all of the above storage components must be present. Furthermore, it is not important that the above memory components are physically very close to the processor 527 or to each other. They may be located far away.

[0116] Processor 527 may also be connected to some kind of user interface, such as keyboard 565 or mouse 566. A touch screen, trackball, voice converter, or other interface known to those skilled in the art may also be used.

[0117] The processor 527 may be connected to a reading unit 567 which is arranged to read data, e.g. in the form of computer executable code, and in some cases store the data on a data carrier, such as a solid state drive 568 or a CDROM 569. Also a DVD or other data carrier known to the person skilled in the art may be used.

[0118] The processor 527 may also be connected to a printer 570 for printing out data on paper, and to a display 571, such as a display or LCD (Liquid Crystal Display), or any other type of display known to those skilled in the art.

[0119] The processor 527 may be connected to a communication network 572, such as a public switched telephone network (PSTN), a local area network (LAN), a wide area network (WAN), etc., by means of a transmitter / receiver 573 responsible for input / output (I / O). The processor 527 may be arranged to communicate with other communication systems via the communication network 572. In an embodiment of the present invention, an external computer (not shown) (e.g., an operator's personal computer) may log in to the processor 527 via the communication network 572.

[0120] Processor 527 can be implemented as a stand-alone system or multiple processing units running in parallel, where each processing unit is arranged to perform a subtask of a larger program. The processing unit can also be divided into one or more main processing units with several sub-processing units. Some processing units of processor 527 can even be located at a distance from other processing units and communicate via communication network 572. The connection between modules can be wired or wireless.

[0121] The computer system may be any signal processing system having analog and / or digital and / or software technology arranged to perform the functions discussed herein.

[0122] The foregoing description of the specific embodiments will fully reveal the general nature of the invention so that by applying the knowledge within the technical scope of the art, others can easily modify and / or adapt various applications of such specific embodiments without departing from the general concept of the invention without excessive experimentation. Therefore, based on the teachings and guidance given herein, these adaptations and modifications are intended to fall within the meaning and scope of the equivalents of the disclosed embodiments. It should be understood that the wording or terminology herein is for the purpose of description rather than limitation, so that the terms or wording of this specification will be interpreted by those skilled in the art based on teaching and guidance.

[0123] The breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A method for configuring a process sequence for use in processing a product unit in the form of a wafer, the method comprising: obtaining a first characteristic of a previous process in the sequence that has been performed on at least one product unit of the one or more product units; obtaining a second characteristic of a subsequent process to be performed on the at least one product unit in the sequence; determining, by a hardware computer system, a prediction of a performance parameter associated with the at least one product unit after being processed using the subsequent process using the first characteristic and the second characteristic obtained; as well as Based on the determined prediction, a correction to a future process in the sequence to be used to process the at least one product unit is determined.

2. The method according to claim 1, wherein the previous process comprises: Patterning of the one or more product units using an exposure step and / or a resist development process.

3. The method of claim 1, wherein the first characteristic of the prior process is a post-development coverage fingerprint. 4 . The method according to claim 1 , wherein the subsequent process is a process of etching a product unit, and the second characteristic of the subsequent process is context data of an etcher to be used for etching the at least one product unit. The method of claim 1 , wherein the performance parameter is post-etch coverage. 6 . The method according to claim 1 , wherein the future process is a process of patterning a product unit using an exposure step and / or a resist development process.

7. The method according to claim 1, further comprising: The corrections are applied to equipment to be used to perform the future process.

8. The method of claim 1 , wherein the determination of the predicted performance parameter is based on using a model derived from an analysis of a plurality of measurements of the performance parameter associated with a plurality of product units and characteristics of the preceding and succeeding processes for processing the plurality of product units.

9. A computer program product comprising computer readable instructions for configuring a process sequence for use in processing a product unit in the form of a wafer, the instructions being configured to: obtaining a first characteristic of a previous process in the sequence that has been performed on at least one product unit of the one or more product units; obtaining a second characteristic of a subsequent process to be performed on the at least one product unit in the sequence; determining, by a hardware computer system, a prediction of a performance parameter associated with the at least one product unit after being processed using the subsequent process using the first characteristic and the second characteristic obtained; as well as Based on the determined prediction, a correction to a future process in the sequence to be used to process the at least one product unit is determined.

10. The computer program product of claim 9, wherein the prior process comprises: Patterning of the one or more product units using an exposure step and / or a resist development process.

11. The computer program product of claim 9, wherein the first characteristic of the prior art is a post-development cover fingerprint.

12. The computer program product of claim 9, wherein the subsequent process is a process of etching a product unit, and the second characteristic of the subsequent process is context data of an etcher to be used to etch the at least one product unit.

13. The computer program product of claim 9, wherein the performance parameter is post-etch coverage.

14. The computer program product of claim 9, wherein the future process is a process for patterning a product unit using an exposure step and / or a resist development process.

15. The computer program product of claim 9, further comprising instructions for obtaining the second characteristic of the subsequent process for processing the one or more product units.

16. The computer program product of claim 15, wherein the instructions for determining the predicted performance parameter include instructions for deriving a model from analysis of a plurality of measurements of the performance parameter corresponding to a plurality of second characteristics of the subsequent process.

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