Etch bias characterization and how to use it
By collecting and fitting the spatial attribute data of the device pattern in the lithography device, calculating the etching deviation and adjusting the patterning process, the problem of etching deviation in the lithography device is solved, and the performance and specification consistency of the device are improved.
Patent Information
- Application Number
- CN202110982964.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-02-24
- Filing Date
- 2018-02-21
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2038-02-21
AI Technical Summary
During the etching process, lithography equipment may cause changes in the pattern size of the device, resulting in etching deviations, affecting the performance and specifications of the device.
By collecting the values of spatial attributes at multiple sites in the device pattern, fitting mathematical models using a computing device, etching deviations are calculated, and the patterning process is adjusted according to the model to compensate for the expected etching deviations.
It effectively reduces the dimensional changes of device patterns during the etching process, and improves the performance consistency and specification compliance of the device.
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Figure CN113759671B_ABST
Abstract
Description
[0001] This application is a divisional application of the international application PCT / EP2018 / 054212, which entered the Chinese national phase on August 26, 2019 and has application number 201880014016.4.
[0002] CROSS-REFERENCE TO RELATED APPLICATIONS
[0003] This application is based on and claims the benefit of U.S. Provisional Application No. 62 / 463,556, filed on February 24, 2017, entitled “Etch Bias Characterization and Method of Using the same”, the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0004] The present invention generally relates to device fabrication and methods of configuring and evaluating device fabrication processes. Background Art
[0005] A lithographic apparatus is a machine that applies a desired pattern to a target portion of a substrate. For example, a lithographic apparatus may be used in the manufacture of integrated circuits (ICs). In this case, a pattern forming device (alternatively referred to as a mask or reticle) may be used to produce a pattern corresponding to a single layer of the IC, and the pattern may be imaged onto a target portion (e.g., a portion including a die, one or several dies) on a substrate (e.g., a silicon wafer) having a layer of radiation-sensitive material (resist, such as a photoresist). Typically, a single substrate will include a network of adjacent target portions that are exposed in succession. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing the entire pattern to the target portion at once, and so-called scanners, in which each target portion is irradiated by scanning the pattern along a given direction (the "scanning" direction) with the beam while simultaneously scanning the substrate in a direction parallel or antiparallel to the direction.
[0006] Before the pattern is transferred from the pattern forming device to the substrate, the substrate may undergo various processes, such as primer coating, resist coating and soft baking. After exposure, the substrate may undergo other processes, such as post-exposure baking (PEB), development, hard baking and measurement / inspection of the transferred pattern. This series of processes is used as the basis for making a single layer of a device (e.g., IC). After that, the substrate may undergo various processes, such as etching, ion implantation (doping), metallization, oxidation, chemical mechanical polishing, etc., all of which are intended to finally complete a single layer of the device. If the device requires multiple layers, all processes or variations thereof are repeated for each layer. Ultimately, the device will be present in each target portion on the substrate. Afterwards, these devices are separated from each other by techniques such as slicing or sawing, whereby individual devices can be mounted on a carrier, connected to pins, etc. Although the term substrate covers a base base (e.g., silicon), where applicable, the substrate may also cover one or more layers covering the base. Therefore, transferring a pattern into or onto a substrate may include transferring the pattern onto one or more layers on the substrate.
[0007] Therefore, manufacturing devices (such as semiconductor devices) typically involves processing a substrate (e.g., a semiconductor wafer) using multiple fabrication processes to form various features and multiple layers of the device. These layers and features are typically manufactured and processed using, for example, deposition, lithography, etching, chemical mechanical polishing, ion implantation. Multiple devices can be made on multiple dies on a substrate and then separated into individual devices. This device manufacturing process can be considered a patterning process. The patterning process involves a patterning step using a pattern forming device in a lithography apparatus, such as optical and / or nanoimprint lithography, to transfer the pattern on the pattern forming device to the substrate, and the patterning process typically but optionally involves one or more related pattern processing steps, such as resist development by a developing apparatus, baking the substrate using a baking tool, etching using a pattern using an etching apparatus, etc. Summary of the invention
[0008] Etch bias of the patterning process may cause the device pattern to deviate from its set of target dimensions. Determining etch bias may be computationally complex due to, for example, the complexity of the device pattern, scaling of the device pattern, chemical processes that may occur during the etching process (transferring the device pattern from the patterned material layer to the substrate), and / or transient or additional coatings that may form on the sidewalls of the substrate as the device pattern is etched into the device pattern.
[0009]
[0013] Thus, one or more methods are provided for determining changes in device pattern dimensions during an etching process that transfers a device pattern in a layer on a substrate to a substrate.
[0010] Aspects of the present disclosure relate to collecting a set of values for one or more spatial properties of a device pattern at multiple sites of a device formed by etching, such as one or more dimensions, one or more locations of a portion (e.g., an edge) of the device pattern, etc.; fitting a mathematical model having a set of one or more spatial properties to the set of spatial properties using a computing device; calculating an etch bias of the device pattern at at least one site thereof for an etching process based on the parameterized model, wherein the model includes a formula including: variables associated with the spatial properties of the device pattern at the site and / or associated with a plasma species concentration; and mathematical terms associated with a natural exponential function of a power of a parameter based on an etch time (e.g., a function) of the etching process; and adjusting a patterning process based on the calculated etch bias (e.g., adjusting a boundary of a zone of a patterning device used to form the device pattern as part of the patterning process).
[0011] In an embodiment, a method is provided, comprising: determining, by a hardware computer, an etching bias of a pattern to be etched using an etching step of a patterning process based on an etching bias model, the etching bias model comprising a formula, the formula comprising: variables associated with spatial properties of the pattern or variables associated with etching plasma species concentration of the etching step; and mathematical terms comprising a natural exponential function that is fitted to a power of a parameter or based on an etching time of the etching step; and adjusting the patterning process based on the determined etching bias.
[0012] In an embodiment, a method is provided, comprising: determining, by a hardware computer, an etching bias of a pattern to be etched in an etching step of a patterning process based on an etching bias model, wherein the etching bias model includes a function of an etching plasma species concentration and a patterning material concentration; and adjusting the patterning process based on the determined etching bias.
[0013] In an embodiment, a computer program product is provided, including a non-transitory computer-readable medium having instructions recorded thereon, the instructions implementing the method described in the present invention when executed by a computer.
[0014] These and other features of the present invention and the methods of operation and functions of the related structural elements and the combination of manufacturing components and manufacturing economies will become clearer when considering the following description and the appended claims with reference to the drawings, which form a part of this specification, wherein similar reference numerals designate corresponding components in the various figures. However, it should be clearly understood that the drawings are for illustration and description purposes only and are not intended to be used as definitions of limitations of the present invention. As used in the specification and claims, the singular forms "a", "an" and "the" include plural representations unless otherwise explicitly stated by the content. In addition, the term "or" as used in this specification and claims means "and / or" unless the context clearly dictates otherwise. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] The present invention is illustrated by way of example and not limitation in the several figures of the accompanying drawings in which like references indicate similar elements.
[0016] Figure 1 A schematic diagram depicting an embodiment of a lithographic apparatus;
[0017] Figure 2 A schematic diagram depicting an embodiment of a lithography cell;
[0018] Figure 3 A schematic diagram depicting an embodiment of a modeled region of a device;
[0019] Figure 4 A flow chart depicting an embodiment of a method for determining an etch bias;
[0020] Figure 5 is a cross-sectional view of an embodiment of a device feature and associated pattern elements during an etching process;
[0021] Figure 6 depicts a schematic diagram of a modeled region of an embodiment of a device;
[0022] Figure 7 a schematic diagram depicting a modeled region of an embodiment of a device; and
[0023] Figure 8 depicts a schematic diagram of a modeled region of an embodiment of a device;
[0024] Fig. 9 A block diagram illustrating an embodiment of a computer system is depicted. DETAILED DESCRIPTION
[0025] Figure 1A lithographic apparatus LA is schematically depicted that may be used in association with the techniques described herein. The apparatus comprises an illumination optical system (illuminator) IL configured to condition a radiation beam B (e.g. ultraviolet (UV) radiation, deep ultraviolet (DUV) radiation or extreme ultraviolet (EUV) radiation); a patterning device support or support structure (e.g. mask stage) MT configured to support a patterning device (e.g. mask) MA and connected to a first positioner PM configured to accurately position the patterning device according to specific parameters; one or more substrate stages (e.g. wafer stages) WTa, WTb configured to hold a substrate (e.g. resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate according to specific parameters; and a projection optical system (e.g. refractive, reflective, catoptric or refractive-reflective optical system) PS configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g. comprising one or more dies) of the substrate W.
[0026] The illumination optical system may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, to guide, shape or control the radiation. In this particular case, the illumination system also includes a radiation source SO.
[0027] The patterning device support holds the patterning device in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions such as whether the patterning device is held in a vacuum environment. The patterning device support can use mechanical, vacuum, electrostatic, or other clamping techniques to hold the patterning device. The patterning device support can be a frame or a stage, for example, which can be fixed or movable as required. The patterning device support can ensure that the patterning device is located in a desired position (for example relative to a projection system). Any term "reticle" or "mask" used herein may be considered synonymous with the more general term "patterning device".
[0028] The term "patterning device" as used herein should be broadly interpreted as referring to any device that can be used to impart a radiation beam with a pattern in its cross-section so as to form a pattern in a target portion of the substrate. It should be noted that the pattern imparted to the radiation beam may not exactly correspond to the desired pattern in the target portion of the substrate (for example if the pattern includes phase-shifting features or so-called assist features). Typically, the pattern imparted to the radiation beam will correspond to a specific functional layer in a device (such as an integrated circuit) created in the target portion.
[0029] The pattern forming device can be transmissive or reflective. Examples of pattern forming devices include masks, programmable mirror arrays, and programmable LCD panels. Masks are well known in lithography and include mask types such as binary mask types, alternating phase shift mask types, attenuated phase shift mask types, and various hybrid mask types. An example of a programmable mirror array uses a matrix arrangement of small mirrors, each of which can be individually tilted to reflect an incident radiation beam in different directions. The tilted mirrors impart a pattern to the radiation beam reflected by the mirror matrix. As another example, the pattern forming device includes an LCD matrix.
[0030] As depicted here, the apparatus may be transmissive (e.g., using a transmissive patterning device). However, the apparatus may be reflective (e.g., employing a programmable mirror array of the type mentioned above, or employing a reflective mask (e.g., for EUV systems)).
[0031] The lithographic apparatus may also be of a type in which at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, such as water, so as to fill the space between the projection system and the substrate. Immersion liquid may also be applied to other spaces in the lithographic apparatus, such as the space between the mask and the projection system. It is well known in the art that immersion techniques are used to increase the numerical aperture of the projection system. The term "immersion" as used herein does not mean that structures such as the substrate must be immersed in the liquid; rather, "immersion" only means that the liquid is located between the projection system and the substrate during exposure.
[0032] Reference Figure 1 , the illuminator IL receives a radiation beam from a radiation source SO (e.g. a mercury lamp or an excimer laser, a laser produced plasma (LPP), an EUV source). The source and the lithographic apparatus may be separate entities (e.g. when the source is an excimer laser). In this case, the source is not considered to constitute a part of the lithographic apparatus, and the radiation beam is transferred from the source SO to the illuminator IL by means of a beam delivery system BD comprising, for example, suitable directional reflectors and / or a beam expander. In other cases, the radiation source may be an integral part of the lithographic apparatus (e.g. when the radiation source is a mercury lamp). The source SO and the illuminator IL, and the beam delivery system BD provided when necessary, may be referred to together as a radiation system.
[0033] The illuminator IL may include an adjuster AD configured to adjust the spatial and / or angular intensity distribution of the radiation beam. Typically, at least the outer radial extent and / or the inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. Furthermore, the illuminator IL may include various other components, such as an integrator IN and a condenser CO. The illuminator may be used to adjust the radiation beam so as to have a desired uniformity and intensity distribution in its cross-section.
[0034] The radiation beam B is incident on a patterning device (e.g. a mask) MA held on a support (e.g. a mask table) MT for the patterning device and a pattern is formed by the patterning device. Having passed through the patterning device (e.g. a mask) MA, the radiation beam B passes through a projection optical system PS which focuses the beam onto a target portion C of the substrate W, thereby projecting an image of the pattern onto the target portion C. With the aid of a second positioner PW and a position sensor IF (e.g. an interferometer device, a linear encoder, a two-dimensional encoder or a capacitive sensor), the substrate table WT can be accurately moved, for example in order to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and the further position sensor ( Figure 1 A pattern forming device (e.g., mask) MA is used to accurately position the pattern forming device (e.g., mask) MA relative to the path of the radiation beam B (not explicitly depicted in the figure).
[0035] The patterning device (e.g., mask) MA and substrate W can be aligned by using patterning device alignment marks M1, M2 and substrate alignment marks Pl, P2. Although the substrate alignment marks (as shown) occupy dedicated target portions, they can be located in the spaces between target portions (these marks are known as scribe alignment marks). Similarly, where more than one die is disposed on the patterning device (e.g., mask) MA, the patterning device alignment marks can be located between the dies. Small alignment marks can also be included within the die, between device features, in which case it is desirable that the marks be as small as possible and do not require any imaging or process conditions that are different from adjacent features. An alignment system for detecting alignment marks is further described below.
[0036] In the example described, the lithographic apparatus LA is of the so-called dual-platform type, having two substrate tables WTa, WTb and two stations - an exposure station EXP and a measurement station MEA - between which the substrate table can be exchanged. While one substrate on one substrate table is being exposed at the exposure station, another substrate can be loaded onto another substrate table at the measurement station, and various preparatory steps are performed. The preparatory steps may include using a horizontal sensor LS to draw a map of the surface control of the substrate, using an alignment sensor AS to measure the position of the alignment mark on the substrate, performing any other type of measurement or inspection, and the like. This enables a substantial increase in the throughput of the equipment. More generally, the lithographic apparatus may be of the type having two or more stages (e.g., two or more substrate stages, substrate stages and measurement stages, two or more pattern forming device stages, etc.). In such a "multi-platform" device, multiple stages may be used in parallel, or one or more other stages may be used for exposure while performing preparatory steps on one or more stages.
[0037] Although the level sensor LS and alignment sensor AS are shown adjacent to the substrate table WTb, it will be appreciated that the level sensor LS and alignment sensor AS may additionally or alternatively be provided adjacent to the projection system PS to take measurements with respect to the substrate table WTa.
[0038] The depicted apparatus may be used in various modes including, for example, a step mode or a scan mode.The construction and operation of lithographic apparatus are well known to those skilled in the art and no further description is required to understand embodiments of the present invention.
[0039] like Figure 2 As shown, the lithography equipment LA forms part of the lithography system, which is called a lithography unit LC or a lithography unit or a cluster. The lithography unit LC may also include equipment for pre-exposure and post-exposure processing on the substrate. Conventionally, these equipment include: a spin coater SC for depositing a resist layer, a developer DE for developing the exposed resist, a chill plate CH and a baking plate BK. The substrate handler or robot RO picks up the substrate from the input / output ports I / O1 and I / O2, moves the substrate between different processing equipment, and then transfers it to the feed station LB of the lithography equipment. These devices are generally referred to as tracks and are controlled by a track control unit TCU, which is itself controlled by a management control system SCS, which also controls the lithography equipment via a lithography control unit LACU. Therefore, different equipment can be operated to maximize production volume and processing efficiency.
[0040] In an embodiment of a patterning process, a device pattern may be transferred from a pattern forming device to a patterned material (e.g., resist) layer on a substrate (e.g., a semiconductor substrate). The device pattern in the patterned material layer may be transferred to a material below the patterned material by a pattern transfer process. In an embodiment, the device pattern may be transferred to a substrate by a substrate material removal process (such as etching). In an embodiment, etching comprises plasma etching. In an embodiment, plasma etching involves generating ionic and non-ionic chemicals in a low pressure environment near the surface of the substrate. Plasma etching may involve accelerating some chemicals onto the surface of the substrate to facilitate the removal of the substrate material. The chemical bonds between the atoms of the substrate may be weakened by chemical reactions of some atoms with chemicals originating from the plasma. By transferring kinetic energy to the substrate material by plasma species that are accelerated toward the substrate material and impacting the substrate material to promote the vibrational motion of the substrate atoms relative to adjacent substrate material atoms and relative to atoms and / or molecules originating from the plasma, the removal of the substrate material atoms during the etching process may be enhanced. After the vibrational energy transmitted to the substrate material destroys one or more bonds between the atoms of the substrate material while the bonds between the plasma species and the released atoms of the substrate material remain, the atoms of the substrate material can be chemically bonded to atoms / molecules originating from the etching plasma. In an embodiment, the etching rate can depend on the plasma density above the pattern elements used as a mask mold. In an embodiment, the etching rate can also depend on the temperature of the substrate material and the kinetic energy of the plasma species that can be accelerated to impact the substrate. For clarity, the present application discusses embodiments involving plasma etching (or reactive ion etching) processes, although other means of producing device features are also contemplated.
[0041] The size of pattern elements (corresponding to the etched device features) or between pattern elements of the device pattern can change during such a pattern transfer process, and thus cause a change in the size of one or more associated device features. In particular, such a change in size can occur in a direction substantially parallel to the main plane of the substrate. In the context of an etching process involving the removal of material, this can be referred to as a two-dimensional (2D) etching bias. During the removal of substrate material, it is a lateral etching of the device feature when the vertical dimension of the device feature is established.
[0042] However, unexpected or undesirable etching deviations may cause the device to have performance parameters that are out of specification. For example, the size of the device may be related to the function of the device. Changes in the size of device features may modify the electrical parameters of the device. Some parameters of electronic devices may be sensitive to device size, including the resistance and / or parasitic capacitance of conductive lines, and / or the timing of gate switches based on the gate length of transistors in the device. Dielectric breakdown of insulating materials in integrated circuits may also be a function of the size of the insulating material. Therefore, maintaining the size of device features of a device or the size between the device features can help ensure or maintain the function of the device within predetermined specifications.
[0043] Now, the etch bias may vary across the substrate created by the patterning process. For example, the etch bias may vary depending on the density of the device pattern being formed on the substrate. That is, the etch bias may be different in dense areas of the resist pattern than in isolated areas of the resist pattern. Additionally or alternatively, the etch bias may be different at different locations on the substrate, regardless of density. For example, the etch bias may be different at the center portion of the substrate than at or near the edge of the substrate.
[0044] Mathematically modeling or modeling the etching deviation can improve the creation of the final device feature size. The results of this modeling can be used for various purposes. For example, these results can be used to adjust the patterning process in terms of changing the design, control parameters, etc. For example, these results can be used to adjust one or more spatial properties of one or more elements in the pattern provided by the pattern forming device, wherein the pattern of the pattern forming device is used to create a device pattern to be used for etching on the substrate. Therefore, once the pattern of the adjusted pattern forming device is transferred to the substrate, the device pattern on the substrate is effectively adjusted before etching to compensate for the etching deviation expected to occur during etching. As another example, one or more adjustments can be made to the lithographic equipment in terms of adjustment of dose, focus, etc. As will be understood, there can be more applications. Therefore, compensating for etching deviations can cause the device to have more one or more uniform feature sizes, one or more uniform electrical properties, and / or one or more improved (e.g., closer to the desired result) performance characteristics.
[0045] Furthermore, while etch bias is sometimes detrimental to the fabrication of devices on a substrate, it can sometimes be used to produce desired structures on a substrate. By taking into account the degree of etch bias when making a patterning device, device features can be made in a device on a substrate whose size is less than the optical resolution limit of the pattern transfer process from the patterning device to the substrate. Thus, in this regard, these modeled etch bias results can be used to tune the patterning process in terms of changing the design, controlling parameters, etc.
[0046] Therefore, modeling etch biases in an etching process can help produce more accurate device features, for example by compensating for etch biases, such as by customizing a patterning device to (correctly) predict possible etch biases of the etching process (e.g., as a function of pattern density), so that the actual features produced by the etching process after (adjusted) lithography can be closer to the desired product specifications.
[0047] However, modeling etch bias can be a time-consuming empirical task. It can also be inaccurate. For example, due to the large number of features being modeled, modeling etch bias at the full device pattern level (e.g., full chip level) can be complex. Therefore, the technology provided here quickly and accurately models etch bias to enable full chip analysis of (e.g.) pattern forming device patterns.
[0048] The present disclosure includes a description of a theoretical framework for performing modeling of 2D etch bias, which can be used in the process of making a patterning device to manufacture a device. Although the discussion herein focuses on etching and etch bias, the principles of these techniques can be applied to other pattern transfer processes that transfer patterns in a layer into a substrate.
[0049] After performing the etching process, the etching deviation can be measured on the substrate. The etching deviation can be the difference between the position of a portion of a pattern element (the pattern element corresponds to a device feature) on one side of the patterned layer before etching and the position of the corresponding portion on the side of the pattern element after etching. Similarly, the etching deviation can be the difference between the position of a portion of a device feature (the device feature corresponds to the pattern element) on one side before etching and the position of the corresponding portion on the side of the device feature after etching. The etching deviation can occur at the interface between the etched area of the substrate and the unetched area of the substrate. In the etching deviation, the actual size or critical dimension (CD) of the device feature or the device pattern element corresponding to the device feature can be different from the expected or critical dimension of the device feature or pattern element (CD0) after etching. In an embodiment, the etching deviation can be defined at multiple locations on the device feature. The groove can have an etching deviation at both sides of the groove, and the via can have an etching deviation on both sides of the via. The line (such as for finFET) can have an etching deviation on both sides, making the final line size smaller than the pattern feature that masks the line during the etching process.
[0050] The etch bias may be sensitive to various conditions. For example, as discussed above, the etch bias may be sensitive to the local pattern density in the device pattern. Additionally or alternatively, the etch bias may be sensitive to the chemical conditions in the etching plasma, and / or the substrate temperature and / or the plasma during the etching process.
[0051] Figure 3 A schematic diagram of an embodiment of a modeled region 100 of a device pattern is depicted. The modeled region 100 may include device pattern elements corresponding to etched device features that extend above a major surface of a substrate and / or are recessed into the substrate. Examples of recessed device features may include trenches, vias, and / or pad openings. Examples of protruding device features may include lines for gates and / or finFETs, or masking lines compatible with double patterning lithography scenarios.
[0052] In an embodiment, the pattern element 102 may be a trench in a patterned layer (e.g., a resist layer), or may be a line of the patterned layer extending above the top surface of the substrate. Although the discussion herein will focus on one or more pattern elements in a patterned layer, the discussion herein may also be viewed from the perspective of one or more etched device features being formed and after formation.
[0053] The pattern element 102 may have a centerline 103 between a first side 104 and a second side 106 of the pattern element. In embodiments where the pattern element 102 is a trench, the pattern element 102 may have a first dimension 108 between the first side 104 and the second side 106, the dimension 108 corresponding to the dimension of the pattern element at the beginning of an etching process that forms one or more device features by etching in a substrate using the pattern element 102. The pattern element 102 may have a second dimension 110 between the first side 104 and the second side 106, the dimension 110 corresponding to the dimension of the pattern element after one or more device features have been formed by etching using the pattern element 102. In embodiments, if the pattern element 102 is a trench, the first dimension 108 may be smaller than the second dimension 110.
[0054] According to an embodiment, the first side 104 may have a first position 104A at the beginning of the etching process and a second position 104B at the end of the etching process, wherein the first position 104A and the second position 104B are different positions. Some of the characteristics of the pattern elements 102 described above (when related to trenches) may be similarly attributed to the characteristics of lines appearing above the top surface of the substrate.
[0055] The pattern element 102 may have a first etch bias 112A at the first side 104 and a second etch bias 112B at the second side 106. The sum of the first etch bias 112A and the second etch bias 112B may be a deviation in the size (or critical dimension (CD)) of the pattern element that occurs during the formation of one or more associated device features. The first etch bias 112A and the second etch bias 112B may have different sizes or may be substantially the same. The difference between the first etch bias 112A and the second etch bias 112B may be related to the density of the pattern elements near the first side 104 and / or the second side 106.
[0056] The etch bias may be positive, where the size of the pattern element is larger after etching than before etching, or negative, where the size is smaller after etching than before etching. In an embodiment, when the etching process recesses the sidewalls of the line laterally toward a central portion thereof during the etching process forming the line, the line formed by the etching process may have a negative etch bias after etching. In an embodiment, when the etching process recesses the sidewalls of the line laterally away from a central portion of the trench, the trench formed by the etching process may have a positive etch bias after etching.
[0057] In an embodiment, the pattern element 102 may have an initial region 114A measured between the first side 104 and the second side 106 at the first locations 104A and 106A, respectively, and within the length 115 of the pattern element. In an embodiment, the final region 114B may be measured between the second locations 104B and 106B, respectively. Depending on the embodiment, the initial region 114A may be smaller and / or larger than the final region 114B. The initial region 114A and the final region 114B may be etched regions of a device feature, describing a recessed region recessed into a substrate material or a protruding region protruding from a substrate material.
[0058] The pattern element 102 may have an evaluation point 116 on one side of the pattern element. Figure 3An evaluation point 116 is shown at a first position 106A on the second side 106. After a certain amount of etching time and associated etching bias, the second side 106 may be located at an evaluation point 124. Thus, the etching bias may be measured using measurements of one or more spatial properties associated with the evaluation points 116 / 124. As a simple example, the measurements at the measurement sites may involve: the position of the evaluation point 116 may be measured before etching, and the position of the evaluation point 124 may be measured after etching. As another example, the lateral dimensions of the pattern element 102 may be measured before etching and after etching. As a further example, the dimensions 118 of the device pattern may be measured between pattern elements (such as between the evaluation points 120 on the pattern element 102 and the second pattern element 122). Thus, an example measurement site in the device pattern may extend between evaluation points (such as the evaluation points 116 and the evaluation points 120). The dimensions may be measured before etching and subsequently after etching. The device pattern on the substrate may have a plurality of measurement sites (or locations) in the device pattern to measure values of one or more spatial properties, including etch bias after etching the substrate with the device pattern thereon. The measured device pattern spatial properties at the measurement sites may be added to a set of values of one or more spatial properties of the device pattern to calculate the etch bias. The etch bias calculation may be performed in a computing device in an automated process as part of a manufacturing process or a product development process.
[0059] Figure 4 An example flow chart of an embodiment of a method 200 for determining an etch bias is depicted. In operation 202, a plurality of sites in a device pattern may be selected to measure the etch bias in the device pattern. Sites in the plurality of sites may include pattern elements corresponding to trenches, vias, pads, etc. In an embodiment, a measurement site in the plurality of sites may traverse a pattern element such as a trench opening. In an embodiment, a measurement site may traverse a material located between two pattern elements, such as two trenches.
[0060] In operation 204, values of a first spatial property of a device pattern may be measured at a plurality of measurement sites in the device pattern. A first measurement of the device pattern may be performed after the device pattern is transferred from a pattern forming device to a patterned material layer on a substrate. A patterned material (such as a resist) may be patterned by exposing the patterned material to radiation energy incident thereon from a pattern forming device. The dose and / or focus of the radiation may be adjusted to customize the size of the device pattern formed in the patterned material. Measurements may be recorded by optical, electrical, or other means suitable for detecting one or more device pattern spatial properties on a substrate according to processes and methods familiar to those skilled in the art. In an embodiment, the set of values of the first spatial property at the measurement site is input into a storage medium or memory of a computing device.
[0061] In operation 206, substrate material (e.g., substrate material of the substrate base and / or substrate material of a layer covering the substrate base) may be removed from the substrate by, for example, an etching process using the device pattern in the patterned layer as a masking template. The removal of the substrate material may be a plasma etching process, a chemical etching process, or some other material removal process that transfers the device pattern from the patterned material layer on the substrate into the substrate material.
[0062] In operation 208, a value of a second spatial property of the device pattern may be measured after the substrate material removal process. The measurement of the second spatial property may be at a plurality of measurement sites at or near the plurality of measurement sites where the first spatial property was measured. In an embodiment, the set of values of the second spatial property at the measurement sites is input into a storage medium or memory of a computing device.
[0063] In operation 210, an etch bias may be calculated for a measurement site of a plurality of sites for which the first measurement and the second measurement were recorded in operations 204 and 208, respectively. For example, a difference between applicable values of the first attribute and the second attribute may be calculated. The etch bias values for the measurement sites of the plurality of sites may be recorded in a data set and optionally stored in a computer device memory for subsequent analysis and processing. Other information of the device pattern on the substrate may be recorded in the data set to facilitate etch bias modeling, the other information including the location of the measurement site, the shape of one or more pattern elements near the measurement site, and / or the size of one or more pattern elements separated from the applicable pattern elements that may be used for etch bias calculation.
[0064] In operation 212, a mathematical model having a formula including one or more mathematical terms (having one or more variables and one or more parameters) is fitted to the etching bias and / or other data in the data set. In an embodiment, fitting the data set with a formula results in a calculated value of one or more formula fitting parameters. Further description of one or more variables and one or more parameters will also be discussed below.
[0065] In operation 214, the parameterized model of operation 212 is used to generate one or more etch bias values for at least one location in the device pattern for the etching process. The results of this modeling can be used for various purposes. For example, these results can be used to adjust the patterning process in terms of changing the design, controlling parameters, etc.
[0066] As an example of an application of the determined etching bias, these results can be used to adjust one or more dimensions of one or more elements in a pattern provided by a pattern forming device, wherein the pattern of the pattern forming device is used to create a device pattern to be used for etching on a substrate. Therefore, once the adjusted pattern of the pattern forming device is transferred to the substrate, the device pattern on the substrate is effectively adjusted before etching to compensate for the etching bias expected to occur during etching. That is, in an embodiment, the offset of the size of the pattern feature of the pattern forming device is calculated based on the determined etching bias to compensate for the etching bias during the etching process. In an embodiment, the offset of the size of the pattern feature of the pattern forming device is calculated based on the determined etching bias so as to adjust the size of the device pattern to match a feature size that is lower than the optical resolution of the pattern forming device used to produce the device pattern on the substrate.
[0067] As another example of an application of the determined etch bias, one or more adjustments may be made to the lithographic apparatus in terms of adjustment of dose, focus, etc. As will be appreciated, there may be many more applications. Thus, compensating for the etch bias may result in a device having one or more more uniform feature sizes, one or more uniform electrical properties, and / or one or more improved (e.g., closer to a desired result) performance characteristics.
[0068] The formula for making a prediction of the etch bias may take various complex forms. In an embodiment, the etch bias model may include a formula with terms related to the spatial properties of the device pattern before etching. In an embodiment, the etch bias model may include a formula with terms related to the spatial properties of the device pattern after performing the etching process. In an embodiment, the etch bias model may include a formula with terms related to the area of the patterned material surrounding the measurement site in the patterning device.
[0069] Figure 5A cross-sectional view of an embodiment of a device feature and associated device pattern element 300 during an etching process is depicted. A plasma 302 is disposed above a substrate 304 that includes a substrate material 306 covered by a layer of patterned material 308. The patterned material has an opening 310 formed by, for example, resist development. The plasma 302 moves into the opening 310 and interacts with the substrate material 306 and the patterned material 308. The opening 310 expands downwardly in a first direction 314 by removing material from a surface 312, and expands laterally in a second direction 318 by removing material from a side 316, and expands laterally in a third direction 322 by removing material from a side 320. The material removal rate in the first direction 314 may exceed the etching rate in the second direction 318 and in the third direction 322. The opening 310 may have a first width 324 at the beginning of the etching process, and a second width 326 after the etching process ends. The volume 328 of the plasma 302 above the opening 310 may have a plasma density therein that may be used to model the etching process or etch bias resulting from the etching process.
[0070] The plasma surface concentration applied to the pattern element (trench) during the etching process can be represented by D, and the units of D are such as mol / μm 2 For the purposes of the embodiments of etch bias modeling described herein, the plasma surface concentration may be approximated as a constant value to simplify modeling calculations. A pattern element (such as opening 310) may have an area A and the units of A may be (μm 2 ), the area A is based on the initial spatial attribute of the pattern element (such as the initial critical dimension CD0), and the unit of the initial spatial attribute is such as (μm). In an embodiment, the first width 324 is an example of the initial spatial attribute of the pattern element. The number Q (mole) of atoms or molecules of the reactive species of the plasma above the initial area A can be determined as follows:
[0071] Q=D×A [1]
[0072] Another approximation for modeling the process may include treating the amount of reactive species in the trench as a constant, such as when the reactive species is in equilibrium, where the amount of reactive species entering is equal to the amount of reactive species leaving and the amount of reactive species consumed by etching and / or bonded to the etched surface. In other words, the rate of change of the amount of reactive species is set to zero:
[0073] Another approximation that may improve the ability to perform etch bias modeling may involve treating the effects of reactive species in the trench as similar to the effects of lateral material removal at all points on one side of the pattern element. Thus, for a pattern element perimeter L extending around region A, the plasma species linear concentration (C T ) can be expressed as:
[0074] And the lateral etching rate can be expressed as:
[0075]
[0076] Where k is the reaction constant, n is the reaction order, and CD is a spatial property (e.g., size) of the pattern element (in this example, the trench). In the case where the pattern element is a recess, the spatial property may be the size of the opening across the trench. In the case where the pattern element is not a recess, the spatial property may be the size across the pattern element material that remains when or after material is removed from the substrate.
[0077] For simple geometries, such as circles, ellipses, and linear grooves, the plasma species linear concentration C T It can be defined as a function of CD as follows:
[0078]
[0079] CD t -CD0=CD0e kt -CD0 [5]
[0080] Etching deviation = CD0(e kt -1) [6]
[0081] Where CD0 represents the initial spatial attribute value (e.g., initial size), CD t represents the spatial property at a later etching time t (so the etching bias can be CD t -CD0), and k is the reaction constant for the etching process.
[0082] Using an equation such as equation [6], the parameter kt can be determined by fitting the etch bias equation to a set of measured data. In particular, the parameter kt can be determined by fitting a set of etch bias values determined for various values of CD0 based on data collected from a set of measurement sites (e.g., different evaluation points 116 / 124) in a device pattern on a substrate as described above. Thus, when parameterized by fitting, the etch bias model is specified for a specific etching process (including its etching time) to which the etch bias model is fitted.
[0083] Therefore, in an embodiment, according to the model of equation [6], the etch bias of a device pattern etched using an etching process for which the model of equation [6] has been parameterized can be determined by inputting only a specific CDO value. The etch bias model can be used for different device patterns (using the same patterning process) and / or for different locations of various different pattern elements of the device pattern.
[0084] To accommodate non-simple geometric layouts (e.g., random layouts) where CD0 is not easily defined, Equation [6] can be reformulated as:
[0085] Etching deviation = k1C T0 (e kt -1) [7]
[0086] Where t is the etching time, k is the reaction constant for the etching process, C T0 is the initial plasma species linear concentration, and k1 is the calibration parameter to be fitted. This is done by identifying CD0 and the initial plasma species linear concentration C at the edge of the pattern element. T0 Approximately proportional to the completion (note that the above C T Actually ). Therefore, in embodiments where the CD0 of a pattern element is unknown or not well defined, CD0 and C T0 The approximation of may help in the etch bias calculation.
[0087] Therefore, in order to determine C T0 To fit equation [7] and then determine the etching bias (because C T0 The CD0 variable in the model that will effectively replace the model of Eq. [6]) can define a range around an evaluation point that corresponds to an etch bias that has been measured (for parameterization of the model) or to a location of interest where an etch bias is expected (for etch bias calculation using a parameterized model). The range effectively defines the initial plasma species linear concentration.
[0088] Figure 6A schematic diagram of a modeled region 400 of an embodiment of a device is depicted. The modeled region 400 includes a pattern element 402 (trench) having an area 404 that is located within an initial region perimeter 405. The pattern element 402 has an evaluation point 410. The evaluation point 410 corresponds to a location where an etch bias is determined for parameterization of the model and / or corresponds to a location for which an etch bias is determined using a parameterized model. Therefore, to define the initial plasma species linear concentration, an ambition 406 is defined. In an embodiment, the ambition 406 is a radius. In an embodiment, the ambition 406 is defined relative to the evaluation point 410, for example, the evaluation point 410 is located at a central portion of the ambition 406. The ambition 406 helps define the range of the region or area and perimeter or circumference of the pattern element 402 (because the evaluation point 410 is located on the pattern element 402) that will be considered for calculating C T0 , C T0 Actually That is, it helps define the area adjacent to the evaluation point 410. Therefore, if Figure 6 As shown, the applicable area is the shaded area 404, which appears to be bounded at its opposite ends by boundaries 406 and bounded by opposite sides of the pattern element 402. Figure 6 As shown, the boundary 408 extends to cover the second pattern element 416, but the area is not included because it is not connected to the pattern element (trench) 402. Therefore, the area and perimeter of the shaded area 404 can be combined with the plasma species surface concentration to form the formula To calculate the initial plasma species linear concentration C T0 For parameterization of the model, the initial plasma species linear concentration C is calculated for each etch bias evaluated for = for the fit T0 To perform etching bias calculations using the parameterized model, the initial plasma species linear concentration C is calculated for the evaluation point 410 of interest. T0 .
[0089] Therefore, using equations such as Equation [7], the parameters kt and k1 can be determined by fitting the etch bias equation to a set of measured data. In particular, the linear concentrations C of the various initial plasma species calculated as described above can be determined by fitting the etch bias equation to a set of measured data. T0The parameters kt and k1 are determined by fitting a set of etch bias values collected from a set of measurement sites (e.g., different evaluation points 410) in the device pattern on the substrate as described above. Thus, when parameterized by fitting, the etch bias model is specified for a specific etching process (including etching time and limit) to which the etch bias model is fitted. The limit size describes how long the etching proximity effect is, so the limit size can be determined based on the substrate data (e.g., different limit sizes can be tried to obtain a better fit using a determined higher or highest coefficient).
[0090] Therefore, in an embodiment, according to the model of equation [7], it is possible to obtain the linear concentration of a specific initial plasma species by only inputting C T0 (which can be calculated as described using the limit size of the model) to determine the etch bias of a device pattern etched using the etching process for which the model of equation [7] has been parameterized.
[0091] Although the above etch bias calculation has focused on the etch bias contribution from the plasma species itself, the patterned material (e.g., resist or other masking material) itself may affect the nature of the etch bias. Therefore, the etch bias calculation can take into account one or more materials of the patterned material that affect the etch bias of the substrate. Therefore, the etch bias contribution of the patterned material itself can be taken into account by associating the reaction constant k with one or more patterned material properties related to the etching rate in the lateral direction. Therefore, in an embodiment, the rate constant k of equation [7] can be replaced with a modified form of the Arrhenius equation. By using the linear concentration C of the patterned material R Substituting the activation energy Ea of the Arrhenius equation and combining the other factors of the exponent into the term s, the modified form of the Arrhenius equation can be expressed as:
[0092]
[0093] And, the etching bias equation [7] can then be expressed as follows:
[0094]
[0095] Where t is the etching time, C T0 is the initial plasma species linear concentration (which can be calculated as described above), k1 is the calibration parameter to be fitted, and A is the frequency factor for the reaction.
[0096] Although C T0 The initial etched area after exposure relates to the pattern element being etched, but the linear concentration C of the patterned materialR The perimeter region of the patterned material adjacent to a particular evaluation point of the device pattern. That is, the region of the patterned material can be specified to determine the linear concentration C of the patterned material corresponding to a point on the perimeter of the pattern element being etched. R The following figures illustrate different example techniques for providing the linear concentration of patterned material for the etch bias formula shown in Equation [9].
[0097] Figure 7 A schematic diagram of a modeled region 500 of an embodiment of a device is depicted. The modeled region 500 includes a pattern element 502. In this case, the pattern element 502 is a trench. In other embodiments, the pattern element 502 may be a different type of feature. The modeled region 500 includes an etched region 504 within the sides 506A and 506B of the pattern element 502 and within segments 508A and 508B of a boundary 508 located around an evaluation point 510 of the modeled region 502. The boundary 508 may be, for example, Figure 7 , or may be another closed shape such as an ellipse, an oval, a rectilinear shape, or some other shape that surrounds a portion of a pattern element and an area of patterned material adjacent to the etched area 504 of pattern element 502. Figure 7 5 , range 508 has an evaluation point 510 at a central portion of range 508 , and a radius 512 extends outward from evaluation point 510 to describe the range perimeter.
[0098] Figure 7 A patterned material (e.g., resist) region 516 is shown within a boundary 508 that may be bounded by side 506B of pattern element 502 and perimeter segments 514A and 514B of range 508. Patterned material region 516 may exclude open regions 520 within border 522 of adjacent pattern element 524 that at least partially fall within the perimeter of range 508. In some embodiments, range 508 may include multiple open regions (such as open regions 520) that are completely or partially within the perimeter of range 508 and reduce the size of patterned material region 516, which may be used to calculate a patterned material linear concentration for patterned material adjacent to an evaluation point and thus affect the etch bias at the evaluation point.
[0099] Figure 8A schematic diagram of a modeled region 600 of an embodiment of a device is depicted. The modeled region 600 may include a first pattern element 602 having a first sidewall 604 and a second pattern element 606 having a second sidewall 608. An evaluation point 610 is located at one end of the first pattern element 602. The evaluation point 610 is located on one side of a limit 614 of patterned material extending toward the second pattern element 606. The limit 614 extends outwardly from the first pattern element 602 by a first distance 620, and extends a second distance 622 perpendicular to the first distance 620. In an embodiment, the first distance 620 is perpendicular to a side or tangent of the sidewall 604. The limit 614 may encompass a patterned material region 616 and an overlap region 618. The overlap region 618 corresponds to that portion of the limit 614 that extends across at least a portion of another pattern element, such as the pattern element 606. Thus, the patterned material region 616 may be defined as the limit minus the overlap region 618. Boundary 614 may be a linear boundary, but may be circular, oval, elliptical, or some other closed shape that encompasses or abuts at least an evaluation point, such as evaluation point 610 of pattern element 602. In some embodiments, boundary 614 may be completely filled with patterned material if it were to extend and not include an overlap region, such as overlap region 618 (e.g., if boundary 614 extends from a suitable different evaluation point on sidewall 604).
[0100] Therefore, for region 516 or 616, the patterned material linear concentration C can be calculated. R The same C method as described above can be used, except that the surface concentration of the patterned material is used instead of the surface concentration of the plasma species. T A similar formula is used to calculate the linear concentration C of the patterning material. R .
[0101] Then, using equation [9], the parameters At and k1 can be determined by fitting the etch bias equation to a set of measured data. In particular, the linear concentrations C of the various initial plasma species calculated as described above can be calculated by T0 and the associated patterning material linear concentration C calculated as described above R The parameters At and k1 are determined by fitting a set of etch bias values collected from a set of measurement sites (e.g., different evaluation points 410, 510, 610) in the device pattern on the substrate as described above. Therefore, when parameterized by fitting, the etch bias model is specified for a specific etching process (including etching time and associated limits) to which the etch bias model is fitted. These limits can be determined based on the substrate data (e.g., different limit sizes and / or shapes can be tried to obtain a better fit using a determined higher or highest coefficient).
[0102] Therefore, in the embodiment, according to the model of equation [9], it is possible to obtain the linear concentration C of the initial ionic species by only inputting the linear concentration C of the initial ionic species. T0 (which can be calculated as described using the limit size of the model) and the patterning material linear concentration C R (which can be described using the limit size of the model) to determine the etch bias of a device pattern etched using an etching process for which the model of equation [9] has been parameterized.
[0103] In the above formula, the material properties of the patterned material layer are related to the reaction constant. However, the etching bias may be a chemical reaction that occurs with the plasma species and the patterned material participating as reactants. Then, the etching bias in the lateral direction can be regarded as a second-order reaction, where the lateral etching rate is related to C T and C R Both are proportional.
[0104]
[0105] where k is the reaction constant.
[0106] It can be roughly considered that C T The decrease is equal to C R or vice versa. Therefore, at time t, we can specify C T The reduction is x (and C R The increase is x), then it can be formulated as:
[0107]
[0108]
[0109] At time 0, C T0 C T , at time 0 C R0 C R Therefore, using the initial condition of x = 0 at t = 0 and integrating the above differential equation yields:
[0110]
[0111]
[0112]
[0113]
[0114] Where C T (t) is C T, at time t C R (t) is C R Since in the above two equations, C T and C R is expressed as a function of etching time, so the final etching bias can be expressed as:
[0115]
[0116] where C is evaluated at n time intervals during the etching time T and C R , and t n and c n is the etching rate coefficient. Using the measured data, the etching rate coefficient c can be calibrated n and for evaluating C T and C R Other parameters of are used to obtain the etching bias model.
[0117] Therefore, a simplified chemical kinetics based etch bias model is provided which aims to predict / simulate the lateral CD evolution due to pattern proximity effect. The etch bias is attributed to the plasma species in the trench and the optionally etched patterned material in the vicinity or neighborhood.
[0118] The idea in the model is that the plasma species act uniformly on the edge to cause the etching deviation. Due to the oscillatory nature of the strong RF (radio frequency) electromagnetic field used to excite the plasma, the assumption that the plasma species remain in equilibrium may not be correct. Failure of this assumption may lead to inaccurate etch time estimates. However, since the lateral spatial property (e.g., CD) changes are of interest and the time factor in the model is a fitting parameter, the failure of this assumption does not significantly affect the validity of the model.
[0119] Several approaches have been discussed above regarding the contribution of the etch bias from the etched patterned material. The contribution of the patterned material to the etch bias can be viewed as an exponential factor in the reaction constant, just like the classical Arrhenius equation governing the reaction. Additionally or alternatively, the patterned material can be viewed as a reactant in the second-order reaction scheme.
[0120] Thus, a physical method for modeling etch bias for an etching process has been described herein. The method is capable of simulating etch bias for various layouts with potential full-chip applications. In an embodiment, it is assumed that the plasma chemistry in the trench is maintained in equilibrium and the plasma species act uniformly on the edge to induce etch bias. For complex layouts, a method for evaluating the edge loading of the plasma species is provided. The evaluation is based on the local adjacent trench area and the edge length. In addition, the effect of the patterned material on the etch bias can be incorporated into the etch bias model in several ways. One way is to treat the effect as an exponential factor of the reaction constant. Another way treats the patterned material in the second-order reaction scheme as a reactant (together with the plasma species), where C is derived as a function of time. T and C R The evolution of the etching bias is C T and C R Time integral over time. A set of calibration data is used to calibrate the etch bias model using the described physical approach.
[0121] In an embodiment, a method is provided, comprising: determining, by a hardware computer, an etching bias of a pattern to be etched using an etching step of a patterning process based on an etching bias model, the etching bias model comprising a formula, the formula comprising: a variable associated with a spatial property of the pattern or a variable associated with an etching plasma species concentration of the etching step; and a mathematical term comprising a natural exponential function fitted to a power of a parameter or based on an etching time of the etching step; and adjusting the patterning process based on the determined etching bias. In an embodiment, the parameters of the exponential function are fitted to the etching time and reaction constant for the etching step, or based on the etching time and reaction constant for the etching step. In an embodiment, the variable comprises a spatial property of the pattern, and the spatial property of the pattern is an initial pattern element size. In an embodiment, the variable comprises a spatial property of the pattern, and the formula comprises the variable multiplied by the mathematical term. In an embodiment, the variable comprises a spatial property of the pattern, and the formula comprises CD0(e kt -1), wherein CD0 is the variable and corresponds to the size of the pattern, and kt is a parameter fitted to the etching time t of the etching step and the reaction constant k for the etching step. In an embodiment, the variable includes the etching plasma species concentration and the formula also includes a calibration parameter. In an embodiment, the variable includes the etching plasma species concentration and the formula includes the variable multiplied by the mathematical term. In an embodiment, the variable includes the etching plasma species concentration, wherein the formula includes k1C T0 (e kt -1) in the form of k1, where k1 is the calibration parameter, C T0is the variable and corresponds to the etching plasma species concentration, and kt is a parameter fitted for the etching time t of the etching step and the reaction constant k for the etching step. In an embodiment, the variable includes the etching plasma species concentration, and the etching plasma species concentration is defined for the etched area of the pattern within the etched material boundary around the evaluation point on the pattern, wherein the etching plasma species concentration is proportional to the etched area. In an embodiment, the etched material boundary is a circular boundary centered at the evaluation point, and the evaluation point is located at the interface between the etched area and the patterned material area of the substrate. In an embodiment, the variable includes the etching plasma species concentration, and the formula includes a modified form of the Arrhenius equation incorporated into the power of the exponential function. In an embodiment, the variable includes the etching plasma species concentration, and the formula incorporates the patterned material concentration in the power of the exponential function. In an embodiment, the variable includes the etching plasma species concentration, and wherein the formula has a formula including The form of, where k1 is the calibration parameter, C T0 is the variable and corresponds to the etching plasma species concentration, C R is the patterning material concentration, A t is a parameter fitted for the etching time t of the etching step and the frequency factor A for the reaction of the etching step, and s is a constant of the etching step. In an embodiment, the patterned material concentration is defined for the patterned material area of the pattern adjacent to the evaluation point on the pattern. In an embodiment, the patterned material boundary is surrounded by straight lines, and the patterned material boundary is adjacent to or covers the evaluation point, or the patterned material boundary is circular and surrounds the evaluation point. In an embodiment, the etching plasma species concentration is defined for the etched area of the pattern within the etched material boundary surrounding the evaluation point on the pattern, wherein the etching plasma species concentration is proportional to the etched area. In an embodiment, the method further includes: collecting a value of a spatial property of the pattern at each of a plurality of sites in the pattern; and fitting the formula using the value of the spatial property by a hardware computing device to generate the parameter. In an embodiment, adjusting the patterning process includes adjusting the boundary of a zone of the pattern forming device according to the calculated etching deviation. In an embodiment, the zone of the pattern forming device modifies the radiation that strikes the pattern forming device. In an embodiment, the pattern is a device pattern.
[0122] In an embodiment, a method is provided, comprising: determining, by a hardware computer, an etching bias of a pattern to be etched in an etching step of a patterning process based on an etching bias model, wherein the etching bias model includes a function of an etching plasma species concentration and a patterning material concentration; and adjusting the patterning process based on the determined etching bias.
[0123] In an embodiment, the function comprises an etching plasma species concentration multiplied by a patterning material concentration. In an embodiment, the function comprises a sum of an etching plasma species concentration and a patterning material concentration for a certain number of time intervals of etching time. In an embodiment, the etching model comprises mathematical terms comprising a natural exponential function fitted to a power of a parameter or based on the etching time of an etching step. In an embodiment, the etching bias model has a of the form, where C T corresponds to the etching plasma species concentration and is evaluated at n number of time intervals during the etching time, C R corresponds to the patterning material concentration and is evaluated at n number of time intervals in the etching time, and t n and c n is the etching rate coefficient.
[0124] As those skilled in the art will appreciate, the present technology can be implemented as a system, method or computer program product. Therefore, aspects of the present application can take the form of a complete hardware embodiment, a complete software embodiment (including firmware, resident software, microcode, etc.) or a combination of software and hardware embodiments, which can generally be referred to as "circuit", "module" or "system" in this article. In addition, aspects of the present application can take the form of a computer program product implemented in any one or more computer-readable media, and the computer-readable medium has a computer-usable program code implemented thereon.
[0125] Any combination of one or more computer-readable media can be utilized. Computer-readable media can be computer-readable signal media or computer-readable storage media. Computer-readable storage media can be, for example, but not limited to: electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, equipment, devices, or any suitable combination of the foregoing. More specific examples (non-exhaustive list) of computer-readable media will include the following storage media: electrical connectors with one or more wires, portable computer floppy disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CDROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium can be any tangible medium that can contain or store a program used by or in conjunction with an instruction execution system, device or device.
[0126] A computer readable signal medium may include a propagated data signal having a computer readable program code implemented therein, for example, in a baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including but not limited to electromagnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or convey a program for use by or in conjunction with an instruction execution system, device, or device.
[0127] Computer code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, radio frequency (RF), etc., or any suitable combination thereof.
[0128] The computer program code for the operation of aspects of the application can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, Smalltalk, C++ or its similar languages, and conventional procedural programming languages such as "C" programming language or similar programming languages.Program code can be executed completely on the user's computer, partially on the user's computer, executed as a separate software package, partially on the user's computer and partially on a remote computer, or executed completely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer by any type of network (including local area network (LAN) or wide area network (WAN)), or can be connected to an external computer (for example, by using the Internet of an Internet service provider).
[0129] The computer program instructions may also be loaded onto a computer, other programmable data processing device, or other apparatus, so that a series of operational steps are performed on the computer, other programmable device, or other apparatus to produce a computer-implemented process, so that the instructions executed on the computer, other programmable device provide a process for implementing one or more functions / actions specified herein.
[0130] As mentioned above, it should be understood that the illustrative embodiments can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment containing both hardware elements and software elements. In an example embodiment, the mechanisms of the illustrative embodiments can be implemented in software or program code, including but not limited to firmware, resident software, microcode, etc.
[0131] A data processing system suitable for storing and / or executing program code will include at least one processor coupled directly or indirectly to a storage element via a system bus. The storage element may include a local memory used during the actual execution of the program code, a mass storage, and a cache memory that provides temporary storage of at least a certain program code in order to reduce the number of times the code must be retrieved from the mass storage during execution.
[0132] Input / output or I / O devices (including but not limited to keyboards, displays, pointing devices, etc.) can be coupled to the system either directly or through intervening I / O controllers. Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modem and Ethernet cards are just a few of the currently available types of network adapters.
[0133] Fig. 9An embodiment of a computer system 1700 that can assist in implementing any of the methods and processes disclosed herein is shown. The computer system 1700 includes a bus 1702 or other communication mechanism for communicating information, and a processor 1704 (or multiple processors 1704 and 1705) coupled to the bus 1702 for processing information. The computer system 1700 also includes a main memory 1706, such as a random access memory RAM or other dynamic storage device, coupled to the bus 1702 for storing information and instructions to be executed by the processor 1704. The main memory 1806 can also be used to store temporary variables or other intermediate information during the execution of instructions to be executed by the processor 1704. The computer system 1700 also includes a read-only memory ROM 1708 or other static storage device coupled to the bus 1702 for storing static information and instructions for the processor 1704. A storage device 1710, such as a magnetic disk or optical disk, is provided and coupled to the bus 1702 for storing information and instructions.
[0134] The computer system 1700 can be coupled to a display 1712, such as a cathode ray tube (CRT) or a flat panel display or a touch panel display, via the bus 1702 for displaying information to a computer user. An input device 1714 including alphanumeric keys and other keys is coupled to the bus 1702 for communicating information and command selections to the processor 1704. Another type of user input device is a cursor controller 1716 (such as a mouse, trackball, or cursor direction keys) for communicating direction information and command selections to the processor 1704 and for controlling cursor movement on the display 1712. Such an input device typically has two degrees of freedom on two axes (a first axis (e.g., x) and a second axis (e.g., y)), which allows the device to specify a position in a plane. A touch panel (screen) display can also be used as an input device.
[0135] According to one embodiment, portions of the processes described herein may be performed by the computer system 1700 in response to the processor 1704 executing one or more sequences of one or more instructions contained in the main memory 1706. Such instructions may be read into the main memory 1706 from another computer-readable medium, such as a storage device 1710. The execution of the sequence of instructions contained in the main memory 1706 causes the processor 1704 to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be used to execute the sequence of instructions contained in the main memory 1706. In alternative embodiments, hard-wired circuits may be used in place of or in combination with software instructions. Therefore, the description herein is not limited to any particular combination of hardware circuitry and software.
[0136] The term "computer-readable medium" as used herein refers to any medium that participates in providing instructions to the processor 1704 for execution. Such media can take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks, such as storage device 1710. Volatile media include dynamic memory, such as main memory 1706. Transmission media include coaxial cables, copper wires, and optical fibers, including wires containing bus 1702. Transmission media can also take the form of sound waves or light waves, such as sound waves or light waves generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, floppy disks, flexible disks, hard disks, magnetic tapes, any other magnetic media, CD-ROMs, DVDs, any other optical media, punch cards, paper tapes, any other physical media with hole patterns, RAM, PROMs and EPROMs, FLASH-EPROMs, any other memory chips or boxes, carriers as described below, or any other media from which a computer can read.
[0137] Various forms of computer readable media may be involved in transmitting one or more sequences of one or more instructions to the processor 1704 for execution. For example, the instructions may initially be carried on a disk of a remote computer. The remote computer may load the instructions into its dynamic memory and send the instructions over a telephone line using a modem. A modem local to the computer system 1700 may receive the data on the telephone line and convert the data into an infrared signal using an infrared transmitter. An infrared detector coupled to the bus 1702 may receive the data carried in the infrared signal and place the data on the bus 1702. The bus 1702 transmits the data to the main memory 1706, from which the processor 1704 retrieves and executes the instructions. The instructions received by the main memory 1706 may optionally be stored on the storage device 1710 before or after execution by the processor 1704.
[0138] The computer system 1700 may also include a communication interface 1718 coupled to the bus 1702. The communication interface 1718 provides a two-way data communication coupled to a network link 1720, which is connected to a local network 1722. For example, the communication interface 1718 may be an integrated services digital network (ISDN) card or a modem for providing a data communication connection with a corresponding type of telephone line. As another example, the communication interface 1718 may be a local area network (LAN) card for providing a data communication connection with a compatible LAN. A wireless link may also be implemented. In any such implementation, the communication interface 1718 sends and receives electrical signals, electromagnetic signals, or optical signals that carry digital data streams representing various types of information.
[0139] The network link 1720 typically provides data communication to other data devices through one or more networks. For example, the network link 1720 may provide a connection to a host computer 1724 or to data equipment operated by an Internet Service Provider (ISP) 1726 through a local network 1722. The ISP 1726, in turn, provides data communication services through the global packet data communication network now commonly referred to as the "Internet" 1728. Both the local network 1722 and the Internet 1728 use electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on the network link 1720 and through the communication interface 1718 (which transmit the digital data to and from the computer system 1700) are exemplary forms of carrier waves that transport the information.
[0140] The computer system 1700 can send messages and receive data, including program code, through the network, network link 1720, and communication interface 1718. In the Internet example, server 1730 can transmit the requested code for an application program through Internet 1728, ISP 1726, local network 1722, and communication interface 1718. For example, one such downloaded application can provide the methods described herein or parts thereof. The received code can be executed by processor 1704 when it is received, and / or stored in storage device 1710 or other non-volatile storage for later execution. In this way, computer system 1700 can obtain application code in the form of a carrier wave.
[0141] These embodiments may also be described using the following aspects:
[0142] 1. A method comprising:
[0143] determining, by a hardware computer, an etch bias of a pattern to be etched using an etching step of a patterning process based on an etch bias model, the etch bias model comprising a formula including: variables associated with spatial properties of the pattern or variables associated with concentrations of etching plasma species of the etching step, and mathematical terms including natural exponential functions fitted to powers of parameters or based on etching time of the etching step; and
[0144] The patterning process is adjusted based on the determined etch bias.
[0145] 2. The method according to clause 1, wherein the parameters of the exponential function are fitted to the etching time and reaction constant for the etching step, or are based on the etching time and reaction constant for the etching step.
[0146] 3. The method according to aspect 1 or aspect 2, wherein the variable comprises a spatial property of the pattern, and the spatial property of the pattern is an initial pattern element size.
[0147] 4. A method according to any one of clauses 1 to 3, wherein the variable comprises a spatial property of the pattern and the formula comprises multiplying the variable by the mathematical term.
[0148] 5. A method according to any one of aspects 1 to 4, wherein the variables include spatial properties of the pattern and the formula includes CD0(e kt -1), wherein CD0 is the variable and corresponds to the size of the pattern, and kt is a parameter fitted with respect to the etching time t of the etching step and the reaction constant k for the etching step.
[0149] 6. The method of any one of clauses 1-5, wherein the variable comprises the etching plasma species concentration and the formula further comprises a calibration parameter.
[0150] 7. The method of any one of clauses 1-6, wherein the variable comprises the etching plasma species concentration, and the formula comprises multiplying the variable by the mathematical term.
[0151] 8. The method according to any one of aspects 1 to 7, wherein the variable includes the etching plasma species concentration, and wherein the formula includes k1C T0 (e kt -1) in the form of k1, where k1 is the calibration parameter, C T0 is the variable and corresponds to the etching plasma species concentration, and kt is a parameter fitted with respect to the etching time t of the etching step and the reaction constant k for the etching step.
[0152] 9. A method according to any one of aspects 1 to 8, wherein the variable includes the etching plasma species concentration, and the etching plasma species concentration is defined for an etched area of the pattern within the etched material boundary surrounding an evaluation point on the pattern, wherein the etching plasma species concentration is proportional to the etched area.
[0153] 10. The method of clause 9, wherein the etched material boundary is a circular boundary centered at the evaluation point, the evaluation point being located at an interface between the etched area and a patterned material area of the substrate.
[0154] 11. The method of any one of clauses 1-10, wherein the variable comprises an etching plasma species concentration and the formula comprises a modified form of the Arrhenius equation incorporated in a power of the exponential function.
[0155] 12. The method of any one of clauses 1-11, wherein the variables include the etching plasma species concentration and the formula incorporates patterning material concentration in the power of the exponential function.
[0156] 13. The method of any one of aspects 1 to 12, wherein the variable includes the etching plasma species concentration, and wherein the formula has a formula including The form of, where k1 is the calibration parameter, C T0 is the variable and corresponds to the etching plasma species concentration, C R is the patterning material concentration, At is a parameter fitted to the etching time t of the etching step and the frequency factor A of the reaction for the etching step, and s is a constant of the etching step.
[0157] 14. The method according to clause 12 or clause 13, wherein the patterning material concentration is defined for a patterning material area of the pattern adjacent to an evaluation point on the pattern.
[0158] 15. The method of clause 14, wherein the patterned material boundary is bounded by straight lines and abuts or covers the evaluation point, or the patterned material boundary is circular and surrounds the evaluation point.
[0159] 16. A method according to any one of aspects 12-15, wherein the etching plasma species concentration is defined for an etched area of the pattern within the confines of the etched material surrounding an evaluation point on the pattern, wherein the etching plasma species concentration is proportional to the etched area.
[0160] 17. The method according to any one of aspects 1 to 16, further comprising:
[0161] collecting a value of a spatial property of the pattern at each of a plurality of sites in the pattern; and
[0162] The parameters are generated by fitting the formula using the values of the spatial properties by a hardware computing device.
[0163] 18. The method of any one of clauses 1 to 17, wherein adjusting the patterning process comprises adjusting boundaries of zones of the patterning device according to the calculated etch bias.
[0164] 19. A method according to clause 18, wherein the zone of the patterning device modifies radiation impinging the patterning device.
[0165] 20. The method of any one of clauses 1 to 19, wherein the pattern is a device pattern.
[0166] 21. A method comprising:
[0167] determining, by a hardware computer, an etch bias of a pattern to be etched using an etch step of a patterning process based on an etch bias model, the etch bias model including a function of an etching plasma species concentration and a patterning material concentration; and
[0168] The patterning process is adjusted based on the determined etch bias.
[0169] 22. The method of clause 21, wherein the function comprises the etch plasma species concentration multiplied by the patterning material concentration.
[0170] 23. The method of clause 21 or clause 22, wherein the function comprises the sum of the etching plasma species concentration and the patterning material concentration for a certain number of time intervals of etching time.
[0171] 24. The method of any one of clauses 21-23, wherein the etching model comprises mathematical terms including natural exponential functions to which powers of parameters are fitted or based on etching times of the etching steps.
[0172] 25. The method according to any one of aspects 21-24, wherein the etching bias model has a The form of C T corresponds to the etching plasma species concentration and is evaluated at n number of time intervals during the etching time, C R corresponding to the patterning material concentration and evaluated at n number of time intervals in the etching time, and t n and c n is the etching rate coefficient.
[0173] 26. A computer program product, comprising a non-transitory computer-readable medium having recorded thereon instructions, the instructions implementing the method of any one of aspects 1-25 when executed by a computer.
[0174] Although specific reference has been made herein to the manufacture of ICs, it should be clearly understood that the description herein has many other possible applications. For example, it can be used in the manufacture of integrated optical systems, guidance and detection patterns of magnetic domain memories, liquid crystal display panels, thin film magnetic heads, etc. Those skilled in the art will understand that in the context of such alternative applications, any use of the terms "reticle", "wafer" or "die" herein may be considered interchangeable with the more general terms "patterning device", "substrate" and "target portion", respectively.
[0175] In this document, the terms "radiation" and "beam" are used to cover all types of electromagnetic radiation, including ultraviolet radiation (e.g., having a wavelength of 365nm, 248nm, 193nm, 157nm or 126nm) and extreme ultraviolet radiation (EUV, e.g., having a wavelength in the range of about 5-100nm).
[0176] Although the concepts disclosed herein may be used in systems and methods for imaging on substrates such as silicon wafers, it should be understood that the disclosed concepts may be used with any type of lithography system, such as a lithography system for imaging on substrates other than silicon wafers.
[0177] In the block diagram, although the illustrated components are depicted as discrete functional blocks, embodiments are not limited to systems where the functionality described herein is organized as shown. The functions provided by each of the components may be provided by software or hardware modules, which are organized in a manner different from that currently depicted, such as being blended, combined, replicated, dissolved, distributed (e.g., within a data center or by region), or the software or hardware may be organized in a different manner. The functions described herein may be provided by one or more processors of one or more computers executing program codes stored on a tangible, non-temporary machine-readable medium. In some cases, a third-party content distribution network may be the host of some or all of the information transmitted on the network, in which case, to the extent that information (e.g., content) is considered to be supplied or otherwise provided, the information may be provided by sending instructions to obtain the information from the content distribution network.
[0178] Unless otherwise specifically stated, it will be apparent from this discussion that throughout the specification, discussions utilizing terms such as "processing," "computing," "calculating," "determining," etc., should be understood to refer to actions or processes of a specific apparatus, such as a special purpose computer or similar special purpose electronic processing / computing device.
[0179] The reader should understand that this application describes several inventions. Rather than separating these inventions into multiple independent patent applications, the applicant has grouped these inventions into a single document, because their related themes can be applied to the economy themselves during the application process. However, the different advantages and aspects of these inventions should not be merged. In some cases, although the embodiments solve all the deficiencies mentioned herein, it should be understood that the invention is independently useful, and some embodiments only solve a subset of these problems or provide other unmentioned benefits, which are clear to the technician who consults the disclosure. Due to cost constraints, some inventions disclosed herein may not be claimed at present, and these inventions may be claimed in a later application (such as continuing this application or by modifying the claims of this application). Similarly, due to space constraints, the "summary" and "content of the invention" parts in the invention of this document should not be considered as a comprehensive enumeration of all these inventions or all aspects of these inventions.
[0180] It should be understood that the specification and drawings are not intended to limit the invention to the particular forms disclosed, but on the contrary, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
[0181] In view of this specification, those skilled in the art will understand modifications and alternative embodiments of various aspects of the present invention. Therefore, this specification and the accompanying drawings are interpreted as illustrative only, and are for the purpose of teaching those skilled in the art the general way of implementing the present invention. It should be understood that the forms of the present invention shown and described herein will be regarded as examples of embodiments. Elements and materials can be used to replace those elements and materials illustrated and described herein, parts and processes can be reversed or omitted, and certain features of the present invention can be used independently, and embodiments or features of embodiments can be combined, all of which will be clear to those skilled in the art after benefiting from the description of the present invention. Changes can be made to the elements described herein without departing from the spirit and scope of the present invention as described in the appended claims. The titles used herein are only for organizational purposes and are not meant to limit the scope of the specification.
[0182] As used throughout this application, the words "may" and "could" are used in a permissible sense (i.e., meaning potentially possible) rather than a mandatory sense (i.e., meaning must). The words "include," "including," and "includes," and the like mean including, but not limited to. As used throughout this application, the singular forms "a," "an," and "the" include plural references unless the context clearly indicates otherwise. Thus, for example, reference to "an element and an element" includes combinations of two or more elements, even though other terms and phrases such as "one or more" are used for one or more elements. Unless otherwise indicated, the term "or" is non-exclusive, i.e., includes "and" and "or." Terms describing conditional relationships, such as "in response to X, Y", "when X, Y", "if X, then Y", "when X, Y", etc., include causal relationships, where the antecedent is a necessary causal condition, the antecedent is a sufficient causal condition, or the antecedent is a contributing causal condition of the result, for example, "the statement that state X occurs when condition Y is obtained" is superordinate to "X occurs only when Y" and "X occurs when Y and Z". Such conditional relationships are not limited to results immediately after the antecedent is obtained, because some results may be delayed, and in the conditional statement, the antecedent is associated with their results, for example, the antecedent is associated with the probability of the result occurring. A statement in which multiple attributes or functions are mapped to multiple objects (e.g., one or more processors that perform steps A, B, C, and D) includes all of these attributes or functions being mapped to all of these objects and subsets of the attributes or functions being mapped to subsets of the attributes or functions (e.g., all processors each perform steps AD, and the case in which processor 1 performs step A, processor 2 performs step B and part of step C, and processor 3 performs part of step C and step D), unless otherwise specified. Furthermore, unless otherwise stated, a statement that a value or action is "based on" another condition or value encompasses both instances where the condition or value is the only factor and instances where the condition or value is one of multiple factors. Unless otherwise stated, a statement that "each" instance of some set has a certain property should not be read to exclude the case where some other identical or similar components in the larger set do not have the property, i.e., each does not necessarily mean every or any.
[0183] To the extent that certain U.S. patents, U.S. patent applications, or other materials (e.g., articles) have been incorporated by reference, the text of such U.S. patents, U.S. patent applications, and other materials is incorporated only to the extent that there is no conflict between such materials and the statements and figures set forth herein. In the event of such a conflict, any such conflicting text in such incorporated by reference U.S. patents, U.S. patent applications, and other materials is not specifically incorporated by reference herein.
[0184] The description of the present application has been presented for the purpose of illustration and description, and the description is not intended to be exhaustive or to limit the invention to the disclosed form. Many modifications and variations will be clear to those skilled in the art. Therefore, it will be understood by those skilled in the art that modifications may be made according to the described content without departing from the scope of the claims set forth below.
Claims
1. A method for a patterning process, comprising: determining, by a hardware computer, an etch bias of a pattern to be etched using an etch step of a patterning process based on an etch bias model, the etch bias model including a function of an etching plasma species concentration and a patterning material concentration; and adjusting the patterning process based on the determined etch bias; Wherein the etch bias model comprises mathematical terms including a natural exponential function to which powers of parameters are fitted or based on an etch time of the etch step.
2. The method according to claim 1, wherein: The function of the etch bias model includes the etching plasma species concentration multiplied by the patterning material concentration.
3. The method according to claim 1 or claim 2, wherein: The function of the etch bias model includes a sum of the etching plasma species concentration and the patterning material concentration for a certain number of time intervals of etching time.
4. The method according to claim 3, wherein: The etching bias model includes The form of C T corresponds to the etching plasma species concentration and is evaluated at n number of time intervals during the etching time, C R corresponding to the patterning material concentration and evaluated at n number of time intervals in the etching time, and t n and c n is the etching rate coefficient.
5. The method according to claim 1, wherein: The parameters of the exponential function are fitted to, or based on, the etching time and reaction constant for the etching step.
6. The method according to claim 1, wherein: The variables of the etch bias model include a spatial property of the pattern, and the spatial property of the pattern is an initial pattern element size.
7. The method according to claim 6, wherein: The variable comprises a spatial property of the pattern, and the etch bias model comprises the variable multiplied by the mathematical term.
8. The method according to claim 6, wherein: The variables include spatial properties of the pattern, and the etch bias model includes , where CD0 is the variable and corresponds to the size of the pattern, and kt is a parameter fitted with respect to the etching time t of the etching step and the reaction constant k for the etching step.
9. The method according to claim 6, wherein: The variables include the etch plasma species concentration and the etch bias model also includes calibration parameters.
10. The method according to claim 6, wherein: The variable includes the etch plasma species concentration, and the etch bias model includes the variable multiplied by the mathematical term.
11. The method according to claim 6, wherein: The variables include the etching plasma species concentration, wherein the etching bias model includes The form of, where k1 is the calibration parameter, C T0 is the variable and corresponds to the etching plasma species concentration, and kt is a parameter fitted with respect to the etching time t of the etching step and the reaction constant k for the etching step.
12. The method according to claim 6, wherein: The variable includes the etching plasma species concentration, and the etching plasma species concentration is defined for an etched area of the pattern within a confinement of etched material surrounding an evaluation point on the pattern, wherein the etching plasma species concentration is proportional to the etched area.
13. The method according to claim 12, wherein: The etched material boundary is a circular boundary centered at the evaluation point, which is located at the interface between the etched area and the patterned material area of the substrate.
14. The method according to claim 6, wherein: The variables include etch plasma species concentration, and the etch bias model comprises a modified form of the Arrhenius equation incorporated in a power of the exponential function.
15. The method according to claim 6, wherein: The variables include the etch plasma species concentration, and the etch bias model incorporates patterning material concentration into the power of the exponential function.
16. The method according to claim 6, wherein: The variables include the etching plasma species concentration, and wherein the etching bias model has a The form of, where k1 is the calibration parameter, C T0 is the variable and corresponds to the etching plasma species concentration, C R is the patterning material concentration, At is a parameter fitted to the etching time t of the etching step and the frequency factor A for the reaction of the etching step, and s is a constant of the etching step.
17. The method according to claim 15 or claim 16, wherein: The patterning material concentration is defined for a patterning material area of the pattern adjacent to an evaluation point on the pattern.
18. The method according to claim 17, wherein: The patterned material boundary is surrounded by straight lines and the patterned material boundary is adjacent to or covers the evaluation point, or the patterned material boundary is circular and surrounds the evaluation point.
19. The method according to claim 15 or claim 16, wherein: The etching plasma species concentration is defined for an etched area of the pattern within a confinement of etched material surrounding an evaluation point on the pattern, wherein the etching plasma species concentration is proportional to the etched area.
20. The method according to any one of claims 6 to 16, further comprising: collecting a value of a spatial property of the pattern at each of a plurality of sites in the pattern; and The parameters are generated by fitting the etching bias model using the values of the spatial properties by a hardware computing device.
21. The method according to any one of claims 6 to 16, wherein: Adjusting the patterning process includes adjusting boundaries of zones of a patterning device based on the calculated etch bias.
22. The method according to claim 21, wherein: The region of the patterning device modifies radiation impinging the patterning device.
23. The method according to any one of claims 6 to 16, wherein: The pattern is a device pattern.
24. A computer program product comprising a non-transitory computer-readable medium having instructions recorded thereon, the instructions implementing the method of claim 1 when executed by a computer.
Citation Information
Patent Citations
System and method for etching a mask
CN1906747A
Run-to-run control process for controlling critical dimensions
US5926690A