semiconductor circuits

Abstract

The present invention discloses a semiconductor circuit, including a high-voltage integrated circuit and a three-phase inverter bridge. The high-voltage integrated circuit includes a PWM signal buffer module, a high-voltage drive module, a low-voltage drive module, and a bootstrap module. The PWM signal buffer module is electrically connected to the high-voltage drive module and the low-voltage drive module. The bootstrap module has three signal input terminals and three high-side floating power supply output terminals. The three signal input terminals are electrically connected to the three level output terminals of the PWM signal buffer module, and the three high-side floating power supply output terminals respectively supply power to the three upper bridge arms of the three-phase inverter bridge. The three high-voltage drive output terminals of the high-voltage drive module respectively drive the three upper bridge arms of the three-phase inverter bridge, and the three low-voltage drive output terminals of the low-voltage drive module respectively drive the three lower bridge arms of the three-phase inverter bridge. The technical solution of the present invention solves the problem of unstable bootstrap voltage, which easily causes insufficient power supply or circuit failure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor circuit. Background Art

[0002] An Intelligent Power Module (IPM) is a power drive product that combines power electronics and integrated circuit technology. It integrates power switching devices and high-voltage driver circuits and is widely used in systems such as inverters, welding machines, and servo drives. During operation, the IPM receives control signals from the MCU to drive subsequent circuits and sends system status detection signals back to the MCU for processing, forming a loop drive to achieve both driving and detection purposes.

[0003] The intelligent power module (IPM) is internally composed of an upper bridge arm, lower bridge arm, logic circuits, and protection circuits. Drive control and protection feedback are implemented using a half-bridge or full-bridge microcontroller or logic chip. When the lower bridge arm is enabled, the upper bridge arm automatically charges and discharges to ensure that the upper bridge arm can conduct when the lower bridge arm is disabled. Therefore, the bootstrap circuit is one of the prerequisites for the normal operation of the upper bridge of the intelligent power module.

[0004] Currently, intelligent power modules lack internal bootstrap functionality. Instead, a bootstrap circuit is typically built on a peripheral application control board to implement the charging and discharging functions of the module's upper bridge. However, this current bootstrap circuit solution can cause electromigration after long-term operation on the control board, leading to unstable bootstrap voltage and potentially causing power shortages or circuit failure. Summary of the Invention

[0005] The main purpose of the present invention is to provide a semiconductor circuit, aiming to solve the problem that the bootstrap voltage is unstable and easily causes insufficient power supply or circuit failure.

[0006] To achieve the above objectives, the semiconductor circuit proposed in the present invention includes a high-voltage integrated circuit and a three-phase inverter bridge. The high-voltage integrated circuit includes a PWM signal buffer module, a high-voltage drive module, a low-voltage drive module, and a bootstrap module. The PWM signal buffer module is electrically connected to the high-voltage drive module and the low-voltage drive module.

[0007] The bootstrap module has three signal input terminals and three high-side floating power supply output terminals. The three signal input terminals are electrically connected to the three level output terminals of the PWM signal buffer module, and the three high-side floating power supply output terminals respectively supply power to the three upper bridge arms of the three-phase inverter bridge; the three high-voltage drive output terminals of the high-voltage drive module respectively drive the three upper bridge arms of the three-phase inverter bridge, and the three low-voltage drive output terminals of the low-voltage drive module respectively drive the three lower bridge arms of the three-phase inverter bridge.

[0008] Preferably, the bootstrap module includes three identical bootstrap units, the three signal input terminals correspond one-to-one to the three bootstrap units, and the three high-side floating power supply output terminals correspond one-to-one to the three bootstrap units.

[0009] Preferably, each of the bootstrap units includes an energy storage capacitor, a first switch tube, a second switch tube, a comparison unit and a logic conversion unit;

[0010] The signal input end is electrically connected to the conduction control end of the first switch tube and the first input end of the logic conversion unit, and the high-side floating power supply output end is electrically connected to the first conduction end of the first switch tube and the first conduction end of the second switch tube;

[0011] The first input terminal of the comparison unit is electrically connected to a power supply, the second input terminal of the comparison unit is electrically connected to the second conduction terminal of the first switch tube, and the output terminal of the comparison unit is electrically connected to the second input terminal of the logic conversion unit;

[0012] The output end of the logic conversion unit is electrically connected to the conduction control end of the second switch tube, the second conduction end of the second switch tube is electrically connected to the power supply, and the first conduction end of the second switch tube is grounded via the energy storage capacitor;

[0013] When the voltage at the high-side floating power supply output terminal is lower than a preset first threshold voltage, the signal input terminal receives a high-level signal output by the PWM signal buffer module, the first switch tube is turned on, the second switch tube is turned on, and the power supply charges the energy storage capacitor; when the voltage at the high-side floating power supply output terminal is higher than a preset second threshold voltage, the signal input terminal receives a low-level signal output by the PWM signal buffer module, the first switch tube is turned off, the second switch tube is turned off, and the energy storage capacitor is discharged.

[0014] Preferably, the comparison unit includes a first resistor, a second resistor, a delay capacitor and a comparator, the non-inverting input end of the comparator is the first input end of the comparison unit, and the inverting input end of the comparator is grounded via the second resistor and the delay capacitor respectively; one end of the first resistor is the second input end of the comparison unit, and the other end is electrically connected to the inverting input end of the comparator.

[0015] Preferably, the logic conversion unit includes a Schmitt trigger, a NAND gate and an inverter, the first input end of the NAND gate is electrically connected to the output end of the Schmitt trigger, the input end of the Schmitt trigger is the first input end of the logic conversion unit, the second input end of the NAND gate is the second input and output end of the logic conversion unit, the output end of the NAND gate is electrically connected to the input end of the inverter, and the output end of the inverter is the output end of the logic conversion unit.

[0016] Preferably, the bootstrap unit further includes a filter capacitor, and the power supply is grounded via the filter capacitor.

[0017] Preferably, it also includes three detection units and three voltage feedback terminals for electrical connection to an external MCU, the three detection units corresponding one-to-one to the three high-side floating power supply output terminals, and the three detection units corresponding one-to-one to the three voltage feedback terminals; the detection terminal of each detection unit is electrically connected to its corresponding high-side floating power supply output terminal, and the output terminal of each detection unit is electrically connected to its corresponding voltage feedback terminal.

[0018] Preferably, the three-way detection unit is built into the high-voltage integrated circuit.

[0019] Preferably, the high-voltage integrated circuit further includes a protection module electrically connected to the high-voltage driving module and the low-voltage driving module, and the protection module includes an undervoltage protection circuit, an overcurrent protection circuit, an overtemperature protection circuit and a short-circuit protection circuit.

[0020] Preferably, the high-voltage integrated circuit also includes a drive enable circuit, and the protection module also includes a fault detection circuit, and the fault detection circuit is electrically connected to the drive enable circuit, the undervoltage protection circuit, the overcurrent protection circuit, the overtemperature protection circuit and the short-circuit protection circuit respectively.

[0021] The technical solution of the present invention integrates the bootstrap module within the high-voltage integrated circuit, eliminating the need for a bootstrap circuit on a peripheral main control board. Because the high-voltage integrated circuit is packaged using a packaging process, electromigration does not occur even after the semiconductor circuit has been in operation for a long time, ensuring a stable bootstrap voltage. Consequently, the semiconductor circuit of the present invention effectively avoids electromigration after long-term operation of the peripheral main control board, which can lead to unstable bootstrap voltage and consequent power supply shortages or circuit failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a module schematic diagram of a semiconductor circuit in one embodiment of the present invention;

[0023] Figure 2 is a module schematic diagram of a semiconductor circuit in one embodiment of the present invention;

[0024] Figure 3 is a circuit diagram of a bootstrap unit in one embodiment of the present invention;

[0025] Figure 4 FIG. 1 is a schematic diagram of a module of a semiconductor circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0027] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0028] It should also be noted that when an element is referred to as being "fixed on" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element.

[0029] In addition, the descriptions of "first", "second", etc. in the present invention are for descriptive purposes only and should not be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0030] The semiconductor circuit mentioned in the present invention is a circuit module that integrates power switching devices and high-voltage drive circuits and is sealed and packaged on the outside. It is widely used in the field of power electronics, such as inverters for driving motors, various inverter voltages, variable frequency speed regulation, metallurgical machinery, electric traction, variable frequency home appliances, and other fields. The semiconductor circuit here has many other names, such as Modular Intelligent Power System (MIPS), Intelligent Power Module (IPM), or other names such as hybrid integrated circuit, power semiconductor module, power module, etc. In the following embodiments of the present invention, it is collectively referred to as Modular Intelligent Power System (MIPS).

[0031] The present invention proposes a MIPS.

[0032] Reference Figure 1 In this embodiment, the MIPS includes a high-voltage integrated circuit 100 (HVIC) and a three-phase inverter bridge 200. The high-voltage integrated circuit 100 includes a PWM signal buffer module 10, a high-voltage driver module 20, a low-voltage driver module 30, and a bootstrap module 40. The PWM signal buffer module 10 is electrically connected to the high-voltage driver module 20 and the low-voltage driver module 30. The three high-voltage drive output terminals Ho of the high-voltage driver module 20 respectively drive the three upper bridge arms of the three-phase inverter bridge 200, and the three low-voltage drive output terminals Lo of the low-voltage driver module 30 respectively drive the three lower bridge arms of the three-phase inverter bridge 200.

[0033] Among them, the bootstrap module 40 has three signal input terminals Vin and three high-side floating power supply output terminals VB. The three signal input terminals Vin are electrically connected to the three level output terminals of the PWM signal buffer module 10, and the three high-side floating power supply output terminals VB respectively supply power to the three upper bridge arms of the three-phase inverter bridge 200, that is, each high-side floating power supply output terminal VB supplies power to one upper bridge arm.

[0034] The PWM signal buffer module 10 receives the control signal sent by the external MCU. After filtering and amplifying the control signal, the PWM signal buffer module 10 outputs it to the high-voltage drive module 20, the low-voltage drive module 30, and the bootstrap module 40 to control the working status of the high-voltage drive module 20, the low-voltage drive module 30, and the bootstrap module 40.

[0035] The MIPS of this embodiment integrates the bootstrap module 40 into the high-voltage integrated circuit 100, eliminating the need to construct a bootstrap circuit on a peripheral main control board. Since the high-voltage integrated circuit 100 is packaged through a packaging process, electromigration will not occur even after the MIPS has been operating for a long time, thereby ensuring the stability of the bootstrap voltage. Therefore, the MIPS of this embodiment effectively avoids the problem of electromigration causing unstable bootstrap voltage after the peripheral main control board has been operating for a long time, thereby causing insufficient power supply or circuit failure.

[0036] Furthermore, by transitioning the bootstrap circuit from an external solution to an integrated internal solution, the MIPS achieves a higher level of integration and greater intelligence. Furthermore, this embodiment fundamentally addresses the problem of existing bootstrap circuits relying on an external main control board. During production, the components used in the bootstrap circuit may be damaged during the bonding process, leading to voltage instability and undervoltage protection over time.

[0037] Further, refer to Figure 2 In this embodiment, the bootstrap module 40 includes three identical bootstrap units 41. The three signal input terminals Vin correspond one-to-one to the three bootstrap units 41, and the three high-side floating power supply output terminals VB correspond one-to-one to the three bootstrap units 41. Each bootstrap unit 41 is controlled by a signal from its corresponding signal input terminal Vin, and its corresponding high-side floating power supply output terminal VB supplies power to an upper arm of the three-phase inverter bridge 200.

[0038] Further, refer to Figure 3 In this embodiment, each bootstrap unit 41 includes an energy storage capacitor C1, a first switch tube QX1, a second switch tube QX2, a comparison unit 411 and a logic conversion unit 412;

[0039] The signal input terminal Vin is electrically connected to the conduction control terminal of the first switch tube QX1 and the first input terminal of the logic conversion unit 412, and the high-side floating power supply output terminal VB is electrically connected to the first conduction terminal of the first switch tube QX1 and the first conduction terminal of the second switch tube QX2;

[0040] A first input terminal of the comparison unit 411 is electrically connected to the power supply VCC, a second input terminal of the comparison unit 411 is electrically connected to the second conduction terminal of the first switch tube QX1, and an output terminal of the comparison unit 411 is electrically connected to the second input terminal of the logic conversion unit 412;

[0041] The output end of the logic conversion unit 412 is electrically connected to the conduction control end of the second switch tube QX2, the second conduction end of the second switch tube QX2 is electrically connected to the power supply VCC, and the first conduction end of the second switch tube QX2 is grounded via the energy storage capacitor C1;

[0042] The working principle of the bootstrap unit 41 in this embodiment is as follows:

[0043] 1. When the voltage of the high-side floating power supply output terminal VB is lower than the preset first threshold voltage (lower than the voltage of the power supply VCC), the signal input terminal Vin receives the high-level signal output by the PWM signal buffer module 10, the first switch tube QX1 is turned on, the voltage of the first input terminal of the comparison unit 411 is higher than the voltage of its second input terminal, the comparison unit 411 outputs a high level to the second input terminal of the logic conversion unit 412, the logic conversion unit 412 outputs a high level, drives the second switch tube QX2 to turn on, the power supply VCC is connected to the energy storage capacitor C1, and the power supply VCC is turned on. Charge the energy storage capacitor C1; 2. When the voltage of the high-side floating power supply output terminal VB is higher than the preset second threshold voltage (greater than the voltage of the power supply VCC), the voltage of the first input terminal of the comparison unit 411 is lower than the voltage of its second input terminal, and the comparison unit 411 outputs a low level to the second input terminal of the logic conversion unit 412. The logic conversion unit 412 outputs a low level, the second switch tube QX2 is turned off, the energy storage capacitor C1 is discharged, and the signal input terminal Vin receives the low level signal output by the PWM signal cache module 10, and the first switch tube QX1 is turned off.

[0044] Further, refer to Figure 3 In this embodiment, the comparison unit 411 includes a first resistor R1, a second resistor R2, a delay capacitor C2 and a comparator Y1. The non-inverting input terminal of the comparator Y1 is the first input terminal of the comparison unit 411, and the inverting input terminal of the comparator Y1 is grounded via the second resistor R2 and the delay capacitor C2 respectively; one end of the first resistor R1 is the second input terminal of the comparison unit 411, and the other end is electrically connected to the inverting input terminal of the comparator Y1.

[0045] Further, refer to Figure 3 The logic conversion unit 412 includes a Schmitt trigger A1, a NAND gate A2 and an inverter A3. The first input end of the NAND gate A2 is electrically connected to the output end of the Schmitt trigger A1. The input end of the Schmitt trigger A1 is the first input end of the logic conversion unit 412. The second input end of the NAND gate A2 is the second input and output end of the logic conversion unit 412. The output end of the NAND gate A2 is electrically connected to the input end of the inverter A3. The output end of the inverter A3 is the output end of the logic conversion unit 412.

[0046] In this embodiment, the specific working principle of the bootstrap unit 41 is:

[0047] 1. When the voltage of the high-side floating power supply output terminal VB is lower than the preset first threshold voltage, the voltage of the non-inverting input terminal of the comparator Y1 is higher than the voltage of its inverting input terminal (the voltage divider value on the second resistor R2), and the output terminal of the comparator Y1 outputs a high level to the second input terminal of the NAND gate A2. At this time, the signal input terminal Vin receives the high level signal output by the PWM signal buffer module 10, the first switch tube QX1 is turned on, and the high level received by the signal input terminal Vin outputs a high level signal to the first input terminal of the NAND gate A2 after passing through the Schmitt trigger A1, so that the NAND gate A2 outputs a low level to the input terminal of the inverter A3, and the output terminal of the inverter A3 outputs a high level, driving the second switch tube QX2 to turn on, the power supply VCC is connected to the energy storage capacitor C1, and the power supply VCC charges the energy storage capacitor C1; 2. When the voltage of the high-side floating power supply output terminal VB is higher than the preset second threshold voltage, the voltage of the non-inverting input terminal of the comparator Y1 is low. At the voltage of its inverting input terminal, the output terminal of comparator Y1 outputs a low level to the second input terminal of NAND gate A2; at this time, the signal input terminal Vin receives the low level signal output by the PWM signal buffer module 10, and the first switch tube QX1 is turned off. Due to the effect of the delay capacitor C2, the voltage of the inverting input terminal of comparator Y1 does not decrease suddenly, but gradually decreases, and will remain higher than the voltage of the non-inverting input terminal of comparator Y1 for a period of time, that is, the output terminal of comparator Y1 will maintain an output low level for a period of time; the low level signal received by the signal input terminal Vin is converted into a high level signal by Schmitt trigger A1 and output to the first input terminal of NAND gate A2. NAND gate A2 outputs a high level to the input and output terminals of inverter A3, and the output terminal of inverter A3 outputs a low level. The second switch tube QX2 is turned off, and the power supply VCC is disconnected from the energy storage capacitor C1, thereby preventing the current of the energy storage capacitor C1 from flowing back into the power supply VCC, and the energy storage capacitor C1 is discharged. The above steps 1 and 2 are repeated in this way, and the energy storage capacitor C1 is cyclically charged and discharged, so as to keep the power supply voltage from the high-side floating power supply output terminal VB to the upper bridge arm stable.

[0048] Furthermore, in this embodiment, the bootstrap unit 41 further includes a filter capacitor C3, and the power supply VCC is grounded via the filter capacitor C3. The filter capacitor C3 filters out interference signals of the power supply VCC to ensure voltage stability of the power supply VCC.

[0049] Further, refer to Figure 4The MIPS of this embodiment further includes three detection units 50 and three voltage feedback terminals F for electrical connection to an external MCU. The three detection units 50 correspond one-to-one to the three high-side floating power supply output terminals VB, and the three detection units 50 correspond one-to-one to the three voltage feedback terminals F. The detection terminal of each detection unit 50 is electrically connected to its corresponding high-side floating power supply output terminal VB, and the output terminal of each detection unit 50 is electrically connected to its corresponding voltage feedback terminal F. The detection unit 50 detects the voltage of the corresponding high-side floating power supply output terminal VB and outputs the detected voltage to the external MCU through the corresponding voltage feedback terminal F. The external MCU then outputs a corresponding level signal to the PWM signal buffer module 10 based on the voltage feedback from the voltage feedback terminal F. The PWM signal buffer module 10 filters and amplifies the level signal input by the external MCU and outputs it to the corresponding signal input terminal Vin. In this way, the external MCU controls the charging and discharging switching of the bootstrap unit 41 based on the voltage of the high-side floating power supply output terminal VB detected by the detection unit 50.

[0050] Furthermore, the MIPS of this embodiment employs a three-way detection unit 50 built into the high-voltage integrated circuit 100, further enhancing the functionality and integration of the high-voltage integrated circuit 100. Of course, in other embodiments, the detection unit 50 can also be disposed outside the high-voltage integrated circuit 100, on the MIPS substrate, and integrated with the MIPS package, making the MIPS even more intelligent. Furthermore, in some embodiments, the detection unit 50 can also serve as a peripheral external circuit for the MIPS.

[0051] Furthermore, in this embodiment, the high-voltage integrated circuit 100 also includes a protection module electrically connected to the high-voltage driver module 20 and the low-voltage driver module 30. The protection module includes a voltage undervoltage protection circuit, an overcurrent protection circuit, an overtemperature protection circuit, and a short-circuit protection circuit. The voltage undervoltage protection circuit monitors whether there is an internal undervoltage, the overcurrent protection circuit monitors whether there is an overcurrent in the circuit, the overtemperature protection circuit monitors whether the entire module is overheated (e.g., overheated), and the short-circuit protection circuit monitors whether there is a short circuit in the circuit.

[0052] Furthermore, the high-voltage integrated circuit 100 includes a driver enable circuit to implement an enable function. The protection module also includes a fault detection circuit, which is electrically connected to the driver enable circuit, the undervoltage protection circuit, the overcurrent protection circuit, the overtemperature protection circuit, and the short-circuit protection circuit. When an abnormal signal is detected in any of the voltage protection circuit, the overcurrent protection circuit, the overtemperature protection circuit, or the short-circuit protection circuit, the fault detection circuit outputs a signal that switches from a high level to a low level and feeds it back to the external MCU. The MCU then outputs a corresponding control signal to stop the MIPS to protect the MIPS.

[0053] The above description is only a partial or preferred embodiment of the present invention. Neither the text nor the drawings can limit the scope of protection of the present invention. Any equivalent structural transformation made by using the contents of the present invention specification and drawings under the overall concept of the present invention, or direct / indirect application in other related technical fields, is included in the scope of protection of the present invention.

Claims

1. A semiconductor circuit, characterized in that: The invention comprises a high-voltage integrated circuit and a three-phase inverter bridge, wherein the high-voltage integrated circuit comprises a PWM signal buffer module, a high-voltage drive module, a low-voltage drive module and a bootstrap module, wherein the PWM signal buffer module is electrically connected to the high-voltage drive module and the low-voltage drive module; the bootstrap module has three signal input terminals and three high-side floating power supply output terminals, wherein the three signal input terminals are electrically connected to the three level output terminals of the PWM signal buffer module, and the three high-side floating power supply output terminals respectively supply power to the three upper bridge arms of the three-phase inverter bridge; the three high-voltage drive output terminals of the high-voltage drive module respectively drive the three upper bridge arms of the three-phase inverter bridge, and the three low-voltage drive output terminals of the low-voltage drive module respectively drive the three lower bridge arms of the three-phase inverter bridge; the bootstrap module comprises three identical bootstrap units, wherein the three signal input terminals correspond one-to-one to the three bootstrap units, and the three high-side floating power supply output terminals correspond one-to-one to the three bootstrap units; each bootstrap unit comprises an energy storage capacitor, a first switch tube, a second switch tube, a comparison unit and a logic conversion unit; The signal input end is electrically connected to the conduction control end of the first switch tube and the first input end of the logic conversion unit, and the high-side floating power supply output end is electrically connected to the first conduction end of the first switch tube and the first conduction end of the second switch tube; A first input terminal of the comparison unit is electrically connected to a power supply, a second input terminal of the comparison unit is electrically connected to the second conductive terminal of the first switch tube, and an output terminal of the comparison unit is electrically connected to the second input terminal of the logic conversion unit; the comparison unit includes a first resistor, a second resistor, a delay capacitor, and a comparator, a non-inverting input terminal of the comparator is the first input terminal of the comparison unit, and an inverting input terminal of the comparator is grounded via the second resistor and the delay capacitor respectively; The output end of the logic conversion unit is electrically connected to the conduction control end of the second switch tube, the second conduction end of the second switch tube is electrically connected to the power supply, and the first conduction end of the second switch tube is grounded via the energy storage capacitor. The logic conversion unit includes a Schmitt trigger, a NAND gate and an inverter; When the voltage at the high-side floating power supply output terminal is lower than a preset first threshold voltage, the signal input terminal receives a high-level signal output by the PWM signal buffer module, the first switch tube is turned on, the second switch tube is turned on, and the power supply charges the energy storage capacitor; when the voltage at the high-side floating power supply output terminal is higher than a preset second threshold voltage, the signal input terminal receives a low-level signal output by the PWM signal buffer module, the first switch tube is turned off, the second switch tube is turned off, and the energy storage capacitor is discharged.

2. The semiconductor circuit according to claim 1, wherein: One end of the first resistor is the second input end of the comparison unit, and the other end is electrically connected to the inverting input end of the comparator.

3. The semiconductor circuit according to claim 1, wherein: The first input end of the NAND gate is electrically connected to the output end of the Schmitt trigger, the input end of the Schmitt trigger is the first input end of the logic conversion unit, the second input end of the NAND gate is the second input and output end of the logic conversion unit, the output end of the NAND gate is electrically connected to the input end of the inverter, and the output end of the inverter is the output end of the logic conversion unit.

4. The semiconductor circuit according to claim 1, wherein: The bootstrap unit further includes a filter capacitor, and the power supply is grounded via the filter capacitor.

5. The semiconductor circuit according to any one of claims 2 to 4, characterized in that It also includes three detection units and three voltage feedback terminals for electrical connection to an external MCU. The three detection units correspond one-to-one to the three high-side floating power supply output terminals, and the three detection units correspond one-to-one to the three voltage feedback terminals; the detection terminal of each detection unit is electrically connected to its corresponding high-side floating power supply output terminal, and the output terminal of each detection unit is electrically connected to its corresponding voltage feedback terminal.

6. The semiconductor circuit according to claim 5, wherein: The three-way detection unit is built into the high-voltage integrated circuit.

7. The semiconductor circuit according to any one of claims 1 to 4, characterized in that The high-voltage integrated circuit also includes a protection module electrically connected to the high-voltage driving module and the low-voltage driving module, and the protection module includes an undervoltage protection circuit, an overcurrent protection circuit, an overtemperature protection circuit and a short-circuit protection circuit.

8. The semiconductor circuit according to claim 7, wherein: The high-voltage integrated circuit also includes a drive enable circuit, and the protection module also includes a fault detection circuit, which is electrically connected to the drive enable circuit, the undervoltage protection circuit, the overcurrent protection circuit, the overtemperature protection circuit and the short-circuit protection circuit respectively.

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