A High-Voltage-Resistant SiC PIN Diode and Its Manufacturing Method

Abstract

The present invention provides a high-voltage-resistant SiC PIN diode and a manufacturing method thereof. The diode includes: an N-type ohmic electrode; an N-type heavily doped semiconductor transmission layer, the lower side surface of the N-type heavily doped semiconductor transmission layer being connected to the upper side surface of the N-type ohmic electrode; an N-type intrinsic layer, the lower side surface of the N-type intrinsic layer being connected to the upper side surface of the N-type heavily doped semiconductor transmission layer; a breakdown voltage improvement layer, the lower side surface of the breakdown voltage improvement layer being connected to the upper side surface of the N-type intrinsic layer, and the material of the breakdown voltage improvement layer being diamond or silicon dioxide; a P-type heavily doped semiconductor transmission layer, the lower side surface of the P-type heavily doped semiconductor transmission layer being connected to the upper side surface of the breakdown voltage improvement layer; and a P-type ohmic electrode, the lower side surface of the P-type ohmic electrode being connected to the upper side surface of the P-type heavily doped semiconductor transmission layer, so as to improve the breakdown voltage capability of the SiC PIN diode.

Description

Technical Field

[0001] The present invention relates to a high-voltage-resistant SiC PIN diode and a manufacturing method thereof. Background Art

[0002] Due to its superior physical properties, silicon carbide (SiC) material has received extensive attention and research. Its high-temperature high-power electronic devices have the advantages of high input impedance, fast switching speed, high operating frequency, high temperature and high voltage resistance, and have been widely used in switching regulated power supplies, high-frequency heating, automotive electronics, power amplifiers and other aspects.

[0003] However, limited by material properties, its intrinsic breakdown field strength is fixed. The main current method to improve the voltage resistance of PIN diodes is to improve the terminal structure and obtain a PIN diode with higher voltage resistance through the optimization of the doping method.

[0004] The invention named "A Si-based PIN diode structure" applied by Hebei University of Technology, with the application number: CN201910212187.4, mainly increases the polarization layer of AlGaN to improve the voltage resistance characteristics of the device on the basis of relying on the PN junction to improve the voltage resistance. However, this technical solution is completely inapplicable to SIC PIN diodes. Since it uses the PN junction in Si-based PIN diodes to improve the voltage resistance, the voltage resistance of SIC PIN diodes cannot be improved by this method. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a high-voltage-resistant SiC PIN diode and a manufacturing method thereof to improve the voltage resistance of the SiC PIN diode.

[0006] One aspect of the present invention is implemented as follows: A high-voltage-resistant SiC PIN diode, comprising:

[0007] An N-type ohmic electrode;

[0008] An N-type heavily doped semiconductor transmission layer, the lower side of the N-type heavily doped semiconductor transmission layer is connected to the upper side of the N-type ohmic electrode;

[0009] An N-type intrinsic layer, the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped semiconductor transmission layer;

[0010] A voltage resistance improvement layer, the lower side of the voltage resistance improvement layer is connected to the upper side of the N-type intrinsic layer, and the material of the voltage resistance improvement layer is diamond or silicon dioxide;

[0011] A P-type heavily doped semiconductor transmission layer, the lower side of the P-type heavily doped semiconductor transmission layer is connected to the upper side of the voltage resistance improvement layer;

[0012] And a P-type ohmic electrode, the lower side surface of the P-type ohmic electrode being connected to the upper side surface of the P-type heavily doped semiconductor transport layer.

[0013] The second aspect of the present invention is implemented as follows: A manufacturing method of a high-voltage-resistant SiC PIN diode, comprising:

[0014] Step 1, processing the SiC epitaxial wafer to remove surface foreign matters and form a substrate;

[0015] Step 2, epitaxially growing an N-type heavily doped semiconductor transport layer on the surface of the substrate;

[0016] Step 3, epitaxially growing an N-type intrinsic layer on the N-type heavily doped semiconductor transport layer;

[0017] Step 4, epitaxially growing a high-voltage-resistant improvement layer on the N-type intrinsic layer;

[0018] Step 5, epitaxially growing a P-type heavily doped semiconductor transport layer on the high-voltage-resistant improvement layer;

[0019] Step 6, removing the substrate obtained according to the above steps through a substrate removal process;

[0020] Step 7, evaporating and photolithographically fabricating an N-type ohmic electrode on the N-type heavily doped semiconductor transport layer, and then evaporating and photolithographically fabricating a P-type ohmic electrode on the P-type heavily doped semiconductor transport layer.

[0021] Further, the high-voltage-resistant improvement layer is a high-voltage-resistant material, and the high-voltage-resistant material is compatible with SiC.

[0022] Further, step 1 is further specifically: rinsing the surface of the SiC epitaxial wafer with deionized water, and then soaking it in a heated mixed cleaning solution for 1 minute to further remove the foreign matters on the surface of the SiC epitaxial wafer and form a substrate; the mixed cleaning solution includes ammonia water, hydrogen peroxide and deionized water.

[0023] The advantages of the present invention are as follows: For the high-voltage-resistant SiC PIN diode and its manufacturing method of the present invention, by adding a high-voltage-resistant improvement layer, its high-voltage-resistant ability is improved; and the material of the high-voltage-resistant improvement layer is single, and the material deposition is relatively simple, which is convenient for the realization of the SiC process. Description of the Drawings

[0024] The present invention will be further described below with reference to the drawings in conjunction with embodiments.

[0025] Figure 1 It is a flowchart of a manufacturing method of a high-voltage-resistant SiC PIN diode of the present invention;

[0026] Figure 2Schematic of a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention Figure 1 ;

[0027] Figure 3 Schematic of a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention Figure 2 ;

[0028] Figure 4 Schematic of a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention Figure 3 ;

[0029] Figure 5 Schematic of a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention Figure 4 ;

[0030] Figure 6 Schematic of a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention Figure 5 ;

[0031] Figure 7 Schematic of a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention Figure 6 ;

[0032] Figure 8 Schematic of the diode manufactured by the manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention;

[0033] Figure 9 Schematic of the structure of the diode provided by the embodiment of the present invention Figure 1 ;

[0034] Figure 10 Schematic of the structure of the diode provided by the embodiment of the present invention Figure 2 . Specific embodiments

[0035] As Figures 1 to 8 shown, a manufacturing method of a high-voltage-resistant SiC PIN diode according to the present invention includes:

[0036] Step 1: Rinse the surface of the SiC epitaxial wafer with deionized water, and then soak it in a heated mixed cleaning solution for 1 minute to further remove foreign matters on the surface of the SiC epitaxial wafer to form a substrate; the mixed cleaning solution includes ammonia water, hydrogen peroxide, and deionized water;

[0037] Step 2: Epitaxially grow an N-type heavily doped semiconductor transmission layer on the surface of the substrate;

[0038] Step 3: Epitaxially grow an N-type intrinsic layer on the N-type heavily doped semiconductor transmission layer;

[0039] Step 4: Epitaxially grow a breakdown voltage improvement layer on the N-type intrinsic layer. The breakdown voltage improvement layer is made of a high-voltage resistant material, and the high-voltage resistant material is compatible with SiC.

[0040] Step 5: Epitaxially grow a P-type heavily doped semiconductor transmission layer on the breakdown voltage improvement layer.

[0041] Step 6: Remove the substrate obtained according to the above steps through a substrate removal process.

[0042] Step 7: Evaporate and photolithograph to fabricate an N-type ohmic electrode on the N-type heavily doped semiconductor transmission layer, and then evaporate and photolithograph to fabricate a P-type ohmic electrode on the P-type heavily doped semiconductor transmission layer.

[0043] As Figure 8 shown, the diode manufactured by the method of the present invention includes:

[0044] An N-type ohmic electrode;

[0045] An N-type heavily doped semiconductor transmission layer, the lower side of the N-type heavily doped semiconductor transmission layer is connected to the upper side of the N-type ohmic electrode;

[0046] An N-type intrinsic layer, the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped semiconductor transmission layer;

[0047] A breakdown voltage improvement layer, the lower side of the breakdown voltage improvement layer is connected to the upper side of the N-type intrinsic layer;

[0048] A P-type heavily doped semiconductor transmission layer, the lower side of the P-type heavily doped semiconductor transmission layer is connected to the upper side of the breakdown voltage improvement layer;

[0049] And a P-type ohmic electrode, the lower side of the P-type ohmic electrode is connected to the upper side of the P-type heavily doped semiconductor transmission layer.

[0050] The breakdown voltage improvement layer is made of a high-voltage resistant material, and the high-voltage resistant material is compatible with SiC.

[0051] The high-voltage resistant SiC PIN diode structure is a vertical structure and is a bipolar device.

[0052] The breakdown voltage level of the high-voltage resistant SiC PIN diode structure is in the KV level, and its breakdown voltage characteristics are much higher than those of general Si-based PIN diodes.

[0053] This high-voltage resistant SiC PIN diode is mainly applied to applications with high breakdown voltage and small current.

[0054] Please refer to Figure 9 for the diode structure provided by the embodiment of the present invention.

[0055] The diode mainly includes an N-type ohmic electrode, an N-type heavily doped semiconductor transmission layer, an N-type intrinsic layer, a diamond breakdown voltage improvement layer, a P-type heavily doped semiconductor transmission layer, and a P-type ohmic electrode. The diamond breakdown voltage improvement layer can increase the breakdown voltage rating of the diode. The main reason is the material property of diamond itself with a high breakdown voltage. Compared with the traditional method of adding a polarization layer, the number of added layers is less, the material within the layer is single and not a complex component, and the material deposition is relatively simple, making it more suitable for the SiC process. Since the bandgap width of diamond is about twice that of SiC, its breakdown voltage capability can be increased by about twice.

[0056] Please refer to Figure 10 , which is the diode structure provided by the embodiment of the present invention.

[0057] The diode mainly includes an N-type ohmic electrode, an N-type heavily doped semiconductor transmission layer, an N-type intrinsic layer, a silicon dioxide breakdown voltage improvement layer, a P-type heavily doped semiconductor transmission layer, and a P-type ohmic electrode.

[0058] The breakdown voltage improvement layer of the diode can be made of other materials, and these materials need to have the property of a high breakdown field strength.

[0059] The existing PIN diode structure relies on the reverse space charge region of the pn junction for breakdown voltage. Based on the pn junction, the present invention adds a layer of diamond between the pn junctions. The breakdown characteristic of diamond is 3 times that of SiC. Its breakdown voltage improvement layer mainly separates the pn junction and conducts heterojunction breakdown voltage with the p-type layer and the n-type layer respectively through the breakdown voltage improvement layer. The breakdown voltage mechanism is different from that of the original SiC PIN diode.

[0060] Two SiC materials with different doping types and diamond respectively form heterojunctions, greatly increasing the breakdown voltage rating of the PIN diode.

[0061] Although the specific implementation manners of the present invention have been described above, those skilled in the art should understand that the specific embodiments we described are illustrative rather than used to limit the scope of the present invention. Equivalent modifications and variations made by those skilled in the art in accordance with the spirit of the present invention should be covered by the scope protected by the claims of the present invention.

Claims

1. A high-voltage resistant SiC PIN diode, characterized in that: Comprising: An N-type ohmic electrode; An N-type heavily doped semiconductor transport layer, the lower side of the N-type heavily doped semiconductor transport layer being connected to the upper side of the N-type ohmic electrode; An N-type intrinsic layer, the lower side of the N-type intrinsic layer being connected to the upper side of the N-type heavily doped semiconductor transport layer; A breakdown voltage improvement layer, the lower side of the breakdown voltage improvement layer being connected to the upper side of the N-type intrinsic layer, the material of the breakdown voltage improvement layer being diamond; A P-type heavily doped semiconductor transport layer, the lower side of the P-type heavily doped semiconductor transport layer being connected to the upper side of the breakdown voltage improvement layer; And, a P-type ohmic electrode, the lower side of the P-type ohmic electrode being connected to the upper side of the P-type heavily doped semiconductor transport layer.

2. A manufacturing method of a high-voltage resistant SiC PIN diode, characterized in that: Comprising: Step 1: Process the SiC epitaxial wafer to remove surface foreign matters to form a substrate; Step 2: Epitaxially grow an N-type heavily doped semiconductor transport layer on the surface of the substrate; Step 3: Epitaxially grow an N-type intrinsic layer on the N-type heavily doped semiconductor transport layer; Step 4: Epitaxially grow a breakdown voltage improvement layer on the N-type intrinsic layer, the material of the breakdown voltage improvement layer being diamond; Step 5: Epitaxially grow a P-type heavily doped semiconductor transport layer on the breakdown voltage improvement layer; Step 6: Remove the substrate obtained according to the above steps through a substrate removal process; Step 7: Evaporate and photolithographically fabricate an N-type ohmic electrode on the N-type heavily doped semiconductor transport layer, and then evaporate and photolithographically fabricate a P-type ohmic electrode on the P-type heavily doped semiconductor transport layer.

3. The manufacturing method of a high-voltage resistant SiC PIN diode according to claim 1, characterized in that: The breakdown voltage improvement layer is a high-voltage resistant material, and the high-voltage resistant material is compatible with SiC.

4. The manufacturing method of a high-voltage resistant SiC PIN diode according to claim 1, characterized in that: Step 1 is further specifically: rinse the surface of the SiC epitaxial wafer with deionized water, and then immerse it in a heated mixed cleaning solution for 1 minute to further remove foreign matters on the surface of the SiC epitaxial wafer, forming a substrate; the mixed cleaning solution includes ammonia water, hydrogen peroxide and deionized water.

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