Semiconductor structure processing system

Abstract

The present embodiment discloses a semiconductor structure processing system, including: a chamber assembly, including: a second cache chamber, n processing chambers, and a first cache chamber stacked in sequence from bottom to top; a support frame, including: a third support position, n second support positions, and a first support position arranged in parallel in sequence from bottom to top, respectively used to support the second cache chamber, n processing chambers, and the first cache chamber; the second support position is detachably connected to the processing chamber; a transfer component, located on the first side of the chamber assembly, used to transfer the semiconductor structure to the first cache chamber, and also used to take out the semiconductor structure from the second cache chamber; a transmission component, located on the second side of the chamber assembly, used to transfer the semiconductor structure between the first cache chamber and the adjacent processing chamber, and also used to transfer the semiconductor structure between two adjacent processing chambers, and also used to transfer the semiconductor structure between the second cache chamber and the adjacent processing chamber.

Description

Technical Field

[0001] The disclosed embodiments relate to the field of semiconductor technology, and in particular to a semiconductor structure processing system. Background Art

[0002] In the manufacturing process of semiconductor devices, a variety of deposition technologies are usually used to deposit film layers on semiconductor substrates. For example, depositing a material film on a semiconductor substrate by atomic layer deposition (ALD) is an important method in the process of manufacturing semiconductor devices. The thin film deposition process is completed in a deposition device. Currently, there are many forms of thin film deposition equipment in practical applications, such as furnace tube deposition equipment, single chamber deposition equipment, and single chamber multi-station deposition equipment.

[0003] However, in actual production, the above-mentioned deposition equipment all have certain defects, such as poor uniformity of deposited thin films, low production efficiency or interference from reaction gases, etc. Therefore, how to improve the film deposition quality and production efficiency of the equipment has become an urgent problem to be solved. Summary of the invention

[0004] In view of this, an embodiment of the present disclosure provides a semiconductor structure processing system, comprising:

[0005] The chamber assembly comprises: a second cache chamber, n processing chambers, and a first cache chamber stacked in sequence from bottom to top; wherein n is a natural number greater than 1;

[0006] A support frame, comprising: a third support position, n second support positions, and a first support position, which are arranged in parallel from bottom to top; wherein the first support position is used to carry the first cache chamber, the second support position is used to carry the processing chamber, and the third support position is used to carry the second cache chamber; the second support position is detachably connected to the processing chamber;

[0007] a transfer assembly, located on a first side of the chamber assembly, for transferring the semiconductor structure into the first cache chamber and for taking the semiconductor structure out of the second cache chamber;

[0008] A transfer component is located on the second side of the chamber assembly, and includes: n+1 carrying positions arranged in parallel from bottom to top, each of the carrying positions is used to carry one of the semiconductor structures; the transfer component is used to transfer the semiconductor structure between the first cache chamber and the adjacent processing chamber, and is also used to transfer the semiconductor structure between two adjacent processing chambers, and is also used to transfer the semiconductor structure between the second cache chamber and the adjacent processing chamber.

[0009] In some embodiments, the second support position includes: a guide rail;

[0010] The processing chamber comprises:

[0011] A first housing, used to form a first accommodating cavity for accommodating the semiconductor structure;

[0012] A connecting piece is located on the outer wall of the first shell and is adapted to the guide rail for fixedly connecting the processing chamber and the second supporting position when nested in the guide rail; wherein, when the connecting piece is separated from the guide rail, the processing chamber is separated from the second supporting position.

[0013] In some embodiments, the first cache chamber, the second cache chamber, and each of the processing chambers include: a tray for carrying one of the semiconductor structures;

[0014] Wherein, the distance between two adjacent trays is substantially the same as the distance between two adjacent load-bearing positions in the transmission assembly.

[0015] In some embodiments, the system further comprises:

[0016] a first air supply box, connected to the air inlet of the first cache chamber through a first air inlet pipe, for providing a first protective gas to the first cache chamber; and connected to the air inlet of the second cache chamber through a second air inlet pipe, for providing a second protective gas to the second cache chamber;

[0017] A second gas supply box is connected to the gas inlet of each processing chamber through n third gas inlet pipes, and is used to provide reaction gas to the processing chamber;

[0018] a first airflow driving device, connected to the air outlet of the first cache chamber through a first air outlet pipe, for allowing the first cache chamber to discharge gas to the outside; and connected to the air outlet of the second cache chamber through a second air outlet pipe, for allowing the second cache chamber to discharge gas to the outside;

[0019] The second air flow driving device is connected to the air outlet of each processing chamber through n third air outlet pipes respectively, and is used for exhausting gas from the processing chamber to the outside.

[0020] In some embodiments, the system further comprises:

[0021] a water supply tank, connected to the water inlet of the first cache chamber through a first water inlet pipe, for providing water flow to the first cache chamber; connected to the water inlet of the second cache chamber through a second water inlet pipe, for providing water flow to the second cache chamber; and connected to the water inlet of each of the processing chambers through n third water inlet pipes, for providing water flow to the processing chambers;

[0022] A water flow driving device is connected to the water outlet of the first cache chamber through a first water outlet pipe, so as to allow the first cache chamber to discharge water outward; it is also connected to the water outlet of the second cache chamber through a second water outlet pipe, so as to allow the second cache chamber to discharge water outward; it is also connected to the water outlet of each of the processing chambers through n third water outlet pipes, so as to allow the processing chambers to discharge water outward.

[0023] In some embodiments, the system further comprises:

[0024] The power supply device supplies power to the first cache chamber through a first circuit bus, supplies power to the second cache chamber through a second circuit bus, and supplies power to the n processing chambers through n third circuit buses.

[0025] In some embodiments, the n processing chambers include: at least two types of processing chambers;

[0026] The first type of processing chamber is used to deposit metal materials;

[0027] The second type of processing chamber is used to deposit the barrier layer of the metal material; wherein,

[0028] The second type of processing chamber is located between the first type of processing chamber and the first buffer chamber;

[0029] or,

[0030] The second type of processing chamber is located between the first type of processing chamber and the second cache chamber.

[0031] In some embodiments, the system further includes: a second housing, used to form a second accommodating cavity for accommodating the n+1 bearing positions;

[0032] The transmission component also includes:

[0033] A first connector is extended and arranged in parallel with the arrangement direction of the n+1 bearing positions, and is used to fix the n+1 bearing positions;

[0034] A second connector is extended and arranged in a direction perpendicular to the arrangement direction of the n+1 bearing positions and is in contact with the first connector;

[0035] in,

[0036] The first connector is movably connected to the second connector; when the first connector and the second connector have a first relative position relationship, the n+1 bearing positions are located in the chamber assembly; when the first connector and the second connector have a second relative position relationship, the n+1 bearing positions are located in the second shell;

[0037] or,

[0038] The first connector is fixedly connected to the second connector; when the second connector and the chamber assembly have a third relative position relationship, the n+1 load-bearing positions are located in the chamber assembly; when the second connector and the chamber assembly have a fourth relative position relationship, the n+1 load-bearing positions are located in the second shell.

[0039] In some embodiments, the system further comprises: a transfer chamber for accommodating the transfer assembly;

[0040] The first cache chamber includes: a first valve, located on the first side, used to connect the first cache chamber with the transfer chamber when in an open state and allow the semiconductor structure to pass through the first valve; and also used to separate the first cache chamber from the transfer chamber when in a closed state;

[0041] The second cache chamber includes: a third valve, located on the first side, used to connect the second cache chamber with the transfer chamber when in an open state and allow the semiconductor structure to pass through the third valve; and also used to separate the second cache chamber from the transfer chamber when in a closed state.

[0042] In some embodiments, the second housing includes: a fifth valve located on a surface of the second housing relatively close to the second side surface, and used to separate the chamber assembly from the second accommodating cavity when in a closed state;

[0043] The first cache chamber further includes: a second valve, located on the second side, for separating the first cache chamber from the second accommodating chamber when in a closed state;

[0044] Wherein, when the second valve and the fifth valve are both in an open state, the first buffer chamber is connected to the second accommodating chamber;

[0045] The second cache chamber further includes: a fourth valve, located on the second side surface, for separating the second cache chamber from the second accommodating chamber when in a closed state;

[0046] Wherein, when the fourth valve and the fifth valve are both in an open state, the second cache chamber is connected to the second accommodating chamber.

[0047] In some embodiments, the system further comprises:

[0048] at least one spare processing chamber, the spare processing chamber having the same structure as the processing chamber;

[0049] Maintenance equipment, including:

[0050] Base;

[0051] a liftable carrying platform, located on the base, used to carry the processing chamber to be disassembled when the processing chamber is disassembled; and also used to carry the spare processing chamber to be installed when at least one processing chamber is separated from the second supporting position;

[0052] A controller is used to control the distance between the liftable support platform and the base.

[0053] In the disclosed embodiment, a chamber assembly consisting of a first cache chamber, a plurality of independent processing chambers and a second cache chamber is provided, so that a plurality of semiconductor structures can be independently processed at the same time. The semiconductor structures are collectively transferred in the chamber assembly through a vertical transfer assembly, and the semiconductor structures are input and output into and from the chamber assembly through a transfer assembly having a plurality of mechanical arms, thereby improving the transmission and transfer efficiency of the semiconductor structures, and thus improving the production efficiency of the semiconductor structure processing system.

[0054] In addition, the processing chamber and the support frame are detachably connected. When a specific processing chamber needs to be maintained, the specific processing chamber can be separated for maintenance, and a new processing chamber that performs the same process as the specific processing chamber can be replaced to ensure the normal operation of the processing system, shorten the downtime caused by single chamber maintenance, and improve maintenance efficiency and production efficiency.

[0055] In addition, since each processing chamber is independent of each other and each processing chamber only processes one semiconductor structure, there is no interference between chambers, and the process uniformity is good, which is conducive to improving the processing effect of the semiconductor structure, thereby improving the performance of the semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 is a schematic diagram of a furnace tube deposition device according to an exemplary embodiment;

[0057] Figure 2 is a schematic diagram of another deposition device according to an exemplary embodiment;

[0058] Figure 3 is a schematic diagram of another deposition device according to an exemplary embodiment;

[0059] Figure 4 is a schematic diagram of a semiconductor structure processing system according to an exemplary embodiment;

[0060] Figure 5a and Figure 5bis a schematic diagram of a second support position and a processing chamber structure according to an exemplary embodiment;

[0061] Figure 6a and Figure 6b It is a schematic diagram of a partial structure of a semiconductor structure processing system according to an exemplary embodiment;

[0062] Figure 7 It is a partial side structural schematic diagram of a semiconductor structure processing system according to an exemplary embodiment;

[0063] Figure 8 is a schematic top view of a semiconductor structure processing system according to an exemplary embodiment;

[0064] Fig. 9 It is a partial structural schematic diagram of a semiconductor structure processing system according to an exemplary embodiment;

[0065] Fig.10 A schematic diagram of maintenance equipment for a semiconductor structure processing system according to an exemplary embodiment is shown;

[0066] Fig.11 A schematic diagram showing the positional relationship of components of a semiconductor structure processing system according to an exemplary embodiment;

[0067] Figures 12a to 12e A schematic diagram of a maintenance process of a semiconductor structure processing system according to an exemplary embodiment is shown;

[0068] Figures 13a to 13f The figure is a schematic diagram of a semiconductor structure transfer process of a semiconductor structure processing system according to an exemplary embodiment. DETAILED DESCRIPTION

[0069] The technical solution of the present disclosure is further elaborated in detail below in conjunction with the accompanying drawings and specific embodiments of the specification.

[0070] In the embodiments of the present disclosure, the terms "first", "second", etc. are used to distinguish similar objects, but are not used to describe a specific order or sequence.

[0071] In the embodiments of the present disclosure, the term “A is in contact with B” includes the situation where A is in direct contact with B, or the situation where A is in indirect contact with B with other components interposed between A and B.

[0072] In the disclosed embodiments, the term "layer" refers to a portion of a material including an area having a thickness. A layer may extend over the entirety of a lower or upper structure, or may have an extent that is less than the extent of a lower or upper structure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure having a thickness that is less than the thickness of a continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be between any horizontal faces at the top and bottom surfaces of a continuous structure. A layer may extend horizontally, vertically, and / or along an inclined surface. Furthermore, a layer may include multiple sublayers.

[0073] It will be understood that the meaning of “on,” “over,” and “over” in this disclosure should be interpreted in the broadest manner, so that “on” not only means that it is “on” something with no intervening features or layers (i.e., directly on something), but also includes the meaning of “on” something with intervening features or layers.

[0074] It should be noted that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0075] Figure 1 FIG. 1 is a schematic diagram of a furnace tube deposition device 100 according to an exemplary embodiment. Figure 1 As shown, the device 100 includes: a reaction furnace tube 10, an air inlet pipe 11 and an air outlet pipe 12. The reaction furnace tube 10 can accommodate multiple wafers 13 at the same time, and the wafers 13 are placed on a support frame (not shown) with upper and lower intervals. The air inlet pipe 11 may include multiple air inlet pipes for introducing different reaction gases. The furnace tube deposition device 100 introduces reaction gas into the reaction furnace tube 10 through the air inlet pipe 11, and heats the reaction furnace tube 10 to a reaction temperature, so that the reaction gas in the reaction furnace tube 10 reacts on the surface of the wafer 13, and the generated product is deposited on the surface of the wafer 13 as a thin film.

[0076] The furnace tube deposition equipment 100 can process wafers in batches, that is, multiple wafers 13 enter the reaction furnace tube 10 in batches to deposit thin films and leave the reaction furnace tube 10 at the same time, which is highly efficient in actual production. However, due to the difference in the distribution positions of different wafers 13 in the reaction furnace tube 10, the thickness of the thin films deposited on the surfaces of different wafers 13 is uneven. In addition, the water, electricity and gas of the furnace tube deposition equipment 100 are connected externally to the whole machine. If equipment maintenance is required, the whole equipment will be shut down, and wafers cannot be processed, which affects production efficiency.

[0077] Figure 2FIG. 2 is a schematic diagram of another deposition device 200 according to an exemplary embodiment. Figure 2 As shown, the device 200 is a single-wafer deposition device, including: a reaction chamber 20; a base 21 for carrying a single-wafer chip 22; a gas nozzle 23 located above the chip 22; and a gas inlet 24 connected to the nozzle 23 for introducing reaction gas into the reaction chamber 20.

[0078] Since the single-wafer deposition equipment 200 can only process one wafer at a time, the wafer transmission mode is single-wafer transmission, and the production efficiency is low. In addition, the water, electricity and gas lines of the equipment 200 are connected to the whole machine. When maintenance is required, the whole machine can only be shut down and production cannot be carried out, which is not conducive to improving production efficiency.

[0079] Figure 3 FIG. 3 is a schematic diagram of another deposition device 300 according to an exemplary embodiment. Figure 3 As shown, in a chamber, a plurality of processing positions 32 are located on a base 31 , each processing position 32 is used to carry a wafer, and the base 31 can drive the plurality of processing positions 32 to rotate in the direction of the arrow.

[0080] The device 300 is a single-chamber multi-processing position device. There are problems such as gas interference between the processing positions 32, chamber volume limitation and uneven gas pressure in the chamber, which affect the quality of thin film deposition on the wafer. In addition, the device 300 is a single-chip transmission, that is, only one wafer can be input or output at a time, and the transmission efficiency is low. When one of the processing positions needs to be maintained, the entire chamber needs to be shut down, which affects production efficiency.

[0081] Figure 4 FIG. 1 is a schematic diagram of a semiconductor structure processing system 1000 according to an exemplary embodiment. Figure 4 As shown, the semiconductor structure processing system 1000 includes:

[0082] The chamber assembly comprises: a second cache chamber 102, n processing chambers 103, and a first cache chamber 101 which are stacked in sequence from bottom to top; wherein n is a natural number greater than 1;

[0083] The support frame 104 includes: a third support position, n second support positions, and a first support position which are arranged in parallel from bottom to top; wherein the first support position is used to carry the first cache chamber 101, the second support position is used to carry the processing chamber 103, and the third support position is used to carry the second cache chamber 102; the second support position is detachably connected to the processing chamber 103;

[0084] The transfer assembly 110 is located at the first side of the chamber assembly and is used to transfer the semiconductor structure 105 to the first cache chamber 101 and to take out the semiconductor structure 105 from the second cache chamber 102;

[0085] The transfer component 120 is located on the second side of the chamber assembly, and includes: n+1 carrying positions 121 arranged in parallel from bottom to top, each carrying position is used to carry a semiconductor structure 105; the transfer component 120 is used to transfer the semiconductor structure between the first cache chamber 101 and the adjacent processing chamber 103, and is also used to transfer the semiconductor structure 105 between two adjacent processing chambers 103, and is also used to transfer the semiconductor structure 105 between the second cache chamber 102 and the adjacent processing chamber 103.

[0086] For example, the second cache chamber 102, the n processing chambers 103, and the first cache chamber 101 are stacked from bottom to top in a direction substantially parallel to a plumb line perpendicular to a horizontal plane. The first cache chamber 101, the second cache chamber 102, and the processing chamber 103 may have the same shape and size.

[0087] In some embodiments, the transfer order of the semiconductor structure in the chamber assembly may be a first transfer order, which may include: the semiconductor structure enters the chamber assembly from the first cache chamber, is transferred downward from the first cache chamber into the processing chamber 103, enters the second cache chamber 102 after performing a processing process in the processing chamber 103, and leaves the chamber assembly from the second cache chamber 102.

[0088] When the transmission order of the semiconductor structure in the chamber assembly is the first transmission order, the first cache chamber 101 is used as a temporary storage chamber before the semiconductor structure 105 enters the processing chamber 103, and the second cache chamber 102 is used as a temporary storage chamber after the semiconductor structure 105 comes out of the processing chamber 103.

[0089] In some embodiments, the transfer order of the semiconductor structure in the chamber assembly may be a second transfer order, which may include: the semiconductor structure enters the chamber assembly from the second cache chamber 102, is transferred upward from the second cache chamber 102 into the processing chamber 103, enters the first cache chamber after performing a processing process in the processing chamber 103, and leaves the chamber assembly from the first cache chamber.

[0090] Similarly, when the transmission order of the semiconductor structure in the chamber assembly is the second transmission order, the second cache chamber 102 is used as a temporary storage chamber before the semiconductor structure 105 enters the processing chamber 103, and the first cache chamber 101 is used as a temporary storage chamber after the semiconductor structure 105 comes out of the processing chamber 103.

[0091] The first cache chamber 101 and the second cache chamber 102 may only temporarily store the semiconductor structure, and do not process the semiconductor structure 105 .

[0092] The processing chamber 103 is used to process the semiconductor structure 105. The processing may include: depositing a thin film, etching, planarizing, cleaning or heat treatment, etc. Exemplarily, the processing chamber 103 may include: an atomic layer deposition (ALD) chamber, a chemical vapor deposition (CVD) chamber or a plasma etching chamber, etc. It is understood that the processing chamber 103 can perform any processing required for the semiconductor structure.

[0093] It should be emphasized that the n processing chambers 103 are independent chambers, and different processing chambers 103 can perform the same processing process or different processing processes on a semiconductor structure.

[0094] Exemplarily, when each processing chamber 103 can perform the same processing process, taking the semiconductor processing system that needs to deposit a thin film of a preset thickness (for example, H) on the surface of the semiconductor structure, and the transmission order is the above-mentioned first transmission order as an example, each processing chamber 103 can respectively deposit a thin film with a thickness of H / n on the surface of the semiconductor structure, and the semiconductor structure 105 passes through n processing chambers 103 from top to bottom in turn to complete the entire process.

[0095] Alternatively, the processing process of each processing chamber 103 is different. For example, the processing process of the semiconductor structure 105 is divided into n steps, and the process conditions of each step are different. The semiconductor structure 105 passes through n processing chambers 103 from top to bottom in sequence to complete n steps, thereby completing the entire process.

[0096] It should be emphasized that the specific processing performed by each processing chamber 103 can be flexibly set according to the actual needs of device production, and no limitation is made here. In addition, since the processing chamber 103 is detachably connected to the second support position, the processing chamber 103 located on the second support position can be configured and replaced according to the processing process to be performed in the actual production process, which is conducive to improving the application flexibility of the processing system.

[0097] For example, the processing chamber 103 is connected and fixed to the second support position on the support frame 104 by a connecting piece, and the processing chamber 103 and the second support position can be separated by removing the connecting piece, and the processing chamber 103 can be taken out from the second support position. In this way, when one of the processing chambers 103 fails or needs maintenance, it can be replaced in time, reducing the downtime of the processing chamber 103 and improving maintenance efficiency.

[0098] Exemplarily, the transfer assembly 110 includes: a first arm 111, a second arm 112, and a third arm 113. When the transfer order of the semiconductor structure in the chamber assembly is the first transfer order, the first arm 111 puts the semiconductor structure 105 to be processed into the first cache chamber 101, the second arm 112 takes out the processed semiconductor structure 105 from the second cache chamber 102, and the third arm 113 obtains the semiconductor structure 105 to be processed from the outside. The first arm 111, the second arm 112, and the third arm 113 can work alternately and cyclically, that is, the first arm 111, the second arm 112, and the third arm 113 can all perform the following operations: input the semiconductor structure 105 to be processed into the first cache chamber 101, take out the processed semiconductor structure 105 from the second cache chamber 102, or obtain the semiconductor structure 105 to be processed from the outside.

[0099] Therefore, when there is no semiconductor structure temporarily stored in the first cache chamber, the transfer component 110 can continuously add the semiconductor structure 105 to be processed to the first cache chamber 101, and take out the processed semiconductor structure 105 from the second cache chamber 102. In this way, the idle time of the first cache chamber 101 and the waiting time of the semiconductor structure 105 in the second cache chamber 102 can be reduced, thereby improving the transfer efficiency and production efficiency of the semiconductor structure.

[0100] It should be noted that the transfer assembly 110 in this example includes three robotic arms for example only. In some embodiments, the transfer assembly 110 may include two robotic arms or more than three robotic arms. For example, when the semiconductor processing system includes a plurality of chamber assemblies arranged in parallel in a direction parallel to the horizontal plane, at least two robotic arms may be provided for each chamber assembly in the transfer assembly.

[0101] Exemplarily, the transmission component 120 can move in a direction close to the chamber assembly, and the n+1 carriers 121 arranged in parallel in the transmission component 120 can move in the up and down directions. The n+1 carriers 121 can correspond to the first cache chamber 101 and the n processing chambers 103 at the same time, or correspond to the n processing chambers 103 and the second cache chamber 102 at the same time. In other words, when the n+1 carriers 121 correspond to the first cache chamber 101 and the n processing chambers 103 at the same time, the transmission component 120 can take out the semiconductor structure 105 from the first cache chamber 101 and the n processing chambers 103 at the same time. When the n+1 carriers 121 correspond to the n processing chambers 103 and the second cache chamber 102 at the same time, the transmission component 120 can put the semiconductor structure 105 into the n processing chambers 103 and the second cache chamber 102 at the same time, that is, the transmission component 120 can transfer the semiconductor structure 105 downward layer by layer. In this way, each semiconductor structure 105 can pass through each processing chamber 103 from top to bottom in sequence, thereby completing the entire process.

[0102] In the disclosed embodiment, a chamber assembly consisting of a first cache chamber, a plurality of independent processing chambers and a second cache chamber is provided, so that a plurality of semiconductor structures can be independently processed at the same time. The semiconductor structures are collectively transferred in the chamber assembly through a vertical transfer assembly, and the semiconductor structures are input and output into and from the chamber assembly through a transfer assembly having a plurality of mechanical arms, thereby improving the transmission and transfer efficiency of the semiconductor structures, and thus improving the production efficiency of the semiconductor structure processing system.

[0103] In addition, the processing chamber 103 and the support frame are detachably connected. When a specific processing chamber 103 needs to be maintained, the specific processing chamber 103 can be separated for maintenance, and a new processing chamber 103 that performs the same process as the specific processing chamber 103 can be replaced to ensure the normal operation of the processing system, shorten the downtime caused by single chamber maintenance, and improve maintenance efficiency and production efficiency.

[0104] In addition, since each processing chamber 103 is independent of each other and each processing chamber 103 only processes one semiconductor structure, there is no mutual interference between chambers, and the process uniformity is good, which is conducive to improving the processing effect of the semiconductor structure, thereby improving the performance of the semiconductor structure.

[0105] In some embodiments, reference Figure 5a and Figure 5b As shown, the second support position 106 includes: a guide rail 107;

[0106] The processing chamber 103 includes:

[0107] The first housing 108 is used to form a first accommodating cavity for accommodating the semiconductor structure;

[0108] The connecting piece 109 is located on the outer wall of the first shell 108 and is adapted to the guide rail 107 for fixedly connecting the processing chamber 103 and the second support position 106 when nested in the guide rail 107; wherein, when the connecting piece 109 is separated from the guide rail 107, the processing chamber 103 is separated from the second support position 106.

[0109] Exemplarily, the second support position 106 includes at least two guide rails 107 located at the bottom of the second support position 106. Accordingly, the connection piece 109 of the processing chamber 103 is located at the bottom of the outer wall of the first shell 108.

[0110] In some embodiments, the guide rail 107 may also be located on the side wall of the second support position 106, and correspondingly, the connector 109 is located on the side wall of the outer wall of the first shell 108. Alternatively, the guide rail 107 is provided on both the side wall and the bottom of the second support position 106, and the connector 109 is provided on both the side wall and the bottom of the first shell 108.

[0111] In some embodiments, the opening of the guide rail 107 may have a protrusion protruding parallel to the horizontal plane, and the connector 109 may have a groove adapted to the protrusion. In this way, when the connector 109 is nested in the guide rail 107, the second support position and the processing chamber 103 can be fixed through the interaction between the protrusion and the groove.

[0112] The embodiment of the present disclosure arranges guide rails in the second support position and corresponding connectors on the outer wall of the first shell of the processing chamber 103, so that the processing chamber 103 can be easily removed from the second support position and the processing chamber 103 can be accurately installed in the set position in the second support position.

[0113] In some embodiments, reference Figure 6a As shown, the first cache chamber 101, the second cache chamber 102 and each processing chamber 103 include: a tray 114 for carrying a semiconductor structure;

[0114] The distance between two adjacent trays 114 is substantially the same as the distance between two adjacent carrying positions 121 in the transmission assembly 120 .

[0115] Exemplarily, the tray 114 is located at the bottom of the first cache chamber 101, the second cache chamber 102 and each processing chamber 103. Each tray 114 includes three liftable top columns that can lift the semiconductor structure from the surface of the tray so that the carrying position 121 in the transmission component 120 can pick up and place the semiconductor structure.

[0116] The distance h1 between the upper surfaces of the trays 114 in two adjacent chambers is substantially equal to the distance h2 between the upper surfaces of two adjacent carriers 121 in the transmission assembly 120. In this way, the transmission assembly 120 can simultaneously pick up and place semiconductor structures in each chamber, thereby improving the transmission efficiency of the semiconductor structures.

[0117] In some embodiments, reference Figure 6b As shown, the processing chamber 103 further includes a gas nozzle 115 located above the tray 114. The surface of the gas nozzle facing the tray has a plurality of evenly distributed gas outlets for injecting reaction gas into the semiconductor structure 105 located on the tray, so as to deposit a thin film on the surface of the semiconductor structure 105.

[0118] In some embodiments, reference Figure 7 As shown, the semiconductor structure processing system 1000 further includes:

[0119] The first air supply box 131 is connected to the air inlet 132 of the first cache chamber 101 through a first air inlet pipe (not shown) to provide the first protective gas to the first cache chamber 101; and is also connected to the air inlet 133 of the second cache chamber 102 through a second air inlet pipe (not shown) to provide the second protective gas to the second cache chamber 102;

[0120] The second gas supply box 134 is connected to the gas inlet 135 of each processing chamber 103 through n third gas inlet pipes (not shown) to provide reaction gas to the processing chamber 103;

[0121] The first airflow driving device 136 is connected to the air outlet 137 of the first cache chamber 101 through a first air outlet pipe (not shown) for allowing the first cache chamber 101 to discharge gas to the outside; and is also connected to the air outlet 138 of the second cache chamber 102 through a second air outlet pipe (not shown) for allowing the second cache chamber 102 to discharge gas to the outside;

[0122] The second air flow driving device 139 is connected to the air outlet 140 of each processing chamber 103 through n third air outlet pipes (not shown) respectively, so as to allow the processing chamber 103 to exhaust gas to the outside.

[0123] Exemplarily, the air inlet 132 of the first cache chamber 101 and the air inlet 133 of the second cache chamber 102 may include multiple air inlets, and the first air inlet pipe and the second air inlet pipe may also include multiple ones, which correspond to the air inlet 132 and the air inlet 133 respectively. Each processing chamber 103 may include multiple air inlets 135, and different air inlets may be used to introduce different reaction gases. The third air inlet pipe may also include multiple ones corresponding to the air inlets 135 one by one.

[0124] It should be noted that the first air inlet pipe, the second air inlet pipe and the n third air inlet pipes are all independent air inlet pipes, and the opening and closing of the airflow can be controlled independently, so that gas can be introduced into each chamber independently. The first air outlet pipe, the second air outlet pipe and the n third air outlet pipes are all independent air outlet pipes, and they can be controlled independently, so that each chamber can exhaust gas independently.

[0125] Exemplarily, the first air supply box 131, the first air inlet pipe, the second air inlet pipe, the second air supply box 134, the third air outlet pipe, the first air flow driving device 136 and the second air flow driving device 139 may be located on the same side of the chamber assembly.

[0126] For example, the first protective gas and the second protective gas may include nitrogen or an inert gas to protect the semiconductor structure from being oxidized. The reaction gas includes a gas required for processing the semiconductor structure, such as a gas for depositing a thin film or an etching gas.

[0127] In some embodiments, reference Figure 7 As shown, the semiconductor structure processing system 1000 further includes:

[0128] The water supply tank 141 is connected to the water inlet 142 of the first cache chamber 101 through a first water inlet pipe (not shown) to provide water flow to the first cache chamber 101; it is also connected to the water inlet 143 of the second cache chamber 102 through a second water inlet pipe (not shown) to provide water flow to the second cache chamber 102; it is also connected to the water inlet 144 of each processing chamber 103 through n third water inlet pipes (not shown) respectively to provide water flow to the processing chamber 103;

[0129] The water flow driving device 145 is connected to the water outlet 146 of the first cache chamber 101 through a first water outlet pipe (not shown) for discharging water from the first cache chamber 101; it is also connected to the water outlet 147 of the second cache chamber 102 through a second water outlet pipe (not shown) for discharging water from the second cache chamber 102; it is also connected to the water outlet 148 of each processing chamber 103 through n third water outlet pipes (not shown) for discharging water from the processing chamber 103.

[0130] Exemplarily, water flow channels are provided in the walls of the first cache chamber 101 , the second cache chamber 102 and each processing chamber 103 for circulating cooling water to cool the chambers.

[0131] Exemplarily, the water inlet 142 of the first cache chamber 101, the water inlet 143 of the second cache chamber 102 and the water inlet 144 of each processing chamber 103 may include multiple ones, and accordingly, the first water inlet pipe, the second water inlet pipe and the third water inlet pipe may also include multiple ones, which correspond one-to-one to the water inlet 142, the water inlet 143 and the water inlet 144 respectively.

[0132] Exemplarily, the water supply box 141, the first water inlet pipe, the second water inlet pipe, the third water inlet pipe, the water flow driving device 145, the first water outlet pipe, the second water outlet pipe and the third water outlet pipe are located on the same side of the chamber assembly.

[0133] It should be noted that the first water inlet pipe, the second water inlet pipe and the n third water inlet pipes are all independent water inlet pipes, and the water flow can be individually controlled to be turned on and off, so that cooling water can be provided to each chamber independently. The first water outlet pipe, the second water outlet pipe and the n third water outlet pipes are all independent water outlet pipes, and they can be individually controlled so that cooling water can be discharged from each chamber independently.

[0134] In some embodiments, reference Figure 7 As shown, the semiconductor structure processing system 1000 further includes:

[0135] The power supply device 150 supplies power to the first cache chamber 101 through the first circuit bus 151 , supplies power to the second cache chamber 102 through the second circuit bus 152 , and supplies power to n processing chambers 103 through n third circuit buses 153 .

[0136] Exemplarily, the first circuit bus 151 is connected to the circuit interface of the power supply device 150 and the first cache chamber 101, the second circuit bus 152 is connected to the circuit interface of the power supply device 150 and the first cache chamber 101, and n third circuit buses 153 are connected to the circuit interface of the power supply device 150 and the n processing chambers 103.

[0137] It should be noted that the first circuit bus 151, the second circuit bus 152 and the n third circuit buses 153 are independent of each other and supply power to each chamber individually. That is, when a circuit bus corresponding to one chamber fails, the power supply to other chambers is not affected.

[0138] In the above embodiments, the first air supply box 131, the second air supply box 134, the first air inlet pipe, the second air inlet pipe, the third air inlet pipe, the first air flow driving device 136, the second air flow driving device 139, the first air outlet pipe, the second air outlet pipe and the third air outlet pipe constitute an air supply subsystem. The water supply box 141, the first water inlet pipe, the second water inlet pipe, the third water inlet pipe, the water flow driving device 145, the first water outlet pipe, the second water outlet pipe and the third water outlet pipe constitute a water supply subsystem. The power supply device 150, the first circuit bus 151, the second circuit bus 152 and the third circuit bus 153 constitute a power supply subsystem. Among them, the air supply subsystem, the water supply subsystem and the power supply subsystem are all located on the same side of the chamber assembly.

[0139] Reference Figure 8 As shown, the gas supply subsystem, the water supply subsystem and the electric power supply subsystem are arranged adjacent to each other and are located on the third side of the chamber assembly, and the third side is located between the transfer assembly and the transmission assembly. The gas supply subsystem, the water supply subsystem and the electric power supply subsystem are concentrated on the same side of the chamber assembly, which can centrally supply water, electricity and gas for easy management, and is conducive to saving the floor space of the entire semiconductor structure processing system.

[0140] In some embodiments, the n processing chambers 103 include: at least two types of processing chambers;

[0141] The first type of processing chamber is used to deposit metal materials;

[0142] The second type of processing chamber is used to deposit a barrier layer of metal material; wherein the second type of processing chamber is located between the first type of processing chamber and the first cache chamber 101; or, the second type of processing chamber is located between the first type of processing chamber and the second cache chamber 102.

[0143] Exemplarily, the n processing chambers 103 are all thin film deposition chambers, such as atomic layer deposition (ALD) chambers. Since each processing chamber 103 is an independent entity and can independently perform thin film deposition functions, each processing chamber 103 can deposit different or the same thin films.

[0144] Exemplarily, the metal material includes conductive metals such as tungsten (W) or copper (Cu), and the barrier layer includes oxide or nitride. Before depositing the metal material on the semiconductor structure, a barrier layer is first deposited to prevent the metal material from diffusing.

[0145] When the transmission order of the semiconductor structure in the chamber assembly is the first transmission order, the second type of processing chamber is located between the first type of processing chamber and the first cache chamber 101, and the semiconductor structure enters the chamber assembly from the first cache chamber, then enters the second type of processing chamber to deposit a barrier layer of metal material, then enters the first type of processing chamber to deposit a metal material layer, and finally leaves the chamber assembly from the second cache chamber 102.

[0146] When the transmission order of the semiconductor structure in the chamber assembly is the second transmission order, the second type of processing chamber is located between the first type of processing chamber and the second cache chamber 102, and the semiconductor structure enters the chamber assembly from the second cache chamber, then enters the second type of processing chamber to deposit a barrier layer of metal material, and then enters the first type of processing chamber to deposit a metal material layer, and finally leaves the chamber assembly from the first cache chamber 101.

[0147] In some embodiments, reference Fig. 9 As shown, the semiconductor structure processing system 1000 further includes: a second housing 122 for forming a second accommodating cavity 123 for accommodating the n+1 bearing positions 121;

[0148] The transmission component 120 also includes:

[0149] The first connector 124 is extended and arranged in parallel with the arrangement direction of the n+1 bearing positions 121 , and is used to fix the n+1 bearing positions 121 ;

[0150] The second connector 125 is extended in a direction perpendicular to the arrangement direction of the n+1 bearing positions and contacts the first connector 124; wherein,

[0151] The first connecting body 124 is movably connected to the second connecting body 125; when the first connecting body 124 and the second connecting body 125 have a first relative position relationship, the n+1 bearing positions 121 are located in the chamber assembly; when the first connecting body 124 and the second connecting body 125 have a second relative position relationship, the n+1 bearing positions 121 are located in the second shell 122;

[0152] or,

[0153] The first connector 124 is fixedly connected to the second connector 125; when the second connector 125 and the chamber assembly have a third relative position relationship, the n+1 load-bearing positions 121 are located in the chamber assembly; when the second connector 125 and the chamber assembly have a fourth relative position relationship, the n+1 load-bearing positions 121 are located in the second shell 122.

[0154] Exemplarily, the n+1 bearing positions 121 in the transmission assembly 120 are arranged in a direction parallel to the z-axis, which is consistent with the direction in which the chambers in the chamber assembly are stacked. The first connector 124 extends in a direction parallel to the z-axis, and the n+1 bearing positions 121 are fixed to the first connector 124. The second connector 125 extends in a direction parallel to the x-axis, which is perpendicular to the z-axis, and the first connector 124 is connected to the second connector 125.

[0155] It should be noted that the first connector 124 is used to support n+1 bearing positions 121, and can keep the relative position relationship between the n+1 bearing positions 121 unchanged, but the n+1 bearing positions 121 can move up and down as a whole along the direction parallel to the z-axis.

[0156] Exemplarily, the first connector 124 and the second connector 125 are movably connected, for example, the first connector 124 can move along the guide rail of the second connector 125 in a direction parallel to the x-axis (left and right). When the first connector 124 moves to the left in a direction parallel to the x-axis to a position close to the chamber assembly, the n+1 carriers 121 are located in the chamber assembly for placing and picking up the semiconductor structure. When the first connector 124 moves to the right in a direction parallel to the x-axis to a position far from the chamber assembly, the n+1 carriers 121 are located outside the chamber assembly.

[0157] Exemplarily, the first connector 124 and the second connector 125 may also be fixedly connected, in which case the second connector 125 may move in a direction parallel to the x-axis (left and right). When the second connector 125 moves to the left in a direction parallel to the x-axis to a position close to the chamber assembly, the n+1 carriers 121 are located in the chamber assembly for placing and taking the semiconductor structure. When the second connector 125 moves to the right in a direction parallel to the x-axis to a position far from the chamber assembly, the n+1 carriers 121 are located outside the chamber assembly.

[0158] Exemplarily, the second housing has an air outlet connected to the exhaust device for extracting the gas in the second accommodating chamber 123. Before the transmission component 120 takes out the semiconductor structure from the chamber assembly, the second accommodating chamber 123 is evacuated to prevent the semiconductor structure from being oxidized in the second accommodating chamber 123.

[0159] In some embodiments, reference Fig. 9 As shown, the semiconductor structure processing system 1000 further includes: a transfer chamber 154 for accommodating the transfer assembly 110;

[0160] The first cache chamber 101 includes: a first valve 155, located at the first side, used to connect the first cache chamber 101 and the transfer chamber 154 when in an open state, and allow the semiconductor structure to pass through the first valve 155; the first valve 155 is also used to separate the first cache chamber 101 and the transfer chamber 154 when in a closed state;

[0161] The second cache chamber 102 includes: a third valve 156, located on the first side, used to connect the second cache chamber 102 and the transfer chamber 154 when in an open state, and allow the semiconductor structure to pass through the third valve 156; the third valve 156 is also used to separate the second cache chamber 102 and the transfer chamber 154 when in a closed state.

[0162] Exemplarily, the first cache chamber 101 has a first valve 155 on one side close to the transfer chamber 154, which can be opened and sealed. When the transfer assembly 110 puts the semiconductor structure into the first cache chamber 101, the first valve 155 opens to connect the first cache chamber 101 with the transfer chamber 154; after the semiconductor structure enters the first cache chamber 101, the first valve 155 closes to isolate the first cache chamber 101 from the transfer chamber 154.

[0163] Exemplarily, the second cache chamber 102 has a third valve 156 on one side close to the transfer chamber 154, which can be opened and sealed. When the semiconductor structure is located in the second cache chamber 102, the third valve 156 is closed to isolate the second cache chamber 102 from the transfer chamber 154; when the transfer assembly 110 takes out the semiconductor structure from the second cache chamber 102, the third valve 156 is opened to connect the second cache chamber 102 with the transfer chamber 154.

[0164] In some embodiments, reference Fig. 9 As shown, the second shell 122 includes: a fifth valve 157, which is located on the surface of the second shell 122 relatively close to the second side surface, and is used to separate the chamber assembly from the second accommodating cavity 123 when in a closed state;

[0165] The first cache chamber 101 further includes: a second valve 158, located on the second side surface, for separating the first cache chamber 101 from the second accommodating chamber 123 when in a closed state;

[0166] When the second valve 158 and the fifth valve 157 are both in an open state, the first cache chamber 101 is connected to the second accommodating chamber 123;

[0167] The second cache chamber 102 further includes: a fourth valve 159, located on the second side surface, for separating the second cache chamber 102 from the second accommodating chamber 123 when in a closed state;

[0168] When the fourth valve 159 and the fifth valve 157 are both in the open state, the second cache chamber 102 is connected to the second accommodating chamber 123 .

[0169] Each processing chamber 103 may also include: a sixth valve 160, located on the second side of the chamber assembly, used to separate the processing chamber 103 from the second accommodating chamber 123 when in a closed state; when the sixth valve 160 and the fifth valve 157 are both in an open state, the processing chamber 103 is connected to the second accommodating chamber 123.

[0170] It is understandable that when the transmission component 120 needs to take out the semiconductor structure from the chamber assembly, or put the semiconductor structure into the chamber assembly, the second valve 158, the fourth valve 159, the sixth valve 160 and the fifth valve 157 all need to be opened.

[0171] In some embodiments, reference Fig.10 As shown, the semiconductor structure processing system 1000 further includes:

[0172] At least one spare processing chamber 103 ′, the spare processing chamber 103 ′ has the same structure as the processing chamber 103;

[0173] Maintenance equipment, including:

[0174] Base 161;

[0175] The liftable carrying platform 162 is located on the base 161 and is used to carry the processing chamber 103 to be removed when the processing chamber 103 is removed; and is also used to carry the spare processing chamber 103' to be installed when at least one processing chamber 103 is separated from the second supporting position;

[0176] The controller is used to control the distance between the liftable support platform 162 and the base 161 .

[0177] The maintenance device also includes an auxiliary tool 163 for removing the processing chamber 103 from the second supporting position and for loading the spare processing chamber 103' into the second supporting position.

[0178] For example, refer to Fig.11 As shown, the maintenance device is located on the fourth side of the chamber assembly, the fourth side is located between the transfer component and the transmission component, and is opposite to the third side of the chamber assembly.

[0179] When a processing chamber 103 in the chamber assembly fails and needs to be repaired or maintained, the failed processing chamber 103 can be replaced by the maintenance equipment. Figures 12a to 12e , steps for maintaining the processing chamber 103 using the maintenance equipment are introduced.

[0180] Step 1: Take out the processing chamber 103 to be replaced.

[0181] Reference Figures 12a to 12c As shown, the carrier 162 is raised to a height that is level with the bottom of the processing chamber 103 to be replaced, and then the processing chamber 103 to be replaced is pulled out and placed on the carrier 162 using the auxiliary tool 163. The carrier 162 is then lowered to the lowest position, the processing chamber 103 to be replaced is removed, and the spare processing chamber 103' is placed on the carrier 162.

[0182] Step 2: Load into the spare processing chamber 103'.

[0183] Reference Figure 12d to Figure 12e As shown, the carrying platform 162 carrying the spare processing chamber 103 ′ is raised to the height of the corresponding carrying position, and the spare processing chamber 103 ′ is loaded into the corresponding carrying position using an auxiliary tool 163 .

[0184] Step three: Maintain the replaced processing chamber 103 .

[0185] In some embodiments, the first cache chamber 101 and the second cache chamber 102 may also be disassembled and replaced similarly to the processing chamber 103 .

[0186] Since the processing chamber 103, the first cache chamber 101 and the second cache chamber 102 in the chamber assembly are all independent chambers, when one of the chambers in the chamber assembly is maintained, the normal operation of other chambers will not be affected.

[0187] The disclosed embodiment provides a spare processing chamber and maintenance equipment. When a processing chamber in a chamber assembly needs maintenance, it can be promptly replaced with a spare processing chamber, and then the replaced processing chamber can be maintained. Compared with directly stopping the machine for maintenance in the chamber assembly, the downtime is reduced, which is beneficial to improving maintenance efficiency.

[0188] Combine the following Figures 13a to 13f To illustrate a method for transferring a semiconductor structure in a semiconductor structure processing system 1000 , an example in which a chamber assembly includes four processing chambers is used for illustration.

[0189] Step 1: Reference Fig.13a As shown, there is a semiconductor structure in each of the first cache chamber 101 and the four processing chambers 103. The carrying position 121 of the transmission component 120 enters the first cache chamber 101 and the four processing chambers 103 and lifts the semiconductor structure.

[0190] Step 2: Reference Fig.13bAs shown, the carrier position 121 of the transmission component 120 withdraws from the first cache chamber 101 and the four processing chambers 103, and the carrier position 121 as a whole descends by the height of one chamber to align with the four processing chambers 103 and the second cache chamber 102. At the same time, the first arm 111 of the transfer component 110 obtains the semiconductor structure to be processed from the outside and moves to a position aligned with the first cache chamber 101.

[0191] Step 3: Reference Fig.13c As shown, the carrier 121 carrying the semiconductor structure enters the four processing chambers 103 and the second cache chamber 102 , and at the same time, the first arm 111 of the transfer component 110 places the semiconductor structure to be processed into the first cache chamber 101 .

[0192] Step 4: Reference Fig.13d As shown, the carrier 121 of the transmission component 120 places the semiconductor structure into the four processing chambers 103 and the second cache chamber 102 and then exits, and then the second arm 112 of the transfer component 110 enters the second cache chamber 102 .

[0193] Step 5: Reference Fig.13e As shown, the second arm 112 of the transfer assembly 110 takes out the semiconductor structure from the second cache chamber 102 , and at the same time, the supporting position 121 rises as a whole to the height of one chamber and is aligned with the first cache chamber 101 and the four processing chambers 103 .

[0194] Step 6: Reference Fig.13f As shown, the second arm 112 of the transfer assembly 110 takes out the semiconductor structure from the second cache chamber 102 and puts it into the semiconductor structure storage device, while the third arm 113 of the transfer assembly 110 takes out the semiconductor structure to be processed from the outside and moves it to a position aligned with the first cache chamber 101, ready to put the semiconductor structure into the first cache chamber 101. At the same time, the first arm 111 of the transfer assembly 110 moves to a position aligned with the second cache chamber 102, ready to take out the semiconductor structure from the second cache chamber 102.

[0195] It should be noted that the first arm, the second arm and the third arm of the transfer assembly 110 can be used alternately and cyclically, and each arm is not limited to performing only one function.

[0196] It can be understood that by cyclically repeating the above steps, the semiconductor structure can continuously enter the chamber assembly from the first cache chamber 101, and leave the chamber assembly from the second cache chamber 102 after passing through each processing chamber 103 in turn, so that efficient transmission of the semiconductor structure can be achieved.

[0197] In the above example of the semiconductor structure transfer step, the semiconductor structure is transferred from top to bottom in the chamber assembly, that is, entering the chamber assembly from the first cache chamber 101 and leaving the chamber assembly from the second cache chamber 102. In other embodiments, the semiconductor structure may also be transferred from bottom to top, that is, entering the chamber assembly from the second cache chamber 102 and leaving the chamber assembly from the first cache chamber 101.

[0198] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A semiconductor structure processing system, characterized in that: include: The chamber assembly comprises: a second cache chamber, n processing chambers, and a first cache chamber stacked in sequence from bottom to top; wherein n is a natural number greater than 1; A support frame, comprising: a third support position, n second support positions, and a first support position, which are arranged in parallel from bottom to top; wherein the first support position is used to carry the first cache chamber, the second support position is used to carry the processing chamber, and the third support position is used to carry the second cache chamber; the second support position is detachably connected to the processing chamber; a transfer assembly, located on a first side of the chamber assembly, for transferring the semiconductor structure into the first cache chamber and for taking the semiconductor structure out of the second cache chamber; A transfer component is located on the second side of the chamber assembly, and includes: n+1 carrying positions arranged in parallel from bottom to top, each of the carrying positions is used to carry one of the semiconductor structures; the transfer component is used to transfer the semiconductor structure between the first cache chamber and the adjacent processing chamber, and is also used to transfer the semiconductor structure between two adjacent processing chambers, and is also used to transfer the semiconductor structure between the second cache chamber and the adjacent processing chamber.

2. The system according to claim 1, characterized in that The second support position includes: a guide rail; The processing chamber comprises: A first housing, used to form a first accommodating cavity for accommodating the semiconductor structure; A connecting piece is located on the outer wall of the first shell and is adapted to the guide rail for fixedly connecting the processing chamber and the second supporting position when nested in the guide rail; wherein, when the connecting piece is separated from the guide rail, the processing chamber is separated from the second supporting position.

3. The system according to claim 1, characterized in that The first cache chamber, the second cache chamber, and each of the processing chambers include: a tray for carrying one of the semiconductor structures; Wherein, the distance between two adjacent trays is substantially the same as the distance between two adjacent load-bearing positions in the transmission assembly.

4. The system according to claim 1, characterized in that The system further comprises: a first air supply box, connected to the air inlet of the first cache chamber through a first air inlet pipe, for providing a first protective gas to the first cache chamber; and connected to the air inlet of the second cache chamber through a second air inlet pipe, for providing a second protective gas to the second cache chamber; A second gas supply box is connected to the gas inlet of each processing chamber through n third gas inlet pipes, and is used to provide reaction gas to the processing chamber; a first airflow driving device, connected to the air outlet of the first cache chamber through a first air outlet pipe, for allowing the first cache chamber to discharge gas to the outside; and connected to the air outlet of the second cache chamber through a second air outlet pipe, for allowing the second cache chamber to discharge gas to the outside; The second air flow driving device is connected to the air outlet of each processing chamber through n third air outlet pipes respectively, and is used for exhausting gas from the processing chamber to the outside.

5. The system according to claim 1, characterized in that The system further comprises: a water supply tank, connected to the water inlet of the first cache chamber through a first water inlet pipe, for providing water flow to the first cache chamber; connected to the water inlet of the second cache chamber through a second water inlet pipe, for providing water flow to the second cache chamber; and connected to the water inlet of each of the processing chambers through n third water inlet pipes, for providing water flow to the processing chambers; A water flow driving device is connected to the water outlet of the first cache chamber through a first water outlet pipe, so as to allow the first cache chamber to discharge water outward; it is also connected to the water outlet of the second cache chamber through a second water outlet pipe, so as to allow the second cache chamber to discharge water outward; it is also connected to the water outlet of each of the processing chambers through n third water outlet pipes, so as to allow the processing chambers to discharge water outward.

6. The system according to claim 1, characterized in that The system further comprises: The power supply device supplies power to the first cache chamber through a first circuit bus, supplies power to the second cache chamber through a second circuit bus, and supplies power to the n processing chambers through n third circuit buses.

7. The system according to claim 1, characterized in that The n processing chambers include: at least two types of processing chambers; The first type of processing chamber is used to deposit metal materials; The second type of processing chamber is used to deposit the barrier layer of the metal material; wherein, The second type of processing chamber is located between the first type of processing chamber and the first buffer chamber; or, The second type of processing chamber is located between the first type of processing chamber and the second cache chamber.

8. The system according to claim 1, characterized in that The system further comprises: a second housing, used to form a second accommodating cavity for accommodating the n+1 bearing positions; The transmission component also includes: A first connector is extended and arranged in parallel with the arrangement direction of the n+1 bearing positions, and is used to fix the n+1 bearing positions; A second connector is extended and arranged in a direction perpendicular to the arrangement direction of the n+1 bearing positions and is in contact with the first connector; in, The first connector is movably connected to the second connector; when the first connector and the second connector have a first relative position relationship, the n+1 bearing positions are located in the chamber assembly; when the first connector and the second connector have a second relative position relationship, the n+1 bearing positions are located in the second shell; or, The first connector is fixedly connected to the second connector; when the second connector and the chamber assembly have a third relative position relationship, the n+1 load-bearing positions are located in the chamber assembly; when the second connector and the chamber assembly have a fourth relative position relationship, the n+1 load-bearing positions are located in the second shell.

9. The system according to claim 8, characterized in that The system further comprises: a transfer chamber for accommodating the transfer assembly; The first cache chamber includes: a first valve, located on the first side, used to connect the first cache chamber with the transfer chamber when in an open state and allow the semiconductor structure to pass through the first valve; and also used to separate the first cache chamber from the transfer chamber when in a closed state; The second cache chamber includes: a third valve, located on the first side, used to connect the second cache chamber with the transfer chamber when in an open state and allow the semiconductor structure to pass through the third valve; and also used to separate the second cache chamber from the transfer chamber when in a closed state.

10. The system according to claim 9, characterized in that The second shell includes: a fifth valve, located on a surface of the second shell relatively close to the second side surface, and used to separate the chamber assembly from the second accommodating cavity when in a closed state; The first cache chamber further includes: a second valve, located on the second side, for separating the first cache chamber from the second accommodating chamber when in a closed state; Wherein, when the second valve and the fifth valve are both in an open state, the first buffer chamber is connected to the second accommodating chamber; The second cache chamber further includes: a fourth valve, located on the second side surface, for separating the second cache chamber from the second accommodating chamber when in a closed state; Wherein, when the fourth valve and the fifth valve are both in an open state, the second cache chamber is connected to the second accommodating chamber.

11. The system according to claim 1, characterized in that The system further comprises: at least one spare processing chamber, the spare processing chamber having the same structure as the processing chamber; Maintenance equipment, including: Base; a liftable carrying platform, located on the base, used to carry the processing chamber to be disassembled when the processing chamber is disassembled; and also used to carry the spare processing chamber to be installed when at least one processing chamber is separated from the second supporting position; A controller is used to control the distance between the liftable support platform and the base.

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