Semiconductor element testing device and semiconductor element testing method

Abstract

The present invention relates to a test device in which a space in which a transistor (117) is arranged and a space in which a drive circuit for a test is arranged are separated by a partition (214). The drive circuit has a plurality of switching circuit substrates (201) on which a conductor plate (204) for connection is mounted. A fork-shaped plug (205e) is connected to a collector c terminal of the transistor (117) on which a test is performed, and a fork-shaped plug (205c) is connected to an emitter e terminal. The fork-shaped plugs (205) are connected to the conductor plates (204) by inserting the fork-shaped plugs (205) into opening portions (216) provided in the partition (214). By changing the positions of the opening portions (216) into which the fork-shaped plugs (205) are inserted, connection changes to the drive circuit corresponding to a test item can be performed.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor element, an electrical element testing device that tests an electrical element, a testing method of an electrical element, and the like. BACKGROUND

[0002] In a life test of an electrical element such as a semiconductor element, a current for energization is turned on and off. In particular, a current applied to a power semiconductor element is as large as several hundred amperes. There are many types of tests of electrical elements, and it is necessary to change connection of a connection wiring corresponding to the type of the test.

[0003] PRIOR ART DOCUMENT

[0004] PATENT DOCUMENT

[0005] Patent Document 1: Japanese Patent Application Publication No. 2017-17822 SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] A constant current applied for testing a transistor or the like semiconductor element is a current of several hundred A or more, and thus a thick wire material with low resistance needs to be used for the connection wiring.

[0008] A thick connection wiring is hard and has no flexibility. It takes a long time to change connection of the thick wire material corresponding to a test item.

[0009] SOLUTION TO THE PROBLEM

[0010] The semiconductor element testing device of the present application separates a space in the semiconductor element testing device in which a transistor 117 or the like to be tested is arranged from a place where a circuit board that generates a control signal for the transistor 117 or the like is arranged, by a partition wall 214.

[0011] A fork-shaped plug is used in connection with the circuit board or the like. Connection and connection change are performed by inserting the fork-shaped plug 205 through an opening portion 216 provided in the partition wall 214 so that the fork-shaped plug 215 comes into electrical contact with a conductor plate 204 possessed by the circuit board.

[0012] EFFECT OF THE INVENTION

[0013] By changing the position of the fork-shaped plug 205 inserted into the opening portion 216, it is possible to easily change connection of the semiconductor element 117 and the test circuit. Connection work of the connection wiring 211 for each test item or connection change is performed by changing the position of the fork-shaped plug 205, and thus it is possible to greatly shorten the time for connection change. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1is a block diagram and explanatory diagram of a semiconductor element testing device of the present application.

[0015] Figure 2 is a configuration diagram of a semiconductor element testing device of the present application.

[0016] Figure 3 is an explanatory diagram and equivalent circuit diagram of a semiconductor element subjected to testing.

[0017] Figure 4 is a block diagram and explanatory diagram of a semiconductor element testing device of the present application.

[0018] Figure 5 is an explanatory diagram and configuration diagram of a semiconductor element testing device of the present application.

[0019] Figure 6 is an explanatory diagram and configuration diagram of a semiconductor element testing device of the present application.

[0020] Figure 7 is an explanatory diagram and configuration diagram of a heat pipe portion of the present application.

[0021] Figure 8 is an explanatory diagram and configuration diagram of a heat pipe portion of the present application.

[0022] Figure 9 is an explanatory diagram and configuration diagram of a mounting portion of a semiconductor element of the present application.

[0023] Figure 10 is an explanatory diagram and configuration diagram of a mounting portion of a semiconductor element of the present application.

[0024] Figure 11 is an explanatory diagram and configuration diagram of a mounting portion of a semiconductor element of the present application.

[0025] Figure 12 is an explanatory diagram and configuration diagram of a mounting portion of a semiconductor element of the present application.

[0026] Figure 13 is an explanatory diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0027] Figure 14 is an explanatory diagram and configuration diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0028] Figure 15 is an explanatory diagram and configuration diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0029] Figure 16 is an explanatory diagram and configuration diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0030] Figure 17is a diagram and a block diagram of a semiconductor element testing device of the present application.

[0031] Figure 18 is a diagram and a block diagram of a semiconductor element testing device of the present application.

[0032] Figure 19 is a timing chart of a semiconductor element testing method of the present application.

[0033] Figure 20 is a diagram of a circuit section of a semiconductor element testing device of the present application.

[0034] Figure 21 is a diagram of a circuit section of a semiconductor element testing device of the present application.

[0035] Figure 22 is a diagram of a semiconductor element testing method of the present application.

[0036] Figure 23 is a diagram of a semiconductor element testing method of the present application.

[0037] Figure 24 is a diagram of a semiconductor element testing method of the present application.

[0038] Figure 25 is a diagram of a semiconductor element testing method of the present application.

[0039] Figure 26 is a diagram of a semiconductor element testing method of the present application.

[0040] Figure 27 is a block diagram and a timing chart of a semiconductor element testing device of the present application. DETAILED DESCRIPTION

[0041] Hereinafter, a testing device and a testing method of an electrical element of an embodiment of the present application will be described with reference to the drawings.

[0042] In the embodiment described in the specification, as a power semiconductor element of an electrical element, an IGBT is mainly described as an example.

[0043] The present application is not limited to an IGBT, and can be applied to various semiconductor elements such as a SiC transistor, a MOSFET, a JFET, a thyristor, a diode, a thermistor, a reset, and the like.

[0044] In addition, the present application is not limited to a semiconductor element, and can be of course applied to an electrical element other than a semiconductor element such as a resistance element, a capacitor, a coil, a crystal element, a ZNR, and the like.

[0045] Embodiments of the present application can be combined with some or all of the various embodiments, and can be modified and combined.

[0046] Figure 2 is a configuration diagram of a semiconductor element testing device of the present application and an explanatory diagram. As shown in (a) of Figure 2 , the semiconductor element testing device of the present application has a housing 210, a cooler (cooling / warming device) 136, a heating cooling plate 134, and a circulating water pipe 135 circulating between the heating cooling plate 134 and the cooler 136. On the heating cooling plate 134, a transistor 117 or the like to be tested is arranged in close contact with the heating cooling plate 134.

[0047] As shown in (b) of Figure 2 , a partition wall 217 is arranged with an opening 216 into which a connection structure 218 described in (c) of Figure 7 , Figure 9 , Figure 11 and the like is inserted. A hole into which a power supply wiring 212 is inserted is arranged in the partition wall 215.

[0048] The control rack 131 has a power supply device 132 supplying a test current, a test voltage to the semiconductor element 117, and a control circuit 133 controlling the semiconductor element 117 or the like or setting a test condition.

[0049] The control circuit 133 changes the current Id, the gate voltage Vg, and the voltage Vce in such a manner that the temperature information Tj of the semiconductor element 117 reaches a prescribed value, sets a condition of a test, and performs the test.

[0050] The control circuit 133 controls the power supply device 132, and the power supply device 132 supplies a test voltage or a test current to the semiconductor element 117 to be tested.

[0051] When the temperature information Tj changes or changes to a prescribed value, it is determined that the semiconductor element 117 deteriorates or a characteristic changes, the test of the semiconductor element 117 is stopped, or a test method or a control method is changed.

[0052] The temperature of the semiconductor element 117 is maintained at a predetermined value or a prescribed value by warming or cooling the circulating water of the cooler 136. In addition, the temperature of the semiconductor element or the like is periodically changed in correspondence with a test condition, and in addition, the cooling or the warming is performed in a constant manner.

[0053] As an example, the semiconductor element testing device of the present application and the test method of the semiconductor element can cope with a variety of semiconductor elements 117, semiconductor modules 117 as shown in (d) of Figure 3 . Figure 3The semiconductor element 117 and the like have a terminal P electrode terminal, an O electrode terminal, and an N electrode terminal to which a large current is applied or output.

[0054] Figure 3 is a schematic diagram and an equivalent circuit diagram of a semiconductor element. Figure 3 (a1) and (a2) of are a configuration having one transistor 117 and a diode Di.

[0055] Figure 3 (b1) and (b2) of are a configuration having a transistor 117 (transistor 117m, transistor 117s) and a diode Di (diode Dim, diode Dis).

[0056] Figure 3 (c1) and (c2) of are a configuration in which a plurality of transistors are connected by connecting terminals of semiconductor elements having a transistor 117 (transistor 117m or transistor 117s) and a diode Di (diode Dim or diode Dis) to each other.

[0057] Figure 3 (d1) and (d2) of are a configuration having a transistor 117 (transistor 117m, transistor 117s) and a diode D (diode Ds, diode Dm) having a terminal independent of a terminal of the transistor.

[0058] Figure 3 (e1) and (e2) of are a configuration in which a plurality of transistors are connected by connecting terminals of semiconductor elements having a transistor 117 (transistor 117m or transistor 117s) and a diode D (diode Dm or diode Ds) having a terminal independent of a terminal of the transistor.

[0059] In the following embodiments, mainly Figure 3 the semiconductor element 117 shown in FIG. 1 is described.

[0060] Figure 1 is a block diagram and an explanatory diagram of a semiconductor element test device of the present application.

[0061] The power supply device 132 outputs a constant current of a large current for testing the transistor 117. The power supply device 132 supplies power (current, voltage) in synchronization with a control signal from the control circuit substrate (controller) 111. The power supply device 132 can set a maximum voltage value of the output.

[0062] The switching circuit 122 (SWa) has a function of turning on (supplying, applying) or turning off (blocking, opening) the supply of the constant current output from the power supply device 132.

[0063] In the semiconductor element testing device of the present application, the power supply device 132 is not limited to one. Two or more power supply devices 132 can be provided.

[0064] In the embodiment of the present application, as the connection plug 205, a fork-shaped plug is exemplified. As the fork-shaped plug 205e connected to the collector terminal of the transistor 117, the fork-shaped plug 205d connected to one terminal of the power supply device 132, the fork-shaped plug 205 is connected to the conductor plate 204 at one end of each of the connection wiring 211 and each of the power supply wiring 212.

[0065] Note that, in the present specification and the drawings, the conductor plate 204 is described as a plate, but it is not limited to a plate and can be a rod. It can be composed of a plurality of structures. It can be any shape or the like as long as it can be engaged with the fork-shaped plug 205 or the like. For example, it can be a socket, a connector, or the like. Alternatively, the conductor plate 204 can be provided in the shape of a fork-shaped plug, and the fork-shaped plug 205 can be connected to the fork-shaped plug.

[0066] The present application can be any configuration as long as the fork-shaped plug 205 or the like is formed or provided at at least one terminal of the transistor 117 on which a test is performed and is electrically connected to the connection object such as the fork-shaped plug 205 and the conductor plate 204.

[0067] The fork-shaped plug 205 is described as a fork-shaped plug 205 that is inserted into a structure or a structure that separates a space such as the partition wall 214. However, it is not limited thereto. For example, the fork-shaped plug 205c can be connected to the conductor plate 204b, and the fork-shaped plug 205c can be inserted from the partition wall 214 to be electrically connected to one terminal (emitter terminal e) of the transistor 117.

[0068] The partition wall 214, the partition wall 215, and the partition wall 217 of the semiconductor element testing device of the present application can be any partition wall as long as it divides or separates a space or an area. Various configurations or structures such as a wall, a plate, a net, a film, a foil, and the like are applicable.

[0069] The fork-shaped plug 205 can be any one of a configuration, a structure, a method, a form, or a way that can be electrically connected to the object such as the conductor plate 204 by press-fitting, press-bonding, insertion, press-fitting, clamping, fitting, or the like.

[0070] The test current Id that flows through the transistor 117 is supplied by operating the power supply device 132. The power supply device 132 is controlled to be operated / turned off (turned on / turned off) in accordance with a signal from the control circuit substrate (controller) 111. In addition, the output and the non-output of the current Id can be switched. The device control circuit substrate 209 is controlled by the control circuit substrate (controller) 111.

[0071] In Figure 1 the transistor 117, 117 examples Figure 3 (a) shown in the transistor with diode Di to explain. The transistor 117 of the emitter terminal e ground (ground) to explain. In the transistor 117 of the gate terminal g connected with the gate driver circuit 113.

[0072] Sample connection circuit 203, configured or formed with the gate driver circuit 113, variable resistance circuit 125, constant current circuit 118, operational amplifier (buffer circuit) 116.

[0073] Sample connection circuit 203 from the device control circuit board 209 in a manner that can be configured in close proximity to the transistor 117 of the position of the test, and through the connector 208 electrically connected.

[0074] Sample connection circuit 203 through the connector 202 of the connection pin 206 and the transistor 117. The gate driver circuit 113 and the transistor 117 of the gate terminal g in a manner to achieve a short distance of 30 mm or less configuration. If the gate driver circuit 113 and the transistor 117 of the gate terminal g is longer, the noise and so on overlap to the gate terminal g, so that the transistor 117 due to noise and misoperation.

[0075] As Figure 1 shown, from the gate driver circuit 113 to the gate terminal g transistor 117 applied test signal. The gate driver circuit 113 has an operational amplifier circuit.

[0076] As Figure 5 shown, the device control circuit board 209 is configured in the housing 210 of the semiconductor element test device B room. The housing 210 is assembled with power supply device 132, drive circuit system, heating and cooling plate 134, etc.

[0077] Sample connection circuit 203 is configured in close proximity to the transistor 117 of the position of the test, so configured in the housing 210 of the semiconductor element test device C1 room. Sample connection circuit 203 and the connector 208 is configured on the side of the housing 210. The connection pin 206 of the connector 208 with the wiring and the B room device control circuit board 209 connected.

[0078] Sample connection circuit 203 through the connector 208 of the connection pin 206 and the device control circuit board 209. Sample connection circuit 203 and each transistor 117 corresponding to the test, the sample connection circuit 203 is configured to be easily removed through the connector 202, etc.

[0079] The constant current circuit 118 supplies a constant current Ic to a diode Di configured or formed in the channel of the transistor 117. The operational amplifier circuit 116 buffers (reduces the output impedance) the terminal voltage of the diode Di and outputs it as a Vi voltage. The Vi voltage is analog-digital converted by the temperature measuring circuit 115.

[0080] The temperature measuring circuit 115 obtains temperature information Tj of the transistor 117 from the terminal voltage Vi and transmits it to the control circuit substrate 111. The temperature information is output from the connector 213 of the device control circuit substrate 209 to the mother substrate 207 and transmitted to the control circuit substrate 111.

[0081] The gate driver circuit 113 applies a set frequency (on-off period), a set on voltage to the gate terminal of the transistor 117. As an example, as shown in (b) of FIG. 1, the on-off period of the transistor 117 is tcycle and the on time is ton. Figure 27

[0082] The transistor 117 operates / does not operate (turns on / off) by the Vg signal voltage output from the gate driver circuit 113, and during the on period of the transistor 117, a current Id flows in the channel of the transistor 117.

[0083] The gate driver circuit 113 has a variable resistance circuit 125. The resistance value Vr of the variable resistance circuit 125 is configured to be able to be set to a constant voltage or a voltage that changes over time between 0 (Ω) and 500 (Ω).

[0084] The gate driver circuit 113 can set the slope (rise time Tr) of the rising edge waveform and the slope (fall time Td) of the falling edge waveform of the gate signal applied to the gate terminal g of the transistor 117.

[0085] In the above, the resistance value Vr of the variable resistance circuit 125 of the gate driver circuit 113 is variable, but is not limited thereto. For example, the variable resistance circuit 125 can be configured as an external resistance. Figure 1

[0086] The constant current circuit 118 causes a predetermined constant current Ic to flow. The constant current Ic is applied to the diode Di. By monitoring the terminal voltage of the diode Di, the temperature change of the transistor 117 can be measured or observed.

[0087] In order to prevent the transistor 117 from heating due to the constant current Ic, the constant current Ic is made to be a current value sufficiently smaller than the constant current Id flowing through the channel of the transistor 117.

[0088] ​​Specifically, the constant current Ic is set to be 1 / 1000 or less of the current Id flowing through the transistor 117 at the time of the test. It is preferable that the current Ic flowing through the transistor 117 be 1 x 10 6 or more and 1 x 10 4 or less of the current Id. The constant current Ic is 0.1 mA or more and 100 mA or less.

[0089] The channel current Id is varied, and the diode Di voltage (the voltage between the collector and the emitter terminals of the transistor 117) is measured, and the temperature coefficient K is calculated. The calculated temperature coefficient K is stored in the temperature measuring circuit 115.

[0090] As the temperature coefficient K, the transistor 117 is made to be a prescribed temperature by heating the cooling plate 134, the constant current Ic is made to flow through the diode Di, and the terminal voltage is measured. By varying the prescribed temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode Di with respect to the temperature of the transistor 117 can be acquired. Therefore, the temperature coefficient K of the transistor 117 can be calculated from the terminal voltage of the diode Di with respect to the temperature.

[0091] The constant current Ic flows through the diode Di when the channel current Id does not flow. That is, when the transistor 117 is not turned on, the constant current Ic is made to flow to measure the voltage between the terminals of the diode Di.

[0092] The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi (terminals c-terminal e) of the diode Di.

[0093] Further, the operational amplifier circuit 116 is not limited to being constituted by an operational amplifier element. As long as the output impedance is lower than the input impedance, it can be any circuit.

[0094] The calculated temperature information Tj is transmitted to the control circuit substrate (controller) 111. The control circuit substrate (controller) 111 judges that the transistor 117 becomes a prescribed stress state or a deterioration state when the temperature information Tj reaches a prescribed set value or more, and performs control change of the test or test stop, or the like.

[0095] In the embodiment of FIG. 1, the switching circuit Ssa 124a and the switching circuit Sab 124b use the symbol of the switching circuit. As the switching circuit 124, a transistor, a mechanical relay, a phototransistor, a photodiode switch, a photo-MOS relay, or the like can be exemplified. Figure 1

[0096] Figure 4 is an equivalent circuit diagram of a semiconductor element test device in the first embodiment of the present application and an explanatory diagram. In the present embodiment, as in the first embodiment, the diode Di is connected to the collector and the emitter of the transistor 117, and the constant current Ic is made to flow through the diode Di when the channel current Id does not flow. Figure 4 ​As shown in (b), the switching circuits such as the switching circuit Ssa124a and the switching circuit Sab124b use the power MOSFET 124. The voltage (Vsd) between the channels of the MOSFET is small, and therefore it is preferable.

[0097] The channel voltage (Vsdb) of power MOSFET 124b when it is on is selected to be lower than the channel voltage (Vsda) of power MOSFET 124a when it is on. In other words, the channel voltage (Vsdb) of power MOSFET 124b when it is on is lower than the channel voltage (Vsda) of power MOSFET 124a when it is on. This is to ensure that current Im flows stably when switch circuit 124b is on, short-circuiting the terminals of power supply device 132.

[0098] The switch circuit 124 is mounted or formed on the switch circuit substrate 201. The switch circuit 124 is connected to the conductor plate 204. As an example, the conductor plate 204 is a copper plate with a thickness of 5 mm and a width of 50 mm. As an example, the length of the conductor plate 204 is 250 mm.

[0099] Figure 5 、 Figure 13 The fork plug 205 and the connection (contact) state of the fork plug 205 and the conductor plate 204 are shown.

[0100] Figure 13 (a) schematically shows from above a state in which a conductor plate 204 is mounted on a switch circuit board (printed circuit board) 201 on which a switch circuit and the like are formed, and a fork plug 205 is connected to the conductor plate 204 . Figure 13 (b) is an explanatory diagram of a state in which one end of the conductor plate 204 is clamped by the fork plug 205 .

[0101] like Figure 1 As shown, two conductor plates 204 are mounted on the switch circuit board 201. The conductor plates 204 and the switch circuit board 201 are fixed with screws.

[0102] The electrical connection is achieved by mechanically fitting the fork plug 205 to the conductor plate 204. When the U-shaped portion of the fork plug 205 is inserted into the conductor plate 204, the fork plug 205 and the conductor plate 204 are well joined.

[0103] like Figure 13 As shown, a connection bolt 219 is attached to the fork plug 205. The connection wire 211 is connected to the connection bolt 219.

[0104] Figure 13 (b) shows Figure 13A cross section at AA' of (a). The conductor plate 204 makes contact with the fork plug 205 at a contact portion 220a, a contact portion 220b formed in the fork plug 205. The contact portion 220 is composed of phosphor bronze, a nickel alloy, and has a spring characteristic. The surface of the contact portion 220 is plated with gold or silver. The electrical stability of the contact portion 220 is improved by plating.

[0105] As shown in Figure 5 , Figure 6 , the fork plug 205 and the conductor plate 204 are electrically connected by inserting the fork plug 205 from the opening portion 216 of the partition wall 214.

[0106] Figure 5 The arrangement of each component of the semiconductor element testing device of the present application is shown. The housing 210 of the semiconductor element testing device has a plurality of portions. The lower portion of the housing is divided into an A chamber and a B chamber. The power supply device 132 is arranged in the A chamber. The A chamber and the B chamber are separated by a partition wall 215. A C1 chamber and a C2 chamber are separated by a partition wall 217.

[0107] The power supply device 132, the switching circuit substrate 201, and the transistor 117 generate large noise by repeatedly performing operation / non-operation. Due to the noise, the circuit substrate and the like are subject to erroneous operation. By electrostatically and electromagnetically shielding the partition walls of each chamber, erroneous operation can be prevented.

[0108] The electrostatic and electromagnetic shielding is achieved by installing or forming a conductive plate, a metal plate, a metal thin film, or a metal mesh around each chamber or on the surface or inside of the partition walls.

[0109] In the C1 chamber, a heating and cooling plate 134, a circulating water pipe 135, and the like shown in Figure 2 are arranged. The transistor 117 to be tested is closely arranged on the heating and cooling plate 134.

[0110] A water leakage sensor (not shown) is arranged around the heating and cooling plate in the C1 chamber. The water leakage sensor is configured to operate when the circulating water (cooling medium) and the like leaks, and stop the semiconductor element testing device or issue an alarm.

[0111] A drain groove (not shown) is formed around the heating and cooling plate 134. The circulating water (cooling medium) flows into the drain groove when the circulating water (cooling medium) leaks from the heating and cooling plate, and is discharged to the outside of the semiconductor element testing device.

[0112] The heating and cooling plate 134 is mounted on a tray (not shown), and the tray is configured to be detachable from the partition wall 214.

[0113] As described above, the partition wall 214 is configured such that the circulating water pipe 135 and the like are not damaged, and the circulating water (cooling medium) and the like do not leak to the A chamber and the B chamber below.

[0114] A partition wall 215 is formed between room A, where power supply unit 132 is located, and room B, where the drive circuit system is located. An electrostatic shield or electromagnetic shield is placed on partition wall 215 to shield noise from power supply unit 132 and prevent it from reaching the drive circuit system in room B.

[0115] In the embodiment of the present invention, the fork plug 205 is inserted from the C2 chamber to connect to the conductor plate 204 of the B chamber. The partition wall 214 is formed with an opening 216 into which the fork plug 205 is inserted.

[0116] In the embodiment of the present invention, the fork plug 205 is inserted from the top to the bottom. The present invention is not limited to this. For example, the conductor plate 204 may be placed in chamber C2, and the fork plug 205 may be inserted from chamber B to electrically connect the fork plug 205 to the conductor plate 204.

[0117] like Figure 13 As shown in (c), a connector 213 is mounted on the motherboard 207. The control circuit board 111, the device control circuit board 209, and the switch circuit board 201 are mounted on the connector 213 of the motherboard 207. The switch circuit boards 201 are prepared according to the number of transistors 117 to be tested. By varying the number of switch circuit boards 201 mounted on the motherboard 207, the number of switch circuit boards 201 can be easily adjusted.

[0118] Temperature information Tj, voltage Vi, control signals for the variable resistor circuit 125, and constant current circuit 118 are transmitted to the motherboard 207. Power supply wiring and ground wiring forming each circuit are also supplied to each circuit board via the connector 213.

[0119] like Figure 13 As shown in FIG. 2 ( c ), the conductor plate 204 is arranged so as to protrude from the switch circuit board 201. A fork plug 205 is connected to the protruding portion.

[0120] The fork plug 205 a is connected to the conductor plate 204 a of the switch circuit board 201 a . The power supply line 212 is connected to the switch circuit board 201 a via the opening 216 of the partition wall 215 .

[0121] like Figure 1 、 Figure 5 As shown, fork plug 205d is connected to conductor plate 204c of switch circuit board 201b. Power supply wiring 212 is connected to switch circuit board 201b via opening 216 of partition wall 215. Fork plug 205b is connected to conductor plate 204b of switch circuit board 201a. Power supply wiring 212 is connected to switch circuit board 201a via opening 216 of partition wall 215.

[0122] As Figure 1 , Figure 4 shown, the switch circuit 124a is arranged between the conductor plate 204d and the conductor plate 204c of the switch circuit substrate 201b, and the conductor plate 204d and the conductor plate 204c are electrically short-circuited. By the short-circuit, the current Id output from the power supply device 132 is supplied to the transistor 117 as a test current Id.

[0123] As Figure 4 shown, the switch circuit 124b is arranged between the conductor plate 204a and the conductor plate 204b of the switch circuit substrate 201a. By turning on the switch circuit 124b, the conductor plate 204a and the conductor plate 204b are short-circuited. By the short-circuit, the current Id output from the power supply device 132 flows to the ground as a discharge current Im. Therefore, no voltage is applied between the channels of the transistor 117, and no current flows through the transistor 117, and no overvoltage and overcurrent are applied to the electrical elements such as the transistor 117.

[0124] The conductor plate 204b is connected to the fork plug 205c. The conductor plate 204a is connected to the fork plug 205b. Further, the conductor plate 204d is connected to the fork plug 205e. The conductor plate 204c is connected to the fork plug 205d.

[0125] The fork plug 205 is made of a metal such as aluminum. The fork plug 205 is subjected to nickel treatment on a plating base, and silver plating is applied to the surface.

[0126] The fork plug 205 is formed with a threaded groove, and is configured to be able to attach the connection wiring 211 to the fork plug 205 by a connection bolt 219.

[0127] Figure 5 Two switch circuit substrates 201a, 201b are illustrated. The switch circuit substrates 201 are connected to the connector 213 of the mother substrate 207.

[0128] As Figure 5 , Figure 6 shown, the fork plug 205c is inserted from the opening portion 216 of the partition wall 214 provided between the C2 chamber and the B chamber, and is connected to the conductor plate 204b. The fork plug 205e is inserted from the opening portion 216 of the partition wall 214 provided between the C2 chamber and the B chamber, and is connected to the conductor plate 204d.

[0129] The current flowing through the transistor 117 under test is as large as several hundred amperes, and therefore the connection wiring 211 used is also thick. Therefore, the thick connection wiring 211 and the power supply wiring 212 are hard. Therefore, the connection wiring 211 and the power supply wiring 212 are not easily changed.

[0130] In the semiconductor element testing device of the present application, the fork plug 205 is inserted into any of the opening portions 216 of the partition wall 214 from the C2 chamber. By changing the position of the opening portion 216 into which the fork plug 205 is inserted, connection with any of the switching circuit substrates 201 can be made. Therefore, changing the connection with the switching circuit substrate 201 used in accordance with the testing conditions of the transistor 117 does not require rewiring of the connection wiring 211, but only the position of the opening portion 216 into which the fork plug 205 is inserted needs to be changed. In addition, as shown in (c) of FIG. 10, the switching circuit substrate 201 can be changed only by changing the position of the connector 213 connected to the mother substrate 207. Figure 13

[0131] As described above, the switching circuit substrate 201 connected to the mother substrate 207, the device control circuit substrate 209 are arranged in accordance with the contents of the test of the electrical element 117 such as the semiconductor element, the number of electrical elements 117 subjected to the test. In addition, switching of the connection with the switching circuit substrate 201 and the like is performed by changing the position of the fork plug 205 inserted into the opening portion 216 of the partition wall 214.

[0132] As shown in (a) of FIG. 11, the connection wiring 211b connected to the transistor 117 is connected to the fork plug 205c. The connection wiring 211a connected to the transistor 117 is connected to the fork plug 205e. By attaching and detaching the fork plug 205c, the fork plug 205e, and the conductor plate 204, the semiconductor element 117 subjected to the test can be attached and detached from the test circuit. Figure 1 Figure 4 Figure 5 Figure 6 As shown in (a) of FIG. 11, the connection wiring 211b connected to the transistor 117 is connected to the fork plug 205c. The connection wiring 211a connected to the transistor 117 is connected to the fork plug 205e. By attaching and detaching the fork plug 205c, the fork plug 205e, and the conductor plate 204, the semiconductor element 117 subjected to the test can be attached and detached from the test circuit.

[0133] As shown in (a) of FIG. 11, the connection wiring 211b connected to the transistor 117 is connected to the fork plug 205c. The connection wiring 211a connected to the transistor 117 is connected to the fork plug 205e. By attaching and detaching the fork plug 205c, the fork plug 205e, and the conductor plate 204, the semiconductor element 117 subjected to the test can be attached and detached from the test circuit. Figure 4 The number of the switching circuit substrates 201b needs to correspond to the number of the transistors 117 subjected to the test. For example, if the transistors 117 subjected to the test are 12, it is preferable to prepare 12 pieces of the switching circuit substrates 201b. Specifically, the number of the switching circuit substrates corresponding to the number of the electrical elements 117 subjected to the test is prepared.

[0134] If the switching circuit substrate 201a for testing the electrical element 117 and the switching circuit substrate 201b for short-circuiting the output of the power supply device 132 are made to have the same substrate specifications, it is advantageous in terms of cost. That is, the switching circuit substrate 201 is of a common structure.

[0135]

[0136] ​​​​​A plurality of transistors or the like as the switching circuit 124 are preferably mounted on the switching circuit board 201. The more the number of the switching circuits 124, the more the impedance for short-circuiting between the two conductor boards 204 can be reduced.

[0137] Figure 14 Fig. 2 (a) and (b) illustrate a state in which the fork plug 205 is inserted into the opening portion 216 of the partition wall 214. Figure 14 Fig. 2 (a) is a view as seen from the front of the partition wall 214, Figure 14 Fig. 2 (b) is a view as seen from the back of the partition wall 214.

[0138] As an example, in Fig. 2 (a) and (b), the conductor board 204b is connected with the fork plug 205b and a plurality of fork plugs 205c (fork plug 205cl to fork plug 205c5). The conductor board 204dl is connected with the fork plug 205el, the conductor board 204d2 is connected with the fork plug 205e2, the conductor board 204d3 is connected with the fork plug 205e3, the conductor board 204d4 is connected with the fork plug 205e4, and the conductor board 204d5 is connected with the fork plug 205e5. Figure 14 A large noise is generated by the on-off of the switching circuit 124 of the switching circuit board 201. As a countermeasure, although not illustrated in Fig. 2 (c), a metal plate functioning as a shield is arranged between the two switching circuit boards 201, and the metal plate ground is grounded.

[0139] Figure 13 The heat of the switching circuit 124 is dissipated to the conductor board 204. A heat sink (not illustrated) is mounted on the switching circuit 124. The ground terminal of the switching circuit 124 is connected with the ground of the switching circuit board 201. The heat of the conductor board 204 is also dissipated via the ground copper foil of the switching circuit board 201.

[0140] As illustrated in Fig. 2 (a) and (b), the conductor board 204a and the conductor board 204b are mounted on the switching circuit board 201b. The conductor board 204a is connected with the fork plug 205a. The fork plug 205a is connected with the output terminal of the power supply device 132. The conductor board 204b is connected with the fork plug 205b. The fork plug 205b is connected with the ground terminal of the power supply device 132.

[0141] As illustrated in Fig. 2 (a) and (b), the conductor board 204a and the conductor board 204b are mounted on the switching circuit board 201b. The conductor board 204a is connected with the fork plug 205a. The fork plug 205a is connected with the output terminal of the power supply device 132. The conductor board 204b is connected with the fork plug 205b. The fork plug 205b is connected with the ground terminal of the power supply device 132. Figure 1 Figure 4 When the switching circuit 124b is on (closed), the output terminals of the power supply device 132 are short-circuited, and a short-circuit current Im flows to the ground. Therefore, the output current of the power supply device 132 is not supplied to the transistor 117. When the switching circuit 124b is off, the output current Id of the power supply device 132 is supplied to the transistor 117.

[0142] When the switching circuit 124b is on (closed), the output terminals of the power supply device 132 are short-circuited, and a short-circuit current Im flows to the ground. Therefore, the output current of the power supply device 132 is not supplied to the transistor 117. When the switching circuit 124b is off, the output current Id of the power supply device 132 is supplied to the transistor 117.

[0143] ​​The conductor plate 204c and the conductor plate 204d are mounted on the switching circuit board 201a. The conductor plate 204c is connected to the fork plug 205d. The fork plug 205d is connected to the output terminal of the power supply device 132. The conductor plate 204d is connected to the fork plug 205e. The fork plug 205e is connected to the collector terminal of the transistor 117 which is under test.

[0144] In Figure 14 the configuration, the connection wiring 211 mounted on the fork plug 205 becomes complicated. In addition, the fork plug 205 is difficult to be inserted into the opening portion 216 because of the connection wiring 211.

[0145] As Figure 15 shown, the present application separates the column positions of the fork plugs 205 connected to the common conductor plate 204b and the column positions of the fork plugs 205 connected to one or more conductor plates 204a.

[0146] Figure 15 、 Figure 16 are drawings for explaining the technical idea of the present application. In Figure 15 the configuration, as an example, the conductor plate 204b connecting three or more fork plugs 205b and 205d is arranged. The plurality of fork plugs 205b and 205d are mounted on the conductor plate 204b.

[0147] The conductor plates 204al to 204a6 connecting the fork plugs 205a and 205c are arranged, and the fork plugs 205a and 205c are mounted on each of the conductor plates 204al to 204a6.

[0148] The conductor plates 204al to 204a6 are arranged in a straight line. In addition, each of the conductor plates 204 is arranged in a manner that the conductor plate 204b and the conductor plates 204a are substantially parallel.

[0149] The terminal 226a of the transistor 117 is connected to the fork plug 205b via the connection wiring 211b. The terminal 226b of the transistor 117 is connected to the fork plug 205a via the connection wiring 211a.

[0150] The first terminal of the switching circuit board 201 is connected to the fork plug 205d via the connection wiring 211d. The second terminal of the switching circuit board 201 is connected to the fork plug 205c via the connection wiring 211c.

[0151] The fork plugs 205a and 205c are electrically common through the conductor plate 204a, and the fork plugs 205b and 205d are electrically common through the conductor plate 204b.

[0152] Each of the fork-shaped plugs 205 is inserted into the opening portion 216 configured in a straight line. Therefore, the fork-shaped plugs 205 are arranged in a straight line, and thus each of the connection wirings 211 is arranged in parallel. The semiconductor elements 117 subjected to the test are also arranged in a straight line on the heating cooling plate 134.

[0153] As shown in (a) of FIG. 24, the opening portion 216b is formed in the fork-shaped plug insertion plate 241a, and the opening portion 216b is formed in the fork-shaped plug insertion plate 241b. The opening portion 216b of the fork-shaped plug insertion plate 241a is arranged along the conductor plate 204b. The opening portion 216b of the fork-shaped plug insertion plate 241a is arranged along the conductor plate 204a. Figure 16

[0154] The connection wiring 211a, the connection wiring 211b, the connection wiring 211c, and the connection wiring 211d are connected to each of the fork-shaped plugs 205, and each of the connection wirings 211 is arranged in a position in which each of the connection wirings 211 is arranged in a substantially parallel position.

[0155] By arranging the connection wirings 211 in the substantially parallel positions, as shown in (a) of FIG. 25, the crossing of the connection wirings 211 and the like disappears, and it is easy to insert the fork-shaped plugs 205 into the opening portions 216. Therefore, it is easy to switch which one of the transistors 117a to 117e is subjected to the test by the insertion or non-insertion of the fork-shaped plugs 205 into the opening portions 216. Figure 14 As shown in (b) of FIG. 25, the fork-shaped plug insertion plate 241a and the fork-shaped plug insertion plate 241b are configured or formed so as to have a step difference in the vertical direction with a height H.

[0156] Figure 16 As shown in (a) of FIG. 26, the opening portion 216b is formed in the fork-shaped plug insertion plate 241a, and the opening portion 216b is formed in the fork-shaped plug insertion plate 241b. The opening portion 216a is formed in the partition wall 214. The fork-shaped plugs 205 are inserted into the opening portions 216a and 216b, and the fork-shaped plugs 205 are supported by the opening portions 216a and 216b and the conductor plate 204. Therefore, the support of the fork-shaped plugs 205 becomes firm.

[0157] As shown in (b) of FIG. 26, the connection wiring 211b and the connection wiring 211d are arranged in a lower position, and the connection wiring 211a and the connection wiring 211c are arranged in an upper position. Therefore, the wiring position spaces of the connection wiring 211b and the connection wiring 211d and the connection wiring 211a and the connection wiring 211c are different in the vertical direction, and the crossing of the connection wirings 211 and the like does not occur. Therefore, the insertion, the attachment, and the like of the fork-shaped plugs 205 into the opening portions 216 become easy.

[0158] As shown in (a) of FIG. 26, the opening portion 216b is formed in the fork-shaped plug insertion plate 241a, and the opening portion 216b is formed in the fork-shaped plug insertion plate 241b. The opening portion 216a is formed in the partition wall 214. The fork-shaped plugs 205 are inserted into the opening portions 216a and 216b, and the fork-shaped plugs 205 are supported by the opening portions 216a and 216b and the conductor plate 204. Therefore, the support of the fork-shaped plugs 205 becomes firm. Figure 16 As shown in (b) of FIG. 26, the connection wiring 211b and the connection wiring 211d are arranged in a lower position, and the connection wiring 211a and the connection wiring 211c are arranged in an upper position. Therefore, the wiring position spaces of the connection wiring 211b and the connection wiring 211d and the connection wiring 211a and the connection wiring 211c are different in the vertical direction, and the crossing of the connection wirings 211 and the like does not occur. Therefore, the insertion, the attachment, and the like of the fork-shaped plugs 205 into the opening portions 216 become easy.

[0159] Figure 15 As shown in (b) of FIG. 26, the connection wiring 211b and the connection wiring 211d are arranged in a lower position, and the connection wiring 211a and the connection wiring 211c are arranged in an upper position. Therefore, the wiring position spaces of the connection wiring 211b and the connection wiring 211d and the connection wiring 211a and the connection wiring 211c are different in the vertical direction, and the crossing of the connection wirings 211 and the like does not occur. Therefore, the insertion, the attachment, and the like of the fork-shaped plugs 205 into the opening portions 216 become easy. Figure 16 ​​​The matters explained in the above-described embodiments and variations of the present application, of course, can be applied to other embodiments of the present application, or in combination with other embodiments.

[0160] For the purpose of illustration, Figure 6 One transistor 117 is illustrated. A connection structure 218a is inserted in the opening portion 216a of the partition wall 217, and a connection structure 218b is inserted in the opening portion 216b of the partition wall 217.

[0161] The semiconductor testing device of the present application tests a plurality of semiconductor elements 117 arranged on the heating cooling plate 134. Therefore, as Figure 2 As shown in (b) of FIG. 1, a plurality of opening portions 216 are formed in the partition wall 217.

[0162] Figure 2 As shown in (b) of FIG. 1, a plurality of opening portions 216 are formed in the partition wall 217. The connection structure 218a1 is inserted in the opening portion 216al, and the connection structure 218bl is inserted in the opening portion 216bl. The connection structure 218a2 is inserted in the opening portion 216a2, and the connection structure 218b2 is inserted in the opening portion 216b2. The connection structure 218an is inserted in the opening portion 216an, and the connection structure 218bn is inserted in the opening portion 216bn.

[0163] The connection structure 218a is connected to the element terminal 226a of the transistor 117, and the connection structure 218b is connected to the element terminal 226b of the transistor 117.

[0164] The terminal of the transistor 117 is connected to the connector 202, and the signal wiring 222 connected to the connector 202 is connected to the sample connection circuit 203. The signal wiring 235 of the sample connection circuit 203 is connected to the device control circuit substrate 209 via the connector 208.

[0165] The partition wall (the partition wall 214, the partition wall 215, the partition wall 217) has a function of separating the chambers (the Cl chamber, the C2 chamber, the A chamber, the B chamber) and a function of not allowing outside air to flow in. In particular, the Cl chamber sometimes dew condenses in a test in a low temperature state, and therefore dry air is caused to flow in the Cl chamber.

[0166] The fixing screw 221 is installed at the other end of the connection structure 218, and the connection wiring 211 is connected to the connection structure 218. The fork plug 205 as a connection member is installed at the other end of the connection wiring 211.

[0167] The fixing screw 221 is not limited to a screw, and can be any member as long as the connection wiring 211 is electrically connected to the connection structure 218.

[0168] The sample connection circuit 203 is connected to the device control circuit substrate 209 via the connection pins 206 of the connector 208. The sample connection circuit 203 is separately provided for each transistor 117 to be tested, and is configured to be easily detachable.

[0169] Figure 7 Fig. 1 is a diagram of a connection structure 218 as an embodiment of the semiconductor element testing apparatus of the present application. Figure 7 Fig. 1(a) is a diagram schematically illustrating the back surface, Figure 7 Fig. 1(b) is a diagram schematically illustrating the side surface.

[0170] The heat pipe 223 is fitted in the recess 234 of the connection structure 218. A heat-conducting lubricant or a heat-dissipating silicone oil compound can be applied between the recess 234 of the connection structure 218 and the heat pipe.

[0171] The heat pipe 223 is fitted in the recess 234. By fitting the heat pipe 223 in the recess of the back surface of the connection structure 218, the risk of damage to the heat pipe 223 is reduced. The heat pipe 223 can also be fitted on both surfaces of the connection structure 218.

[0172] The connection structure 218 is heated during testing. Therefore, the heat pipe 223 and the heat pipe metal member 231 are also heated. By heating, the heat pipe 223 and the heat pipe metal member 231 expand.

[0173] In the present application, the heat pipe metal member 231 of the connection structure 218 is made of a material having a smaller linear expansion coefficient than the heat pipe 223. Alternatively, the heat pipe 223 of the connection structure 218 is made of a material having a larger linear expansion coefficient than the heat pipe metal member 231. The heat pipe 223 expands and becomes larger in the recess 234, and is firmly fitted in the recess 234. Therefore, the heat pipe 223 does not come off.

[0174] As the material of the heat pipe metal member 231, copper (linear expansion coefficient 16.8), brass (linear expansion coefficient 19), iron (linear expansion coefficient 12.1), and stainless steel (SUS304) (linear expansion coefficient 17.3) can be exemplified. As the material of the heat pipe 223, a material having a larger linear expansion coefficient than the heat pipe metal member 231, such as aluminum (linear expansion coefficient 23), tin (linear expansion coefficient 26.9), and lead (linear expansion coefficient 29.1) can be exemplified. Of these, as the material of the heat pipe metal member 231, copper (linear expansion coefficient 16.8) is preferable, and as the material of the heat pipe 223, aluminum (linear expansion coefficient 23) is preferable. The heat pipe metal member 231 can also be made of a material other than metal, such as carbon.

[0175] The connection structure 218 is mainly composed of a heat pipe metal piece 231, a connection pressure portion 232, and a connection holding portion 233. The element terminal 226 of the semiconductor element is inserted between the connection pressure portion 232 and the connection holding portion 233.

[0176] Figure 9 Fig. 18 is an explanatory view of the connection state of the transistor 117 and the connection structure 218. The heat pipe 223 is arranged at the back of the connection structure 218.

[0177] The transistor 117 is fixedly attached to the heating and cooling plate 134a. The fixing is performed by pressing by a spring (not shown). If necessary, a heating and cooling plate is arranged also at the upper side of the transistor 117, and the transistor 117 can be set to a prescribed temperature condition.

[0178] The transistor 117 to be tested is fixedly attached to the heating and cooling plate 134, and therefore, it is difficult to easily detach. The mounting work of the transistor 117 fixes a plurality of transistors 117 to be initially tested to the heating and cooling plate 134. Next, the transistor 117 to be tested is selected, the connection structure 218 is inserted from the opening portion 216 of the partition 217 to the element terminal 226 of the semiconductor element 117.

[0179] That is, the selected transistor 117 is inserted with the connection structure 218 from the C2 chamber side to the opening portion 216 where the selected transistor 117 is arranged, and thereby, the electrical connection with the element terminal 226 is performed.

[0180] The position where the connection structure 218 is inserted is selected in relation to the electrical connection of the transistor 117, and therefore, it is relatively easy. Further, by changing the applied signal of the connection wiring 211 connected to the connection structure 218, the test conditions and test contents of the transistor 117 can be easily changed.

[0181] The connection wiring 211 is connected to one end of the connection structure 218, and a constant current Id is applied from the connection wiring 211 to the transistor 117. The heat pipe 223 is arranged at the back side of the connection structure 218.

[0182] A current of several hundred amperes (A) flows through the element terminal 226. Even if a slight resistance exists in the contact portion 225, a large amount of heat is generated due to the current of several hundred amperes (A), and the element terminal 226 portion is overheated. When the element terminal 226 is overheated, the transistor 117 is overheated, and the transistor 117 is deteriorated or damaged.

[0183] In the present application, the heat generated from the element terminal 226 is transferred to the connection wiring 211 side of the connection structure 218 by the heat pipe 223. Therefore, the contact portion 225 is not overheated. The cooling fan 227 is arranged at the lower side of the connection structure 218, and the heat of the heat pipe 223 is dissipated.

[0184] As Figure 8 shown in (a), the heat dissipation fins 228 can also be formed or arranged in a manner that is in close contact with the heat pipe 223. As Figure 8 shown in (b), the circulating water pipe 135 can also be formed or arranged within the connection structure 218 to cool the connection structure 218.

[0185] In Figure 9 the element terminals 226 of the transistor 117 (semiconductor element 117) are two terminals of the element terminal 226a (P) and the element terminal 226b (N). As Figure 10 shown in (a), even if the element terminals 226 of the transistor 117 are three terminals of the element terminal 226a (P), the element terminal 226b (N), and the element terminal 226c, the technical idea of the present application can be applied.

[0186] Figure 10 is an explanatory diagram of the connection state of the semiconductor module 117 having three element terminals 226 (the element terminal 226a (P), the element terminal 226b (N), and the element terminal 226c) of (b), (c), (d), (e), and the like of Figure 3 In

[0187] the connection structure 218a is formed or arranged with the heat pipe 223a, and the connection structure 218b is formed or arranged with the heat pipe 223b, in contrast to which the connection structure 218c is not formed or arranged with the heat pipe 223. The connection structure 218c is connected to the element terminal 226c. A large current does not flow through the element terminal 226c (O) of the transistor 117. It is not necessary to form the heat pipe 223 in the connection structure 218c. Figure 10 By forming the connection structure 218c to be thinner than the other connection structures 218 (the connection structure 218a, the connection structure 218b), the connection of the connection structure 218 to the element terminal 226 of the transistor 117 becomes easy. In addition, the space in which the transistor 117 is arranged can also be narrow, and thus the number of transistors 117 that can be mounted on the heating and cooling plate 134 can be increased.

[0188] As

[0189] shown in (a), the connection structure 218 in another embodiment of the present application is mainly composed of a heat pipe metal piece 231, a connection receiving portion 225, a connection pressure portion 232, and a connection holding portion 233. The element terminal 226 of the semiconductor element is inserted between the connection receiving portion 225 and the connection holding portion 233. Figure 11

[0190] ​A spring 236 is inserted or arranged in a spring hole 239 connecting the connection receiving portion 225 and the connection pressure portion 232. A positioning screw 237 is inserted or arranged in a positioning screw hole 240 in the center of the connection receiving portion 225, so that the connection receiving portion 225 and the connection pressure portion 232 are positioned.

[0191] The spring 236 is a pressing unit, or a sliding unit, or a positioning unit. As an example, the spring 236 can be exemplified by a coil spring. In addition, a leaf spring, a spiral spring, a disc spring can be exemplified. The spring 236 is formed or constituted of a metal material. It can also be formed of a rubber, a plastic, a ceramic material having heat resistance.

[0192] The coil spring 236 is arranged between the connection receiving portion 225 and the connection pressure portion 232. The connection pressure portion 232 is connected by one or more fixing screws 224b. By fastening or installing the fixing screw 224b, pressure (pressing) is applied between the connection receiving portion 225 and the connection holding portion 233.

[0193] The element terminal 226 is sandwiched between the connection receiving portion 225 and the connection holding portion 233, and by the pressure of the spring 236, the element terminal 226 is held with a prescribed pressure (prescribed pressing) between the connection receiving portion 225 and the connection holding portion 233.

[0194] The pressure (pressing) can be easily adjusted by changing the spring 236. In addition, the pressure (pressing) can be adjusted or set by the degree of fastening of the fixing screw 224b. The heat pipe metal piece 231 and the connection holding portion 233 are fixed by one or more fixing screws 224a.

[0195] The connection receiving portion 225 is arranged between the connection pressure portion 232 and the connection holding portion 233. As the constituent material or at least the surface material of the connection receiving portion 225, platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy combining them is used.

[0196] Likewise, on the surface of the connection holding portion 233 that interfaces with the element terminal 226, as the constituent material of the surface, platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy combining them is used.

[0197] The connection holding portion 233 is fixed to the heat pipe metal piece 231 by the fixing screw 224a. The connection pressure portion 232 is fixed to the connection holding portion 233 by the fixing screw 224b. The connection wiring 211 is fixed to the left end of the heat pipe metal piece 231 by the fixing screw 221.

[0198] Figure 11 (a) of claim 1, Figure 11(d) is an explanatory view that explains the combined state of the connection holding portion 233, the connection receiving portion 225, and the connection pressure portion 232.

[0199] The connection holding portion 233 connects and fixes the heat pipe 223 to the heat pipe metal piece 231 by inserting a screw 224a (not shown) into the threaded hole 238al, the threaded hole 238a2. The heat pipe 223 and the heat pipe metal piece 231 are connected and fixed in a manner that is excellent in thermal conductivity and electrical conductivity. In addition, the connection holding portion 233 is fixed by being connected to the connection pressure portion 232 by inserting a screw 224b (not shown) into the threaded hole 238bl, the threaded hole 238b2.

[0200] The connection receiving portion 225 is formed with a protrusion 251 at both ends, and the connection pressure portion 232 is formed with a groove 252 at both ends. The protrusion 251 of the connection receiving portion 225 is inserted into the groove 252 of the connection pressure portion 232. The protrusion 251 of the connection receiving portion 225 and the groove 252 of the connection pressure portion 232 are configured to be in electrical contact.

[0201] In order to make the contact of the element terminal 226 to the connection receiving portion 225 good, as shown in (c) of FIG. 9, it is preferable that a concave-convex such as a triangle be formed on the surface of the connection receiving portion 225. Figure 11

[0202] Figure 11 The configuration of (c) is a configuration in which the element terminal 226 is sandwiched between the plane of the connection pressure portion 232 and the plane of the connection holding portion 233.

[0203] Figure 12 It is a configuration in which the element terminal 226 is sandwiched between the presser mounting plate 313 and the connection holding portion 233. The presser mounting plate 313 is mounted with a presser 311a, a presser 311b. The presser 311 can be exemplified by a plate spring made of metal, for example. In addition, the presser 311 can also be formed of a non-conductive material such as a silicone material. The presser 311 is inserted into the presser mounting plate 313.

[0204] The element terminal 226 is sandwiched between the presser 311 and the plane of the connection holding portion 233. The element terminal 226 is electrically connected to the connection holding portion 233 by the pressing of the presser 311.

[0205] In Figure 11 ​In the embodiment of (a), the spring (pressure metal piece) 236 is inserted into the spring hole 239 of the contact portion 225. In the case where the spring (pressure metal piece) 236, the contact portion 225, and the connection pressure portion 232 are made of a conductive material, sometimes current flows in the element terminal 226 -> the contact portion 225 -> the spring (pressure metal piece) 236 -> the connection pressure portion 232. In this case, in the case where the spring (pressure metal piece) 236 has a large electric resistance value, the current flows through the spring (pressure metal piece) 236, and the spring is heated and burned out.

[0206] In the embodiment of the present application of (a), the spring hole 239 is formed in the insulating plate 312. The pressing piece 311 contacts the element terminal 226, and the spring 236 presses the pressing piece mounting plate 313. The insulating plate 312 is arranged on the upper side of the pressing piece mounting plate 313, and insulates between the pressing piece mounting plate 313 and the spring 236. The spring hole 239 is formed in the insulating plate 312, and the spring 236 is inserted into the spring hole 239. The other configurations are the same as those of (a), and thus the description is omitted. Figure 12 Figure 11 In the embodiment of the present application of (a), the spring hole 239 is formed in the insulating plate 312. The pressing piece 311 contacts the element terminal 226, and the spring 236 presses the pressing piece mounting plate 313. The insulating plate 312 is arranged on the upper side of the pressing piece mounting plate 313, and insulates between the pressing piece mounting plate 313 and the spring 236. The spring hole 239 is formed in the insulating plate 312, and the spring 236 is inserted into the spring hole 239. The other configurations are the same as those of (a), and thus the description is omitted.

[0207] In addition, the insulating plate 312 can be an insulating film, an insulating film, or an insulating gas such as air.

[0208] Figure 12 (b) is a view of the pressing piece mounting plate 313 portion viewed from the side. The pressing piece 311a and the pressing piece 311b are arranged and inserted in the pressing piece mounting plate 313. Figure 12 (c) is a view of the pressing piece mounting plate 313 portion viewed from the side. Figure 12 (c) is a view of the pressing piece mounting plate 313 portion viewed from the side.

[0209] Since the insulating plate 312 is made of an insulating material, even if the pressing piece mounting plate 313 is made of a conductive material such as metal, the current does not flow through the spring (pressure metal piece) 236. Therefore, the current path of the element terminal 226 -> the contact portion 225 -> the spring (pressure metal piece) 236 -> the connection pressure portion 232 is not generated.

[0210] Figure 12 The embodiment of (a) is configured to be insulated by the insulating plate 312. As shown in (a), the insulating effect in the present application is not limited to the configuration using the insulating plate 312. For example, the configuration shown in (d) can be exemplified. Figure 12 Figure 12

[0211] Figure 17 ​​​(d) is configured by arranging an insulating portion 315 made of a resin material or the like around the threaded hole 238b of the connection pressure portion 232. Since the threaded hole 238b is insulated by the insulating portion 315, current does not flow through the fixing screw 224b. Therefore, a current path of the element terminal 226 -> the contact portion 225 -> the spring (pressure metal piece) 236 -> the connection pressure portion 232 is not generated, and the spring (pressure metal piece) 236 does not burn out.

[0212] As described above, the present application is configured to arrange the insulating plate 312 on the spring 236 side to which a press is applied, so that current does not flow through the press piece mounting plate 313 and the contact portion 225 side.

[0213] When current flows, the spring 236 and the fixing screw 224b burn out by flowing through the press member such as the spring 236 and the fixing screw 224b. The test current is supplied to the element terminal 226 via the connection holding portion 233 side having a small high resistance portion such as the spring 236.

[0214] Figure 3 is an equivalent circuit diagram of a semiconductor element test device in the first embodiment of the present application and an explanatory diagram. A semiconductor module to be tested is exemplified Figure 17 (d), but is not limited thereto.

[0215] In Figure 20 , by turning on the switching circuit 124b, the output of the power supply device 132 is short-circuited, and the current Id output from the power supply device 132 flows as the current Im' to the ground. Alternatively, by turning on the switching circuit 124b, the electric charge charged between the terminals of the power supply device 132 is discharged.

[0216] By turning on the switching circuit 124c and the switching circuit 124d at the same time, the current Im also flows, the output of the power supply device 132 is short-circuited, and the electric charge or the like of the power supply device 132 is discharged. In this configuration or method, the switching circuit 124b is not needed.

[0217] It is also effective to stagger the timing of turning on the switching circuit 124c and the switching circuit 124d. For example, the switching circuit 124c is turned on earlier than the switching circuit 124d, and thereby the channel of the transistor 117s is short-circuited.

[0218] Next, the channel of the transistor 117m is short-circuited by turning on the switching circuit 124d. Alternatively, the switching circuit 124d is turned on earlier than the switching circuit 124c, and thereby the channel of the transistor 117m is short-circuited. Next, the channel of the transistor 117s is short-circuited by turning on the switching circuit 124c.

[0219] As described above, by sequentially turning on the switching circuit 124, generation of a surge voltage or the like generated in the semiconductor element 117 can be further suppressed.

[0220] By turning on the switching circuit 124a, the current Id output from the power supply device 132 is supplied to the transistor 117.

[0221] The fork plug 205 is inserted from the opening portion 216 of the partition wall 214 and is electrically connected to the switching circuit substrate 201.

[0222] Figure 21 、 Figure 20 is a diagram of a circuit portion of the semiconductor test device of the present application and a diagram of the operation of the circuit. As shown in Figure 21 、 Figure 20 The semiconductor element test device of the present application has an insulated DCDC converter circuit 138m and an insulated DCDC converter circuit 138s.

[0223] Figure 3 As the semiconductor module subjected to the test, (d) of Figure 3 (e) of Figure 21 is exemplified. Figure 3 As the semiconductor module subjected to the test, (c) of Figure 3 (c) of Figure 3 is exemplified. In the electric element test device, the test method of the electric element of the present application, of course, it is also possible to be applied to the examples other than Figure 20

[0224] The insulated DCDC converter circuit 138m generates two voltages (Vpm1 voltage with Vmm1 potential as a reference, Vpm2 voltage with Vmm2 potential as a reference) from an input voltage (circuit voltage Vc voltage). GND, Vmm1 voltage, Vmm2 voltage are insulated. In addition, GND, Vpm1 voltage, Vpm2 voltage are insulated.

[0225] The insulated DCDC converter circuit 138s generates two voltages (Vps1 voltage with Vms1 potential as a reference, Vps2 voltage with Vms2 potential as a reference) from an input voltage (Vc voltage). GND, Vms1 voltage, Vms2 voltage are insulated. In addition, GND, Vps1 voltage, Vps2 voltage are insulated.

[0226] ​The Vmm1 voltage, the Vmm2 voltage, the Vms1 voltage, and the Vms2 voltage can also consider a ground voltage as a reference voltage. Among them, the ground voltage is insulated from each voltage. The Vmm1 voltage and the Vmm2 voltage can also be set to a common potential without being insulated from the time when the voltage is generated. The Vms1 voltage and the Vms2 voltage can also be set to a common potential without being insulated from the time when the voltage is generated.

[0227] An insulated DCDC converter circuit that generates a Vt1 voltage and a Vt2 voltage is configured as needed. The Vt1 voltage and the Vt2 voltage are insulated with respect to the Vc voltage. The Vt1 voltage becomes a potential in the negative direction with the Vmm1 voltage as a reference. The Vt2 voltage becomes a potential in the negative direction with the Vms1 voltage as a reference.

[0228] The Vt1 voltage can also be generated with the Vmm1 voltage or the Vmm2 voltage as a reference. The Vt2 voltage can also be generated with the Vms1 voltage or the Vms2 voltage as a reference.

[0229] It is configured so that the Vt1 voltage and the Vmm1 voltage are applied to the gate terminal gm of the transistor 117m. It is configured so that the Vt2 voltage and the Vms1 voltage are applied to the gate terminal gs of the transistor 117s (Qs). The voltage selection circuit 302 uses an analog switch or the like.

[0230] The potential difference between the Vmm1 voltage and the Vpm1 voltage of the insulated DCDC converter circuit 138m becomes the on voltage Vg applied to the gate terminal gm of the transistor 117m (Qm). The insulated DCDC converter circuit 138m is configured in a manner that the on voltage Vg is variable.

[0231] The potential difference between the Vms1 voltage and the Vps1 voltage of the insulated DCDC converter circuit 138s becomes the on voltage Vg applied to the gate terminal gs of the transistor 117s (Qs). The insulated DCDC converter circuit 138s is configured in a manner that the on voltage Vg is variable.

[0232] Figure 21 、 Figure 17 The A module, the B module, and the C module of the insulated DCDC converter circuit 138m illustrated are insulated. In addition, the A module, the D module, and the E module of the insulated DCDC converter circuit 138s are insulated.

[0233] Power is transmitted between the A module and the B module, between the A module and the C module, between the A module and the D module, and between the A module and the E module using a coil or the like. In addition, control signals and the like between the modules are insulated and signals are transmitted and received using a phototransistor or the like.

[0234] The circuit ground (GND), Vc voltage, Vpm1 voltage, Vmm1 voltage, Vpm2 voltage, and Vmm2 voltage are in an isolated state. In other words, each voltage is in a floating state relative to the other voltages.

[0235] Floating refers to a state where there is no electrical connection with respect to other voltages or potentials, or a state where voltage or potential is independent.

[0236] The present invention generates a signal potential to be applied to the gate terminal in a floating state and is therefore less susceptible to noise.

[0237] The voltage generated by the isolated DCDC converter circuit 138 is set to floating. The potential difference between the Vmm1 voltage and the Vpm1 voltage is set to Vm1, and the potential difference between the Vmm2 voltage and the Vpm2 voltage is set to Vm2.

[0238] For example, if the Vmm1 voltage is connected to circuit ground (GND) and the Vpm1 voltage is short-circuited to the Vmm2 voltage, the Vpm2 voltage becomes the voltage obtained by adding the Vm2 voltage to the Vm1 voltage relative to circuit ground (GND). In other words, by setting the potential with another voltage, the floating potential is determined. The potential level can be changed, shifted, or set in accordance with the potential of the other voltage.

[0239] In the semiconductor device testing apparatus of the present invention, the circuit ground (GND) is insulated from other power supply voltages. Furthermore, the insulated power supply voltages can be wired or connected. For example, the Vmm1 and Vmm2 voltages can be wired to the same potential. The Vms1 and Vms2 voltages can also be wired to the same potential.

[0240] like Figure 22 As shown, the sample connection circuit 203m1 includes a gate driver circuit 113m for generating a gate signal waveform applied to the gate terminal gm of the transistor 117m (Qm), a variable resistor circuit 125m for adjusting or setting the rising edge waveform and falling edge waveform of the gate signal, a short-circuit circuit 137m, a voltage selection circuit 302m, etc.

[0241] The sample connection circuit 203m2 includes a constant current setting circuit 130m for generating a constant current Icm to be applied to the diode Dm of the transistor 117m, and a voltage detection circuit 129m for measuring or detecting the terminal voltage of the diode Dm.

[0242] The sample connection circuit 203s1 includes a gate driver circuit 113s that generates a gate signal waveform applied to the gate terminal gs of the transistor 117s, a variable resistor circuit 125s that adjusts or sets the rising edge waveform and falling edge waveform of the gate signal, a short-circuit circuit 137s, a voltage selection circuit 302s, etc.

[0243] The sample connection circuit 203s2 holds a constant current setting circuit 130s that generates a constant current Ics applied to the diode Ds of the transistor 117s, and a voltage detection circuit 129s that measures or detects the terminal voltage of the diode Ds.

[0244] Hereinafter, the N electrode terminal of the semiconductor element 117 is described as a reference potential (AGND, 0 (V)) without special mention.

[0245] In the case where the N electrode terminal of the semiconductor element 117 is the reference potential, the potential of the emitter terminal es of the transistor 117s becomes the channel-to-channel voltage Vcem of the transistor 117m. That is, it becomes the potential of the O electrode terminal of the semiconductor element 117.

[0246] The potential of the P electrode terminal of the semiconductor element 117 becomes a voltage obtained by adding the channel-to-channel voltage Vcem of the transistor 117m to the channel-to-channel voltage Vces of the transistor 117s. Depending on the magnitude of the current Id flowing through the transistor 117m and the transistor 117s, the on / off state of the transistor 117m and the transistor 117s, the potential of the O electrode terminal, and the potential of the P electrode terminal vary. In particular, the potential of the emitter terminal es of the transistor 117s varies greatly.

[0247] Vms1, which is the potential of the emitter terminal es of the transistor 117s, is preferably configured to be able to vary depending on the variation of the channel-to-channel voltage Vcem of the transistor 117m.

[0248] In the present application, Vmm1, which is the potential of the emitter terminal em of the transistor 117m, floats with respect to Vms1, which is the potential of the emitter terminal es of the transistor 117s. Therefore, when the channel-to-channel voltage Vcem of the transistor 117m varies, the Vces voltage also varies in the same direction and by the same potential.

[0249] The power supply potential of the diode Dm of the transistor 117m is preferably based on the potential of the emitter terminal em of the transistor 117m. The diode Ds of the transistor 117s is preferably based on the potential of the emitter terminal es of the transistor 117s.

[0250] In the present application, the Vc voltage, the Vms1 voltage / Vps1 voltage, and the Vms2 voltage / Vps2 voltage of the insulation type DCDC converter circuit 138s are insulated. The Vc voltage, the Vmm1 voltage / Vpm1 voltage, and the Vmm2 voltage / Vpm2 voltage of the insulation type DCDC converter circuit 138m are insulated. Each voltage is configured to be able to be connected to an arbitrary voltage and wired.

[0251] Figure 22 is an explanatory view of the wiring of the power supply system of the semiconductor element testing device of the present application. The N electrode terminal of the transistor 117 is connected to AGND. As an example, AGND is a ground potential.

[0252] As shown in Figure 23 , Figure 24 , Figure 25 , Figure 19 , the present application can arbitrarily connect and change the wiring. In addition, by the switching circuit 123, the selector 127, the connection wiring, and the applied voltage can be changed.

[0253] The emitter terminal em of the transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. In addition, the emitter terminal em is connected to the Vmm2 terminal. The emitter terminal es of the transistor 117s is connected to the Vms1 terminal. In addition, the emitter terminal es is connected to the Vms2 terminal.

[0254] The potential of the emitter terminal es of the transistor 117s becomes a voltage obtained by adding the channel-to-channel voltage Vcem of the transistor 117m to the potential of the N electrode terminal. Therefore, the potential of the emitter terminal es of the transistor 117s varies depending on the on-off state of the transistor 117m and the magnitude of the constant current Id.

[0255] The gate signal Vsg applied to the gate terminal gm of the transistor 117m is based on the potential of the emitter terminal em. If the voltage that makes the transistor 117m conductive is Vg, when the voltage Vg is applied from the AGND potential of the N electrode terminal, the transistor 117m becomes in the conductive state.

[0256] Figure 19 is a timing chart showing the operation of the circuit section of the semiconductor testing device of the present application. In Figure 19 , the Vt voltage applied during tn2 and during tn1 in (a) is set according to the semiconductor element 117 being tested. As shown in Figure 19 (b), (c), and (i), the period during which the constant current Id does not flow is tcs, which is the period before the constant current Id flows through the transistor 117, and tcm, which is the period after the constant current Id flows, and the period during which the constant current Id flows is tcc.

[0257] During at least one or more of tcs, tcm, and tcc, the switch Si is turned on, and the voltage Ve across the variable resistance circuit 125 is measured.

[0258] Figure 19St2 in (d) is the timing signal for flowing current Ic through diodes D (diode Ds, diode Dm). When St2 is at an H level, current flows through diode D of transistor 117. The voltage detection circuit 129 obtains the voltage between the terminals of diode D, and the temperature measurement circuit converts the voltage between the terminals into temperature information Tj. Temperature information Tj is transmitted to the control circuit board 111 (controller 111). St1 and St2 are the time for flowing the measurement current through the temperature measurement diodes, or the time for temperature measurement.

[0259] Figure 19 Vce in (g) is the channel voltage of the transistor 117 (transistor 117m, transistor 117s), and the temperature information Tj indicates the measured temperature change of the transistor 117 (transistor 117m, transistor 117s).

[0260] exist Figure 19 In (a), the potential of 0 (V) is the voltage that turns off the transistor 117m. Figure 19 In (a) and the like, a Vt1 voltage is shown as a Vt voltage. The Vt1 voltage is a voltage with a negative polarity compared to a potential of 0 (V). The negative Vt1 voltage is applied with the Vmm1 voltage as a reference.

[0261] The current Icm flowing through the diode Dm generates the voltages Vmm2 and Vpm2 as power supplies. Since the voltage Vmm2 is common to the voltage Vmm1, the voltage at the terminal of the diode Dm is within the range of Vmm1 and Vpm2, and is referenced to AGND.

[0262] The gate signal Vsg applied to the gate terminal gs of the transistor 117s is based on the potential of the emitter terminal es. The potential of the emitter terminal es is a voltage obtained by adding the channel voltage Vcem of the transistor 117m to the AGND potential of the N-electrode terminal.

[0263] like Figure 19 As shown in (a), if the voltage that turns on the transistor 117s is set to Vg, the voltage that turns on the transistor 117s is based on the voltage obtained by adding the channel voltage Vcem of the transistor 117m to the AGND potential of the N-electrode terminal. When the Vg voltage is applied, the transistor 117s becomes conductive.

[0264] The Vms1 voltage is isolated from the Vmm1 voltage and is in a floating state. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the potential of the emitter terminal es of transistor 117s also fluctuates in accordance with the fluctuation of the inter-channel voltage Vcem of transistor 117m. The Vms1 voltage generates the Vps1 voltage with the potential of the emitter terminal es as a reference.

[0265] The gate signal Vsg applied to the gate terminal gs of the transistor 117s is referenced to the potential of the emitter terminal es. As Figure 19 As shown in (a) of FIG. 17, if the voltage that makes the transistor 117s conductive is set to Vg, the transistor 117s becomes in the conductive state when the voltage of Vg is applied from the potential of the emitter terminal es.

[0266] In addition, in (a) and the like of FIG. 17, the Vt2 voltage is illustrated as the Vt voltage. The Vt2 voltage is a voltage that is negative compared to the 0 (V) potential. The Vt2 voltage of the negative side is applied with reference to the Vmsl voltage. Figure 23

[0267] The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power sources. Since the Vms2 voltage is common to the Vmsl voltage, the voltage of the terminal of the diode Ds is in the range of Vmsl and Vps2.

[0268] The Vmsl voltage is insulated from the Vmmi voltage and is in a floating state. In addition, the Vmsl voltage is connected to the collector terminal cm of the transistor 117m. Therefore, even if the channel-to-emitter voltage Vcem of the transistor 117m fluctuates, the voltage (Vg) that makes the transistor 117s conductive and the voltage (0 (V)) that makes the transistor 117s non-conductive do not fluctuate. Therefore, the transistor 117s can be favorably controlled to be conductive and non-conductive.

[0269] Figure 23 is a diagram illustrating the wiring of the power supply system in the semiconductor element testing device of another application. In the wiring of Figure 24 In the wiring of FIG. 17, the N electrode terminal of the transistor 117 is connected to the AGND. As an example, the AGND is a ground potential.

[0270] The emitter terminal em of the transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmmi terminal. The emitter terminal es of the transistor 117s is connected to the Vmsl terminal. The Vmm2 terminal, the Vms2 terminal, and the other power supply terminals are insulated and are in a floating state.

[0271] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power sources. The voltage of the terminal of the diode Dm is substantially in the range of Vmm2 and Vpm2.

[0272] The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power sources. The voltage of the terminal of the diode Ds is substantially in the range of Vms2 and Vps2.

[0273] ​The potential of the Vmm2 terminal is held as a potential with AGND as a reference, and the potential of the Vms2 terminal is held as a potential with the potential of the emitter terminal es of the transistor 117s as a reference.

[0274] Figure 24 is an explanatory view of the wiring of the power supply system in the semiconductor element testing device of another application. In Figure 24 the wiring of the power supply system in the semiconductor element testing device of another application. In

[0275] The emitter terminal em and the N electrode terminal of the transistor 117m are electrically connected, and the emitter terminal em and the Vmm1 terminal are connected. In addition, the Vmm2 terminal and the Vms2 terminal are connected. The emitter terminal es of the transistor 117s is connected to the Vms1 terminal. The Vmm1 terminal and the Vmm2 terminal are not wired.

[0276] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as a power supply. The voltage of the terminal of the diode Dm is substantially in the range of Vmm2 and Vpm2. The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as a power supply. The voltage of the terminal of the diode Ds is substantially in the range of Vms2 and Vps2. Since the Vmm2 voltage and the Vms2 voltage are common, the potential of the diode Dm and the potential of the diode Ds operate within the common potential.

[0277] In Figure 24 , the switching circuit 123 is disposed in the middle of the power supply connection wiring. The switching circuit 123 can be switched to connect the Vms2 voltage and the Vpm2 voltage or to connect the Vms2 voltage and the Vmm2 voltage.

[0278] As shown in Figure 24 , by disposing or providing the switching circuit 123, a variety of tests can be dealt with. As the switching circuit 123, an analog switch, a relay circuit, a magnetic switch, or the like can be exemplified.

[0279] The switching circuit 123 is not limited to Figure 25 . For example, it can be configured to select the Vmm1 and Vpm1 voltages to be connected to other potentials (for example, to be connected to the Vmm1 voltage). As described above, the application is characterized in that it is configured so that the wiring state of the potential generated by the insulation type DCDC converter circuit or the like can be changed.

[0280] Figure 25 is an explanatory view of the wiring of the power supply system in the semiconductor element testing device of another application. In Figure 26 the wiring of the power supply system in the semiconductor element testing device of another application. In

[0281] The emitter terminal em of the transistor 117m and the N electrode terminal are electrically connected, and the emitter terminal em and the Vmm1 terminal are connected. The Vmm1 terminal is connected to the Vmm2 terminal, and the Vmm1 terminal is connected to the Vmsl terminal. The emitter terminal es of the transistor 117s is connected to the Vmsl terminal.

[0282] The Vmm2 terminal is connected to the Vms2 terminal. The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power sources. The voltage of the terminals of the diode Dm is substantially in the range of Vmm2 and Vpm2.

[0283] The current Ics flowing through the diode Ds generates the Vmm2 voltage and the Vps2 voltage as power sources. The voltage of the terminals of the diode Ds is substantially in the range of Vmm2 and Vps2. Since the Vmm2 voltage and the Vms2 voltage are common, the potential of the diode Dm and the potential of the diode Ds operate within the common potential.

[0284] When the potential of the Vmm1 voltage changes, the potential of the Vpm1 voltage also shifts. When the potential of the Vmm2 voltage changes, the potential of the Vpm2 voltage also shifts.

[0285] When the potential of the Vmsl voltage changes, the potential of the Vpsl voltage also shifts in linkage. When the potential of the Vms2 voltage changes, the potential of the Vps2 voltage also shifts in linkage.

[0286] The Vmm1 voltage and the Vmsl voltage are set to be floating. Therefore, when the channel-to-channel voltage Vcem of the transistor 117m changes, the Vmsl changes in linkage with the change of the Vcem.

[0287] The gate signal (on-off signal) applied to the gate terminal gm of the transistor 117m is output with the Vmm1 voltage as a reference. The gate signal (on-off signal) applied to the gate terminal gs of the transistor 117s is output with the Vmsl voltage as a reference.

[0288] When the current Id flowing through the transistor 117m changes and the applied voltage of the gate terminal gm of the transistor 117m changes, even if the channel-to-channel voltage Vcem of the transistor 117m changes, since the Vmsl voltage is floating, the Vmsl voltage changes in linkage with the Vcem voltage.

[0289] Even if the channel-to-channel voltage Vce of the transistor 117m changes, since the Vmsl voltage is floating and the gate signal of the transistor 117s is generated with the Vmsl voltage as a reference, the transistor 117s can perform on-off control without problems.

[0290] The Vmm1 voltage of the diode Ds and the Vms1 voltage are floating. Therefore, even if the Vmm1 voltage changes, or the channel-to-emitter voltage Vcem of the transistor 117m changes, the temperature of the transistor 117s can be measured without damage.

[0291] Figure 26 is a diagram of a test method or a test state of a semiconductor element test apparatus and a semiconductor element component of the present application. By sequentially implementing or randomly implementing any of the states or methods in Figure 26 the test of the semiconductor element 117 is performed.

[0292] Figure 26 (a) of is a diagram of a method (state) in which the terminals of the transistor 117 (between the P electrode terminal and the N electrode terminal) are short-circuited to discharge the electric charges, thereby preventing the surge voltage and the transient current from flowing through the transistor 117.

[0293] The gate terminal gm of the transistor 117m is applied with an off voltage as a gate signal Vsgm, and the transistor 117m becomes an off state. The gate terminal gs of the transistor 117s is applied with an off voltage as a gate signal Vsgs, and the transistor 117s becomes an off state. The short-circuit circuit 137s and the short-circuit circuit 137m are off (open). The switch circuit 124c and the switch circuit 124d are on (closed).

[0294] Figure 26 (b) of shows a state in which the short-circuit circuit 137s is on, the transistor 117s becomes a diode connection state, the transistor 117m is on, a constant current Id flows through the semiconductor element 117, and the semiconductor element 117 is tested.

[0295] The gate terminal gm of the transistor 117m is periodically or intermittently applied with an on voltage or an off voltage as a gate signal Vsgm, and the transistor 117m is controlled to be in an on state or an off state.

[0296] The short-circuit circuit 137s connected between the gate terminal gs and the emitter terminal es of the transistor 117s is on, and the transistor 117s becomes a diode connection state. The switch circuit 124c and the switch circuit 124d are off (open).

[0297] In the semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal. The transistor 117m is subjected to on-off control by the gate signal Vsgm applied to the gate terminal gm of the transistor 117m, and the test of the semiconductor element 117 is performed.

[0298] Figure 26(c) shows a state in which the transistor 117m is made into a diode connection state, the transistor 117s is made to be on, and a constant current Id flows through the semiconductor element 117, and the semiconductor element 117 is tested.

[0299] A gate voltage or an off voltage is periodically or intermittently applied to the gate terminal gs of the transistor 117s as a gate signal Vsgs, and the transistor 117s is controlled to be in an on state or an off state.

[0300] The short circuit 137m connected between the gate terminal gm and the emitter terminal em of the transistor 117m is made to be on, and the transistor 117m is made into a diode connection state. The switch circuit 124c and the switch circuit 124d are made to be off (open). In the semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal.

[0301] The transistor 117s is controlled to be in an on state or an off state by the gate signal Vsgs applied to the gate terminal gs of the transistor 117s, and the test of the semiconductor element 117 is performed.

[0302] Figure 26 (d) shows a state in which the transistor 117s is made to be on, and the transistor 117m is made to be off. A gate voltage or an off voltage is periodically or intermittently applied to the gate terminal gs of the transistor 117s as a gate signal Vsgs. The transistor 117m is controlled to be in an off state.

[0303] The short circuit 137 connected between the gate terminals g and the emitter terminals e of the transistor 117m and the transistor 117s is made to be off (open). The switch circuit 124c is made to be off, and the switch circuit 124d is made to be on (closed).

[0304] In the semiconductor element 117, a current Id flows from the P electrode terminal through the channel of the transistor 117s, and the current Id flows through the switch circuit 124d. The transistor 117s is controlled to be in an on state or an off state by the gate signal Vsgs applied to the gate terminal gs of the transistor 117s, and the test of the semiconductor element 117 is performed.

[0305] Figure 26 (e) shows a state in which the transistor 117m is made to be on, and the transistor 117s is made to be off. A gate voltage or an off voltage is periodically or intermittently applied to the gate terminal gm of the transistor 117m as a gate signal Vsgm. The transistor 117s is controlled to be in an off state.

[0306] The short circuit 137 connected between the gate terminals g and the emitter terminals e of the transistor 117m and the transistor 117s is made to be off (open). The switch circuit 124d is made to be off (open), and the switch circuit 124d is made to be on (closed).

[0307] In semiconductor element 117, current Id flows from the P-electrode terminal through switch circuit 124c and into the channel of transistor 117m. A gate signal Vsgm applied to gate terminal gm of transistor 117m controls on / off the transistor 117m, and the semiconductor element 117 is tested.

[0308] Figure 19 (f) shows a state in which a gate signal is applied to the gate terminals g (gate terminal gm, gate terminal gs) of the transistor 117m and the transistor 117s to flow a constant current Id through the semiconductor element 117, and the semiconductor element 117 is tested.

[0309] An on-voltage or an off-voltage is periodically or intermittently applied to the gate terminal gs of the transistor 117s and the gate terminal gm of the transistor 117m, thereby controlling the transistor 117s and the transistor 117m to be in an on-state or an off-state.

[0310] The short circuit 137 connected between the gate terminal g and the emitter terminal e of the transistors 117m and 117s is turned off. The switch circuits 124c and 124d are turned off (open). In the semiconductor element 117, a constant current Id flows between the P-electrode terminal and the N-electrode terminal.

[0311] By controlling the transistors 117m and 117s so that they are not turned on at the same time or so that they are turned on only for a very short period of time, a surge voltage and a transient current can flow through the semiconductor element 117, allowing a more rigorous test to be performed.

[0312] By selecting or combining Figure 26 The timing waveform and Figure 26 (a)~ Figure 26 The semiconductor device 117 is tested by performing the test (f). The combination can be exemplified by performing the test in sequence Figure 26 (a)~ Figure 26 (f) The situation of the test, random implementation Figure 26 (a)~ Figure 27 (f) The test situation.

[0313] Figure 3 FIG. 3 is an explanatory diagram of a semiconductor device test apparatus and a semiconductor device test method in another embodiment of the present invention. Figure 27 etc. Test circuit module 301 and Figure 26 The test circuit module 301 is prepared corresponding to each semiconductor element 117. The test circuit module 301 can be exemplified asFigure 3 、 Figure 27 The test circuit module 301 is connected to the three switching circuit boards 201 (switching circuit board 201b, switching circuit board 201c, switching circuit board 201d). As shown in (a) of FIG. 10, the switching circuit board 201b is prepared in correspondence with the semiconductor element 117 to be tested. In (a) of FIG. 10, the switching circuit 124aa is provided in the test circuit module 301a, the switching circuit 124ab is provided in the test circuit module 301b, and the switching circuit 124ac is provided in the test circuit module 301c. Figure 27 Figure 27

[0314] Figure 27 The embodiment of (a) of FIG. 10 is an embodiment in which a plurality of semiconductor elements 117 are tested. The semiconductor element testing apparatus of the present application can simultaneously test a plurality of test circuit modules 301 or sequentially test the test circuit modules 301 by controlling the switching circuit 124a.

[0315] The test circuit module 301 is controlled by one control circuit board 111. The power supply apparatus 132 can be prepared in one for a plurality of test circuit modules 301 (semiconductor elements 117) to be tested.

[0316] ​ (b) of FIG. 10 is a timing chart for explaining the operation of the semiconductor element testing apparatus of the present application. The transistors 117m of the test circuit modules 301 are sequentially applied with the on voltage Vsg to operate, and the test is performed.

[0317] The matters or contents described in the specification and the drawings can of course be combined with each other.

[0318] Industrial applicability

[0319] The present application can provide a semiconductor element testing apparatus and a semiconductor testing method in which connection change can be easily performed in accordance with the contents of testing of a transistor or the like semiconductor element and the number of simultaneous tests of semiconductor elements.

[0320] Explanation of reference numerals

[0321] 111 control circuit board (controller)

[0322] 112 gate signal control circuit

[0323] 113 gate driver circuit

[0324] 115 temperature measurement circuit

[0325] 116 operational amplifier (buffer amplifier)

[0326] 117 power transistor​​

[0327] 118 constant current circuit

[0328] 121 constant current circuit

[0329] 122 switching circuit

[0330] 124 switching circuit

[0331] 125 variable resistance circuit

[0332] 126 variable resistance circuit

[0333] 127 selector

[0334] 128 current detection circuit

[0335] 129 voltage detection circuit

[0336] 130 constant current setting circuit

[0337] 131 control frame

[0338] 132 power supply device

[0339] 133 control circuit

[0340] 134 heating and cooling plate

[0341] 135 circulating water pipe

[0342] 136 cooler

[0343] 137 short circuit circuit

[0344] 138 insulation type DCDC converter circuit

[0345] 201 switching circuit substrate

[0346] 202 connector

[0347] 203 sample connection circuit

[0348] 204 conductor plate

[0349] 205 fork plug

[0350] 206 connection pin

[0351] 207 female substrate

[0352] 208 connector

[0353] 209 device control circuit substrate

[0354] 210 housing

[0355] 211 connection wiring

[0356] 212 power supply wiring

[0357] 213 connector

[0358] 214 partition wall

[0359] 215 partition wall

[0360] 216 opening portion

[0361] 219 connecting bolt

[0362] 220 contact portion

[0363] 221 fixing screw

[0364] 222 signal wiring

[0365] 223 heat pipe

[0366] 224 fixing screw

[0367] 225 contact portion

[0368] 226 element terminal

[0369] 227 cooling fan

[0370] 228 heat dissipation fin

[0371] 231 heat pipe metal piece

[0372] 232 connecting pressure portion

[0373] 233 connecting holding portion

[0374] 236 spring (pressure metal piece)

[0375] 237 position fixing screw

[0376] 238 threaded hole

[0377] 239 spring hole

[0378] 240 positioning threaded hole

[0379] 241 fork plug insertion plate

[0380] 251 convex portion

[0381] 252 groove portion

[0382] 301 test circuit module

[0383] 302 voltage selection circuit

[0384] 311 pressing member

[0385] 312 insulating plate

[0386] 313 presser mounting plate

[0387] 315 insulation portion.

Claims

1. A semiconductor device testing apparatus for testing a semiconductor device having a first terminal and a second terminal, characterized in that: Possessing: a power supply device having a 3rd terminal and a 4th terminal, supplying a test current or a test voltage; a 1st connecting member; a 2nd connecting member; a switch circuit substrate on which a switch circuit is mounted or formed; a 1st conductor plate or conductor bar mounted on the switch circuit substrate; a 2nd conductor plate or conductor bar mounted on the switch circuit substrate, the 1st terminal and the 3rd terminal are electrically connected, the 2nd terminal and the 4th terminal are electrically connected, the 1st connecting member and the 1st conductor plate or conductor bar are electrically connected, the 1st connecting member and the 3rd terminal are electrically connected, the 2nd connecting member and the 2nd conductor plate or conductor bar are electrically connected, the 2nd connecting member and the 4th terminal are electrically connected, the switch circuit performs: a 1st operation to electrically short-circuit the 1st conductor plate or conductor bar and the 2nd conductor plate or conductor bar; and a 2nd operation to electrically open the 1st conductor plate or conductor bar and the 2nd conductor plate or conductor bar.

2. A semiconductor device testing apparatus for testing a semiconductor device having a first terminal and a second terminal, characterized in that: Possessing: a power supply device having a 3rd terminal and a 4th terminal, supplying a test current or a test voltage; a 1st connecting member; a 2nd connecting member; a switch circuit substrate on which a switch circuit is mounted or formed; a 1st connector mounted on the switch circuit substrate; a 1st conductor plate or conductor bar mounted on the switch circuit substrate; a 2nd conductor plate or conductor bar mounted on the switch circuit substrate; a mother substrate, the 3rd terminal and the 1st conductor plate or conductor bar are electrically connected, the 2nd conductor plate or conductor bar and the 1st connecting member are electrically connected, the 1st connecting member and the 1st terminal are electrically connected, the 2nd terminal and the 2nd connecting member are electrically connected, the 2nd connecting member and the 4th terminal are electrically connected, the switch circuit substrate is connected to the mother substrate via the 1st connector, the switch circuit performs: a 1st operation to electrically short-circuit the 1st conductor plate or conductor bar and the 2nd conductor plate or conductor bar; and a 2nd operation to electrically open the 1st conductor plate or conductor bar and the 2nd conductor plate or conductor bar.

3. A semiconductor device testing apparatus for testing a semiconductor device having a first terminal and a second terminal, characterized in that: Possessing: a 1st connecting member; a 2nd connecting member; a 1st connecting structure; a 2nd connecting structure; a switch circuit substrate on which a switch circuit is mounted or formed; a 1st conductor plate or conductor bar mounted on the switch circuit substrate; a 2nd conductor plate or conductor bar mounted on the switch circuit substrate, the 1st terminal and the 1st connecting structure are electrically connected, the 2nd terminal and the 2nd connecting structure are electrically connected, the 1st connecting structure and the 1st connecting member are electrically connected, the 2nd connecting structure and the 2nd connecting member are electrically connected, the 1st connecting member and the 1st conductor plate or conductor bar are electrically connected, the switch circuit performs: a 1st operation to electrically short-circuit the 1st conductor plate or conductor bar and the 2nd conductor plate or conductor bar; and a 2nd operation to electrically open the 1st conductor plate or conductor bar and the 2nd conductor plate or conductor bar.

4. The semiconductor element test device according to claim 1 or 2 or 3, wherein the 1st connecting member and the 1st conductor plate or conductor bar are electrically connected by bonding or fitting, The first connecting member is detachably connected to the first conductor plate or the conductor bar.

5. The semiconductor device testing apparatus according to claim 1 or 2 or 3, wherein the first connecting member is a fork-shaped plug. The first connecting member is a fork-shaped plug. The first conductor plate or the conductor bar has a first portion extending from an end of the switching circuit substrate. The first connecting member is electrically connected to the first portion by being engaged or fitted in the first portion.

6. The semiconductor device testing apparatus according to claim 1 or 2 or 3, wherein the switching circuit substrate has a partition wall having an opening portion, The first conductor plate or the conductor bar has a first portion extending from an end of the switching circuit substrate. The first connecting member is electrically connected to the first portion by being inserted from the opening portion. There are:

7. The semiconductor element testing apparatus according to claim 1 or 2 or 3, wherein A first insertion plate having a plurality of first opening portions into which the first connecting member is inserted; A second insertion plate having a plurality of second opening portions into which the second connecting member is inserted; A first wiring connected to the first connecting member; A second wiring connected to the second connecting member, The first insertion plate and the second insertion plate differ from each other in height and position, When the first connecting member is inserted into the first opening portion and the second connecting member is inserted into the second opening portion, The first wiring and the second wiring are arranged so as not to cross each other.

8. The semiconductor device testing apparatus according to claim 1 or 2 or 3, wherein the semiconductor device is fixedly attached to a heating and cooling plate, A water leakage sensor is arranged around the heating and cooling plate, At least one of a semiconductor device testing apparatus stopping operation and an alarm operation is performed by the water leakage sensor.

9. The semiconductor device testing apparatus according to claim 1 or 2 or 3, wherein the switching circuit is a MOSFET, A plurality of the MOSFETs are mounted or formed on the switching circuit substrate, The MOSFETs are arranged between the first conductor plate or the conductor bar and the second connecting member, and between the first conductor plate or the conductor bar and the second conductor plate. There are: A constant current circuit that supplies a constant current Ic to the semiconductor device; A temperature measuring circuit, 10. The semiconductor element testing apparatus according to claim 1 or 2 or 3, wherein The temperature measuring circuit obtains temperature information of the semiconductor device from a voltage between terminals of the semiconductor device to which the constant current Ic is applied.

11. The semiconductor device testing apparatus according to claim 1 or 2 or 3, wherein the semiconductor device is composed of a first transistor and a second transistor, The first transistor and the second transistor each have a first terminal, a second terminal, and a fifth terminal, The second terminal of the second transistor and the first terminal of the first transistor are electrically connected, A potential of a signal applied to the fifth terminal of the second transistor is based on a potential of the first terminal of the first transistor.

12. The semiconductor device testing apparatus according to claim 1 or 2 or 3, wherein the semiconductor device has a fifth terminal, A gate driver circuit is connected to the fifth terminal, ​ ​ ​ ​ ​ The gate driver circuit can make the on voltage applied to the fifth terminal variable, A resistance circuit is arranged between the fifth terminal and the gate driver circuit, The resistance value of the resistance circuit can be changed.

13. The semiconductor element testing device according to claim 2, wherein a second connector and a control circuit substrate that constitutes a control circuit are provided, The control circuit substrate is connected to the mother substrate via the second connector, When the number of the semiconductor elements is set to N and N is an integer of 1 or more, The N pieces of the switch circuit substrate are mounted to the mother substrate via the first connector, The N semiconductor elements are tested by sequentially supplying a test current or a test voltage under the control of the control circuit.

14. The semiconductor element testing device according to claim 3, wherein the first terminal and the second terminal have a first electrode surface and a second electrode surface, The first connection structure has a connection holding portion and a connection pressure portion, The connection holding portion is in contact with the first electrode surface, The connection pressure portion is in contact with the second electrode surface, The first electrode surface is electrically connected to the first connection member, The second electrode surface is electrically insulated from the first connection member.

15. The semiconductor element testing device according to claim 3, wherein a heat pipe is mounted to the first connection structure or the second connection structure, The first connection structure or the second connection structure is made of a material having a linear expansion coefficient smaller than that of the heat pipe. ​ ​ ​

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