Non-destructive read ferroelectric racetrack memory and fabrication method and application thereof

Abstract

The application relates to a non-destructive reading ferroelectric memistor and a manufacturing method and application thereof. The structure of the ferroelectric memory is "electrode-ferroelectric layer-electrode-insulating dielectric layer-semiconductor". The manufacturing method comprises the following steps: firstly, growing an insulating material dielectric layer on a semiconductor substrate; secondly, manufacturing an intermediate electrode on the "semiconductor-insulating dielectric layer" base; thirdly, growing a ferroelectric material on the "semiconductor-insulating dielectric layer-electrode" to form a ferroelectric film layer; and finally, manufacturing a top electrode on the "semiconductor-insulating dielectric layer-electrode-ferroelectric layer" to form the memistor. The application is applied to: taking the top electrode as an input end, taking the base semiconductor as an output end which is led out by silver paste, changing and saving the capacitance between the two ends under the action of positive and negative pulses, and then realizing non-destructive reading under a small signal triangular wave. The application realizes that the capacitance is used as storage information, meets the requirement of non-volatile storage, has high reading and writing speed, low heat loss and high energy utilization rate.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of new storage materials and devices, in particular to a ferroelectric memistor with non-destructive reading and a manufacturing method and application thereof. BACKGROUND

[0002] New storage devices need to meet the requirements of non-volatile data storage, fast reading and writing, and low power consumption. The existing static random access memory (SRAM) and dynamic random access memory (DRAM) have fast reading and writing speed, but the data is lost when the power is off. The FLASH flash memory technology realizes long-term data storage, but the reading and writing speed is slow.

[0003] New storage devices mainly include magnetic random access memory (MRAM), resistive random access memory (RRAM), phase change random access memory (PRAM), and ferroelectric random access memory (FeRAM). Among them, the ferroelectric random access memory utilizes the non-volatile characteristics of the residual polarization of the ferroelectric material to realize permanent storage of data, and has the advantages of fast polarization reversal, strong radiation resistance, and low energy consumption. However, the existing ferroelectric memory directly uses the polarization direction to represent information, and generates a large displacement current by judging whether the ferroelectric polarization reversal occurs to read, which will cause damage to the original information. The storage structure realized by integrating the ferroelectric polarization in the transistor gate has a large area occupied by the source and drain electrodes, and its large-scale integration is also limited by the post-moore era. Therefore, it is of great significance to study new storage devices and materials in the field of information.

[0004] In existing storage technology, the information state is usually represented by the conductance value or the size of the direct current, and the energy loss caused by the joule heat of the circuit and device is large, especially in the scene facing large-scale integration application. SUMMARY

[0005] The present application aims to solve the above-mentioned problems of the prior art, and provides a ferroelectric memistor with non-destructive reading and a manufacturing method and application thereof.

[0006] To achieve the above-mentioned purpose, the technical solution adopted by the present application is as follows: a ferroelectric memistor with non-destructive reading, comprising a semiconductor, an insulating dielectric layer, an intermediate electrode, a ferroelectric layer and a top electrode arranged in order from bottom to top; a room temperature conductive material layer is arranged between the insulating dielectric layer and the semiconductor; the semiconductor and the room temperature conductive material layer are in ohmic contact; the room temperature conductive material layer is not in contact with the top electrode and the intermediate electrode; the room temperature conductive material layer and the top electrode are connected with a wire.

[0007] Further, the ratio of the high and low capacitance states of the ferroelectric memistor is 1.5-4:1.

[0008] Further, the semiconductor has a thickness of 500 μm, which is much greater than the thickness of the insulating layer, the electrode and the ferroelectric layer.

[0009] Further, the insulating medium layer has a thickness of 10-100 nm and a relative dielectric constant of 4-20 at room temperature; the insulating medium layer is preferably silicon dioxide, silicon nitride, aluminum oxide or strontium titanate.

[0010] Further, the intermediate electrode and the top electrode each have a thickness of 20-60 nm and an electrical resistivity of less than 0.001 Ω·cm at room temperature; the intermediate electrode and the top electrode are preferably polyethylene dioxythiophene, indium tin oxide, gold, silver, nickel, aluminum or chromium.

[0011] Further, the ferroelectric layer has a thickness of 15-120 nm and a relative dielectric constant of 10-60 at room temperature.

[0012] Further, the ferroelectric layer is preferably an organic ferroelectric polymer, an inorganic ferroelectric material, an organic ferroelectric copolymer or a composite material having ferroelectricity formed by organic and inorganic materials; the organic ferroelectric polymer includes PVDF, PVDCN or odd-numbered nylon; the inorganic ferroelectric material includes hafnium zirconium oxide, zirconium titanate lead, barium titanate, bismuth ferrite; the organic ferroelectric copolymer includes P(VDF-TrFE) or P(VDF-TrFE-CFE); the composite material having ferroelectricity includes PVA-BZT, P(VDF-HFP)-BTO.

[0013] The application discloses a preparation method of a non-destructive reading ferroelectric memory container.

[0014] (1) preparing an insulating medium layer; growing an insulating material as the insulating medium layer on the upper surface of the semiconductor by a method selected from the group consisting of sol-gel, spin coating, chemical vapor deposition, thermal oxidation, vacuum evaporation, magnetron sputtering, pulsed laser deposition, atomic layer deposition and molecular beam epitaxy;

[0015] (2) preparing an intermediate electrode; depositing a conductive medium as the intermediate electrode on the upper surface of the insulating medium layer by a method selected from the group consisting of spin coating, magnetron sputtering and vacuum evaporation;

[0016] (3) preparing a ferroelectric layer; preparing a ferroelectric material as the ferroelectric layer on the upper surface of the intermediate electrode by a method selected from the group consisting of sol-gel, spin coating, chemical vapor deposition, thermal oxidation, vacuum evaporation, magnetron sputtering, pulsed laser deposition, atomic layer deposition and molecular beam epitaxy;

[0017] (4) preparing a top electrode; depositing a conductive material as the top electrode on the upper surface of the ferroelectric layer by a method selected from the group consisting of sol-gel, magnetron sputtering and vacuum evaporation;

[0018] (5) Preparation of bottom electrode: scrape off the insulating medium layer to expose the semiconductor, and apply conductive silver paste at the exposed position of the silicon to form a bottom electrode. After the conductive silver paste solidifies, a good ohmic contact is formed between the conductive silver paste and the base silicon.

[0019] The ferroelectric memory container can realize data writing and non-destructive reading of the written data.

[0020] Compared with the existing memory device, the application has the beneficial effects that: the application uses the ferroelectric polarization direction to control the device capacitance to store information, and the displacement current transmitted by the circuit does not pass through the memory device in data reading, eliminating the heat loss of the circuit. The application realizes the ferroelectric capacitor controlled capacitance memory, series connects the insulating medium layer to enhance the insulation performance, solves the problem of destructive reading of the traditional ferroelectric memory, and obtains the ferroelectric memory container with higher working efficiency. The application has simple process, strong flexibility of device structure size, easy to manufacture and integrate, stable performance, good repeatability, and can be widely used as a new type of memory device and the development and application of a new generation of storage technology. The application connects the top electrode and the bottom electrode of the ferroelectric memory container to the test circuit, applies direct current pulses with different directions, and can realize data writing in different states; applying a small amplitude alternating signal can realize non-destructive reading of the written data. The application integrates the ferroelectric capacitor on the semiconductor-insulating layer, so that the non-volatile ferroelectric polarization induces the bound charges of the top electrode and the middle electrode, affects the thickness of the space charge layer of the semiconductor-insulating layer interface, causes the change of the overall capacitance of the device, and realizes charge storage. BRIEF DESCRIPTION OF DRAWINGS

[0021] The application will be further described below in combination with the drawings and examples:

[0022] Figure 1 FIG. 1 is a structural schematic diagram of the ferroelectric memory container of the application;

[0023] Figure 2 FIG. 6 is a capacitance-frequency curve diagram of the ferroelectric memory container prepared in Comparative Example 2;

[0024] Figure 3 FIG. 5 is a capacitance-voltage curve diagram of the ferroelectric memory container prepared in Example 1;

[0025] Figure 4 FIG. 8 is a capacitance-voltage curve diagram of the ferroelectric memory container prepared in Comparative Example 2;

[0026] Figure 5 FIG. 7 is a capacitance retention (capacitance-time) curve diagram of the ferroelectric memory container prepared in Comparative Example 2;

[0027] Figure 6 FIG. 4 is a capacitance retention (capacitance-time) curve diagram of the ferroelectric memory container prepared in Example 1;

[0028] Figure 7 Capacitance retention (capacitance-time) curve of the ferroelectric memory capacitor prepared for Comparative Example 1. DETAILED DESCRIPTION

[0029] The present application will be further illustrated in conjunction with the accompanying drawings and specific embodiments, and it should be understood that the following examples are only for further illustrating the present application and cannot be understood as limiting the protection scope of the present application.

[0030] The present application discloses a non-destructive reading ferroelectric memory capacitor with the structure of "top electrode-ferroelectric layer-intermediate electrode-insulating dielectric layer-semiconductor", as shown in the figure, which is a ferroelectric memory capacitor made on a "semiconductor-insulating dielectric" substrate. Figure 1 The present application comprises, from bottom to top, a semiconductor, an insulating dielectric layer, an intermediate electrode, a ferroelectric layer and a top electrode; a room-temperature conductive material layer is arranged between the insulating dielectric layer and the semiconductor; the semiconductor and the room-temperature conductive material layer are in ohmic contact; the room-temperature conductive material layer is not in contact with the top electrode and the intermediate electrode; and the room-temperature conductive material layer and the top electrode are connected with a wire.

[0031] The thickness of the insulating dielectric layer is 10-100 nm, and the relative dielectric constant at room temperature is 4-20. The thickness of the intermediate electrode and the top electrode is both 20-60 nm, and the resistivity at room temperature is less than 0.001Ω·cm. The thickness of the ferroelectric layer is 15-120 nm, and the relative dielectric constant at room temperature is 10-60.

[0032] The present application discloses a non-destructive reading ferroelectric memory capacitor, which adopts the structure of ferroelectric capacitor in series with insulating capacitor and semiconductor capacitor, so that the ferroelectric polarization can induce the charge acting on the semiconductor-insulating layer interface, and the direction of the ferroelectric polarization determines the accumulation or depletion state of the space charge layer, thereby making the capacitor present two states of high and low, and the device as a whole presents the memory function of the capacitor. The ratio of the high and low capacitor states of the ferroelectric memory capacitor (i.e. the effective capacitor switch ratio, the ratio of the maximum steady-state capacitance and the minimum steady-state capacitance) is 1.5-4:1. The effective capacitor switch ratio of the ferroelectric memory capacitor presents an increasing trend as the test frequency decreases, and the frequency range satisfying the above effective capacitor switch ratio is 1 kHz-10 kHz.

[0033] In the device manufacturing, the principle for selecting the top electrode is that the material should have good compactness and should not affect the insulation performance of the ferroelectric layer; and the material for the intermediate electrode should be close to the work function of the semiconductor to avoid the formation of built-in electric field. The protection scope of the present application is not limited to a certain specific electrode, and metals, semimetals or conductive polymers that can realize the functions of conduction and reduction of potential barrier difference can be selected.

[0034] The insulating medium layer is preferably silicon dioxide, silicon nitride, aluminum oxide or strontium titanate; the semiconductor includes but is not limited to silicon; other types of semiconductor and insulating medium layer that can realize the accumulation and depletion of space charge layer can be selected; the ferroelectric layer includes but is not limited to ferroelectric materials such as PVDF, hafnium zirconium oxide and lead zirconate titanate.

[0035] In the application of the non-destructive reading ferroelectric memory capacitor disclosed in the present application, a small signal AC voltage is used to read the capacitance, and a very small AC current is generated, so that the state of the device storing information is not damaged, and non-destructive reading is realized. The reading current is a very small displacement current, so that the loss generated during the operation of the device is mainly from the alternating loss of the dielectric, and does not cause large heat loss. The current generated when the ferroelectric memory capacitor is read in application is related to the capacitance of the device, the period and amplitude of the applied AC signal, and the energy loss is much lower than that of existing memory devices.

[0036] Embodiment 1

[0037] A manufacturing method of a non-destructive reading ferroelectric memory capacitor, the specific steps are as follows:

[0038] (1) Growth of insulating medium layer: the material of the insulating medium layer is preferably silicon dioxide. The doped p-type silicon wafer is placed in a tube furnace, and a 50 nm thick silicon dioxide is grown as an insulating medium layer by thermal oxidation, to obtain a "silicon-silicon dioxide" substrate.

[0039] (2) Growth of intermediate electrode: a mask plate is covered on the "silicon-silicon dioxide" substrate (1.5 cm long x 1.5 cm wide) prepared in step (1), and is fixed in a vacuum evaporation chamber. The air in the chamber is pumped out by a mechanical pump and a molecular pump, and the vacuum degree is reduced to 1 x 10 -4 The evaporation starts at 0.05-0.07 nm per second, and the evaporation stops when the film thickness instrument shows that the growth thickness of the intermediate electrode is 20 nm, to obtain a "silicon-silicon dioxide-gold electrode" substrate.

[0040] (3) Growth of ferroelectric layer: a PVDF solution with a mass concentration of 2.5% is prepared by using diethyl carbonate, and is completely dissolved by magnetic stirring at 60°C for 4h. After standing for 24h, a PVDF thin film is grown on the surface of the "silicon-silicon dioxide-gold electrode" substrate by spin coating at a first speed of 500 rpm for 5 seconds and a second speed of 2500 rpm for 25 seconds. The obtained device is annealed at 135°C for 4h to improve the crystallinity of the ferroelectric polymer PVDF, to obtain a "silicon-silicon dioxide-gold electrode-PVDF".

[0041] (4) Growth of top electrode: A mask with the same shape as that used in step (2) is placed on the "silicon-silicon dioxide-gold electrode-PVDF" and the mask shape is vertically aligned with the original gold electrode with a 0.2-0.3 mm offset. The top electrode material, aluminum, is vacuum evaporated at a rate of 0.12-0.15 nm per second. The evaporation is stopped when the film thickness meter indicates that the top electrode has a thickness of 20 nm.

[0042] (5) Bottom electrode fabrication: The silicon dioxide layer is scraped off at the positions without top and middle electrodes using a diamond pen or etching to expose the silicon. A conductive silver paste is then applied to the exposed silicon to form the bottom electrode. The conductive silver paste forms a good ohmic contact with the underlying silicon after solidification.

[0043] The ferroelectric memory capacitor obtained in Example 1 is subjected to ferroelectric layer thickness testing. The PVDF thickness obtained at 2500 revolutions per minute is 60 ± 2 nm as determined by a step meter.

[0044] The ferroelectric memory capacitor obtained in Example 1 is subjected to capacitance-voltage relationship testing. As shown in FIG. 2, a stable hysteresis curve is obtained. The calculated capacitance effective capacitance on-off ratio is 2:1. The capacitance on-off ratio gradually increases as the testing frequency decreases, and the stable frequency testing range is 1 kHz-10 kHz. Figure 3 Figure 6 The ferroelectric memory capacitor obtained in Example 1 is subjected to capacitance retention testing. As shown in FIG. 3, the on-state (high) capacitance and off-state (low) capacitance do not significantly decay or increase after a long time, and are distinguishable.

[0045] Comparative Example 1

[0046] A method for manufacturing a non-destructive reading ferroelectric memory capacitor is as follows:

[0047] (1) Growth of insulating medium layer silicon dioxide: A doped p-type silicon wafer is placed in a tube furnace, and a 50 nm thick silicon dioxide is thermally oxidized and grown as an insulating medium layer;

[0048] (2) Growth of middle electrode: A mask is placed on the "silicon-silicon dioxide" and a 25 nm thick metal nickel is vacuum evaporated on the "silicon-silicon dioxide" substrate as a middle electrode;

[0049] (3) Growth of ferroelectric layer: A PVDF film is grown by spin coating at a first speed of 500 rpm for 5 seconds and a second speed of 2500 rpm for 25 seconds. The obtained device is annealed at 135°C for 4 hours to improve the crystallinity of the ferroelectric polymer PVDF

[0050] ​(4) Growth of top electrode; using the same mask as used in step two, cover the "Si-SiO2-Ni electrode-PVDF" with a mask, the mask shape should be perpendicular to the original Ni electrode and have a 0.2-0.3 mm offset, and a 20 nm thick aluminum top electrode is made by vacuum evaporation;

[0051] (5) Bottom electrode fabrication; using a diamond pen to scratch off the SiO2 layer at the position without top electrode and middle electrode, or using etching method to expose the Si, and then applying conductive silver paste to the exposed Si to form a bottom electrode. The conductive silver paste forms a good ohmic contact with the substrate Si after solidification.

[0052] The ferroelectric memory capacitor is obtained, and the structure of the ferroelectric memory capacitor is "electrode-ferroelectric layer-electrode-insulating dielectric layer-semiconductor". The effective capacitance switching ratio of the ferroelectric memory capacitor is 1.5:1. The capacitance switching ratio gradually increases as the test frequency decreases, and the stable frequency test range is 1 kHz-10 kHz.

[0053] The ferroelectric memory capacitor obtained in Comparative Example 1 is tested for ferroelectric layer thickness, and the thickness of PVDF obtained at 1500 rpm is 110±5 nm as determined by a step meter. The ferroelectric memory capacitor obtained in Comparative Example 1 is tested for capacitance-voltage relationship, and a stable capacitance hysteresis curve is obtained, and the effective capacitance switching ratio is 1.5:1. The capacitance retention of the ferroelectric memory capacitor obtained in Comparative Example 1 is tested, as shown in Figure 7 , the on-state (high) capacitance and off-state (low) capacitance do not significantly decay or increase after a long time, and have distinguishability.

[0054] Comparative Example 2

[0055] A method for making a non-destructive reading ferroelectric memory capacitor, the steps are as follows:

[0056] (1) Growth of insulating dielectric layer SiO2; place the doped p-type silicon wafer in a tube furnace, and heat-oxidize to grow 25 nm thick SiO2 as an insulating dielectric layer;

[0057] (2) Growth of ferroelectric layer; PVDF film is grown by spin coating, spin coating at a first speed of 500 rpm for 5 seconds and a second speed of 2500 rpm for 25 seconds, and the obtained device is annealed at 135°C for 4h to improve the crystallinity of the ferroelectric polymer PVDF

[0058] (3) Growth of top electrode; cover the "Si-SiO2-PVDF" with a mask, and use vacuum evaporation technology to grow a 25 nm thick metal aluminum top electrode;

[0059] (4) Fabrication of bottom electrode: Use a diamond pen to scrape the silicon dioxide layer at the position where there is no top electrode and intermediate electrode, or use an etching method to expose the silicon. Apply room temperature conductive silver paste to the exposed silicon position to form the bottom electrode. After the conductive silver paste solidifies, it forms a good ohmic contact with the substrate silicon.

[0060] This yields a ferroelectric memcached capacitor. The structure of the ferroelectric memcached capacitor is "electrode-ferroelectric layer-insulating layer-semiconductor". The effective capacitance-to-switching ratio of the ferroelectric memcached capacitor is 3.5:1. As the test frequency increases, the capacitance-to-switching ratio of the ferroelectric memcached capacitor gradually decreases. The stable frequency test range is 1kHz to 10kHz.

[0061] The capacitance-frequency curve of the ferroelectric memory capacitor prepared in Comparative Example 2 is shown in the figure; Figure 2 As shown; the capacitance-voltage relationship of the ferroelectric memory capacitor obtained in Comparative Example 2 will be tested, as follows. Figure 4 As shown, a stable hysteresis curve is observed, and the calculated effective capacitance switching ratio is 3.5:1. The ferroelectric megohmmeter obtained in Comparative Example 2 is then subjected to a capacitance retention test, as shown... Figure 5 As shown, its on-state (high) capacitance decays rapidly after being written, making it unable to achieve long-term storage functionality.

[0062] Examples 1, 2, and 3 are provided. Figures 1 to 7 It is known that the key parameter for achieving capacitive memory is whether there are electrodes above and below the ferroelectric layer that meet the requirements. This invention can eliminate the thermal effect of resistive components in the circuit, improve energy utilization, reduce the reading voltage, avoid damaging the original data, and enhance the reliability of the device.

[0063] Example 2

[0064] A method for fabricating a non-destructive ferroelectric memcached container, comprising the following steps:

[0065] (1) Growth of silicon dioxide as insulating dielectric layer: The doped p-type silicon wafer was placed in a tube furnace and thermally oxidized to grow a 100 nm thick silicon dioxide layer as insulating dielectric layer.

[0066] (2) Growth of intermediate electrode: A mask is pressed onto a silicon-silicon dioxide substrate (1.5 cm long × 1.5 cm wide), and a gold layer with a thickness of 30 nm is grown as an intermediate electrode using vacuum evaporation technology;

[0067] (3) Growth of ferroelectric layer: A PVDF film was grown on the surface of a silicon-silicon dioxide-gold electrode substrate by spin coating. The spin coating was carried out at a first speed of 500 rpm for 5 seconds and a second speed of 1000-2500 rpm for 45 seconds to obtain a ferroelectric layer with a thickness of 20 nm. The obtained device was annealed at 135 °C for 4 h to improve the crystallinity of the ferroelectric polymer PVDF.

[0068] (4) Growth of top electrode; using the same mask as in step (2), cover the "Si-SiO2-Gold electrode-PVDF" with the mask, the mask shape should be perpendicular to the original gold electrode and have a 0.2-0.3 mm offset, and use vacuum evaporation technology to grow a 25 nm thick metal aluminum as the top electrode;

[0069] (5) Bottom electrode fabrication; use a diamond pen to scratch off the silicon dioxide layer at the position without top electrode and intermediate electrode, or use etching method to expose the silicon, and apply conductive silver paste at the exposed silicon position to form the bottom electrode, after the conductive silver paste solidifies, it forms a good ohmic contact with the underlying silicon, and a ferroelectric memory capacitor is obtained.

[0070] A ferroelectric memory capacitor is obtained, the structure of the ferroelectric memory capacitor is "electrode-ferroelectric layer-electrode-insulating layer-semiconductor", the effective capacitance switching ratio of the ferroelectric memory capacitor is 1.8:1, and as the test frequency increases, the capacitance switching ratio of the ferroelectric memory capacitor gradually decreases, and the stable frequency test range is 1 kHz-10 kHz.

[0071] Example 3

[0072] A method for manufacturing a non-destructive reading ferroelectric memory capacitor, the steps are as follows:

[0073] (1) Growth of insulating medium layer of silicon nitride; place the doped n-type silicon wafer in a tube furnace, and use gas deposition technology to grow a 60 nm thick silicon nitride as an insulating medium layer

[0074] (2) Growth of intermediate electrode; cover the "Si-SiN" substrate (1 cm long x 1.5 cm wide) with a mask, and use vacuum evaporation technology to grow a 50 nm thick metal nickel as an intermediate electrode;

[0075] (3) Growth of ferroelectric layer; use spin coating method to grow PVDF film on the surface of "Si-SiN-electrode" substrate, spin at first speed of 500 rpm for 5 seconds, and spin at second speed of 1000-2500 rpm for 45 seconds to obtain a 120 nm thick ferroelectric layer, and anneal the obtained device at 135°C for 4h to improve the crystallinity of the ferroelectric polymer PVDF

[0076] (4) Growth of top electrode; using the same mask as in step (2), cover the "Si-SiN-nickel electrode-PVDF" with the mask, the mask shape should be perpendicular to the original nickel electrode and have a 0.2-0.3 mm offset, and use vacuum evaporation technology to grow a 45 nm thick metal aluminum as the top electrode;

[0077] (5) bottom electrode fabrication; using diamond pen to scratch off the silicon nitride layer at the position without top electrode and middle electrode, or using etching method to expose the silicon, and then applying conductive silver paste to the exposed silicon position to form bottom electrode, and after the conductive silver paste solidifies, it forms good ohmic contact with the base silicon to obtain the ferroelectric memory capacitor.

[0078] That is, the ferroelectric memory capacitor is obtained, and the structure of the ferroelectric memory capacitor is "electrode-ferroelectric layer-electrode-insulating layer-semiconductor", and the effective capacitance on-off ratio of the ferroelectric memory capacitor is 2.5:1, and as the test frequency increases, the capacitance on-off ratio of the ferroelectric memory capacitor gradually decreases, and the stable frequency test range is 1 kHz-10 kHz.

[0079] Example 4

[0080] A method for manufacturing a non-destructive reading ferroelectric memory capacitor, the steps are as follows:

[0081] (1) Growth of insulating medium layer aluminum oxide; using atomic layer deposition technology to grow 40 nm thick aluminum oxide as an insulating medium layer on the surface of doped n-type silicon;

[0082] (2) Growth of middle electrode; using a mask cover to press on the silicon (500 microns thick)-aluminum oxide (40 nm thick) substrate (1.5 cm long x 1.5 cm wide), and using magnetron sputtering technology to grow 30 nm thick indium tin oxide (ITO) as a middle electrode;

[0083] (3) Growth of ferroelectric layer; using atomic layer deposition technology to grow 15 nm thick hafnium-zirconium oxide (HZO) ferroelectric film on the surface of the "silicon-aluminum oxide-ITO electrode" substrate;

[0084] (4) Growth of top electrode; using a mask cover with the same shape as step two to press on the "silicon-aluminum oxide-ITO electrode-HZO", and the mask shape should correspond to the original ITO middle electrode perpendicularly and have a 0.2-0.3 mm offset, and using magnetron sputtering technology to grow 20 nm thick platinum as a top electrode;

[0085] (5) Bottom electrode fabrication; using diamond pen to scratch off the aluminum oxide and hafnium-zirconium oxide layer at the position without top electrode and middle electrode, or using etching method to expose the silicon, and then applying conductive silver paste to the exposed silicon position to form bottom electrode, and after the conductive silver paste solidifies, it forms good ohmic contact with the base silicon to obtain the ferroelectric memory capacitor.

[0086] That is, the ferroelectric memory capacitor is obtained, and the structure of the ferroelectric memory capacitor is "electrode-ferroelectric layer-electrode-insulating layer-semiconductor", and the effective capacitance on-off ratio of the ferroelectric memory capacitor is 1.5:1, and as the test frequency increases, the capacitance on-off ratio of the ferroelectric memory capacitor gradually decreases, and the stable frequency test range is 1 kHz-10 kHz.

[0087] Example 5

[0088] A method for making a non-destructive read ferroelectric memory capacitor, the steps are as follows:

[0089] (1) Growth of insulating medium layer strontium titanate; 10 nm thick strontium titanate is grown as an insulating medium layer on the surface of doped p-type silicon using pulsed laser deposition technology;

[0090] (2) Growth of intermediate electrode; a mask cover is pressed on the "silicon-strontium titanate" substrate (1 cm long x 1 cm wide), and a 45 nm thick metal chromium is grown as an intermediate electrode using vacuum evaporation technology;

[0091] (3) Growth of ferroelectric layer; a 20 nm thick lead zirconate titanate (PZT) ferroelectric film is grown on the surface of "silicon-strontium titanate-PEDOT electrode" using pulsed laser deposition method;

[0092] (4) Growth of top electrode; a mask cover with the same shape as the intermediate electrode is pressed on "silicon-strontium titanate-chromium electrode-PZT", the mask shape should correspond to the original chromium electrode perpendicularly and have a 0.2-0.3 mm offset, and a 60 nm thick polyethylene dioxythiophene (PEDOT) is grown using sol-gel plus stripping cleaning method;

[0093] (5) Bottom electrode making; the lead zirconate titanate and strontium titanate layers at the positions without top electrode and intermediate electrode are scraped off using a diamond pen, or the silicon is exposed using etching method, and a conductive silver paste is applied on the exposed silicon to form a bottom electrode, and after the conductive silver paste solidifies, it forms a good ohmic contact with the base silicon, and a ferroelectric memory capacitor is obtained.

[0094] A ferroelectric memory capacitor is obtained, the structure of the ferroelectric memory capacitor is "electrode-ferroelectric layer-electrode-insulating layer-semiconductor", and the effective capacitance switching ratio of the ferroelectric memory capacitor is 1.8:1, which gradually decreases with the increase of test frequency, and the stable frequency test range is 1 kHz-10 kHz.

[0095] Example 6

[0096] A method for making a non-destructive read ferroelectric memory capacitor, the steps are as follows:

[0097] (1) Growth of insulating medium layer strontium titanate; 10 nm thick strontium titanate is grown as an insulating medium layer on the surface of doped p-type silicon using pulsed laser deposition technology;

[0098] (2) Growth of intermediate electrode; a mask cover is pressed on the "silicon-strontium titanate" substrate (1 cm long x 1 cm wide), and a 45 nm thick metal chromium is grown as an intermediate electrode using vacuum evaporation technology;

[0099] (3) Growth of ferroelectric layer; an appropriate amount of PVDF powder is weighed according to a mass concentration of 2.5% and dissolved in a diethyl carbonate solvent to form a solution, and the PVDF is spin-coated by adopting a spin coating method, wherein the first-stage rotation speed is 500 rpm and the second-stage rotation speed is 1000-2500 rpm, and the spin-coating time is 5 seconds and 25 seconds, respectively. The PVDF thin film is grown on the surface of the "silicon-silicon dioxide-gold electrode" substrate, and annealing is performed at 135 DEG C for 4 hours to improve the crystallinity of the ferroelectric polymer PVDF;

[0100] (4) Growth of top electrode; the "silicon-silicon dioxide layer-ferroelectric layer" is used as the substrate, and a metal aluminum top electrode with a thickness of 20 nm is prepared by adopting a vacuum evaporation technology at an evaporation rate of 0.25 nm per second.

[0101] (5) Bottom electrode preparation; the silicon dioxide layer is scraped off at the position without the top electrode, or the silicon is exposed by etching, and the bottom electrode is formed by coating the conductive silver paste on the exposed silicon at room temperature to form a good ohmic contact with the silicon after the silver paste is solidified. Thus, the ferroelectric memory capacitor is obtained.

[0102] Thus, the ferroelectric memory capacitor is obtained, and the structure of the ferroelectric memory capacitor is "electrode-ferroelectric layer-electrode-insulating layer-semiconductor". The effective capacitance switching ratio of the ferroelectric memory capacitor is 4:1, and the capacitance switching ratio of the ferroelectric memory capacitor gradually decreases as the test frequency increases. The stable frequency test range is 1 kHz-10 kHz.

[0103] In summary, the ferroelectric memory capacitor of the present application has the following advantages: the ferroelectric polarization direction is used to control the device capacitance to store information, and the displacement current transmitted by the circuit does not pass through the memory device during data reading, thereby eliminating the heat loss of the circuit. The present application uses the direction of ferroelectric polarization to represent information, realizes the control of the capacitance of the ferroelectric capacitor, and serially connects the insulating medium layer to enhance the insulation performance, thereby solving the problem of destructive reading of the traditional ferroelectric memory. The obtained ferroelectric memory capacitor has higher working efficiency. The process of the present application is simple, the device structure size is flexible, the device is easy to manufacture and integrate, the performance is stable, the repeatability is good, and the device can be widely used as a new type of memory device and a new generation of storage technology including the development and application in the field of neuromorphic computing.

[0104] The top electrode and the bottom electrode of the ferroelectric memory capacitor disclosed in the present application are connected to a test circuit, and a direct current pulse with different directions is applied to realize data writing in different states; and a small amplitude alternating current signal is applied to realize the non-destructive reading function of the written data.

[0105] The ferroelectric capacitor is integrated on the semiconductor-insulating layer in the present application, so that the non-volatile ferroelectric polarization induces the bound charges of the top electrode and the middle electrode, affects the thickness of the space charge layer at the semiconductor-insulating layer interface, causes the change of the overall capacitance of the device, and realizes the charge storage.

Claims

1. A non-destructive read ferroelectric racetrack memory, characterized by, The ferroelectric memory container comprises, from bottom to top, a semiconductor, an insulating dielectric layer, an intermediate electrode, a ferroelectric layer and a top electrode; the insulating dielectric layer is provided with a normal-temperature conductive material layer between the semiconductor and the normal-temperature conductive material layer; the semiconductor and the normal-temperature conductive material layer are in ohmic contact; the normal-temperature conductive material layer is not in contact with the top electrode and the intermediate electrode; The ratio of the high and low capacitance states of the ferroelectric memory container is 1.5-4:1; The thickness of the semiconductor is 500 μm; The thickness of the insulating dielectric layer is 10-100 nm, and the relative dielectric constant at room temperature is 4-20; the insulating dielectric layer is silicon dioxide, silicon nitride, aluminum oxide or strontium titanate; The thickness of the intermediate electrode and the top electrode is 20-60 nm, and the resistivity at room temperature is less than 0.001 Ω·cm; the intermediate electrode and the top electrode are polyethylene dioxythiophene, indium tin oxide, gold, silver, nickel, aluminum or chromium; The thickness of the ferroelectric layer is 15-120 nm, and the relative dielectric constant at room temperature is 10-60; The ferroelectric layer is an organic ferroelectric polymer, an inorganic ferroelectric material, an organic ferroelectric copolymer or a composite material with ferroelectricity formed by organic and inorganic materials.

2. A method of making a non-destructively readable ferroelectric memory cell as claimed in claim 1, characterized in that Specifically comprising the following steps: (1) preparing an insulating dielectric layer; growing an insulating material as an insulating dielectric layer on the upper surface of the semiconductor by a method including sol-gel, spin coating, chemical vapor deposition, thermal oxidation, vacuum evaporation, magnetron sputtering, pulsed laser deposition, atomic layer deposition or molecular beam epitaxy; (2) preparing an intermediate electrode: depositing a conductive medium as an intermediate electrode on the upper surface of the insulating dielectric layer by a method including spin coating, magnetron sputtering or vacuum evaporation; (3) preparing a ferroelectric layer: preparing a ferroelectric material as a ferroelectric layer on the upper surface of the intermediate electrode by a method including sol-gel, spin coating, chemical vapor deposition, thermal oxidation, vacuum evaporation, magnetron sputtering, pulsed laser deposition, atomic layer deposition or molecular beam epitaxy; (4) preparing a top electrode: depositing a conductive material as a top electrode on the upper surface of the ferroelectric layer by a method including sol-gel, magnetron sputtering or vacuum evaporation; (5) preparing a bottom electrode: scraping off the insulating dielectric layer, or using etching to expose the semiconductor, and then applying a normal-temperature conductive silver paste to the exposed silicon to form a bottom electrode; after the conductive silver paste solidifies, a good ohmic contact is formed between the conductive silver paste and the base silicon.

3. Application of the non-destructive reading ferroelectric memory container of claim 1 in a device for realizing data writing and non-destructive reading of written data.

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