Power amplifier circuit

Abstract

The power amplification circuit of the present disclosure includes an amplification circuit (12) that is a differential amplification circuit that operates with a power supply voltage that varies according to the amplitude of a signal, a bias circuit (32) that outputs a bias supplied to the amplification circuit (12), and dispersion circuits (41 and 42) that are provided corresponding to a pair of differential signals output from the amplification circuit (12), respectively, and that adjust the power supply voltage dependence of the gain of the amplification circuit (12). The power amplification circuit of the present disclosure achieves appropriate gain dispersion while maintaining the symmetry of the waveform of a differential signal in the case where the output of the amplification circuit is a differential signal.

Description

TECHNICAL FIELD

[0001] The present application relates to a power amplification circuit. BACKGROUND

[0002] In recent years, an increase in power consumption is a concern along with a transition to a 5th generation mobile communication system. As a high-efficiency technology for seeking an increase in power efficiency, envelope tracking (ET) is adopted. Envelope tracking is a manner of controlling a power supply voltage of a power amplification circuit in accordance with an amplitude level of an input signal. In envelope tracking, in order to obtain a high-efficiency characteristic, it is necessary to set a gain power supply voltage dependency (gain dispersion) to an optimum dependency range. The gain dispersion refers to a difference in gain with respect to a change in a power supply potential supplied to a transistor. As one method of setting the gain dispersion to the optimum dependency range, a dispersion circuit can be used.

[0003] The power amplification circuit disclosed in Patent Literature 1 is provided with an adjustment circuit. The adjustment circuit adjusts an amount of a bias current supplied to an amplification circuit on the basis of a power supply voltage controlled in accordance with an envelope line of an RF signal. Thereby, the adjustment circuit adjusts a range of gain.

[0004] Further, in Patent Literature 2, a power amplification circuit is described in which a variable power supply potential is supplied from an envelope tracking power supply circuit, and the lower the variable power supply potential, the more the bias current flowing through a base of a transistor is reduced. In the power amplification circuit described in Patent Literature 2, the lower the variable power supply potential, the lower the gain of the transistor becomes, and thus a gain dispersion characteristic can be improved. Therefore, in the power amplification circuit described in Patent Literature 2, an increase in gain at a low power supply potential can be suppressed, and the gain can be made equal to that at a high power supply potential.

[0005] PRIOR ART LITERATURE

[0006] PATENT LITERATURE

[0007] Patent Literature 1: Japanese Patent Application Publication No. 2020-65244

[0008] Patent Literature 2: Japanese Patent Application Publication No. 2018-195954

[0009] In the power amplification circuits described in Patent Literature 1 and Patent Literature 2, gain dispersion in a case where an output of an amplification circuit is a differential signal is not considered, and there is room for improvement. SUMMARY

[0010] PROBLEMS TO BE SOLVED BY THE INVENTION

[0011] The present application has been achieved in view of the above-described circumstances, and has an object to provide a power amplification circuit in which, in a case where an output of an amplification circuit is a differential signal, appropriate gain dispersion can be achieved while symmetry of a waveform of the differential signal is maintained.

[0012] Technical solution for solving the problem

[0013] One aspect of the power amplification circuit of the present application includes a differential amplification circuit that operates with a power supply voltage that varies in accordance with an amplitude of a signal; a bias circuit that outputs a bias supplied to the differential amplification circuit; and a first dispersion circuit and a second dispersion circuit that are provided in correspondence with a pair of differential signals output from the differential amplification circuit, respectively, and adjust a power supply voltage dependence of a gain of the differential amplification circuit.

[0014] Another aspect of the power amplification circuit of the present application includes a differential amplification circuit that operates with a power supply voltage that varies in accordance with an amplitude of a signal; a bias circuit that outputs a bias supplied to the differential amplification circuit; a first dispersion circuit and a second dispersion circuit that are provided in correspondence with a pair of differential signals output from the differential amplification circuit, respectively, and adjust a power supply voltage dependence of a gain of the differential amplification circuit; a first resistor that is provided in correspondence with one of the pair of differential signals output from the differential amplification circuit; and a second resistor that is provided in correspondence with the other of the pair of differential signals, a resistance value of the first resistor and a resistance value of the second resistor are substantially equal, one end of the first resistor and one end of the second resistor are connected, the one of the pair of differential signals is applied to the other end of the first resistor, the other of the pair of differential signals is applied to the other end of the second resistor, and the first dispersion circuit and the second dispersion circuit are connected at a connection point of the one end of the first resistor and the one end of the second resistor.

[0015] Effects of the invention

[0016] According to the present application, in a case where an output of an amplification circuit is a differential signal, appropriate gain dispersion can be achieved while symmetry of a waveform of the differential signal is maintained. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is a diagram showing an example of a transmission circuit including the power amplification circuit according to the first embodiment.

[0018] Figure 2 is a diagram showing a power amplification circuit of a comparative example.

[0019] Figure 3 is a diagram showing a structure example of a dispersion circuit and a bias circuit.

[0020] Figure 4 is a diagram showing other structural examples of the dispersion circuit and the bias circuit.

[0021] Figure 5 is a diagram explaining the operation characteristic of the dispersion circuit.

[0022] Figure 6 is a diagram explaining the operation characteristic of the dispersion circuit.

[0023] Figure 7 is a diagram showing an example of the power amplification circuit according to the first embodiment.

[0024] Figure 8 is a diagram showing a structural example of the bias circuit and the dispersion circuit in Figure 7 .

[0025] Figure 9 is a diagram showing an example of the power amplification circuit according to the second embodiment.

[0026] Figure 10 is a diagram showing an example of the power amplification circuit according to the third embodiment.

[0027] Figure 11 is a diagram showing a structural example of the bias circuit and the dispersion circuit in Figure 10 .

[0028] Figure 12 is a diagram showing an example of the power amplification circuit according to the fourth embodiment.

[0029] Figure 13 is a diagram showing an example of the power amplification circuit according to the fifth embodiment.

[0030] Figure 14 is a diagram showing an example of the power amplification circuit according to the sixth embodiment.

[0031] Figure 15 is a diagram showing a structural example of the bias circuit and the dispersion circuit in the modification example.

[0032] Figure 16 is a diagram showing a structural example of the bias circuit and the dispersion circuit in the modification example.

[0033] Explanation of Reference Numerals

[0034] 1: matching circuit;

[0035] 4, 41, 42: dispersion circuit;

[0036] 5: inductor;

[0037] 10: input terminal;

[0038] 11, 11a, 11b, 12, 12a, 12b, 110: amplification circuit

[0039] 20: output terminal

[0040] 21, 22: transformer

[0041] 31, 32, 32a, 32b: bias circuit

[0042] 100, 100A to 100F: power amplification circuit

[0043] R1, R2: resistance

[0044] RFin: input signal

[0045] RFout: output signal

[0046] Vcc: power supply voltage DETAILED DESCRIPTION

[0047] Hereinafter, the embodiments of the power amplification circuit of the present disclosure will be described in detail based on the drawings. In addition, the present disclosure is not limited to this embodiment. Furthermore, in the constituent elements of each embodiment, the constituent elements that can be substituted by those skilled in the art and easily substituted, or substantially the same constituent elements are included. Each embodiment is an example, and partial substitution or combination of the structures shown in different embodiments can be made. After the second embodiment, the description about the matters common to the first embodiment will be appropriately omitted, and the description will be made focusing on the difference. In particular, regarding the same effects based on the same structure, the description will be appropriately omitted, and not mentioned in each embodiment in sequence.

[0048] (Overall structure of transmission circuit)

[0049] Figure 1 is a diagram showing the structure of a transmission circuit including the power amplification circuit of the first embodiment. The transmission circuit 200 is used for transmitting various signals such as voice, data, and the like to a base station, for example, in a wireless communication terminal device such as a portable telephone device. In addition, the wireless communication terminal device also has a reception unit for receiving signals from the base station, but the description thereof is omitted here.

[0050] As shown in Figure 1 , the transmission circuit 200 includes a baseband circuit 15, an RF (radio frequency) circuit 30, a power supply circuit 40, a power amplification circuit 100, a front-end circuit 60, and an antenna 70.

[0051] The baseband circuit 15 modulates input signals such as voice and data based on modulation methods such as HSUPA (High Speed ​​Uplink Packet Access) and LTE (Long Term Evolution). IN Modulate and output the modulated signal S. IQ Modulation signal S IQ The IQ signal (I signal and Q signal) represents the amplitude and phase on the IQ plane.

[0052] RF circuit 30 is based on the modulation signal S output from baseband circuit 15. IQ The output is the input signal RFin, which is a high-frequency signal. Furthermore, the RF circuit 30 is based on the modulation signal S. IQ For the modulated signal S IQ The amplitude level is detected. Then, the RF circuit 30 sends the control signal S CTRL Output to power supply circuit 40, control signal S CTRL The power supply circuit 40 is controlled so that the power supply potential Vcc supplied to the power amplifier circuit 100 is a level corresponding to the amplitude level of the input signal RFin. Specifically, the RF circuit 30 controls the signal S... CTRL Output to power supply circuit 40, control signal S CTRL The power supply circuit 40 is controlled so that the power supply potential Vcc becomes the level corresponding to the envelope of the input signal RFin. In other words, the RF circuit 30 uses the control signal S for envelope tracking. CTRL Output to power supply circuit 40.

[0053] Alternatively, in the RF circuit 30, instead of performing the modulation signal S... IQ Instead of a direct transformation of the input signal RFin, the modulated signal S is transformed... Io It is converted into an intermediate frequency (IF) signal, and the input signal RFin is generated from the IF signal.

[0054] The power supply circuit 40 is an envelope tracking power supply circuit that generates the control signal S output from the RF circuit 30. CTRL The corresponding power supply potential Vcc, that is, the power supply potential Vcc corresponding to the envelope of the input signal RFin, is generated and output to the power amplifier circuit 100. The power supply circuit 40 can, for example, generate and control the signal S based on the input potential. CTRL A DC-DC converter and a linear amplifier with a corresponding power supply potential Vcc are used.

[0055] Further, the power supply potential Vcc is a potential that varies in accordance with an envelope of the input signal RFin.

[0056] The power amplification circuit 100 amplifies an input signal RFin of a radio frequency and outputs an output signal RFout as a high frequency signal, for example, in a mobile communication device such as a portable telephone device. As for the frequency of the input signal RFin and the output signal RFout, for example, several hundred MHz (mega hertz) to several tens of GHz (giga hertz) can be exemplified, but the present disclosure is not limited thereto.

[0057] The power amplification circuit 100 amplifies the power of the input signal RFin output from the RF circuit 30 to a level required for transmission to a base station. Then, the power amplification circuit 100 outputs the amplified output signal RFout to the front-end circuit 60.

[0058] The front-end circuit 60 performs filtering of the output signal RFout, switching with a reception signal received from a base station, and the like. The output signal RFout output from the front-end circuit 60 is transmitted to a base station via an antenna 70.

[0059] The power amplification circuit 100 can be realized by a hybrid IC (may also be a module) in which a plurality of components (semiconductor integrated circuits and the like) are mounted on one substrate, but the present disclosure is not limited thereto.

[0060] (Comparative Example)

[0061] Next, in order to make each embodiment easy to understand, the power amplification circuit of the comparative example will be described. Figure 2 is a view that shows the power amplification circuit of the comparative example. Figure 2 The power amplification circuit 100 shown has a matching circuit 1, an amplification circuit 11, a transformer 21 that is a first transformer, an amplification circuit 12, and a transformer 22 that is a second transformer. An input terminal 10 is input with an input signal RFin. The matching circuit 1 is provided between the input terminal 10 and the amplification circuit 11. The matching circuit 1 is provided on the input side of the amplification circuit 11.

[0062] The transformer 21 is provided between the amplification circuit 11 and the amplification circuit 12. The amplification circuit 11 is an amplification circuit of a driver stage, and the amplification circuit 12 is an amplification circuit of a power stage. The transformer 21 is provided on the output side of the amplification circuit 11. The transformer 21 is provided on the input side of the amplification circuit 12. One end of a winding of the input side of the transformer 21 is connected to an output terminal of the amplification circuit 11. The other end of the winding of the input side of the transformer 21 is connected to a power supply potential Vcc via an inductor 5.

[0063] The winding on the output side of the transformer 21 is connected to the input side of the amplification circuit 12. The amplification circuit 12 has amplification circuits 12a and 12b that constitute a differential amplification circuit. The differential signal output from the amplification circuits 12a and 12b is input to a transformer 22. The transformer 22 is provided between the amplification circuit 12 and the output terminal 20. The transformer 22 is provided on the output side of the amplification circuit 12. The midpoint P22 of the winding on the primary side of the transformer 22 is connected to the power supply potential Vcc. One end of the winding on the secondary side of the transformer 22 is connected to the output terminal 20. The other end of the winding on the secondary side of the transformer 22 is connected to a reference potential. The output signal RFout output from the output terminal 20 becomes the output of the power amplification circuit 100.

[0064] In addition, a bias circuit 31 is connected to the amplification circuit 11. The bias circuit 31 outputs a bias supplied to the amplification circuit 11. The bias output from the bias circuit 31 is input to the amplification circuit 11. A bias circuit 32 is connected to the amplification circuit 12. The bias circuit 32 outputs a bias supplied to the amplification circuit 12. The bias output from the bias circuit 32 is input to the amplification circuits 12a and 12b that constitute a differential amplification circuit, respectively.

[0065] The power amplification circuit 100 has a dispersion circuit 4. In the power amplification circuit 100, a single dispersion circuit 4 is provided on the output side of the amplification circuit 12. The dispersion circuit 4 is provided only one for a pair of differential signals that are the output of the amplification circuit 12. The dispersion circuit 4 controls the bias supplied to the amplification circuit 12 on the basis of one of the pair of differential signals output from the amplification circuit 12. Therefore, it is difficult to maintain the symmetry of the differential signal waveform for the differential signals that are the output of the amplification circuit 12.

[0066] (Dispersion circuit and bias circuit)

[0067] Figure 3 is a view that shows a configuration example of the dispersion circuit 4 and the bias circuit 32. The bias circuit 32 varies the output bias on the basis of the output signal of the dispersion circuit 4. That is, the dispersion circuit 4 and the bias circuit 32 control the bias supplied to the amplification circuit 12.

[0068] In Figure 3 , if attention is paid to the bias circuit 32, the bias circuit 32 includes a resistance element 131, transistors 132, 133, and 135, and a capacitor 134.

[0069] As one example, a constant bias current Ibias is input to one end of the resistance element 131. The other end of the resistance element 131 is electrically connected to the collector and the base of the transistor 132. In addition, a bias voltage can also be input to the resistance element 131.

[0070] The collector and the base of the transistor 132 are electrically connected. That is, the transistor 132 is diode-connected. The emitter of the transistor 132 is electrically connected to the collector and the base of the transistor 133.

[0071] The collector and the base of the transistor 133 are electrically connected. That is, the transistor 133 is diode-connected. The emitter of the transistor 133 is electrically connected to a reference potential.

[0072] One end of the capacitor 134 is electrically connected to the collector and the base of the transistor 132. The other end of the capacitor 134 is electrically connected to the reference potential. The capacitor 134 stabilizes the voltage of the transistors 132 and 133, that is, the voltage of the two diodes.

[0073] The collector of the transistor 135 is electrically connected to a constant power supply potential Vbat. The base of the transistor 135 is electrically connected to one end of the capacitor 134. A constant bias current is input to the base of the transistor 135. The emitter of the transistor 135 is connected to the amplifying circuit 12. The transistor 135 outputs a constant current Ief_pwr to the amplifying circuit 12.

[0074] Further, in the Figure 3 , if attention is paid to the dispersion circuit 4, the dispersion circuit 4 includes a transistor Qd and resistance elements Rd_b, Rd_c, and Rd_e. The resistance elements Rd_b, Rd_c, and Rd_e can also be wiring resistances.

[0075] The transistor Qd is a heterojunction bipolar transistor whose emitter and base form a heterojunction, and the band gap energy of the emitter is larger than that of the base.

[0076] One end of the resistance element Rd_b is electrically connected to the base of the transistor 135 of the bias circuit 32 and one end of the capacitor 134. The other end of the resistance element Rd_b is electrically connected to the base of the transistor Qd.

[0077] A power supply potential Vcc as an envelope tracking power supply potential is input to one end of the resistance element Rd_c. The other end of the resistance element Rd_c is electrically connected to the collector of the transistor Qd.

[0078] One end of the resistance element Rd_e is electrically connected to the emitter of the transistor Qd. The other end of the resistance element Rd_e is electrically connected to the amplifying circuit 12. In addition, the resistance element Rd_e can not be provided. That is, the emitter of the transistor Qd can be directly connected to one end of the resistance element Rb.

[0079] The potential at one end of the resistance element Rd_b is the potential of the capacitor 134 (constant potential). The potential at one end of the resistance element Rd_c is the power supply potential Vcc which is an envelope tracking power supply potential. Therefore, the operation of the transistor Qd varies depending on the power supply potential Vcc.

[0080] The bias current Ib is the sum of the current Ief_pwr which is the emitter current of the transistor 135 and the current Id_e which is the emitter current of the transistor Qd. That is, Ib = Ief_pwr + Id_e. Therefore, the current Ief_pwr and the current Id_e each contribute to adjustment of the bias point of the transistor within the amplification circuit 12.

[0081] The dispersion circuit 4 adjusts the bias current by outputting the current Id_e corresponding to the power supply potential Vcc to the amplification circuit 12 via the resistance element Rd_e.

[0082] In the present disclosure, the lower limit potential of the power supply potential Vcc is referred to as a first potential. The upper limit potential of the power supply potential Vcc is referred to as a second potential. As for the first potential, 1.0 V or so can be exemplified, but the present disclosure is not limited thereto. As for the second potential, 5.5 V or so can be exemplified, but the present disclosure is not limited thereto.

[0083] The transistor Qd is a heterojunction bipolar transistor. Therefore, the transistor Qd exhibits different behaviors with the power supply potential Vcc as a third potential (threshold potential) higher than the first potential. As for the third potential, 3 V or so can be exemplified, but the present disclosure is not limited thereto.

[0084] The transistor Qd operates as an emitter follower circuit in a range where the power supply potential Vcc is higher than the third potential. On the other hand, the transistor Qd operates as two PN junction diodes (a PN junction between the base and the collector and a PN junction between the base and the emitter) in a range where the power supply potential Vcc is 3 V or less.

[0085] In the present disclosure, a path through which a current flows from the bias circuit 32 to the base of the transistor Qx within the amplification circuit 12 via the resistance element Rb is referred to as a first current path. The emitter of the transistor 135 is electrically connected to the base of the transistor Qx within the amplification circuit 12 via the first current path. The emitter of the transistor Qd is electrically connected to the first current path via the resistance element Rd_e.

[0086] Further, a path through which a current flows from the bias circuit 32 to the connection point P11 via the resistance element Rd_b, the PN junction between the base and the collector of the transistor Qd, and the resistance element Rd_c is referred to as a second current path. The base of the transistor 135 is connected to the second current path via the resistance element Rd_b.

[0087] Further, a path through which a current flows from the connection point Pll via the resistance element Rd_c, the collector-emitter of the transistor Qd, the resistance element Rd_e, and the resistance element Rb to the base of the transistor Qx in the amplification circuit 12 is referred to as a third current path.

[0088] (Case in which the transistor operates as an emitter follower circuit)

[0089] A case in which the transistor Qd operates as an emitter follower circuit will be described. In this case, the current Ief_pwr flows from the bias circuit 32 to the base of the transistor Qx via the first current path. At the same time, the current Id_e flows from the connection point Pll to the base of the transistor Qx via the third current path. At this time, the current Id_b is so small that it can be ignored, and thus the current Id_e becomes approximately equal to the current Id_c. That is, Id_e « Id_c.

[0090] (Case in which the transistor operates as two PN junction diodes)

[0091] A case in which the transistor Qd operates as two PN junction diodes will be described. In this case, a current flows from the bias circuit 32 to the connection point Pll via the second current path. This is because the on voltage of the PN junction between the base and the collector of the transistor Qd is lower than the on voltage of the PN junction between the base and the emitter, and thus the current preferentially flows through the base-collector of the transistor Qd. At this time, the direction in which the current Id_c flows is opposite to the direction of the arrow shown in FIG. 6. Figure 3

[0092] With respect to the dispersion circuit 4, the lower the power supply potential Vcc, the more the current Id_c increases in the direction (opposite direction) in which it flows from the bias circuit 32 to the connection point Pll via the second current path. In other words, with respect to the dispersion circuit 4, the lower the power supply potential Vcc, the more the current Id_b flows as the current Id_c in the direction (opposite direction) in which it flows from the bias circuit 32 to the connection point Pll via the second current path, and thus the current flowing to the base of the transistor 135 is reduced. That is, with respect to the dispersion circuit 4, the lower the power supply potential Vcc, the more the base current of the transistor 135 is reduced, and thus the bias current Ib is reduced.

[0093] ​Therefore, the collector current Icc of the transistor Qx also decreases. Thus, the dispersion circuit 4 is able to cause the gain of the transistor Qx to decrease in a case where the power supply potential Vcc is in a range below the 3rd potential. For example, the dispersion circuit 4 is able to cause the gain of the transistor Qx in a case where the power supply potential Vcc is the 1st potential as a lower limit potential to decrease compared to the gain at a time when the efficiency becomes maximum at the highest output of the transistor Qx. Thus, the dispersion circuit 4 is able to improve the gain dispersion characteristic of the power amplification circuit. That is, the dispersion circuit 4 adjusts the power supply voltage dependence of the gain of the amplification circuit 12.

[0094] (Other example of bias circuit)

[0095] Figure 4 is a view showing other structural examples of the dispersion circuit and the bias circuit. Figure 4 is a view in which the bias circuit 32 in Figure 3 is replaced with another bias circuit 32a. The bias circuit 32a is a feedback type bias circuit. The bias circuit 32a has a transistor 132a and a resistor 136. One end of the resistor 136 is connected to the emitter of the transistor 135. The other end of the resistor 136 is connected to the base of the transistor 132a. The collector of the transistor 132a is connected to the base of the transistor 135. The emitter of the transistor 132a is connected to a reference potential. The other structure of the bias circuit 32a is the same as the bias circuit 32 described with reference to Figure 3 .

[0096] The operation of the bias circuit 32a is described. The current Ief_pwr output from the emitter of the transistor 135 is input to the amplification circuit 12. In addition, a part of the current Ief_pwr flows to the resistor 136 side. Therefore, the transistor 132a is always in an on state.

[0097] If the current Ief_pwr increases, the current flowing through the resistor 136 increases. Thus, an action is performed so that the current flowing to the base of the transistor 132a increases. If so, an action is performed so that the current flowing to the transistor 135 side in the bias current Ibias increases. Therefore, the voltage between the base and the emitter of the transistor 135 decreases, and thus an action is performed so that the current Ief_pwr decreases.

[0098] On the other hand, if the current Ief_pwr decreases, the current flowing through the resistor 136 decreases. Thus, an action is performed so that the current flowing to the base of the transistor 132a decreases. If so, an action is performed so that the current flowing to the transistor 135 side in the bias current Ibias decreases. Therefore, the voltage between the base and the emitter of the transistor 135 increases, and thus an action is performed so that the current Ief_pwr increases.

[0099] As above, the transistor 132a and the resistor 136 become a feedback circuit that feeds back a part of the current Ief_pwr. That is, Figure 4 The bias circuit 32a has a feedback circuit that feeds back a part of the current Ief_pwr. In this feedback circuit, by controlling the on state of the transistor 132a, it is possible to keep the bias current supplied from the bias circuit 32a to the amplification circuit 12 constant. That is, by feeding back a part of the bias, it is possible to keep the bias supplied to the power amplification circuit constant. Therefore, it is possible to keep the linearity of the gain of the power amplification circuit well.

[0100] (Action characteristics of the dispersion circuit)

[0101] Figure 5 and Figure 6 is a graph that illustrates the action characteristics of the dispersion circuit 4. Figure 5 The power supply potential Vcc-collector current Icc characteristics with respect to the bias current Ibias are shown. In Figure 5 , the horizontal axis shows the power supply potential Vcc, and the vertical axis shows the collector current Icc.

[0102] In Figure 5 , the single-dot chain lines DL1 to DL4 show the action characteristics in the case where the dispersion circuit 4 is not connected, and the solid lines SL1 to SL4 show the action characteristics in the case where the dispersion circuit 4 is connected. The single-dot chain line DL1 and the solid line SL1 correspond to a state where the bias current Ibias is the same value and high, and the single-dot chain line DL4 and the solid line SL4 correspond to a state where the bias current Ibias is the same value and low. As Figure 5 is shown, if the action characteristics of the single-dot chain lines DL1 to DL4 in which the dispersion circuit 4 is not connected are focused on, at each value of the bias current Ibias, if the power supply potential Vcc drops, the collector current Icc is substantially constant, or gently decreases.

[0103] On the other hand, in a state where the value of the power supply potential Vcc is relatively low, the dispersion circuit 4 operates so as to draw a current from the bias circuit 32, and the collector current Icc decreases. In this example, if the power supply potential Vcc decreases, the operating characteristics shown by the solid lines SL1 to SL4 linearly decrease, and the collector current Icc greatly decreases compared to the operating characteristics shown by the one-dot chain lines DL1 to DL4. As such, in the case where the dispersion circuit 4 is connected, the range of variation of the collector current Icc moves toward the lower side in Figure 5 As described above, if the value of the power supply potential Vcc increases, the amount of current drawn by the dispersion circuit 4 from the bias circuit 32 decreases. Therefore, in a state where the value of the power supply potential Vcc is relatively high, the operating characteristics shown by the solid lines SL1 to SL4 become the same as the operating characteristics shown by the one-dot chain lines DL1 to DL4, as described above. Here, attention is directed to the one-dot chain line DL2 and the solid line SL2. The one-dot chain line DL2 and the solid line SL2 can be divided into a plurality of intervals with respect to the power supply potential Vcc, for example, can be divided into four intervals M1, M2, M3, and M4. Among the four intervals M1, M2, M3, and M4, the interval M1 is an interval where the power supply potential is the highest. Among the four intervals M1, M2, M3, and M4, the interval M4 is an interval where the power supply potential is the lowest. Referring to Figure 6 Examples of variation of gain with respect to the power supply potential Vcc in each of the intervals M1, M2, M3, and M4 will be described. In addition, the gain is proportional to the collector current Icc.

[0104] Figure 6 is a graph showing characteristics of gain with respect to power. In Figure 6 , the horizontal axis shows output power, and the vertical axis shows gain. In Figure 6 , the one-dot chain line shows operating characteristics in the case where the dispersion circuit 4 is not connected in each of the intervals M1 to M4 in Figure 5 . In Figure 6 , the solid line shows operating characteristics in the case where the dispersion circuit 4 is connected.

[0105] As shown in Figure 6 , in the case where the dispersion circuit 4 is not connected, the operating characteristics shown by the one-dot chain lines DL1 to DL4 are the same as the operating characteristics shown by the solid lines SL1 to SL4 in Figure 5The operating characteristics corresponding to intervals M1 to M4 are shown by the dashed lines. If the output power increases, the gain drops sharply. Without the distributed circuit 4 connected, the range of gain variation in the operating characteristics corresponding to intervals M1 to M4 is indicated by the arrow Y1.

[0106] In contrast, when the distributed circuit 4 is connected, with Figure 5 The action characteristics corresponding to intervals M1 to M4 are shown by the solid line, with a decrease in gain. In particular, in relation to... Figure 5 In the operating characteristics corresponding to interval M4, the gain drops significantly. With the scattering circuit 4 connected, the range of gain variation in each operating characteristic corresponding to intervals M1 to M4 is indicated by arrow Y2. That is, with the scattering circuit 4 connected, the range of gain variation becomes wider, as shown by arrow Y2. Therefore, by connecting the scattering circuit 4 to the bias circuit 32, the range of gain variation can be widened. For Figure 5 The other solid lines SL1, DL1, SL3, DL3, SL4, and DL4 can also be divided into multiple intervals. Furthermore, by connecting the dispersion circuit 4 to the bias circuit 32, thus... Figure 6 As shown, it is possible to broaden the range of gain variation in the motion characteristics corresponding to each interval.

[0107] Figure 2 The power amplifier circuit 100 of the comparative example shown has a distributed circuit 4 connected to the amplifier circuit 11. Therefore, when the amplifier circuit 11 is a differential amplifier circuit, it may sometimes become an asymmetrical configuration due to reasons such as different wiring lengths, and the symmetry of the differential amplifier circuit cannot be maintained.

[0108] The power amplifier circuit of this disclosure will now be described. The power amplifier circuit of this disclosure includes gain dispersion circuits corresponding to each amplifier circuit constituting a differential amplifier circuit.

[0109] (First Embodiment)

[0110] [Circuit Structure]

[0111] Figure 7 This is a diagram showing an example of a power amplifier circuit 100A according to the first embodiment. Figure 7The illustrated power amplification circuit 100A, for example, is mounted on a mobile communication device such as a portable telephone, amplifies the power of an input signal RFin to a level required for transmission to a base station, and outputs it as an output signal RFout. The input signal RFin is, for example, a radio frequency (RF) signal modulated in accordance with a given communication system by an RFIC (Radio Frequency Integrated Circuit) or the like. The communication standards of the input signal RFin include, for example, 2G (2nd generation mobile communication system), 3G (3rd generation mobile communication system), 4G (4th generation mobile communication system), 5G (5th generation mobile communication system), LTE (Long Term Evolution)-FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex), LTE-Advanced, or LTE-Advanced Pro, and the frequency is, for example, several hundred MHz to several tens of GHz. Note that the communication standards and the frequency of the input signal RFin are not limited to these.

[0112] Figure 7 The illustrated power amplification circuit 100A has an amplification circuit 11 as a primary (driver stage) of a first amplification circuit and an amplification circuit 12 as a secondary (power stage) of a second amplification circuit. Further, the power amplification circuit 100A has a matching circuit 1 on the input side of the amplification circuit 11, a transformer 21 as a first transformer between the amplification circuit 11 and the amplification circuit 12, and a transformer 22 as a second transformer on the output side of the amplification circuit 12. Furthermore, the power amplification circuit 100A is provided with an inductor 5.

[0113] The matching circuit (MN: Matching Network) 1 takes the input signal RFin input to the input terminal 10 as an input. The matching circuit 1 matches the impedance of a circuit (not illustrated) provided in the front stage and the amplification circuit 11.

[0114] The amplification circuit 11 and the amplification circuit 12 amplify and output input signals, respectively. The amplification circuit 11 and the amplification circuit 12 are each configured of a transistor such as a heterojunction bipolar transistor (HBT). Alternatively, the amplification circuit 11 and the amplification circuit 12 can be configured of a field effect transistor (MOSFET) instead of the HBT. In this case, the collector, the base, and the emitter are read as the drain, the gate, and the source, respectively.

[0115] The power amplification circuit 100A includes a bias circuit 31 and a bias circuit 32. The bias circuit 31 supplies bias to the amplification circuit 11. The bias circuit 32 supplies bias to the amplification circuit 12.

[0116] The output terminal of the amplification circuit 11 is connected to one end of a primary winding of a transformer 21. The other end of the primary winding of the transformer 21 is connected to a power supply voltage VCC via an inductor 5. The power supply voltage Vcc is a power supply voltage controlled in accordance with an envelope of an RF signal. The power amplification circuit 100 operates by the power supply voltage varied in accordance with so-called envelope tracking. The primary winding of the transformer 21 and a secondary winding of the transformer 21 are electromagnetically coupled, and a signal on the primary winding side is transmitted to the secondary winding side.

[0117] A midpoint (center tap) of a primary winding of a transformer 22 is connected to the power supply voltage VCC. One end of a secondary winding of the transformer 22 is connected to the output terminal 20. The primary winding of the transformer 22 and the secondary winding of the transformer 22 are electromagnetically coupled, and a signal on the primary winding side is transmitted to the secondary winding side.

[0118] The power amplification circuit 100A includes a dispersion circuit 41 as a first dispersion circuit and a dispersion circuit 42 as a second dispersion circuit. The dispersion circuits 41 and 42 are provided in correspondence with a pair of differential signals as an output of the amplification circuit 12, respectively. The dispersion circuits 41 and 42 are connected to the bias circuit 32 of the power stage. The bias supplied to the amplification circuit 12 is controlled by the dispersion circuits 41 and 42. The dispersion circuits 41 and 42 adjust the power supply voltage dependence of the gain of the amplification circuit 12.

[0119] [Operation]

[0120] An input signal RFin input to the input terminal 10 is input to the amplification circuit 11 via the matching circuit 1. The amplification circuit 11 amplifies and outputs the input signal. The output signal of the amplification circuit 11 is a single-ended signal. The output signal of the amplification circuit 11 is input to one end of the primary winding of the transformer 21.

[0121] The signal on the secondary winding side of the transformer 21 is input to the amplification circuit 12. The amplification circuit 12 amplifies the signal input via the transformer 21. The amplification circuit 12 outputs the amplified signal as a pair of differential signals. The pair of differential signals output from the amplification circuit 12 is input to the primary winding side of the transformer 22. The output signal RFout as a single-ended signal is output from the secondary winding side of the transformer 22 to the output terminal 20.

[0122] The bias circuit 31 supplies bias (i.e., bias current or bias voltage) to the base or gate of the amplification circuit 11. The bias circuit 32 supplies bias (i.e., bias current or bias voltage) to the amplification circuits 12a, 12b which constitute the amplification circuit 12. The dispersion circuits 41 and 42 control the bias supplied to the amplification circuit 12 on the basis of the pair of differential signals output from the amplification circuit 12. Thus, the bias controlled by the dispersion circuits 41 and 42 is supplied to the amplification circuit 12.

[0123] Next, the configuration example of the bias circuit and the dispersion circuit in the Figure 7 will be described. Figure 8 is a view showing the configuration example of the bias circuit and the dispersion circuit in the Figure 7 . In the Figure 8 , the bias circuit 320 corresponds to the bias circuit 32 in the Figure 7 . The bias circuit 320 has transistors 135a, 135b which correspond to the transistor 135 in the Figure 3 . The bases of the transistors 135a, 135b are common. The emitter of the transistor 135a is connected to the amplification circuit 12a. The emitter of the transistor 135b is connected to the amplification circuit 12b.

[0124] Further, in the Figure 8 , the dispersion circuit 412 corresponds to the dispersion circuits 41 and 42 in the Figure 7 . That is, the dispersion circuit 412 has the functions of the two dispersion circuits 41 and 42. The dispersion circuit 412 has transistors Qda, Qdb which correspond to the transistor Qd. The bases of the transistors Qda, Qdb are common. The dispersion circuit 412 has resistance elements Rd_ca and Rd_cb which correspond to the resistance element Rd_c in the Figure 3 . The resistance value of the resistance element Rd_ca is, for example, 10 kΩ. The resistance value of the resistance element Rd_cb is, for example, 10 k.

[0125] In the Figure 8 , the amplification circuit 12a and the amplification circuit 12b which constitute the differential amplification circuit have the same configuration. Figure 8 The amplification circuit 12a in the Figure 7 corresponds to the amplification circuit 12a in the .Figure 8 The amplification circuit 12b in the Figure 7 The amplification circuit 12b in the

[0126] In the Figure 8 The amplification circuit 12a has a resistance element Rba, a transistor Qxa. Figure 8 The resistance element Rba in the Figure 3 The resistance element Rb in the Figure 8 The transistor Qxa in the Figure 3 The transistor Qx in the The collector of the transistor Qxa is connected to the collector of the transistor Qda via the resistance element Rd ca of the dispersion circuit 412.

[0127] Further, the amplification circuit 12a has a capacitor C la, a capacitor C2a, an inductor L la, and diode groups D la and D2a. The capacitor C la is provided at the input stage of the amplification circuit 12a, and blocks direct current. One end of the capacitor C2a and one end of the inductor L la are connected in series. The other end of the capacitor C2a is connected to the collector of the transistor Qxa. The other end of the inductor L la is connected to a reference potential. The diode groups D la and D2a are a plurality of diodes connected in series. The diode group D la is, for example, a structure in which two diodes are connected in series. The diode group D2a is, for example, a structure in which 10 diodes are connected in series. The anode side of the diode group D la is connected to the reference potential. The cathode side of the diode group D2a is connected to the reference potential.

[0128] In the Figure 8 The amplification circuit 12b has a resistance element Rbb, a transistor Qxb. Figure 8 The resistance element Rbb in the Figure 3 The resistance element Rb in the Figure 8 The transistor Qxb in the Figure 3 The transistor Qx in the The collector of the transistor Qxb is connected to the collector of the transistor Qdb via the resistance element Rd cb of the dispersion circuit 412.

[0129] Further, the amplification circuit 12b has a capacitor C lb, a capacitor C2b, an inductor L lb, and diode groups D lb and D2b. The capacitor C lb is provided at the input stage of the amplification circuit 12b, and blocks direct current. One end of the capacitor C2b and one end of the inductor L lb are connected in series. The other end of the capacitor C2b is connected to the collector of the transistor Qxb. The other end of the inductor L lb is connected to a reference potential. The diode groups D lb and D2b are a plurality of diodes connected in series. The diode group D lb is, for example, a structure in which two diodes are connected in series. The diode group D2b is, for example, a structure in which 10 diodes are connected in series. The anode side of the diode group D lb is connected to the reference potential. The cathode side of the diode group D2b is connected to the reference potential.

[0130] In the above configuration, the transistor Qxa of the amplification circuit 12a and the transistor Qxb of the amplification circuit 12b act independently of each other and output a differential signal. Therefore, it is possible to maintain symmetry of the differential signal.

[0131] The operation of the bias circuit 320 and the dispersion circuit 412 configured as above is the same as the operation of the bias circuit 32 and the dispersion circuit 4 described with reference to Figure 3 The operation of the bias circuit 320 and the dispersion circuit 412 configured as above is the same as the operation of the bias circuit 32 and the dispersion circuit 4 described with reference to

[0132] In the comparative example described with reference to Figure 2 In the power amplification circuit 100 of the comparative example described with reference to Figure 7 The power amplification circuit 100A according to the first embodiment shown in FIG. 1 has the dispersion circuit 41 and the dispersion circuit 42 corresponding to a pair of differential signals, respectively. Therefore, it is possible to maintain symmetry of the differential signal waveform with respect to the differential signal as the output of the amplification circuit 12. Therefore, even in the case where the output of the power amplification circuit is a differential signal, it is possible to achieve an appropriate gain dispersion characteristic.

[0133] (Second Embodiment)

[0134] Figure 9 is a view showing an example of a power amplification circuit 100B according to the second embodiment. As Figure 9 shown in FIG. 2, the power amplification circuit 100B of the second embodiment is different from the power amplification circuit 100A according to the first embodiment described with reference to Figure 7 the dispersion circuit 41 and the dispersion circuit 42 are connected to the bias circuit 31 of the drive stage. Thereby, the bias supplied to the amplification circuit 11 is controlled. That is, the power amplification circuit 100B further has another amplification circuit 11 provided in the front stage of the amplification circuit 12 as a differential amplification circuit, and the bias circuit 31 supplies the bias to the other amplification circuit 11.

[0135] Further, the output signal of the dispersion circuit 41 and the output signal of the dispersion circuit 42 are input to the bias circuit 31 after being combined at the connection point P44. By combining the differential signal as the output of the amplification circuit 12 before being input to the bias circuit 31, it is possible to remove the RF component. By removing the RF component, it is possible to derive only the direct current component and input to the bias circuit 31. Further, by inputting the output signal of the bias circuit 31 to the amplification circuit 11 of the drive stage, it is possible to suppress variation in linearity.

[0136] The power amplification circuit 100B according to the second embodiment has the dispersion circuit 41 and the dispersion circuit 42 corresponding to the pair of differential signals output from the amplification circuit 12, respectively. Therefore, regarding the differential signals as the output of the amplification circuit 12, it is possible to maintain the symmetry of the differential signal waveform. Therefore, even in the case where the output of the power amplification circuit is the differential signal, it is possible to achieve an appropriate gain dispersion characteristic.

[0137] (Third Embodiment)

[0138] Figure 10 is a view illustrating an example of the power amplification circuit 100C according to the third embodiment. As shown in Figure 10 the power amplification circuit 100C of the third embodiment has the dispersion circuit 41 as the first dispersion circuit and the dispersion circuit 42 as the second dispersion circuit, like the first embodiment. The dispersion circuits 41 and 42 are provided corresponding to the pair of differential signals as the output of the amplification circuit 12, respectively. The dispersion circuits 41 and 42 are connected to the bias circuit 32 of the power stage. The bias circuit 32 supplies bias to the amplification circuit 12. The bias supplied to the amplification circuit 12 is controlled by the dispersion circuits 41 and 42.

[0139] The power amplification circuit 100C has the first resistance element R1 provided corresponding to one of the pair of differential signals and the second resistance element R2 provided corresponding to the other of the pair of differential signals on the primary side of the transformer 22. One end of the first resistance element R1 and one end of the second resistance element R2 are connected at the connection point Pr. The other end of the first resistance element R1 is connected to the connection point Pr1. The other of the pair of differential signals is applied to the other end of the first resistance element R1. The other end of the second resistance element R2 is connected to the connection point Pr2. The other of the pair of differential signals is applied to the other end of the second resistance element R2.

[0140] In addition, the resistance value of the first resistance element R1 and the resistance value of the second resistance element R2 are substantially equal. By the term "substantially equal", it means that the resistance values are the same within the range of manufacturing variation of the first resistance element R1 and the second resistance element R2. The same applies to the following description. Because the resistance values of the first resistance element R1 and the second resistance element R2 are substantially equal, the connection point Pr becomes the midpoint of the synthetic resistance of the first resistance element R1 and the second resistance element R2 connected in series. At the connection point Pr as the midpoint, the dispersion circuits 41 and 42 are connected via the resistance element Rd_c as the third resistance element, and therefore the dispersion circuits 41 and 42 have no influence on the symmetry of the differential signals. In the present disclosure, regarding the resistance values of the resistance elements "substantially equal", it also includes the range where even if the error caused by the manufacturing variation is included, there is no influence on the design.

[0141] Here, if the first resistance element Rl and the second resistance element R2 and the resistance element Rd_c are focused on, the first resistance element Rl and the second resistance element R2 connect the dispersion circuits 41, 42 via the resistance element Rd_c after being connected at the connection point Pr for synthesizing the signals. Therefore, the total resistance value can be suppressed to be low compared to the circuit structure described with reference to Figure 8 The resistance value of the first resistance element Rl and the resistance value of the second resistance element R2 are, for example, 500 Ω, and the resistance value of the resistance element Rd_c is, for example, 5 kΩ.

[0142] Next, a structure example of the bias circuit, the dispersion circuit in Figure 10 will be described. Figure 11 is a view showing a structure example of the bias circuit, the dispersion circuit in Figure 10 . In Figure 10 , the bias circuit 320 corresponds to the bias circuit 32 in Figure 7 . The bias circuit 320 is the same structure as the bias circuit 320 described with reference to Figure 8 . The emitter of the transistor 135a is connected to the amplification circuit 12a. The emitter of the transistor 135b is connected to the amplification circuit 12b.

[0143] Further, in Figure 11 , the dispersion circuit 421 corresponds to the dispersion circuits 41 and 42 in Figure 10 . That is, the dispersion circuit 421 has the functions of the two dispersion circuits 41 and 42. The dispersion circuit 421 has transistors Qda, Qdb corresponding to the transistor Qd. The bases of the transistors Qda, Qdb are common. The collectors of the transistors Qda, Qdb are connected to the resistance element Rd_c. The resistance element Rd_c corresponds to the resistance element Rd_c in Figure 3 . Therefore, the resistance element Rd_c can be regarded as a part of the dispersion circuit 421. In addition, the resistance value of the resistance element Rd_c is, for example, 5 kΩ.

[0144] In Figure 11 , the amplification circuit 12a and the amplification circuit 12b constituting the differential amplification circuit have the same structure. Figure 11 The amplification circuit 12a in Figure 10 corresponds to the amplification circuit 12a in Figure 11 . The amplification circuit 12b in Figure 10 corresponds to the amplification circuit 12b in Figure 11 . The amplification circuits 12a, 12b in Figure 8 are the same structure as the amplification circuits 12a, 12b described with reference to

[0145] The collector of the transistor Qxa of the amplification circuit 12a is connected to the first resistance element Rl. The collector of the transistor Qxb of the amplification circuit 12b is connected to the second resistance element R2. One end of the first resistance element Rl and one end of the second resistance element R2 are connected at the connection point Pr. The resistance element Rd_c is connected at the connection point Pr. In this way, for the differential signal, by short-circuiting via the first resistance element Rl and the second resistance element R2, it is possible to apply only the in-phase component to the transistors Qda, Qdb of the dispersion circuit while excluding the influence on the transformer 22.

[0146] As described above, the connection point Pr is the midpoint of the combined resistance of the first resistance element Rl and the second resistance element R2 connected in series. At the connection point Pr, which is the midpoint, the dispersion circuit 421 is connected, and therefore the dispersion circuit 421 has no influence on the symmetry of the differential signal.

[0147] The operation of the bias circuit 320 and the dispersion circuit 421 configured as above is the same as the operation of the bias circuit 32 and the dispersion circuit 4 described with reference to Figure 3 the operation of the bias circuit 32 and the dispersion circuit 4 described with reference to

[0148] The operation of the bias circuit 320 and the dispersion circuit 421 configured as above is the same as the operation of the bias circuit 32 and the dispersion circuit 4 described with reference to Figure 10 and Figure 11 In the power amplification circuit 100C according to the third embodiment, as in the power amplification circuit 100B according to the second embodiment, the dispersion circuit 421 (41, 42) is connected to each terminal on the primary side of the transformer 22, which is the output transformer. The differential signal is transmitted via the resistance elements Rl, R2 connected to each terminal on the primary side of the transformer 22, and the differential signal is combined before being transmitted to the dispersion circuit 421. The RF component of the differential signal is removed by the resistance elements Rl, R2, and therefore only the DC component can be extracted. By combining the differential signal before connection to the dispersion circuit 421, it is possible to reduce the resistance value of the resistance element Rd_c of the dispersion circuit 421. Since the resistance value of the resistance element Rd_c can be reduced, it is possible to reduce the layout area of the power amplification circuit in the substrate. By using the resistance elements Rl and R2 to realize the midpoint, it is possible to suppress an increase in mounting area without providing a special pad or bump.

[0149] Furthermore, by connecting the dispersion circuit 421 to the connection point Pr, which is the midpoint, it is possible to separate the high-frequency signal, and therefore it is possible to reduce the resistance value of the resistance element Rd_c, which is part of the dispersion circuit 421. By reducing the resistance value of the resistance element Rd_c, it is possible to increase the slope of the solid lines SLl to SL4 described with reference to Figure 5 the operation of the bias circuit 32 and the dispersion circuit 4 described with reference to Figure 6 .

[0150] Generally, when a distributed circuit is connected to the output side of each amplification stage and the high-frequency signal lines, the resistance value of the distributed circuit needs to be set to the order of several kΩ to ensure isolation. In contrast, as in this disclosure, by connecting the distributed circuit at the connection point Pr, which serves as the midpoint, isolation can be ensured, thus reducing the resistance value to the order of several hundred Ω, and increasing the reference value. Figure 5 The slopes of the solid lines SL1 to SL4 are shown.

[0151] (Fourth implementation)

[0152] Figure 12 This is a diagram illustrating an example of a power amplifier circuit 100D according to the fourth embodiment. (See diagram for example.) Figure 12 As shown, the power amplifier circuit 100D of the fourth embodiment includes scattering circuits 41 and 42. Scattering circuits 41 and 42 are connected to the bias circuit 31 of the drive stage. The bias supplied to the amplifier circuit 11 is controlled by the scattering circuits 41 and 42. That is, the power amplifier circuit 100D also includes other amplifier circuits 11 provided before the amplifier circuit 12, which is a differential amplifier circuit, and the bias circuit 31 provides bias to these other amplifier circuits 11.

[0153] The power amplifier circuit 100D of the fourth embodiment, similar to that of the third embodiment, has a first resistor element R1 corresponding to one of the pair of differential signals and a second resistor element R2 corresponding to the other of the pair of differential signals on the primary side of the transformer 22. At the connection point Pr, which is the midpoint of the combined resistor connecting the first resistor element R1 and the second resistor element R2 in series, a scattering circuit 41, 42 is connected via a resistor element Rd_c, which is a third resistor element. Therefore, the scattering circuits 41, 42 do not affect the symmetry of the differential signals. Furthermore, similar to the third embodiment, the RF component of the differential signal can be removed by the resistor elements R1, R2, and only the DC component is derived. Because the resistance value of the resistor element Rd_c can be reduced, the layout area of ​​the power amplifier circuit in the substrate can be reduced.

[0154] (Fifth Embodiment)

[0155] Figure 13 This is a diagram illustrating an example of a power amplifier circuit 100E according to the fifth embodiment. (See diagram for example.) Figure 13 As shown, the power amplifier circuit 100E of the fifth embodiment includes an amplifier circuit 110 and an amplifier circuit 12. Both amplifier circuit 110 and amplifier circuit 12 are differential amplifier circuits. Amplifier circuit 110 is a driver stage amplifier circuit, and amplifier circuit 12 is a power stage amplifier circuit.

[0156] The power amplification circuit 100E has dispersion circuits 41 and 42. The dispersion circuits 41 and 42 are connected to the bias circuit 32 of the power stage. The bias supplied to the amplification circuit 12 is controlled by the dispersion circuits 41 and 42. That is, the bias circuit 32 supplies the bias to the amplification circuit 12 provided with another amplification circuit 12 disposed at the subsequent stage of the amplification circuit 110 which is a differential amplification circuit.

[0157] The matching circuit 1 of the power amplification circuit 100E has a transformer la. The primary side of the transformer la is connected to the input terminal 10. The secondary side of the transformer la becomes a differential signal. The secondary side of the transformer la is output to the amplification circuit 110. The differential signal is output from the secondary side of the transformer la. The amplification circuit 110 has amplification circuits 11a and 11b which constitute a differential amplification circuit. The differential signal output from the amplification circuits 11a and 11b is input to the transformer 21.

[0158] The transformer 21 is disposed between the amplification circuit 110 and the amplification circuit 12. The transformer 21 is disposed at the output side of the amplification circuit 110. The transformer 21 is disposed at the input side of the amplification circuit 12. The winding of the input side of the transformer 21 is connected to the output of the amplification circuit 11. The midpoint P21 of the winding of the input side of the transformer 21 is connected to the power supply potential Vcc via the inductor 5.

[0159] The power amplification circuit 100E has a first resistance element R1 disposed corresponding to one of a pair of differential signals and a second resistance element R2 disposed corresponding to the other of the pair of differential signals at the primary side of the transformer 21. One end of the first resistance element R1 and one end of the second resistance element R2 are connected at a connection point Pr. The other end of the first resistance element R1 is connected to the connection point Pr1. The other of the pair of differential signals is applied to the other end of the first resistance element R1. The other end of the second resistance element R2 is connected to the connection point Pr2. The other of the pair of differential signals is applied to the other end of the second resistance element R2.

[0160] In the fifth embodiment, the resistance values ​​of the first resistor R1 and the second resistor R2 are substantially equal. "Substantially equal" means that they are the same resistance value within the range of manufacturing deviations of resistors R1 and R2. Because the resistance values ​​of resistors R1 and R2 are substantially equal, the connection point Pr becomes the midpoint of the combined resistor connecting the first resistor R1 and the second resistor R2 in series. At this midpoint Pr, scattering circuits 41 and 42 are connected via resistor Rd_c, which is the third resistor. Therefore, scattering circuits 41 and 42 do not affect the symmetry of the differential signal. Furthermore, similar to the third embodiment, the RF component of the differential signal can be removed by resistors R1 and R2, deriving only the DC component. Because the resistance value of resistor Rd_c can be reduced, the layout area of ​​the power amplifier circuit in the substrate can be reduced.

[0161] (Sixth Embodiment)

[0162] Figure 14 This is a diagram illustrating an example of a power amplifier circuit 100F according to the sixth embodiment. (See diagram below.) Figure 14 As shown, the power amplifier circuit 100F of the sixth embodiment, like the power amplifier circuit 100D of the fourth embodiment, includes scattering circuits 41 and 42. Scattering circuits 41 and 42 are connected to the bias circuit 31 of the driver stage. The bias supplied to the amplifier circuit 11 is controlled by scattering circuits 41 and 42. Furthermore, scattering circuits 41 and 42 are connected to the bias circuit 32 of the power stage. The bias supplied to the amplifier circuit 12 is controlled by scattering circuits 41 and 42.

[0163] The power amplifier circuit 100F includes other amplifier circuits 11 provided as a pre-stage of the amplifier circuit 12, which serves as the differential amplifier circuit, and other bias circuits 31 provided corresponding to the amplifier circuit 11. The bias circuit 32 provides bias to the amplifier circuit 12, and the bias circuit 31 provides bias to the amplifier circuit 11. Furthermore, similar to the third embodiment, the RF component of the differential signal can be removed by resistors R1 and R2, leaving only the DC component. Because the resistance value of resistor Rd_c can be reduced, the layout area of ​​the power amplifier circuit in the substrate can be minimized.

[0164] (Regarding variations of the bias circuit)

[0165] Figure 15 as well as Figure 16 This is a diagram showing a modified example of the bias circuit. Figure 15 This indicates that the reference will be made. Figure 8 The diagram illustrates an example of replacing the bias circuit 32 of the power amplifier circuit 100A according to the first embodiment with a feedback type bias circuit 32b.

[0166] The bias circuit 32b has resistors 136a, 136b and a transistor 132a. One end of the resistor 136a is connected to the emitter of the transistor 135a. The other end of the resistor 136a is connected to the base of the transistor 132a. One end of the resistor 136b is connected to the emitter of the transistor 135b. The other end of the resistor 136b is connected to the base of the transistor 132a. The collector of the transistor 132a is connected to the base of the transistor 135a and the base of the transistor 135b. The emitter of the transistor 132a is connected to a reference potential. The other structure of the bias circuit 32b is the same as the bias circuit 32a described with reference to FIG. 6. Figure 5 The bias circuit 32b has resistors 136a, 136b and a transistor 132a. One end of the resistor 136a is connected to the emitter of the transistor 135a. The other end of the resistor 136a is connected to the base of the transistor 132a. One end of the resistor 136b is connected to the emitter of the transistor 135b. The other end of the resistor 136b is connected to the base of the transistor 132a. The collector of the transistor 132a is connected to the base of the transistor 135a and the base of the transistor 135b. The emitter of the transistor 132a is connected to a reference potential. The other structure of the bias circuit 32b is the same as the bias circuit 32a described with reference to FIG. 6.

[0167] The bias circuit 32b has resistors 136a, 136b and a transistor 132a. One end of the resistor 136a is connected to the emitter of the transistor 135a. The other end of the resistor 136a is connected to the base of the transistor 132a. One end of the resistor 136b is connected to the emitter of the transistor 135b. The other end of the resistor 136b is connected to the base of the transistor 132a. The collector of the transistor 132a is connected to the base of the transistor 135a and the base of the transistor 135b. The emitter of the transistor 132a is connected to a reference potential. The other structure of the bias circuit 32b is the same as the bias circuit 32a described with reference to FIG. 6.

[0168] Figure 16 is a view showing the bias circuit 32b of the power amplification circuit 100C according to the 3rd embodiment described with reference to FIG. 7. Figure 11 The bias circuit 32b has resistors 136a, 136b and a transistor 132a. One end of the resistor 136a is connected to the emitter of the transistor 135a. The other end of the resistor 136a is connected to the base of the transistor 132a. One end of the resistor 136b is connected to the emitter of the transistor 135b. The other end of the resistor 136b is connected to the base of the transistor 132a. The collector of the transistor 132a is connected to the base of the transistor 135a and the base of the transistor 135b. The emitter of the transistor 132a is connected to a reference potential. The other structure of the bias circuit 32b is the same as the bias circuit 32a described with reference to FIG. 6. Figure 15 The bias circuit 32b has resistors 136a, 136b and a transistor 132a. One end of the resistor 136a is connected to the emitter of the transistor 135a. The other end of the resistor 136a is connected to the base of the transistor 132a. One end of the resistor 136b is connected to the emitter of the transistor 135b. The other end of the resistor 136b is connected to the base of the transistor 132a. The collector of the transistor 132a is connected to the base of the transistor 135a and the base of the transistor 135b. The emitter of the transistor 132a is connected to a reference potential. The other structure of the bias circuit 32b is the same as the bias circuit 32a described with reference to FIG. 6.

Claims

1. A power amplifier circuit, comprising: A differential amplifier circuit operates by a power supply voltage that varies according to the amplitude of the signal. The bias circuit provides the bias to the differential amplifier circuit. The first and second distributed circuits are respectively configured to correspond to a pair of differential signals output from the differential amplifier circuit, and to adjust the dependence of the gain of the differential amplifier circuit on the power supply voltage. The first resistor is set corresponding to one of a pair of differential signals output from the differential amplifier circuit; and The second resistor is provided in correspondence with the other of the pair of differential signals. The resistance value of the first resistor and the resistance value of the second resistor are substantially equal. One end of the first resistor is connected to one end of the second resistor. One of the pair of differential signals is applied to the other end of the first resistor. The other of the pair of differential signals is applied to the other end of the second resistor. The first distributed circuit and the second distributed circuit are connected at the connection point between one end of the first resistor and one end of the second resistor.

2. The power amplifier circuit according to claim 1, wherein, It includes: a transformer, and a pair of differential signals input from the output of the differential amplifier circuit. The other end of the first resistor and the other end of the second resistor are connected to the primary side of the transformer.

3. The power amplifier circuit according to claim 1 or 2, wherein, The bias circuit provides the bias to the differential amplifier circuit.

4. The power amplifier circuit according to claim 1 or 2, wherein, Includes: other amplification circuitry, located after the differential amplifier circuit. The bias circuit provides the bias to the other amplifier circuits.

5. The power amplifier circuit according to claim 1 or 2, wherein, Includes: other amplification circuitry, located before the differential amplifier circuit. The bias circuit provides the bias to the other amplifier circuits.

6. The power amplifier circuit according to claim 1 or 2, wherein, have: Other amplification circuits are arranged in front of the differential amplifier circuit; and Other bias circuits are provided correspondingly to the other amplifier circuits. The bias circuit provides the bias to the differential amplifier circuit, and the other bias circuits provide bias to the other amplifier circuits.

7. The power amplifier circuit according to claim 1 or 2, wherein, The bias circuit has a feedback circuit that feeds back a portion of the bias provided to the differential amplifier circuit, and the bias circuit maintains the bias provided to the differential amplifier circuit as constant.

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