A special circuit for detecting the number and flight time of photons

Abstract

The invention discloses a special circuit for detecting the number of photons and the flight time. The circuit design is specifically a front-end readout circuit of an MCP detector with high spatiotemporal resolution, comprising a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module. Based on the advantage of a microchannel plate having no dark current, the input port does not need to filter noise, thereby simplifying the design. The input end adopts a transimpedance amplifier design, thereby increasing the bandwidth and shortening the circuit establishment time. The circuit has a high degree of integration and can obtain data with high spatiotemporal resolution without complex back-end digital signal processing. Compared with a traditional amplifier plus an analog-to-digital converter architecture, the overall chip occupies a small area and has a high pixel filling ratio.

Description

Technical Field

[0001] The present invention belongs to the technical field related to semiconductor image sensing, and in particular relates to a special circuit for detecting the number of photons and flight time. Background Art

[0002] Microchannel plates can be used to detect various particles such as electrons, ions, high-energy particles, neutrons, ultraviolet rays, X-rays, and high-energy electromagnetic waves.

[0003] MCP is a sheet structure composed of a large number of hollow capillaries (microchannels) arranged in two dimensions. The inner wall of the microchannel is treated so that secondary electrons can be generated when particles bombard it. During use, voltage is applied to both ends of the MCP to form an electric field inside the microchannel. The secondary electrons generated by particle bombardment will be accelerated by the electric field and bombard the microchannel again to generate more secondary electrons. This process is repeated many times in the same microchannel, and eventually a large number of electrons (called multiplied electrons) are output at the outlet.

[0004] The traditional pixel readout chip or pixel detection system mainly detects signals based on charge integration. For example, CCD, CMOS cameras, etc. integrate the charge through the capacitor connected to the photodiode, and read out the amplitude after integration through line-by-line scanning. This detection mode can only integrate and detect signals within a period of time, and cannot distinguish a single case. In addition, this method cannot effectively distinguish between signals and noise, and the signal-to-noise ratio is not high.

[0005] So far, the only area array photoelectric conversion device that can detect the weakest light signals is the single-photon detector, which has been widely used in various fields such as physics, chemistry, biology, astronomy, medicine, and environmental monitoring. In recent years, the instruments and equipment in the above-mentioned related fields have put forward higher requirements for single-photon detectors. In addition to having single-photon sensitivity, they can also perform high-precision time marking on the photons arriving at each moment, and simultaneously record the high-precision spatial two-dimensional coordinates of the photons, that is, they require three-dimensional high-temporal and spatial resolution detectors with single-photon sensitivity.

[0006] Since the microchannel plate can work in pulse counting mode and has a response time of tens of picoseconds and a spatial resolution of several microns, it has become one of the preferred array photoelectric conversion devices for single-photon detectors. Combining it with different charge distribution and processing devices can form a three-dimensional imaging detector with single-photon sensitivity. In addition, MCP has the advantages of being able to work in strong magnetic fields and having very small dark noise. Therefore, single-photon imaging detectors using MCP are widely used in the following typical military and civilian dual-use fields.

[0007] The existing technology has the following problems: the detector should have the characteristics of high spatial resolution, high temporal resolution, high counting rate and high integration. However, the existing MCP single-photon detector is limited by the signal readout circuit architecture and implementation method, and cannot meet the above requirements at the same time. Summary of the invention

[0008] The purpose of the present invention is to provide a special circuit for detecting the number of photons and the flight time, so as to solve the problem that the detector proposed in the above background technology should have the characteristics of high spatial resolution, high temporal resolution, high counting rate and high integration. However, the existing MCP single-photon detectors are limited by the signal readout circuit architecture and implementation method, and cannot meet the above requirements at the same time.

[0009] To achieve the above object, the present invention provides the following technical solutions:

[0010] A special circuit for detecting the number of photons and flight time, comprising a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module,

[0011] The circuit design is specifically a front-end readout circuit of an MCP detector with high temporal and spatial resolution, including a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module. The photocurrent signal from the detector passes through the signal input module and enters the front-end circuit, and then passes through the comparator module. The comparator converts the analog signal into a digital signal, and then the time-to-digital converter is used to calculate the flight time and the input charge amount.

[0012] The signal input module is composed of a transimpedance amplifier, a three-stage amplifier, and a common source structure. The open-loop amplifier is composed of three cascaded inverting amplifiers with a push-pull output structure.

[0013] The high-speed comparator module is composed of a pre-amplifier stage, a decision stage, and a buffer. The comparator of the op amp structure is composed of a multi-stage op amp cascade, followed by an inverter to drive the digital circuit. It has the advantages of high precision and small offset voltage.

[0014] The time-to-digital converter is composed of a coarse counting module, a fine counting module, a driver, and a logic circuit. The coarse counter is composed of a D flip-flop and a half adder, and the fine counter is composed of two voltage-controlled delay chains and a D flip-flop. The fine counter A calculates the time difference between the STOP rising edge and the CLK rising edge, and the fine counter B calculates the time difference between the STOP falling edge and the CLK rising edge. The coarse count A and the fine count A are used to calculate the flight time, and the coarse counts A, B and the fine counts A, B are used to calculate the charge amount. The coarse counting module can provide a large range of counting, and the fine counting module can provide a time accuracy of 50ps. The output results of the coarse counting and fine counting modules are output to the queue FIFO.

[0015] Preferably, the amplifier adopts a common source structure. In order to enable each stage of the amplifier to have the maximum transconductance and increase the gain-bandwidth product of the amplifier, the transistors Mp1~Mp3 and Mn1~Mn3 of the inverter structure amplifier are set to work in an amplification state, and the diode-connected transistors MD1~MD3 are used to set the DC level of the output end of each stage of the inverter. The resistor Rf is connected to the output and input ends of the open-loop amplifier, and voltage parallel negative feedback is introduced to reduce the input resistance of the open-loop amplifier.

[0016] Preferably, the FIFO uses a dual-port SRAM IP core as a data storage location, and adds read-write control logic to its outer layer and encapsulates it, thereby optimizing the FIFO to the greatest extent.

[0017] Compared with the prior art, the present invention provides a special circuit for detecting the number of photons and flight time, which has the following beneficial effects:

[0018] 1. Based on the advantage of the microchannel plate having no dark current, the input port does not need to filter noise, thus simplifying the design;

[0019] 2. The input end of the present invention adopts the design of a transimpedance amplifier, which can improve the bandwidth and the circuit has a shorter settling time;

[0020] 3. The circuit is highly integrated and can obtain data with high temporal and spatial resolution without complex back-end digital signal processing. Compared with the traditional amplifier plus analog-to-digital converter architecture, the overall chip occupies a small area and has a high pixel fill ratio. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0022] Figure 1 A schematic diagram of a pixel unit structure of a dedicated circuit for detecting the number of photons and flight time proposed by the present invention;

[0023] Figure 2 This is a schematic diagram of the structure of the transimpedance amplifier proposed by the present invention;

[0024] Figure 3 This is a schematic diagram of the structure of the full information time digital converter proposed by the present invention;

[0025] Figure 4 This is a timing diagram of pixel signals proposed by the present invention;

[0026] Figure 5 A schematic diagram of the structure of the queue FIFO proposed by the present invention;

[0027] Figure 6 It is the timing diagram of the fifo control signal proposed by the present invention; DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] The MCP high spatiotemporal resolution detector readout circuit of the present invention is fully compatible with the 0.18um CMOS process. The chip is described in detail below in conjunction with the accompanying drawings and implementation examples.

[0030] See also Figure 1-6 , the present invention provides a technical solution:

[0031] A special circuit for detecting the number of photons and flight time, comprising a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module, characterized in that:

[0032] The circuit design is specifically a front-end readout circuit of an MCP detector with high temporal and spatial resolution, including a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module. The photocurrent signal from the detector passes through the signal input module and enters the front-end circuit, and then passes through the comparator module. The comparator converts the analog signal into a digital signal, and then the time-to-digital converter is used to calculate the flight time and the input charge amount.

[0033] The signal input module is composed of a transimpedance amplifier, which is a three-stage amplifier with a common source structure. The open-loop amplifier is composed of three cascaded inverting amplifiers with a push-pull output structure.

[0034] The high-speed comparator module is composed of a pre-amplifier stage, a decision stage, and a buffer. The op amp structure comparator is composed of a multi-stage op amp cascade, followed by an inverter to drive the digital circuit. It has the advantages of high precision and small offset voltage.

[0035] The time-to-digital converter is composed of a coarse counting module, a fine counting module, a driver, and a logic circuit. The coarse counter is composed of a D flip-flop and a half adder, and the fine counter is composed of two voltage-controlled delay chains and a D flip-flop. The fine counter A calculates the time difference between the STOP rising edge and the CLK rising edge, and the fine counter B calculates the time difference between the STOP falling edge and the CLK rising edge. The coarse count A and the fine count A are used to calculate the flight time, and the coarse counts A, B and the fine counts A, B are used to calculate the charge. The coarse counting module can provide a large range of counting, and the fine counting module can provide a time accuracy of 50ps. The output results of the coarse counting and fine counting modules are output to the queue FIFO.

[0036] In order to enable each stage of the amplifier to have the maximum transconductance and increase the gain-bandwidth product of the amplifier, the transistors Mp1~Mp3 and Mn1~Mn3 of the inverter structure amplifier are set to work in the amplification state, the diode-connected transistors MD1~MD3 are used to set the DC level of the output end of each stage of the inverter, and the resistor Rf is connected between the output and input ends of the open-loop amplifier to introduce voltage parallel negative feedback to reduce the input resistance of the open-loop amplifier.

[0037] FIFO uses a dual-port SRAM IP core as the data storage location, and adds read and write control logic to its outer layer and encapsulates it to optimize the FIFO to the greatest extent.

[0038] Example

[0039] like Figure 1 As shown, a front-end readout circuit of a MCP detector with high temporal and spatial resolution includes an amplifier, a high-speed comparator, a time-to-digital converter, and a logic module. The photocurrent signal from the MCP enters the transimpedance amplifier through the PAD, and then passes through the comparator to output a digital signal. After the digital signal is processed by the time-to-digital converter, a series of digital signals are obtained, and finally the measurement result is obtained;

[0040] The present invention adopts 640M clock and 856mV reference voltage. When the pixel enters the working state, the trigger inside is reset to zero. A square wave start1 is input to the time digital converter to represent the start signal; Figure 2 As shown in the figure, when the photocurrent enters the input stage of the amplifier, the amplifier starts to work and outputs an analog voltage signal. The larger the photocurrent amplitude, the larger the output analog voltage signal amplitude. The analog voltage signal output by the amplifier and the reference voltage are used as the input of the comparator. The comparator intercepts a voltage signal and outputs a square wave stop. The length of the square wave represents the strength of the photocurrent, as shown in the figure. Figure 3As shown, the square wave enters the time-to-digital conversion module, the coarse count A calculates the distance t1 between start and stop, and the fine count A calculates the distance t2 between the rising edge of stop and the rising edge of the clock, then the flight time is tflight=t1-t2, and the coarse count B and the fine count B calculate the time between the rising edge of start and the falling edge of stop. The difference between the coarse count B and the coarse count is that the coarse count B uses a falling edge trigger to obtain the data signal, while the coarse count A uses a rising edge trigger to obtain the output signal. The difference between the fine count B and the fine count A is that the fine count B has one more inverter than the fine count A. The signal obtained by the fine count B is the output stop after passing through an inverter. The data collected by the coarse count A and the fine count A are t1 and t2, and the data collected by the coarse count B and the fine count B are t3 and t4. Then, the photon flight time is t_flight=t1-t2, and the amount of photogenerated charge Q generated is k[(t1-t2)-(t3-t4)]. k is a coefficient.

[0041] FIFO is mainly composed of four parts, namely RAM, read address counter, write address counter, read and write address comparator, and a small part of auxiliary circuits. When the front-end time-to-digital converter generates data, a write enable signal will be generated, which will cause the FIFO to store a set of data. The control signal timing diagram of FIFO is shown in the figure. Figure 6 As shown in the figure, before collecting data, RST_FIFO is set to zero; the signal output by the time-to-digital converter is input into the fifo (first in first out) queue through the buffer, and the write enable signal of the fifo is provided by the end delay chain of the fine count, so that the timing requirements can be met. The write enable signal can be set at different speeds according to the size of the array. When the read address and the write address are the same, it indicates that the FIFO is empty and no data is stored. When the read address is 1 bit more than the write address, it means that the FIFO is full.

[0042] The advantage of the present invention is that the flight time and charge amount can be measured simultaneously with high temporal and spatial resolution.

[0043] In traditional pixel detectors and their imaging modes, the information contained in each pixel is limited. In the charge integration imaging mode, each pixel is the integral result of the charges (energy) of multiple incident events and cannot represent a single event. In the single-photon counting imaging mode, each pixel represents the number of incident events over a period of time, and generally cannot distinguish a single event. Even in later single-photon resolution imaging products, each pixel in the same image can only represent either the arrival time of the incident event or the intensity of the incident event, and there is still information loss.

[0044] The square wave generated by the waveform output by the transimpedance amplifier after passing through the comparator is proportional to the amount of charge input to the electrode. The two are positively correlated and can be calculated by the length of the square wave through back-end digital signal processing. The traditional charge-sensitive amplifier has a relatively long recovery time and cannot obtain the input signal on the electrode during the recovery time. Therefore, a transimpedance amplifier was selected to achieve a design with high temporal and spatial resolution.

[0045] The traditional pixel unit front-end circuit is composed of sampling capacitors, switches, and voltage amplifiers. This structure wastes area and is difficult to design and manufacture. Moreover, each charge and discharge of the capacitor itself will increase power consumption. The smaller the sampling capacitor, the greater the thermal noise, because thermal noise is mainly generated by the on-resistance of the switch in the circuit, and the signal-to-noise ratio (SNR) of the circuit is reduced. If the sampling capacitor is large, the power consumption of the circuit will increase and the speed will slow down. At this time, the signal-to-noise ratio is mainly limited by the quantization noise limit and there is no improvement.

[0046] For the time-to-digital conversion circuit, the zero-crossing timing circuit can eliminate the time wandering caused by the change of signal amplitude, but the addition of the zero-crossing comparator will increase the integrated circuit area, increase power consumption and delay. After the delay is introduced, the accuracy of the time-to-digital converter will decrease. Moreover, the zero-crossing timing circuit can only eliminate the time wandering caused by the change of signal amplitude, but cannot eliminate the time wandering caused by the change of signal rise time. Therefore, the leading-edge trigger timing is still used, which has a simple structure, relatively small error and relatively high accuracy.

[0047] Theoretically, the larger the number of bytes in the FIFO, the better. However, considering the power consumption, pixel area, and the yield rate of the foundry production, a compromise must be made during the design.

[0048] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A special circuit for detecting the number of photons and flight time, comprising a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module, characterized in that: The circuit design is specifically a front-end readout circuit of an MCP detector with high temporal and spatial resolution, including a signal input module, a high-speed comparator module, a time-to-digital converter and a logic circuit module. The photocurrent signal from the detector passes through the signal input module and enters the front-end circuit, and then passes through the comparator module. The comparator converts the analog signal into a digital signal, and then the time-to-digital converter is used to calculate the flight time and the input charge amount. The signal input module is composed of a transimpedance amplifier, a three-stage amplifier, and a common source structure. The open-loop amplifier is composed of three cascaded inverting amplifiers with a push-pull output structure. The high-speed comparator module is composed of a pre-amplifier stage, a decision stage, and a buffer; The time digital converter is composed of a coarse counting module, a fine counting module, a driver, and a logic circuit. The coarse counter is composed of a D flip-flop and a half adder, and the fine counter is composed of two voltage-controlled delay chains and a D flip-flop. The square wave enters the time digital conversion module, and the coarse counting A calculates the distance t1 between start and stop, and the fine counting A calculates the distance t2 between the rising edge of stop and the rising edge of the clock. The coarse counting B and the fine counting B calculate the time elapsed between the rising edge of start and the falling edge of stop. The coarse counting B uses a falling edge trigger to obtain a data signal, and the coarse counting A uses a rising edge trigger to obtain an output signal. The fine counting B and the fine counting The difference between coarse counting A and fine counting B is that fine counting B has one more inverter than fine counting A. The signal obtained by fine counting B is stop output after passing through an inverter. The data collected by coarse counting A and fine counting A are t1 and t2, and the data collected by coarse counting B and fine counting B are t3 and t4. Then, the photon flight time is t_flight=t1-t2, and the photogenerated charge Q is k[(t1-t2)-(t3-t4)]; k is the coefficient. The coarse counting module can provide a large range of counting, and the fine counting module can provide a time accuracy of 50ps. The output results of the coarse counting and fine counting modules are output to the queue FIFO.

2. A special circuit for detecting the number of photons and the flight time according to claim 1, characterized in that: The amplifier adopts a common source structure. In order to enable each stage of the amplifier to have the maximum transconductance and increase the gain-bandwidth product of the amplifier at the same time, the transistors Mp1~Mp3 and Mn1~Mn3 of the inverter structure amplifier are set to work in an amplification state, the diode-connected transistors MD1~MD3 are used to set the DC level of the output end of each stage of the inverter, and the resistor Rf is connected to the output end and the input end of the open-loop amplifier, introducing voltage parallel negative feedback to reduce the input end resistance of the open-loop amplifier.

3. A special circuit for detecting the number of photons and flight time according to claim 1, characterized in that: The FIFO uses a dual-port SRAM IP core as a data storage location, and adds read-write control logic to its outer layer and encapsulates it, thereby optimizing the FIFO to the greatest extent.

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