A Low-Thickness Current-Tolerant SiC PIN Diode and Its Manufacturing Method

Abstract

The present invention provides a low-thickness current-resistant SiC PIN diode and a manufacturing method thereof. The diode includes: the lower side of an N-type heavily doped semiconductor transmission layer is connected to the upper side of an N-type ohmic electrode; the lower side of an N-type intrinsic layer is connected to the upper side of the N-type heavily doped semiconductor transmission layer; the lower side of a P-type heavily doped diamond transmission layer is connected to the upper side of the N-type intrinsic layer; the lower side of a P-type ohmic electrode is connected to the upper side of the P-type heavily doped diamond transmission layer; such that the thickness of the diode is reduced and the current-resistant ability is increased by four times.

Description

Technical Field

[0001] The present invention relates to a low-thickness current-resistant SiC PIN diode and a manufacturing method thereof. Background Art

[0002] Due to its superior physical properties, silicon carbide (SiC) material for SiC devices has received extensive attention and research. Its high-temperature high-power electronic devices have the advantages of high input impedance, fast switching speed, high operating frequency, high temperature and high voltage resistance, etc., and have been widely used in switching regulated power supplies, high-frequency heating, automotive electronics, power amplifiers and other aspects.

[0003] However, limited by the material properties, its intrinsic breakdown field strength is determined. The main way to improve the breakdown voltage of the PIN diode is to improve the terminal structure and obtain a PIN diode with higher breakdown voltage through the optimization of the doping method. Therefore, the improvement degree is very limited. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a low-thickness current-resistant SiC PIN diode and a manufacturing method thereof, so that the thickness of the diode is reduced and the current-carrying capacity is increased by four times.

[0005] One aspect of the present invention is implemented as follows: A low-thickness current-resistant SiC PIN diode, comprising:

[0006] An N-type ohmic electrode;

[0007] An N-type heavily doped semiconductor transmission layer, the lower side of the N-type heavily doped semiconductor transmission layer is connected to the upper side of the N-type ohmic electrode;

[0008] An N-type intrinsic layer, the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped semiconductor transmission layer;

[0009] A P-type heavily doped diamond transmission layer, the lower side of the P-type heavily doped diamond transmission layer is connected to the upper side of the N-type intrinsic layer;

[0010] And a P-type ohmic electrode, the lower side of the P-type ohmic electrode is connected to the upper side of the P-type heavily doped diamond transmission layer;

[0011] The doping concentration of the P-type heavily doped diamond transmission layer is 4 times that of the N-type intrinsic layer.

[0012] Further, the doping concentration of the P-type heavily doped diamond transmission layer is 2*10 19 cm -3 .

[0013] Further, the thickness of the P-type heavily doped diamond transmission layer is 2 microns.

[0014] The second aspect of the present invention is implemented as follows: A manufacturing method of a low-thickness current-resistant SiC PIN diode, comprising:

[0015] Step 1: Process the SiC epitaxial wafer to remove surface foreign matters and form a substrate;

[0016] Step 2: Epitaxially grow an N-type heavily doped semiconductor transmission layer on the surface of the substrate;

[0017] Step 3: Epitaxially grow an N-type intrinsic layer on the N-type heavily doped semiconductor transmission layer;

[0018] Step 4: Epitaxially grow a P-type heavily doped diamond transmission layer on the N-type intrinsic layer;

[0019] Step 5: Remove the substrate obtained according to the above steps through a substrate removal process;

[0020] Step 6: Evaporate and photolithographically fabricate an N-type ohmic electrode on the N-type heavily doped semiconductor transmission layer, and then evaporate and photolithographically fabricate a P-type ohmic electrode on the P-type heavily doped diamond transmission layer.

[0021] Further, Step 1 is further specifically: Rinse the surface of the SiC epitaxial wafer with deionized water, and then immerse it in a heated mixed cleaning solution for 1 minute to further remove the foreign matters on the surface of the SiC epitaxial wafer and form a substrate; the mixed cleaning solution includes ammonia water, hydrogen peroxide, and deionized water.

[0022] Further, the doping concentration of the P-type heavily doped diamond transmission layer is 2*10 19 cm -3 .

[0023] Further, the thickness of the P-type heavily doped diamond transmission layer is 2 microns.

[0024] The advantages of the present invention are as follows: The manufacturing method of a low-thickness current-resistant SiC PIN diode of the present invention reduces the thickness of the diode and increases the current-carrying capacity by four times. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The present invention will be further described below with reference to the accompanying drawings in conjunction with embodiments.

[0026] Figure 1 is a flowchart of a manufacturing method of a SiC PIN diode based on AlN according to the present invention;

[0027] Figure 2 is a schematic Figure 1 ;

[0028] Figure 3 Schematic of a manufacturing method of an AlN-based SiC PIN diode according to the present invention Figure 2 ;

[0029] Figure 4 Schematic of a manufacturing method of an AlN-based SiC PIN diode according to the present invention Figure 3 ;

[0030] Figure 5 Schematic of a manufacturing method of an AlN-based SiC PIN diode according to the present invention Figure 4 ;

[0031] Figure 6 Schematic of a manufacturing method of an AlN-based SiC PIN diode according to the present invention Figure 5 ;

[0032] Figure 7 Schematic of the diode manufactured by the manufacturing method of an AlN-based SiC PIN diode according to the present invention;

[0033] Figure 8 Schematic of the space charge region distribution of the conventional SiC PIN diode in the P-type transport layer and the intrinsic N-type region space charge region;

[0034] Figure 9 Schematic of the space charge region distribution of the reverse voltage space charge region of the diode according to the present invention extending into the diamond region. Specific embodiments

[0035] As Figures 1 to 7 shown, a manufacturing method of a low-thickness current-resistant SiC PIN diode according to the present invention includes:

[0036] Step 1: Rinse the surface of the SiC epitaxial wafer with deionized water, and then soak it in a heated mixed cleaning solution for 1 minute to further remove foreign matters on the surface of the SiC epitaxial wafer, forming a substrate; the mixed cleaning solution includes ammonia water, hydrogen peroxide, and deionized water;

[0037] Step 2: Epitaxially grow an N-type heavily doped semiconductor transport layer on the surface of the substrate;

[0038] Step 3: Epitaxially grow an N-type intrinsic layer on the N-type heavily doped semiconductor transport layer;

[0039] Step 4: Epitaxially grow a P-type heavily doped diamond transport layer on the N-type intrinsic layer, the doping concentration of the P-type heavily doped diamond transport layer is 2*10 19 cm -3 , and the thickness of the P-type heavily doped diamond transport layer is 2 microns;

[0040] Step 5: Remove the substrate obtained in the above steps through a substrate removal process;

[0041] Step 6: Evaporate and lithographically fabricate an N-type ohmic electrode on the N-type heavily doped semiconductor transport layer, and then evaporate and lithographically fabricate a P-type ohmic electrode on the P-type heavily doped diamond transport layer.

[0042] As Figure 7 shown, a low-thickness current-resistant SiC PIN diode of the present invention includes:

[0043] An N-type ohmic electrode;

[0044] An N-type heavily doped semiconductor transport layer, the lower side of the N-type heavily doped semiconductor transport layer is connected to the upper side of the N-type ohmic electrode;

[0045] An N-type intrinsic layer, the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped semiconductor transport layer, and the material of the N-type intrinsic layer is SiC;

[0046] A P-type heavily doped diamond transport layer, the lower side of the P-type heavily doped diamond transport layer is connected to the upper side of the N-type intrinsic layer, and the material of the P-type heavily doped diamond transport layer is P-type diamond;

[0047] And a P-type ohmic electrode, the lower side of the P-type ohmic electrode is connected to the upper side of the P-type heavily doped diamond transport layer.

[0048] The doping concentration of the P-type heavily doped diamond transport layer is 2*10 19 cm -3 .

[0049] The thickness of the P-type heavily doped diamond transport layer is 2 microns.

[0050] The structure of the diode of the present invention is a longitudinal structure and is a bipolar device. Compared with the diodes of the prior art under the same breakdown voltage level, the thickness of the device is reduced and the current capacity is also significantly improved.

[0051] On the basis of the original, the P-type heavily doped diamond transport layer is used to replace the P-type heavily doped SiC transport layer. The bandgap width of the diamond material is 5.5 eV, which is 1.7 times that of the SiC material. However, its critical breakdown field strength is 10 MV / cm, which is 4 times that of the SiC material. Then it means that under the same breakdown voltage level, its thickness can be reduced to one-fourth of that of SiC, and the thickness of the entire SiC PIN diode can be reduced. The reduction in thickness can increase the current capacity of the SiC PIN diode.

[0052] The thermal conductivity of the diamond material is 34.5 W / cm K, which is 9.3 times that of the SiC material. This means that in a longitudinal SiC PIN diode, the heat will not accumulate in the diamond layer, and the main heat distribution is determined by the SiC material, without degrading the thermal characteristics of the original SiC material.

[0053] The diamond material can achieve P-type heavy doping based on the existing process.

[0054] As Figure 8 shown, in the traditional SiC PIN diode, the pn junction space charge region formed when withstanding reverse voltage diffuses into the P-type transport layer and the N-type intrinsic layer structure. As Figure 9 shown, in the SiC PIN diode designed by the present invention, the pn junction space charge region formed when withstanding reverse voltage diffuses into the P-type heavily doped diamond transport layer and the N-type intrinsic layer structure. The thickness of the P-type heavily doped diamond transport layer of the present invention is much smaller than that of the SiC transport layer, and the concentration is also much larger than that of the SiC transport layer. The mobility of the diamond material is 2000 cm2 / Vs, which is 2 times that of the SiC material. Then this means that the current response ability of the SiC PIN diode can be improved, and its switching speed can be correspondingly increased. The P-type heavily doped diamond transport layer can reduce the thickness of the transport layer in terms of mechanism. The main reason is that a space charge region is formed when the PIN diode is reverse biased. The space charge region is distributed in the N-type intrinsic layer and the P-type heavily doped diamond transport layer. When the space charge region diffuses into the P-type heavily doped diamond transport layer, because the doping concentration of diamond is 4 times that of the N-type intrinsic layer, at the same voltage, the depth of the space charge region expansion in the P-type heavily doped diamond transport layer is one-fourth of that before replacement compared with the previous P-type heavily doped SiC transport layer. Therefore, for the same withstand voltage level, this structure can reduce the thickness.

[0055] Since the critical breakdown field strength of diamond is 4 times that of SiC, although its thickness is reduced by three-fourths, its withstand voltage characteristics still remain unchanged. Overall, the withstand voltage remains unchanged, the size is reduced, and at the same time, due to factors such as doping concentration, mobility, and thickness, the withstand voltage level remains unchanged. The thickness of this PIN diode is reduced, and the current capacity is increased by four times.

[0056] Although the specific embodiments of the present invention have been described above, those skilled in the art should understand that the specific embodiments we described are illustrative rather than used to limit the scope of the present invention. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present invention should all be covered by the scope protected by the claims of the present invention.

Claims

1. A low-thickness current-resistant SiC PIN diode, characterized in that: Comprising: An N-type ohmic electrode; An N-type heavily doped semiconductor transport layer, the lower side of the N-type heavily doped semiconductor transport layer being connected to the upper side of the N-type ohmic electrode; An N-type intrinsic layer, the lower side of the N-type intrinsic layer being connected to the upper side of the N-type heavily doped semiconductor transport layer; A P-type heavily doped diamond transport layer, the lower side of the P-type heavily doped diamond transport layer being connected to the upper side of the N-type intrinsic layer; And, a P-type ohmic electrode, the lower side of the P-type ohmic electrode being connected to the upper side of the P-type heavily doped diamond transport layer; The doping concentration of the P-type heavily doped diamond transport layer is 4 times that of the N-type intrinsic layer.

2. The low-thickness current-resistant SiC PIN diode according to claim 1, characterized in that: The doping concentration of the P-type heavily doped diamond transport layer is 2*10 19 cm -3 .

3. The low-thickness current-resistant SiC PIN diode according to claim 1, characterized in that: The thickness of the P-type heavily doped diamond transport layer is 2 microns.

4. A manufacturing method of a low-thickness current-resistant SiC PIN diode, characterized in that: Comprising: Step 1, treating the SiC epitaxial wafer to remove surface foreign matters to form a substrate; Step 2, epitaxially growing an N-type heavily doped semiconductor transport layer on the surface of the substrate; Step 3, epitaxially growing an N-type intrinsic layer on the N-type heavily doped semiconductor transport layer; Step 4, epitaxially growing a P-type heavily doped diamond transport layer on the N-type intrinsic layer; Step 5, removing the substrate obtained according to the above steps through a substrate removal process; Step 6, evaporating and photolithographically fabricating an N-type ohmic electrode on the N-type heavily doped semiconductor transport layer, and then evaporating and photolithographically fabricating a P-type ohmic electrode on the P-type heavily doped diamond transport layer.

5. The manufacturing method of a low-thickness current-resistant SiC PIN diode according to claim 4, characterized in that: The Step 1 is further specifically: rinsing the surface of the SiC epitaxial wafer with deionized water, then immersing it in a heated mixed cleaning solution for 1 minute to further remove foreign matters on the surface of the SiC epitaxial wafer to form a substrate; the mixed cleaning solution includes ammonia water, hydrogen peroxide and deionized water.

6. The manufacturing method of a low-thickness current-resistant SiC PIN diode according to claim 4, characterized in that: The doping concentration of the P-type heavily doped diamond transport layer is 2×10 19 cm -3 .

7. The manufacturing method of a low-thickness current-resistant SiC PIN diode according to claim 4, characterized in that: The thickness of the P-type heavily doped diamond transport layer is 2 microns.

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