Silicon carbide diode with reduced voltage drop and method of manufacturing the same

Abstract

Embodiments of the present disclosure relate to silicon carbide diodes with reduced voltage drop and methods of manufacturing the same. An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend in a direction into the solid body from the surface and bound a surface portion of the solid body between the first implanted region and the second implanted region. A Schottky contact is on the surface and in direct contact with the surface portion. An Ohmic contact is on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of dopant regions extending in the direction in succession with one another, the plurality of dopant regions being of the first conductivity type and having respective conductivity levels higher than a conductivity level of the bulk portion.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to an electronic device of silicon carbide (SiC) and a method of manufacturing thereof. BACKGROUND

[0002] On the market, switching devices known as JBS (Junction Barrier Schottky) diodes or MPS (Merged PiN Schottky) diodes have recently been proposed. These devices generally have a SiC substrate and comprise implanted regions having a conductivity opposite to that of the substrate (for example, for an N-type substrate, the implanted regions are P-type). In these devices, there are two different types of contact: ohmic contacts in the implanted regions, and Schottky contacts in the regions comprised between the implanted regions.

[0003] The above-mentioned characteristics make the JBS diodes particularly suitable for working in high-voltage power devices.

[0004] Figure 1 A lateral cross-sectional view of a MPS device 1 of known type is shown in a (triaxial) Cartesian reference frame having X, Y, Z axes.

[0005] The MPS device 1 comprises: a substrate 3 of SiC of N-type having a first doping concentration, provided with a surface 3a opposite to a surface 3b, and having a thickness approximately equal to 350 pm; a (epitaxially grown) drift layer 2 of SiC of N-type having a second doping concentration lower than the first doping concentration, the drift layer 2 extending above the surface 3a of the substrate 3 and having a thickness between 5 pm and 15 pm; an ohmic contact region 6 (for example, of nickel silicide) extending above the surface 3b of the substrate 3; a cathode metallization 16 extending above the ohmic contact region 6; an anode metallization 8 extending above a top surface 2a of the drift layer 2; a plurality of junction barrier (JB) elements 9 in the drift layer 2 facing the top surface 2a of the drift layer 2 and each comprising a respective P-type implanted region 9' and an ohmic contact 9" of metallic material; and an edge termination region or guard ring 10 (optional), (in particular, a P-type implanted region), completely surrounding the junction barrier (JB) elements 9.

[0006] A Schottky diode 12 is formed at the interface between the drift layer 2 and the anode metallization 8. In particular, the Schottky junction (i.e., the semiconductor-metal junction) is formed by direct electrical contact of a portion of the drift layer 2 with a respective portion of the anode metallization 8.

[0007] The region of the MPS device 1 comprising the JB elements 9 and the Schottky diode 12 (i.e., the region contained within the guard ring 10) is the active region 4 of the MPS device 1.

[0008] On the basis of the design of a JBS or MPS device, a potential barrier is created which is designed to protect the metal / SiC Schottky junction from the high electric fields generated in the SiC substrate. To this end, P implants 9' are integrated in the drift layer 2 which laterally delimit N-type surface portions of the SiC drift layer 2 which are positioned next to each other. With the metallization 8 deposited on the top surface of the drift layer 2, a Schottky junction is formed parallel to the PN junction.

[0009] In a forward-biased JBS device, the current flows in the non-depleted Schottky regions comprised between the P implants 9', preserving the unipolar mode of operation. In a reverse-biased, the conduction between the Schottky regions is inhibited by the pinch-off effect of the adjacent PN junctions. The reverse-bias characteristics of the JBS device are substantially identical to those of the PN junction. Obviously, the distance d between the P implants 9' should be chosen in an appropriate manner to optimize the trade-off between the potential drop in the ON state (which increases as the distance d decreases) and the current losses (which decrease as said distance d decreases). Figure 1

[0010] It is essential to minimize the conduction losses in discrete power devices in order to reduce the energy consumption of the circuits in which said devices are used. For this reason, the possibility of controlling the SBH (Schottky-Barrier Height) value is particularly important for controlling the potential drop of the Schottky diode. In particular, a reduction in the SBH value causes a significant reduction in the potential drop. However, the drawback of reducing the SBH value is a substantial increase in the leakage current in the reverse-biased. Therefore, the distance between the P+ implants 9' should be carefully designed.

[0011] US2015 / 0372093 provides a prior art solution in which a switching device, such as a JBS (Junction Barrier Schottky) diode, is described which has a solid body of silicon carbide of N type which houses P-type implant regions (similar to the regions 9' of Figure 1 The P implant regions extend in the solid body starting from its surface and delimit between them N+ doped surface portions, i.e. portions with a higher doping density than the bulk of the solid body. By adjusting the surface concentration of the solid body with the N+ implants it is possible to increase the surface electric field and reduce the Schottky barrier appropriately. This solution is therefore able to modify the surface electric field, improving the triggering characteristics of the device. However, the present applicant has found that the portions of the solid body which extend between the P implant regions below the surface portions with N+ implants exhibit a high ON resistance, which cancels out the advantages deriving from the N+ surface implants. SUMMARY

[0012] ​In various embodiments, the present disclosure provides a SiC electronic device and a method of manufacturing the same that overcomes the disadvantages of the prior art, particularly a device having a low voltage drop and high efficiency.

[0013] According to the present disclosure, an electronic device and a method of manufacturing the same are provided.

[0014] In at least one embodiment, an electronic device is provided, the electronic device comprising a solid body of silicon carbide having a surface and having a first conductivity type. First and second implanted regions have a second conductivity type and extend in a direction from the surface into the solid body and delimit a surface portion of the solid body between the first and second implanted regions. A Schottky contact metal portion is on the surface and in direct contact with the surface portion. An Ohmic contact metal portion is on the surface and in direct contact with the first and second implanted regions. The solid body comprises an epitaxial layer comprising the surface portion and a bulk portion, and the surface portion extends above the bulk portion. The surface portion comprises a plurality of doped sub-regions extending in the direction successively to each other, each sub-region having a respective conductivity level higher than a conductivity level of the bulk portion and the first conductivity type. The conductivity level of at least one of the doped sub-regions is different from the conductivity level of at least one other of the doped sub-regions.

[0015] In at least one embodiment, a method of manufacturing an electronic device is provided, the method comprising: providing a solid body of silicon carbide having a surface and having a first conductivity type; forming, by implanting a dopant having a second conductivity type, first and second implanted regions in the solid body, the first and second implanted regions each extending in a direction from the surface and delimiting a surface portion of the solid body between the first and second implanted regions, the solid body comprising an epitaxial layer comprising the surface portion and a bulk portion, the surface portion extending above the bulk portion; forming a Schottky contact metal portion on the surface and in direct contact with the surface portion; forming an Ohmic contact metal portion on the surface and in direct contact with the first and second implanted regions; and forming, by implanting a dopant having the first conductivity type respectively, a plurality of doped sub-regions in the surface portion, the plurality of doped sub-regions extending in the direction successively to each other, each doped sub-region having a respective conductivity level higher than a conductivity level of the bulk portion, the conductivity level of at least one of the doped sub-regions being different from the conductivity level of at least one other of the doped sub-regions. BRIEF DESCRIPTION OF DRAWINGS

[0016] For a better understanding of the present disclosure, reference is now made to the accompanying drawings, which are by way of illustration only and thus are not intended to limit the scope of the claims in any way, wherein: - Figure 1 shows a schematic cross-sectional view of a first embodiment of an electronic device according to the present disclosure; and - Figure 2 shows a schematic cross-sectional view of a second embodiment of an electronic device according to the present disclosure.

[0017] Figure 1 is a cross-sectional view of the principle physical structure of a JBS semiconductor device of known type;

[0018] Figure 2 is a cross-sectional view of the principle physical structure of a JBS semiconductor device according to the present disclosure; and

[0019] Figures 3A to 3C is a cross-sectional view of a wafer of semiconductor material in a subsequent step of manufacturing Figure 2 a JBS device according to the present disclosure. DETAILED DESCRIPTION

[0020] Figure 2 In a lateral cross-sectional view in a (three-axis) Cartesian reference frame of axes X, Y, Z, a basic cell of a JBS device (or diode) 50 according to one embodiment of the present disclosure is shown.

[0021] The JBS device 50 comprises: a substrate 53 of SiC of N-type having a first doping concentration, provided with a surface 53a opposite to a surface 3b, and having a thickness comprised between 50 pm and 350 pm, more particularly between 160 pm and 200 pm, for example equal to 180 pm; a (epitaxially grown) drift layer 52 of SiC of N-type having a second doping concentration lower than the first doping concentration, the drift layer 52 extending over the surface 53a of the substrate 53 and having a thickness comprised between, for example, 5 pm and 15 pm; an ohmic contact region or layer 56 (for example of silicid of nickel) extending over the surface 53b of the substrate 53; a cathode metallization 57, for example of Ti / NiV / Ag or Ti / NiV / Au, extending over the ohmic contact region 56; an anode metallization 58, for example of Ti / AlSiCu or Ni / AlSiCu, extending over a top surface 52a of the drift layer 52; a passivation layer 69 on the anode metallization 58 for protecting the anode metallization 58; a plurality of junction barrier (JB) elements 59 in the drift layer 52 facing the top surface 52a of the drift layer 52, and each comprising a respective P-type implantation region 59’ and an ohmic contact 59”.

[0022] Optionally, an edge termination region or guard ring (in particular a P-type implantation region, similar to the region 10 of Figure 1 is not illustrated in Figure 2

[0023] ​One or more Schottky diodes 62 are formed at the interface between the drift layer 52 and the anode metallization 58, adjacent to the implanted region 59'. In particular, a (semiconductor-metal) Schottky junction is formed by a portion of the drift layer 52 being in direct electrical contact with a corresponding portion of the anode metallization 58.

[0024] The region of the JBS device 50 comprising the JB element 59 and the Schottky diodes 62 (i.e. the region contained within the guard ring 60) is the active region 54 of the JBS device 50.

[0025] According to one aspect of the disclosure, the top portion of the drift layer 52 is enriched by a doped region 64 of N+ type with respect to the rest of the drift layer 52. For example, in the case where the drift layer has a doping level of the order of 10 16 at / cm 3 , the doping level of the doped region 64 can be higher than 1.5-10 16 at / cm 3 . The depth of the doped region 64 is equal to or less than the depth of the implanted region 59'; for example, the maximum depth dl of the implanted region 59', measured along the Z axis starting from the surface 52a, is comprised between 0.4 pm and 1 pm, and the maximum depth d2 of the doped region 64, measured along the Z axis starting from the surface 52a, is comprised between 0.4 pm and 1 pm.

[0026] The depth of the doped region 64 is equal to or less than the depth of the implanted region 59'. In fact, the purpose of the implantation of the region 64 is to reduce the electrical resistance related to the pinch-off of the current path of charge carriers between the implanted region 59'. The Applicant points out that extending said N+ implantation below the implanted region 59', although possible, does not bring important advantages, since the path of charge carriers in that region extends above the entire dimension of the layer 52. Moreover, a further N+ implantation below the implanted region 59' can reduce the breakdown of the device by changing the PN junction.

[0027] According to one aspect of the disclosure, the doped region 64 comprises three sub-regions 64a, 64b, 64c having respective doping levels. In detail:

[0028] The doping level of the sub-region 64a is between 1-10 16 at / cm 3 and 1-10 17 at / cm 3 , in particular approximately equal to 5-10 16 at / cm 3 .

[0029] The doping level of the sub-region 64b is between 1-10 17 at / cm3 To 1.10 20 at / cm 3 Between, especially approximately equal to 5.10 18 at / cm 3 ;as well as

[0030] The doping level of subregion 64c is 1.10 16 at / cm 3 To 1.10 17 at / cm 3 Between, especially approximately equal to 1.10 16 at / cm 3 .

[0031] The doping level of region 64a is important because, due to the increased surface electric field, region 64a is the region that primarily determines the reduction in the barrier height (bandgap) of the Schottky contact. Therefore, the doping level of region 64a is higher than that of the epitaxial layer. Conversely, region 64c represents the implanted "tail," and its value, in the limiting case, matches the doping level of the epitaxial layer.

[0032] Figure 2 The JBS device 50 can be referenced below. Figures 3A-3C Describe it in this way. Figures 3A-3C The diagram includes Figure 2 A portion of a wafer 100 comprising multiple basic units of the type shown.

[0033] Initially ( Figure 3A After forming a drift layer 52 on substrate 53 by epitaxial growth, for example, in a manner known per se, a hard mask having a window 102' is provided on the top surface 52a of the drift layer 52. Using window 102', one or more P-type implantations are performed, indicated by arrow 103, for example, with a dose of aluminum atoms of 1.0-10⁻⁶. 14 at / cm 2 Up to 1.0.10 15 at / cm 2 The energy ranges from 30 keV to 300 keV. A P-type implantation region 104 is thus formed. As described below, after the implanted P-dopant is activated, the P-type implantation region 104 will form. Figure 2 Region 59'. Typically, in this step, multiple implantations are performed with different energies and doses to position the dopant at the desired depth and concentration (specifically, to obtain a region uniformly doped in all directions). This is because, unlike silicon, in silicon carbide, the dopant species do not diffuse after thermal annealing. Therefore, it is important to position the dopant as defined during the design phase, differentiating the implantations based on energy and dose.

[0034] The guard ring 105 can optionally be formed simultaneously with the formation of the P-type implant regions 104. After removal of the hard mask 102 ( Figure 3B ), a further hard mask 108 is formed on the top surface 52a of the drift layer 52. The hard mask 108 is provided with a window 108' which exposes the region of the drift layer 52 comprised between the P-type implant regions 104. A step of masked implantation is then performed to change the conductivity of the surface region exposed through the window 108'. To this end, an N-type dopant (e.g. phosphorous) is implanted in the drift layer 52 on the upper surface 52a of the drift layer 52 (as schematized by the arrows 112) to form one or more implant regions 114 comprised between the respective implant regions 104. In particular, the implant regions 114 extend between the implant regions 104 and are adjacent to the implant regions 104.

[0035] In particular, Figure 3B The implant step comprises one or more successive implants performed at different energies, in particular two implants, in order to localize the implanted dopant species at respective depths of the drift layer 52 in order to form the sub-regions 64a-64c described previously.

[0036] In one embodiment, a single implant is performed, whereby it is possible to obtain a lowering of the Schottky barrier, an increase of the surface electric field and a reduction of the resistance of the pinch region between the regions 59', concentrating most of the charge here (in this case, the dose and energy of the implant are suitably chosen so that the implanted residual dose at the surface is equal to the dose normally used to lower the barrier, i.e. low dose and low energy). For example, the dose of the implant is between 1.0-10 13 at / cm 2 and 1.0-10 15 at / cm 2 , for example 1.0-10 14 at / cm 2 , and the energy is between 150 keV and 250 keV, for example 200 keV.

[0037] As a further embodiment of the present disclosure, two different implants are performed: one at low energy and low dose, dedicated to lowering the Schottky barrier; and one at high energy and high concentration, to localize additional charge at the pinch region between the regions 59'. The regions 64a and 64b are thereby formed; the formation of the region 64c is a direct result of the two implants, in particular as a "tail" of the second implant at high dose and high energy. By way of example, the dose of the first implant is between 1.0-10 11 and 1.0-10 13 , for example 1.0-10 12 ​), with an energy level between 10 keV and 20 keV (for example 15 keV), a second implantation dose between 1.0-10 13 and 1.0-10 15 (eg. 1.0-10 14 ), with an energy between 150 keV and 250 keV (for example 200 keV).

[0038] Then Figure 3C ), the hard mask 108 is removed and a thermal treatment of activation of the dopant species implanted in the steps of Figure 3B is performed, completing the formation of the sub-regions 64a-64c described with reference to Figure 2 The thermal treatment is performed at a temperature equal to or higher than 1600°C (in particular at 1600°C to 1800°C for 10-60 minutes) and causes the formation of the implanted regions 64 of Figure 2 .

[0039] The manufacturing of the JBS device 50 is completed through steps known per se, not constituting the subject of the present disclosure, so that the formation of the anode metallization 58 and of the cathode metallization 57 is not illustrated in the drawings, obtaining the JBS device 50 in Figure 2 .

[0040] The JBS device 50 described presents a number of advantages.

[0041] In particular, by reducing the resistance between the SBH value and the P+ implanted regions, the voltage drop of the Schottky diode is reduced, as can be seen from what has been described previously.

[0042] Finally, it is clear that modifications and / or additions of parts can be made to what has been described and illustrated herein, without thereby departing from the scope of the present disclosure.

[0043] For example, the material of the substrate 53 and / or of the epitaxial layer 52 can be one of the following: 4H-SiC, 6H-SiC, 3C-SiC, 15R-SiC.

[0044] Moreover, the implanted regions 64 can comprise only two sub-regions 64a and 64b, or the number of implanted sub-regions can be greater than three.

[0045] The electronic device (50) can be summarized as comprising a solid body (52, 53) of silicon carbide, having a surface (52a) and exhibiting a first conductivity type (N); a first implanted region (59') and a second implanted region (59') having a second conductivity type (P) and extending into the solid body (52, 53) from the surface (52a) in a direction (Z), a surface portion (64) of the solid body being delimited between the first implanted region (59') and the second implanted region (59'); a Schottky contact metal portion on the surface and in direct contact with the surface portion (64); and an ohmic contact metal portion on the surface and in direct contact with the first and second implanted regions (59'), wherein the solid body (52, 53) comprises an epitaxial layer (52) comprising said surface portion (64) and a bulk portion, the surface portion extending above the bulk portion, wherein the surface portion (64) alternately hosts: a doped sub-region (64a-64c) having the first conductivity type (N) and a higher level of conductivity than the level of conductivity of the bulk portion; and a plurality of doped sub-regions (64a-64c) extending in succession with each other in said direction (Z), each having the first conductivity type (N) and a respective level of conductivity higher than the level of conductivity of the bulk portion.

[0046] The doped sub-regions (64a-64c) can be layered, thus forming a stack of doped layers one after the other in said direction (Z).

[0047] The plurality of doped sub-regions (64a-64c) can comprise: a first sub-region (64a) extending into the epitaxial layer (52) from the surface (52a); a second sub-region (64b) extending in the epitaxial layer (52) adjacent to the first sub-region (64a) in said direction (Z); and a third sub-region (64c) extending in the epitaxial layer (52) adjacent to the second sub-region (64b) in said direction (Z).

[0048] The doped sub-regions (64a-64c) can have respective levels of conductivity such that the conductivity of the second sub-region (64b) is higher than the first sub-region (64a) and the third sub-region (64c).

[0049] The doping level of the first sub-region (64a) can be comprised between 1-10 16 at / cm 3 and 1-10 17 at / cm 3 ; the doping level of the second sub-region (64b) can be comprised between 1-10 17 at / cm 3 and 1-10 20 at / cm3 between 1 · 10 16 at / cm 3 to 1 · 10 17 at / cm 3 between.

[0050] The sum of the thicknesses of the first, second and third sub-regions (64a-64c) can be equal to or less than the thickness in said direction (Z) of each of the first and second implanted regions (59').

[0051] The material of the solid body can be one of: 4H-SiC, 6H-SiC, 3C-SiC, 15R-SiC.

[0052] The device can form a JBS (Junction Barrier Schottky) diode; said epitaxial layer (52) is a drift layer of said JBS diode.

[0053] The method of manufacturing an electronic device (50) can be summarized as comprising: providing a solid body (52, 53) of silicon carbide, the solid body (52, 53) having a surface (52a) and exhibiting a first conductivity type (N); forming, by implanting a dopant having a second conductivity type (P), a first implanted region (59') and a second implanted region (59') in the solid body (52, 53), the first implanted region (59') and the second implanted region (59') each extending in a direction (Z) starting from the surface (52a) and delimiting a surface portion (64) of said solid body between the first implanted region (59') and the second implanted region (59'); forming a Schottky contact metal portion on the surface (52a) and in direct contact with the surface portion (64); and forming an ohmic contact metal portion on the surface (52a) and in direct contact with the first and second implanted regions (59'), wherein the solid body (52, 53) comprises an epitaxial layer (52) comprising said surface portion (64) and a bulk portion, the surface portion extending above the bulk portion, wherein alternatively the method further comprises: a step of forming a doped sub-region (64a-64c) having the first conductivity type (N) and a conductivity level higher than the conductivity level of the bulk portion; or a step of forming a plurality of doped sub-regions (64a-64c) in the surface portion (64) by a respective implanting of a dopant having the first conductivity type (N), the plurality of doped sub-regions (64a-64c) extending in said direction (Z) one after the other, each doped sub-region (64a-64c) having a respective conductivity level higher than the conductivity level of the bulk portion.

[0054] The doped sub-regions (64a-64c) can be implanted in the form of a layer, thereby forming a stack of doped layers one after the other in said direction (Z).

[0055] Forming said plurality of doped sub-regions (64a-64c) can comprise forming a first sub-region (64a) in the epitaxial layer (52) starting from the surface (52a); forming a second sub-region (64b) in the epitaxial layer (52) adjacent to the first sub-region (64a) along said direction (Z); and forming a third sub-region (64c) adjacent to the second sub-region (64b) along said direction (Z), the third sub-region (64c) extending in the epitaxial layer (52).

[0056] The implantation can be designed in such a way that the electrical conductivity of the second sub-region (64b) is higher than the first sub-region (64a) and the third sub-region (64c).

[0057] Forming the first sub-region (64a) can comprise performing a first implantation with an energy comprised between 10 keV and 20 keV; and forming the second and third sub-regions (64b, 64c) can comprise performing a second implantation with an energy comprised between 150 keV and 250 keV.

[0058] Forming the first sub-region (64a) can comprise performing a first implantation with an implantation dose comprised between 1.0-10 11 at / cm 2 and 1.0-10 13 at / cm 2 ; and forming the second and third sub-regions (64b, 64c) can comprise performing a second implantation with an implantation dose comprised between 1.0-10 13 at / cm 2 and 1.0-10 15 at / cm 2 .

[0059] The first, second and third sub-regions (64a-64c) can be formed in such a way that the sum of the thicknesses of the first, second and third sub-regions (64a-64c) is equal to or less than the thickness in said direction (Z) of each of the first and second implantation regions (59').

[0060] The material of the solid body can be one of the following: 4H-SiC, 6H-SiC, 3C-SiC, 15R-SiC.

[0061] The method can further comprise a step of forming a JBS (Junction Barrier Schottky) diode; said epitaxial layer (52) being a drift layer of said JBS diode.

[0062] The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above detailed description. In general, in the appended claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and claims, but should be construed to include all embodiments falling within the scope of the claims and their equivalents. Accordingly, the claims are not limited by the disclosure.

Claims

1. An electronic device, comprising: The solid bulk of silicon carbide has a surface and has a first type of conductivity; A first injection region and a second injection region, the first injection region and the second injection region having a second conductivity type, and extending in one direction from the surface into the solid body, and defining a surface portion of the solid body between the first injection region and the second injection region; The Schottky contact metal portion is on the surface and in direct contact with the surface portion; as well as The ohmic contact metal portion is on the surface and is in direct contact with the first injection region and the second injection region; The solid body includes an epitaxial layer comprising a surface portion and a body portion, the surface portion extending over the body portion, and The surface portion includes a plurality of doped sub-regions that extend sequentially to each other in the direction, each doped sub-region having the first conductivity type and a corresponding conductivity level higher than that of the body portion, and at least one doped sub-region having a conductivity level different from that of at least one other doped sub-region.

2. The electronic device of claim 1, wherein the doped subregions are layered to form a stack of doped layers, the doped layers being one after another in the direction.

3. The electronic device according to claim 1, wherein the plurality of doped sub-regions comprise: A first sub-region extends from the surface into the epitaxial layer; a second sub-region extends adjacent to the first sub-region in the epitaxial layer along the direction. And a third sub-region, which extends in the epitaxial layer adjacent to the second sub-region along the direction.

4. The electronic device of claim 3, wherein the second sub-region has higher conductivity than the first sub-region and the third sub-region.

5. The electronic device according to claim 4, wherein: The first sub-region has 1.10 16 at / cm 3 To 1.10 17 at / cm 3 The doping levels between 1.10 and 1.10, the second sub-region has a doping level between 1.10 and 1.

10. 17 at / cm 3 To 1.10 20 at / cm 3 The doping levels between, and the third sub-region having a doping level of 1.10 16 at / cm 3 To 1.10 17 at / cm 3 The conductivity levels between them.

6. The electronic device of claim 3, wherein the sum of the thicknesses of the first sub-region, the second sub-region, and the third sub-region is equal to or less than the thickness of each injection region in the first injection region and the second injection region in the direction.

7. The electronic device according to claim 1, wherein the material of the solid body is one of 4H-SiC, 6H-SiC, 3C-SiC, or 15R-SiC.

8. The electronic device according to claim 1, wherein the device forms a junction barrier Schottky (JBS) diode, and the epitaxial layer is a drift layer of the JBS diode.

9. A method for manufacturing an electronic device, comprising: A solid body of silicon carbide is provided, the solid body having a surface and having a first type of conductivity; By implanting a dopant having a second conductivity type, a first implantation region and a second implantation region are formed in the solid body, the first implantation region and the second implantation region each extending in one direction from the surface and defining a surface portion of the solid body between the first implantation region and the second implantation region, the solid body including an epitaxial layer including the surface portion and a body portion, the surface portion extending over the body portion; A Schottky contact metal portion is formed on the surface and in direct contact with the surface portion; as well as An ohmic contact metal portion is formed on the surface and in direct contact with the first injection region and the second injection region; as well as By implanting dopants having the first conductivity type, a plurality of doped sub-regions are formed in the surface portion, the plurality of doped sub-regions extending sequentially to each other in the direction, each doped sub-region having a corresponding conductivity level higher than the conductivity level of the body portion, and at least one doped sub-region having a conductivity level different from that of at least one other doped sub-region.

10. The method of claim 9, wherein the doped subregions are implanted in the form of layers to form a stack of doped layers, the doped layers being one after another in the direction.

11. The method of claim 9, wherein forming the plurality of doped sub-regions comprises: A first sub-region is formed in the epitaxial layer starting from the surface; A second sub-region is formed in the epitaxial layer adjacent to the first sub-region along the said direction; as well as A third sub-region is formed, which extends in the epitaxial layer adjacent to the second sub-region along the direction.

12. The method of claim 11, wherein the second sub-region has higher conductivity than the first sub-region and the third sub-region.

13. The method according to claim 12, wherein: Forming the first sub-region includes performing a first injection at an energy between 10 keV and 20 keV; and Forming the second and third sub-regions involves performing a second injection at an energy between 150 keV and 250 keV.

14. The method according to claim 12, wherein: Forming the first sub-region includes using 1.0·10 11 at / cm 2 Up to 1.0.10 13 at / cm 2 The first injection is performed between the injection doses; and The formation of the second sub-region and the third sub-region includes [the following] in 1.0·10 13 at / cm 2 Up to 1.0.10 15 at / cm 2 The second injection is performed between the injection doses.

15. The method of claim 11, wherein the first sub-region, the second sub-region, and the third sub-region are formed such that the sum of the thicknesses of the first sub-region, the second sub-region, and the third sub-region is equal to or less than the thickness of each injection region in the first injection region and the second injection region in the direction.

16. The method according to claim 9, wherein the material of the solid body is one of 4H-SiC, 6H-SiC, 3C-SiC, or 15R-SiC.

17. The method of claim 9, further comprising: A junction barrier Schottky (JBS) diode is formed, wherein the epitaxial layer is the drift layer of the JBS diode.

18. A device comprising: A semiconductor body having a first conductivity type, the semiconductor body comprising a body portion and an epitaxial layer on the body portion, the epitaxial layer having a surface; A first injection region and a second injection region, the first injection region and the second injection region having a second conductivity type and extending from the surface into the semiconductor body; A first ohmic contact and a second ohmic contact, the first ohmic contact and the second ohmic contact being on the surface and extending at least partially into the first injection region and the second injection region, respectively; A doped sub-region extends between the first implanted region and the second implanted region, the doped sub-region entering the epitaxial layer from the surface, and has the first conductivity type and a conductivity level higher than that of the bulk portion; as well as A metal layer is located on the epitaxial layer and is in direct contact with the doped subregion at the first ohmic contact and the second ohmic contact.

19. The device of claim 18, wherein the doped sub-region comprises a plurality of doped layers, each of the doped layers having the first conductivity type and a conductivity level higher than that of the body portion, and the conductivity level of at least one of the doped layers being different from the conductivity level of at least one other doped layer.

20. The device of claim 19, wherein the doped sub-region comprises a first doped layer having a first conductivity, a second doped layer having a second conductivity, and a third doped layer having a third conductivity, wherein the second conductivity is greater than the first conductivity and the third conductivity.

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