Upper arm drive circuit and its control method

Abstract

This invention provides an upper arm drive circuit and its control method, which can maintain the gate voltage of the upper arm switching element in a power conversion device having a bridge circuit composed of upper and lower arms without using a latching circuit, while also achieving miniaturization, lightweight design, and high reliability of the power conversion device. The upper arm drive circuit for driving and controlling the upper arm switching element of the power conversion device is characterized by having: a capacitor connected between the gate of the upper arm switching element and the output terminal of the power conversion device; an anti-reverse current circuit connected between the power supply of the power conversion device and the capacitor, allowing current to flow from a first terminal connected to the power supply side to a second terminal connected to the capacitor side, and preventing reverse current flow from the second terminal side to the first terminal side; and a capacitor charging switch element connected in series between the power supply and the capacitor and the first or second terminal side of the anti-reverse current circuit, which is turned on synchronously with the command signal that turns on the upper arm switching element.

Description

Technical Field

[0001] This invention relates to the structure and control of a drive circuit for driving a power conversion device (inverter), and particularly to a technology that can be effectively applied to the upper arm drive circuit of a power conversion device. Background Technology

[0002] With increasing global awareness of environmental protection and higher demands for energy conservation, power conversion devices (inverters) have been widely adopted in various fields. Moreover, in power conversion devices (inverters) installed in drive systems of railway vehicles, air conditioners, etc., miniaturization, lightweight design, high reliability, high performance, and high efficiency have become important issues.

[0003] To achieve miniaturization and weight reduction of power conversion devices (inverters), the application of low-loss power equipment is crucial. This includes replacing power equipment using silicon (Si) as the substrate and expanding the application of low-loss power equipment using silicon carbide (SiC). Furthermore, efforts are underway to develop cooling methods that improve the cooling efficiency of power equipment and to achieve miniaturization and weight reduction based on reducing the number of components inside the inverter.

[0004] As background technology in this field, there is, for example, the technology in Patent Document 1. Patent Document 1 discloses "a level shifting circuit comprising: one or more controllable semiconductor elements, wherein an electrode serving as a potential reference is connected to a common potential, and during the period when a conduction signal is input between the potential reference electrode and a control electrode, the potential reference electrode and a main electrode are in a conducting state; a DC power supply, one terminal of which is connected to a predetermined portion of an external circuit that varies between the common potential and a predetermined high potential, maintaining a voltage lower than the voltage between the two potentials; and one or more load resistors, one end of which is connected to the other terminal of the DC power supply, and the other end is connected one-to-one to the main electrode of the controllable semiconductor element." Electrodes; and logic circuits, which operate under the aforementioned DC power supply, input pulse-shaped conduction signals to the control electrodes of each of the aforementioned controllable semiconductor elements. The conduction of each corresponding controllable semiconductor element at this time will transmit the pulse-shaped voltage drop generated by the load resistor corresponding to the controllable semiconductor element as a signal to the aforementioned logic circuit. In this case, a current negative feedback resistor is inserted between the potential reference electrode of each controllable semiconductor element and the common potential, so that the voltage between the control electrode and the common potential when each controllable semiconductor element is turned on is a predetermined value smaller than the voltage of the aforementioned DC power supply.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2005-51821 Summary of the Invention

[0008] The problem that the invention aims to solve

[0009] As mentioned above, in power conversion devices (inverters) installed in the drive systems of railway vehicles, air conditioners, etc., miniaturization, lightweighting, and high reliability have become important issues.

[0010] According to the aforementioned Patent Document 1, a small and differential drain (or collector) current can flow regardless of the voltage between the drain and source (or collector and emitter) of a high-voltage transistor. This allows for a stable signal transmission by appropriately maintaining a voltage drop across the load resistor regardless of the potential level of the circuit section experiencing potential fluctuations. However, because an RS latch is used, a pulse signal generation circuit (on signal 25, off signal 26) is required to generate a pulse signal to the RS latch, or a reset signal generation circuit (reset terminal 21) is needed to generate a reset signal to the RS latch. This prevents the circuit size from being reduced, hindering the miniaturization and weight reduction of the power conversion device (inverter). Furthermore, if the RS latch reacts due to input noise or other erroneous signals, it may maintain a state different from the intended state, leading to erroneous operation of the power conversion device.

[0011] Therefore, the purpose of this invention is to provide an upper arm drive circuit and its control method, which can maintain the gate voltage of the upper arm switching element in a power conversion device having a bridge circuit composed of upper and lower arms without using a latching circuit, and can also achieve the miniaturization, lightweighting and high reliability of the power conversion device.

[0012] Solution for solving the problem

[0013] To address the aforementioned issues, the present invention provides an upper arm drive circuit that drives and controls an upper arm switching element of a power conversion device. The circuit is characterized by comprising: a capacitor connected between the gate of the upper arm switching element and the output terminal of the power conversion device; an anti-reverse current circuit connected between the power supply of the power conversion device and the capacitor, allowing current to flow from a first terminal connected to the power supply side to a second terminal connected to the capacitor side, and preventing reverse current flow from the second terminal side to the first terminal side; and a capacitor charging switch element connected in series between the power supply and the capacitor, and connected in series with either the first or second terminal side of the anti-reverse current circuit, and activated synchronously with a command signal that turns on the upper arm switching element.

[0014] Furthermore, the present invention provides a control method for an upper arm drive circuit, wherein the upper arm drive circuit drives and controls the upper arm switching element of a power conversion device. The control method for the upper arm drive circuit is characterized by comprising the following steps: (a) turning on the power supply of the power conversion device; (b) charging a capacitor connected between the gate of the upper arm switching element and the output terminal of the power conversion device in sync with a command signal that turns on the upper arm switching element of the power conversion device; (c) during the period when the upper arm switching element of the power conversion device is in the on state, suppressing the discharge from the capacitor to the power supply side of the power conversion device by an anti-reverse current circuit connected between the capacitor and the power supply of the power conversion device, and maintaining the on state of the upper arm switching element of the power conversion device; and (d) discharging the charge of the capacitor in sync with a command signal that turns off the upper arm switching element.

[0015] Invention Effects

[0016] According to the present invention, an upper arm drive circuit and its control method can be realized in a power conversion device having a bridge circuit composed of upper and lower arms, which can maintain the gate voltage of the upper arm switching element without using a latching circuit, and can achieve both miniaturization, lightweighting and high reliability of the power conversion device.

[0017] The following description of the implementation method clarifies issues, structures, and effects other than those described above. Attached Figure Description

[0018] Figure 1 This is a diagram showing a schematic structure of the upper arm drive circuit of Embodiment 1 of the present invention.

[0019] Figure 2 This is a timing diagram illustrating the operation of the upper arm drive circuit according to Embodiment 1 of the present invention.

[0020] Figure 3 It means Figure 1 A diagram illustrating a specific example of an upper arm drive circuit. (Example 1)

[0021] Figure 4 It means Figure 1 A diagram illustrating a specific example of an upper arm drive circuit. (Example 2)

[0022] Figure 5 It means Figure 1 A diagram illustrating a specific example of an upper arm drive circuit. (Example 3)

[0023] Figure 6 It means Figure 1 A diagram illustrating a specific example of an upper arm drive circuit. (Example 4)

[0024] Figure 7This is a diagram showing a schematic structure of the upper arm drive circuit of Embodiment 2 of the present invention.

[0025] Figure 8 This is a timing diagram illustrating the operation of the upper arm drive circuit in Embodiment 2 of the present invention.

[0026] Figure 9 It means Figure 7 A diagram illustrating a specific example of an upper arm drive circuit. (Example 5)

[0027] Figure 10 It means Figure 7 A diagram illustrating a specific example of an upper arm drive circuit. (Example 6)

[0028] Figure 11 It means Figure 7 A diagram illustrating a specific example of an upper arm drive circuit. (Example 7)

[0029] Figure 12 This is a diagram showing a schematic structure of the upper arm drive circuit of Embodiment 3 of the present invention.

[0030] Figure 13 This is a timing diagram illustrating the operation of the upper arm drive circuit in Embodiment 3 of the present invention.

[0031] Figure 14 It means Figure 12 A diagram illustrating a specific example of an upper arm drive circuit. (Example 8)

[0032] Figure 15 This is a diagram showing a schematic structure of an existing upper arm drive circuit.

[0033] Figure 16 It is a timing diagram representing the operation of the existing upper arm drive circuit.

[0034] In the picture:

[0035] 1—Upper arm drive circuit, 2—Capacitor, 3—Anti-reverse current circuit, 4—Switching element (switching element for capacitor charging), 5—Upper arm, 6—Switching element (upper arm switching element), 7—Return current diode, 8—Main power supply, 9—Switching element (switching element for capacitor discharging), 10—Lower arm, 11—Switching element (lower arm switching element), 12—Return current diode, 13—Output terminal, 14—Load (coil), 15—Diode, 16—Switching element (anti-reverse current switching element), 17—Switching element (anti-reverse current switching element), 18—Resistor, 19—Capacitor, 20—Delay circuit, 21—Resistor, 22—Switching element (switching element for delay circuit), 23—Voltage limiting circuit, 24—Zener diode, 25—Power supply for control circuit, 26—Diode, 27—Capacitor. 28—Latch circuit, 29—Buffer, 30—Upper arm ON signal, 31—Upper arm OFF signal, 33—Delay signal, 34—Upper arm ON pulse signal, 35—Upper arm OFF pulse signal, 36—First terminal, 37—Second terminal, VCC—Power supply voltage for control circuit, VS—Power supply voltage, VC—Capacitor charging voltage, VCB—Capacitor charging voltage, VCP—Positive side voltage of capacitor 2 (against GND potential), VGE—Gate voltage (of switching element 6), VOUT—Output terminal voltage, VB—Positive side voltage of capacitor 27 (against GND potential), VTH_SW1—Threshold voltage (of switching element 6), VL—Limiting voltage of voltage limiting circuit, ISW3—Current current (of switching element 4), ISW4—Current current (of switching element 9). Detailed Implementation

[0036] Hereinafter, embodiments of the present invention will be described using the accompanying drawings. Furthermore, in the drawings, the same structures are labeled with the same symbols, and detailed descriptions of repeated parts are omitted.

[0037] Example 1

[0038] First, refer to Figure 15 and Figure 16 The topic of the aforementioned existing power conversion device (inverter) will be explained in detail. Figure 15 This is a diagram showing a schematic structure of the upper arm drive circuit of an existing power conversion device. Figure 16 It is a sequence diagram representing its actions.

[0039] Furthermore, in the following description, an example of a half-bridge circuit consisting of only one bridge arm will be used as the power conversion device. The bridge arm has an upper and lower arm consisting of a switching element and a return diode connected in antiparallel with it. However, the scope of the present invention is not limited to this. It can also be applied to a power conversion device that forms a full-bridge structure by connecting another half-bridge circuit bridge arm, forms an H-bridge circuit by connecting a load to the neutral point of each bridge arm, and further forms a three-phase full-bridge circuit by connecting another bridge arm and connecting the output terminals (U phase, V phase, W phase) of three-phase AC to the neutral point of each bridge arm.

[0040] exist Figure 15 In the middle, the switching element 6 is the upper arm switching element of the power conversion device.

[0041] like Figure 15 As shown, in existing power conversion devices, the upper arm drive circuit generally consists of a control circuit power supply 25, a diode 26, a capacitor 27, a latch circuit 28, and a buffer 29. Diode 26 is connected between the control circuit power supply 25 and the capacitor 27. The power supply terminals of capacitor 27, latch circuit 28, and buffer 29 are connected in parallel. The output of latch circuit 28 is connected to the input of buffer 29. The output of buffer 29 is connected to the gate of switching element 6.

[0042] Additionally, the power supply terminals of capacitor 27, latching circuit 28, and buffer 29 are connected to the output terminal 13 of the power conversion device via the interconnection point (neutral point) between the upper arm 5 and the lower arm 10. The upper arm 5 consists of a switching element 6 and a return diode 7 connected in antiparallel to it, and the lower arm 10 consists of a switching element 11 and a return diode 12 connected in antiparallel to it.

[0043] A load (coil) 14 is connected to the output terminal 13. The main power supply 8 of the power conversion device is connected to the collector terminal of the switching element 6.

[0044] like Figure 16 As shown, in the upper arm drive circuit of the existing power conversion device, firstly, the control circuit is turned on by power supply 25, and capacitor 27 is charged through diode 26. The capacitor charging voltage VCB rises to the power supply voltage VCC of the control circuit.

[0045] Next, the main power supply 8 of the power conversion device is turned on, and the upper arm ON pulse signal 34 is input to the latch circuit 28. The gate voltage VGE of the upper arm switching element 6 is boosted to the capacitor charging voltage VCB, the switching element 6 is turned on, and this state is maintained.

[0046] During the period when the switching element 6 is in the ON state, the power supply voltage VS of the main power supply 8 is output as the output terminal voltage VOUT from the output terminal 13 of the power conversion device. During this period, the voltage VB on the positive side of the capacitor 27 (to GND potential) increases from the capacitor charging voltage VCB by the amount of the increase in the output terminal voltage VOUT (the amount of the power supply voltage VS), which becomes the sum of the power supply voltage VS and the capacitor charging voltage VCB.

[0047] Next, the upper arm OFF pulse signal 35 is input to the latch circuit 28, and the gate voltage VGE of the switching element 6, which serves as the upper arm switching element, becomes 0V. The switching element 6 is turned off and remains in this state. At this time, the output terminal voltage VOUT returns to 0V, and the positive side voltage (relative to GND potential) VB of capacitor 27 also returns to the capacitor charging voltage VCB.

[0048] As described above, in the existing upper arm drive circuit of the power conversion device, the holding of the upper arm ON pulse signal 34 and the upper arm OFF pulse signal 35 uses a latch circuit 28, requiring a pulse signal generation circuit to generate the pulse signal to the latch circuit 28. Furthermore, if an erroneous signal such as noise is input and causes the latch circuit 28 to react, it may maintain a state different from the intended state, leading to erroneous operation of the power conversion device.

[0049] Reference Figures 1-6 The structure and operation (control method) of the upper arm drive circuit of Embodiment 1 of the present invention will be described. Figure 1 This is a diagram showing a schematic structure of the upper arm drive circuit in this embodiment. Figure 2 It is a sequence diagram representing its actions. Figures 3-6 Indicates the purpose of implementation Figure 1 Four specific examples of upper arm drive circuits are shown.

[0050] like Figure 1 As shown, the upper arm drive circuit 1 of this embodiment consists of a capacitor 2, an anti-reverse current circuit 3, and a switching element 4 serving as a charging switching element for the capacitor 2. The capacitor 2 is connected between the gate of the switching element 6 of the upper arm 5 and the output terminal 13. Furthermore, the capacitor 2 can be constructed as a separate component or using the parasitic capacitance of the switching element 6. The anti-reverse current circuit 3 is connected between the main power supply 8 of the power conversion device and the capacitor 2, allowing current to flow from the first terminal 36 connected to the main power supply 8 side to the second terminal 37 connected to the capacitor 2 side, while preventing reverse current flow from the second terminal 37 connected to the capacitor 2 side to the first terminal 36 connected to the main power supply 8 side.

[0051] Switching element 4, which serves as a charging switch for capacitor 2, is connected between main power supply 8 and capacitor 2. Switching element 4 is turned on synchronously with the command signal (upper arm ON signal 30) that turns on switching element 6, which serves as an upper arm switch, and capacitor 2 is charged using power supplied from main power supply 8.

[0052] In addition, a switching element 9, which serves as a discharge switching element for capacitor 2, is connected between capacitor 2 and anti-reverse current circuit 3. Switching element 9 is connected synchronously with the command signal (upper arm OFF signal 31) that disconnects switching element 6, which serves as an upper arm switching element, so that capacitor 2 discharges.

[0053] also, Figure 1 The structure of the upper arm 5 and the lower arm 10 constituting the power conversion device is similar to Figure 15 The existing power conversion device shown is the same, so detailed descriptions are omitted.

[0054] use Figure 2 ,right Figure 1 The operation of the upper arm drive circuit 1 will be explained. First, the main power supply 8 is turned on. Next, the command signal (upper arm ON signal 30) that turns on the switching element 6 is input to the switching element 4, and the capacitor 2 is charged through the anti-reverse current circuit 3.

[0055] When the gate voltage VGE of the switching element 6 (i.e., the charging voltage VC of the capacitor 2) is greater than or equal to the threshold voltage VTH_SW1 of the switching element 6, the switching element 6, which is the upper arm switching element, is turned on.

[0056] At this time, due to the anti-reverse current circuit 3, the discharge of capacitor 2 from capacitor 2 to the main power supply 8 via the switching element 4 is prevented, maintaining the charging voltage VC of capacitor 2. Moreover, the gate voltage VGE of the switching element 6 is maintained, thus maintaining the on state of the switching element 6 as the upper arm switching element.

[0057] During the period when the switching element 6 is in the ON state, the power supply voltage VS of the main power supply 8 is output as the output terminal voltage VOUT from the output terminal 13 of the power conversion device. During this period, the voltage on the positive side of the capacitor 2 (to GND potential) VCP is the sum of the power supply voltage VS and the threshold voltage VTH_SW1 of the switching element 6, or higher.

[0058] Then, a command signal (upper arm OFF signal 31) to turn off switch element 6 is input to switch element 9, which serves as a discharge switch element for capacitor 2. Switch element 9 is turned on, and capacitor 2 is discharged. Furthermore, the gate voltage VGE of switch element 6 decreases to below the threshold voltage VTH_SW1, and switch element 6, which serves as an upper arm switch element, is turned off.

[0059] According to the upper arm drive circuit and its operation (control method) of this embodiment described above, the gate voltage of the upper arm switching element can be maintained without setting a latch circuit in the upper arm drive circuit.

[0060] Therefore, there is no need to set up a latching circuit and a circuit for generating pulse signals to the latching circuit, which can reduce the internal circuit size of the power conversion device. Thus, it is possible to achieve miniaturization and lightweighting of the power conversion device, and prevent erroneous operation of the power conversion device caused by the latching circuit remaining in a state different from the intended state due to erroneous signals such as noise. This enables high reliability.

[0061] In addition, Figure 1 In this configuration, the switching element 4 can be connected to the side of the anti-reverse current circuit 3 closer to the main power supply 8, but it can also be connected between the anti-reverse current circuit 3 and the capacitor 2. That is, the order of the anti-reverse current circuit 3 and the switching element 4 connected between the capacitor 2 and the main power supply 8 is not important.

[0062] As above, Figure 1 The upper arm drive circuit 1 shown in this embodiment includes: a capacitor 2 connected between the gate of the upper arm switching element 6 and the output terminal 13 of the power conversion device; an anti-reverse current circuit 3 connected between the main power supply 8 of the power conversion device and the capacitor 2, allowing current to flow from the first terminal 36 connected to the main power supply 8 to the second terminal 37 connected to the capacitor 2, and preventing reverse current flow from the second terminal 37 to the first terminal 36; and a capacitor charging switch element 4 connected in series between the main power supply 8 and the capacitor 2 and the first terminal 36 or the second terminal 37 of the anti-reverse current circuit 3, and connected synchronously with the command signal (upper arm ON signal 30) that turns on the upper arm switching element 6.

[0063] use Figures 3-6 For implementation Figure 1 The following are four specific examples of the upper arm drive circuit shown.

[0064] Figure 3 This illustrates the use of diode 15 as the reverse current protection circuit 3. By using a diode as the reverse current protection circuit 3, the upper arm drive circuit 1 can be constructed with a simple structure and low cost. Furthermore, in... Figure 3 One diode is used as the anti-reverse current circuit 3, but multiple diodes 15 can also be connected in series between the main power supply 8 and the capacitor 2. By using multiple diodes connected in series as the anti-reverse current circuit 3, the reliability of the anti-reverse current circuit 3 is improved.

[0065] Figure 4This indicates the case where a MOS transistor is used as the anti-reverse current circuit 3. The MOS transistor is used as the switching element 16 as the switching element for anti-reverse current. The drain of the MOS transistor is connected to the first terminal 36 side, the source is connected to the second terminal 37 side, the gate and drain are connected, and the back gate (i.e., substrate) of the MOS transistor is electrically connected to the output terminal 13 of the power conversion device, thereby enabling the anti-reverse current function.

[0066] Furthermore, when using a MOS transistor as a switching element 16, the back gate (substrate) of the MOS transistor needs to be connected outside the source. Connecting it to the source does not prevent reverse current flow.

[0067] Figure 5 yes Figure 4 A variation thereof shows a switching element 16 (equivalent to) a first MOS transistor connected between the main power supply 8 of the power conversion device and the capacitor 2. Figure 4 The switching element 16), the switching element 17 (connected between the main power supply 8 and the output terminal 13 of the power conversion device as a second MOS transistor), and the resistor 18 (as an anti-reverse current circuit 3) are also mentioned.

[0068] The switching element 16 connected between the main power supply 8 of the power conversion device and the capacitor 2, and the switching element 17 connected between the main power supply 8 and the output terminal 13 of the power conversion device, are both MOS transistors. The first MOS transistor (16) has its drain connected to the first terminal 36 and its source connected to the second terminal 37. The second MOS transistor (17) has its drain connected to the first terminal 36 and its source connected to the output terminal 13 of the power conversion device via a resistor 18. Furthermore, by connecting the gate and drain of the first MOS transistor (16) and electrically connecting the back gate (substrate) to the output terminal 13 of the power conversion device via a resistor 18, reverse current protection is achieved.

[0069] Furthermore, by connecting the drain of the second MOS transistor (17) to the drain and gate of the first MOS transistor (16), connecting the gate between the capacitor 2 and the gate of the switching element 6, and connecting the source and back gate (substrate) to the output terminal 13 of the power conversion device via the resistor 18, the voltage of the back gate (substrate) of the first MOS transistor (16) can be controlled, thereby improving the current capability of the first MOS transistor (16).

[0070] Furthermore, in this case, the back gate (substrate) of the first MOS transistor of the switching element 16 also needs to be connected outside the source. When connected to the source, reverse current cannot be prevented.

[0071] Figure 6 yes Figure 4A variation of this example represents a MOS transistor (equivalent to...) Figure 4 The switching element 16), resistor, and capacitor are used as the anti-reverse current circuit 3.

[0072] The switching element 16 connected between the main power supply 8 of the power conversion device and the capacitor 2 is a MOS transistor. The gate and drain of the MOS transistor are connected, and the back gate (substrate) is electrically connected to the output terminal 13 of the power conversion device via a resistor 18. Furthermore, a capacitor 19, different from the capacitor 2, is electrically connected between the back gate (substrate) of the MOS transistor and the capacitor 2, thereby enabling the reverse current protection function. Moreover, the back gate (substrate) of the MOS transistor is controlled by a high-pass filter composed of the capacitor 19 and the resistor 18, thereby improving the current capability of the MOS transistor.

[0073] Furthermore, in this case, the back gate (substrate) of the MOS transistor must be connected outside the source. Connecting it to the source does not prevent reverse current flow.

[0074] Example 2

[0075] Reference Figures 7-11 The structure and operation (control method) of the upper arm drive circuit of Embodiment 2 of the present invention will be described. Figure 7 This is a diagram showing a schematic structure of the upper arm drive circuit in this embodiment. Figure 8 It is a sequence diagram representing its actions. Figures 9-11 Indicates the purpose of implementation Figure 7 Three specific examples of upper arm drive circuits are shown.

[0076] like Figure 7 As shown, the upper arm drive circuit 1 in this embodiment differs from that in embodiment 1 ( Figure 1 The structure includes a delay circuit 20 connected between the capacitor 2 and the gate of the switching element 6, which serves as the upper arm switching element. Other structures are similar to those in Embodiment 1. Figure 1 The same applies. Furthermore, in Embodiment 2, there is no parasitic capacitance of the switching element 6 at the location of capacitor 2, therefore capacitor 2 is constructed from a separate element.

[0077] use Figure 8 ,right Figure 7 The operation of the upper arm drive circuit 1 will be explained. First, the main power supply 8 is turned on. Next, the command signal (upper arm ON signal 30) that turns on the switching element 6 is input to the switching element 4, and the capacitor 2 is charged through the anti-reverse current circuit 3.

[0078] At this time, the delay circuit 20 delays the transmission of voltage from the charging voltage VC of capacitor 2 to the gate voltage VGE of switching element 6. The charging of capacitor 2 occurs during the period until switching element 6 is turned on; therefore, due to this delay DT, the amount of charge on capacitor 2 is greater than in the case without delay DT, i.e., in Example 1 (…). Figure 1 (increase)

[0079] When the gate voltage VGE of the switching element 6 is greater than or equal to the threshold voltage VTH_SW1 of the switching element 6, the switching element 6, which serves as the upper arm switching element, is turned on.

[0080] At this time, the discharge of capacitor 2 to the main power supply 8 via the switching element 4 is prevented by the anti-reverse current circuit 3, and the charging voltage VC of capacitor 2 is maintained. Furthermore, the voltage transfer from the charging voltage VC of capacitor 2 to the gate voltage VGE of switching element 6 is delayed by the delay circuit 20, and the gate voltage VGE of switching element 6 is pushed back to the same voltage as the charging voltage VC of capacitor 2. Since the gate voltage VGE of switching element 6 is maintained, the on-state of switching element 6, which is the upper arm switching element, is maintained.

[0081] During the period when the switching element 6 is in the ON state, the power supply voltage VS of the main power supply 8 is output as the output terminal voltage VOUT from the output terminal 13 of the power conversion device. During this period, the voltage on the positive side of the capacitor 2 (to GND potential) VCP is the sum of the power supply voltage VS and the threshold voltage VTH_SW1 of the switching element 6, or higher.

[0082] Then, a command signal (upper arm OFF signal 31) to turn off switch element 6 is input to switch element 9, which serves as a discharge switch element for capacitor 2. Switch element 9 is turned on, and capacitor 2 is discharged. Furthermore, the gate voltage VGE of switch element 6 decreases to below the threshold voltage VTH_SW1, and switch element 6, which serves as an upper arm switch element, is turned off.

[0083] According to the upper arm drive circuit and its operation (control method) of this embodiment described above, since the delay circuit 20 delays the transmission of voltage from the charging voltage VC of capacitor 2 to the gate voltage VGE of switching element 6, the charging amount of capacitor 2 is greater than that in the case without delay (Example 1). Figure 1 With more switches, a higher gate voltage can be applied to the switching element 6, which serves as the upper arm switching element.

[0084] Therefore, the gate voltage of the switching element 6, which serves as the upper arm switching element, can be kept relatively high, thus reducing the turn-on voltage of the switching element 6 and reducing losses.

[0085] use Figures 9-11 For implementation Figure 7The following are three specific examples of the upper arm drive circuit shown.

[0086] Figure 9 This illustrates the case where resistor 21 is used as delay circuit 20. By using a resistive element as delay circuit 20, the upper arm drive circuit 1 can be constructed with a simple structure and at low cost.

[0087] Figure 10 This illustrates the case where a MOS transistor is used as the switching element 22 in the delay circuit 20. The MOS transistor is used as the delay circuit 20, and its on / off control is achieved via an external delay signal. Because the delay circuit 20 can be controlled by an external delay signal, control accuracy and controllability (degrees of freedom in control) are improved.

[0088] exist Figure 11 This refers to a delay circuit 20, which includes a resistor and a MOS transistor in the switching element 22, which serves as a switching element for the delay circuit. A resistor 21 is connected between the capacitor 2 and the gate of the switching element 6, which serves as the upper arm switching element. A MOS transistor is connected between the gate of the switching element 6 and the output terminal 13 of the power conversion device. On / off control is achieved via an external delay signal. By constructing the delay circuit 20 with a resistor 21 and a MOS transistor that can be controlled by an external delay signal, the effect of the delay circuit can be enjoyed more reliably, and control accuracy and controllability (degrees of freedom of control) are also improved.

[0089] Example 3

[0090] Reference Figures 12-14 The structure and operation (control method) of the upper arm drive circuit of Embodiment 3 of the present invention will be described. Figure 12 This is a diagram showing a schematic structure of the upper arm drive circuit in this embodiment. Figure 13 It is a sequence diagram representing its actions. Figure 14 Indicates the purpose of implementation Figure 12 The above is a specific example of an upper arm drive circuit.

[0091] like Figure 12 As shown, the upper arm drive circuit 1 in this embodiment differs from that in embodiment 1 ( Figure 1 The structure also includes a voltage limiting circuit 23 connected in parallel with the capacitor 2 between the gate of the switching element 6 (which serves as the upper arm switching element) and the output terminal 13 of the power conversion device. Other structures are similar to Embodiment 1. Figure 1 The same applies to capacitor 2. Similarly to embodiment 1, capacitor 2 can be constructed from independent components or by utilizing the parasitic capacitance of switching element 6.

[0092] use Figure 13 right Figure 12 The operation of the upper arm drive circuit 1 will be explained. First, the main power supply 8 is turned on. Next, the command signal (upper arm ON signal 30) that turns on the switching element 6 is input to the switching element 4, and the capacitor 2 is charged through the anti-reverse current circuit 3.

[0093] When the gate voltage VGE of the switching element 6 (i.e. the charging voltage VC of the capacitor 2) is higher than the threshold voltage VTH_SW1 of the switching element 6, the switching element 6, which is the upper arm switching element, is turned on.

[0094] At this time, the gate voltage VGE of the switching element 6 is below a predetermined voltage value (the limiting voltage of the voltage limiting circuit: VL) due to the voltage limiting circuit 23. Through the anti-reverse current circuit 3, the discharge of capacitor 2 from capacitor 2 to the main power supply 8 via the switching element 4 is prevented, and the charging voltage VC of capacitor 2 is maintained. Furthermore, the gate voltage VGE of the switching element 6 is maintained, thus maintaining the on-state of the switching element 6 as the upper arm switching element.

[0095] During the period when the switching element 6 is in the ON state, the power supply voltage VS of the main power supply 8 is output as the output terminal voltage VOUT from the output terminal 13 of the power conversion device. During this period, the voltage on the positive side of the capacitor 2 (to GND potential) VCP is the sum of the power supply voltage VS and the threshold voltage VTH_SW1 of the switching element 6, and is below the limiting voltage VL of the voltage limiting circuit 23.

[0096] Then, a command signal (upper arm OFF signal 31) to turn off switch element 6 is input to switch element 9, which serves as a discharge switch element for capacitor 2. Switch element 9 is turned on, and capacitor 2 is discharged. Furthermore, the gate voltage VGE of switch element 6 decreases to below the threshold voltage VTH_SW1, and switch element 6, which serves as an upper arm switch element, is turned off.

[0097] According to the upper arm drive circuit and its operation (control method) of this embodiment described above, the voltage limiting circuit 23 can prevent excessive voltage from being applied from the charging voltage VC of the capacitor 2 to the gate voltage VGE of the switching element 6, and can prevent the switching element 6, which is the upper arm switching element, from malfunctioning.

[0098] exist Figure 14 The middle represents the method used for implementation. Figure 12 The above is a specific example of an upper arm drive circuit. Figure 14 This indicates the case where a Zener diode 24 is used as the voltage limiting circuit 23. By using a Zener diode as the voltage limiting circuit 23, the upper arm drive circuit 1 can be constructed with a simple structure and low cost.

[0099] Furthermore, the above embodiments can also be configured as a single-chip inverter IC in which the capacitor 2, the anti-reverse current circuit 3, the switching element 4 (as a capacitor charging switch element), and the switching element 6 (as an upper arm switch element) are formed on the same semiconductor chip. Additionally, it is also possible to form some or all of the delay circuit 20 or voltage limiting circuit 23, the switching element 9 (as a capacitor discharging switch element), and other components with power conversion functions on the same semiconductor chip.

[0100] Alternatively, the above embodiments can also be configured as inverter control ICs for constructing multi-chip inverters, in which the capacitor 2, the anti-reverse current circuit 3, and the switching element 4 (which serves as a switching element for capacitor charging) are formed on different semiconductor chips, along with the switching element 6 (which serves as an upper arm switching element). Furthermore, it is also possible to form part or all of the delay circuit 20 or voltage limiting circuit 23, and the switching element 9 (which serves as a switching element for capacitor discharging) on ​​the same semiconductor chip as the capacitor 2, the anti-reverse current circuit 3, and the switching element 4.

[0101] Furthermore, in the reverse current protection circuit 3 described in the above embodiments, if a small leakage current exists in the reverse direction, it is difficult to maintain the charge of capacitor 2 for a long time. In such cases, by limiting the duty cycle of the command signal (upper arm ON signal) that turns on the switching element 6, the switching element 6 is turned off and then turned on again before capacitor 2 discharges due to leakage current and the gate voltage VGE of the switching element 6 decreases to the threshold voltage VTH_SW1, thereby eliminating the influence of leakage current in the reverse current protection circuit 3.

[0102] Furthermore, the present invention is not limited to the embodiments described above, but includes various modifications. For example, the embodiments described above are examples given in detail to aid in understanding the present invention, and are not limited to having all the structures described. Additionally, a portion of the structure of one embodiment can be replaced with the structure of another embodiment, and the structure of another embodiment can be added to the structure of one embodiment. Furthermore, the structure of each embodiment can be supplemented, deleted, or replaced with other structures.

Claims

1. An upper arm drive circuit which drives and controls upper arm switching elements of a power conversion device, characterized by, have: A capacitor is connected between the gate of the upper arm switching element and the output terminal of the power conversion device. An anti-reverse current circuit is connected between the power supply of the power conversion device and the capacitor, allowing current to flow from the first terminal connected to the power supply side to the second terminal connected to the capacitor side, and preventing reverse current flow from the second terminal side to the first terminal side. The power supply of the power conversion device is connected to the upper arm switching element. A switching element for capacitor charging is connected in series between the power supply and the capacitor, and between the first terminal side and the second terminal side of the anti-reverse current circuit, and is switched on synchronously with a command signal that turns on the upper arm switching element. The upper arm drive circuit includes a delay circuit connected between the capacitor and the gate of the upper arm switching element, and also connected between the anti-reverse current circuit and the gate of the upper arm switching element. The capacitor is switched on by the capacitor charging switch element, thereby being subjected to the voltage of the power supply of the power conversion device, and is charged by the current flowing through the capacitor charging switch element and the anti-reverse current circuit.

2. The upper arm driving circuit according to claim 1, characterized in that, It has a voltage limiting circuit, which is connected in parallel with the capacitor between the gate of the upper arm switching element and the output terminal of the power conversion device.

3. The upper arm drive circuit according to claim 1, characterized in that, It has a discharge circuit that discharges the charge from the capacitor in sync with a command signal that disconnects the upper arm switching element.

4. The upper arm drive circuit according to claim 1, characterized in that, The aforementioned anti-reverse current circuit consists of one or more diodes connected in series.

5. The upper arm drive circuit according to claim 1, characterized in that, The aforementioned anti-reverse current circuit has a first MOS transistor. The drain of the first MOS transistor is connected to the first terminal side, the source is connected to the second terminal side, the gate and drain are connected, and the back gate is connected to the output terminal of the power conversion device.

6. The upper arm driving circuit according to claim 5, characterized in that, The aforementioned anti-reverse current circuit has a second MOS transistor and a resistor. The drain of the second MOS transistor is connected to the first terminal side, the source is connected to the output terminal of the power conversion device via the resistor, and the gate is connected between the capacitor and the gate of the upper arm switching element. The back gates of the first MOS transistor and the second MOS transistor are connected to the output terminal of the power conversion device via the resistor.

7. The upper arm drive circuit according to claim 5, characterized in that, The aforementioned anti-reverse current circuit includes a resistor and other capacitors that differ from the aforementioned capacitors. The back gate of the first MOS transistor is connected to the output terminal of the power conversion device via the resistor. The other capacitors are connected between the back gate of the first MOS transistor and the capacitors.

8. The upper arm drive circuit according to claim 1, characterized in that, The aforementioned delay circuit is a resistive element.

9. The upper arm drive circuit according to claim 1, characterized in that, The aforementioned delay circuit uses a MOS transistor that is turned on / off via an external delay signal.

10. The upper arm driving circuit according to claim 1, characterized in that, The above delay circuit has: A resistive element connected between the capacitor and the gate of the upper arm switching element; and A MOS transistor is connected between the gate of the upper arm switching element and the output terminal of the power conversion device, and is turned on / off controlled by a delayed signal from the outside.

11. The upper arm drive circuit according to claim 2, characterized in that, The voltage limiting circuit described above is a Zener diode.

12. The upper arm drive circuit according to claim 1, characterized in that, The aforementioned capacitor, the aforementioned anti-reverse current circuit, and the aforementioned capacitor charging switch element are formed on the same semiconductor chip as the aforementioned upper arm switch element.

13. The upper arm drive circuit according to claim 1, characterized in that, The aforementioned capacitor, the aforementioned anti-reverse current circuit, and the aforementioned capacitor charging switching element are formed on a semiconductor chip that is different from the semiconductor chip on which the aforementioned upper arm switching element is formed.

14. A control method for an upper arm drive circuit, wherein the upper arm drive circuit drives and controls the upper arm switching element of the power conversion device according to claim 1, and the control method for the upper arm drive circuit is characterized in that... It includes the following steps: (a) Connect the power supply to the power conversion device; (b) The capacitor connected between the gate of the upper arm switching element and the output terminal of the power conversion device is charged synchronously with the command signal that turns on the upper arm switching element of the power conversion device. (c) During the period when the upper arm switching element of the power conversion device is in the ON state, the discharge from the capacitor to the power supply side of the power conversion device is suppressed by the anti-reverse current circuit connected between the capacitor and the power supply of the power conversion device, and the upper arm switching element of the power conversion device is kept in the ON state. as well as (d) The capacitor is charged in sync with the command signal that disconnects the upper arm switching element.

15. The control method for the upper arm drive circuit according to claim 14, characterized in that, The duty cycle of the command signal that turns on the upper arm switching element is limited.

Images