A Hybrid Modulation Method for a Four-Switch Buck-Boost Converter

Abstract

This invention discloses a hybrid modulation method for a four-switch Buck-Boost converter, relating to the field of power electronic converter control technology. Specifically, it includes: acquiring the converter's load state parameters and comparing them with a switching threshold determined based on a loss balance point. When the load is greater than or equal to the threshold, a four-segment modulation mode is used; when the load is less than the threshold, a five-segment modulation mode is used. In the five-segment modulation mode, when the inductor current drops to zero, the third switch is turned off and the fourth switch is turned on to enter a zero-current holding stage. After this stage, the second and third switches are turned on to establish a reverse current. This aims to eliminate free circulating current when the load is less than the threshold, reducing conduction losses and copper losses while ensuring zero-voltage turn-on, thereby improving converter operating efficiency.

Description

Technical Field

[0001] This invention relates to the field of power electronic converter control technology, and in particular to a hybrid modulation method for a four-switch Buck-Boost converter. Background Technology

[0002] Compared to other typical non-isolated DC-DC converters, the four-switch Buck-Boost converter has advantages such as symmetrical structure, identical input and output polarity, bidirectional buck-boost capability, and low voltage stress on the switching transistors. Therefore, it is widely used in applications with a wide voltage input range, such as communication systems, photovoltaic power generation, electric vehicles, and power systems for portable electronic devices.

[0003] To achieve zero-voltage turn-on across the entire load range, existing technologies typically employ a quadrilateral inductor current modulation method. This method requires inserting a free-circulating current phase within each switching cycle to maintain a constant switching frequency. During this phase, the second and fourth switches of the converter are simultaneously turned on, and energy circulates within the loop containing the second switch, inductor, and fourth switch. During this time, the inductor current remains non-zero, representing a preset zero-voltage turn-on current value. While this free-circulating current is necessary for achieving zero-voltage turn-on, its presence directly increases the effective value of the inductor current. Since the conduction losses of the switches and the copper losses of the inductor are both quadratically related to the effective value of the inductor current, the increase in free-circulating current leads to a significant rise in both conduction and copper losses. Especially under light-load conditions, the proportion of the free-circulating current phase in the entire switching cycle increases accordingly, making the additional losses caused by the free-circulating current more significant and severely limiting the converter's light-load efficiency.

[0004] Therefore, how to reduce circulating current loss under light load conditions to improve converter efficiency while ensuring zero-voltage turn-on characteristics has become an urgent technical problem to be solved. Summary of the Invention

[0005] The main objective of this invention is to provide a hybrid modulation method for a four-switch Buck-Boost converter, which aims to reduce circulating current losses under light load conditions and improve converter efficiency while ensuring zero-voltage turn-on characteristics.

[0006] To achieve the above objectives, this invention proposes a hybrid modulation method for a four-switch Buck-Boost converter, wherein the converter includes a first switch forming the first bridge arm. Second switching transistor The third switching transistor constituting the second bridge arm and the fourth switching transistor The method includes: and an inductor L connected between the first bridge arm and the second bridge arm.

[0007] Obtain the load status parameters of the converter and compare the load status parameters with a preset switching threshold;

[0008] When the load status parameter indicates that the load is greater than or equal to the switching threshold, the converter is controlled to operate in a first modulation mode, which is a four-segment modulation mode.

[0009] When the load status parameter indicates that the load is less than the switching threshold, the converter is controlled to operate in the second modulation mode.

[0010] The second modulation mode includes:

[0011] During the decrease of inductor current, when the inductor current is detected to have dropped to zero, the third switch is controlled. Turn off and control the fourth switch. Turn on to enter the zero-current holding phase;

[0012] During the zero-current holding phase, the second switch is held. and the fourth switching transistor It is in the on state, thereby keeping the current in the inductor at zero;

[0013] After the zero-current holding phase ends, control the second switching transistor. and the third switching transistor Turn on to establish a reverse inductance current until the first switch transistor is switched on. The zero-voltage turn-on condition is met.

[0014] Preferably, the switching threshold is determined by calculating the loss balance point of the converter under different input and output voltage conditions;

[0015] The loss balance point is the sum of the reduced conduction loss and copper loss of the second modulation mode relative to the first modulation mode, which is equal to the sum of the increased switching loss and drive loss of the second modulation mode relative to the first modulation mode, and the load current value at which this sum is equal to the load current value.

[0016] Preferably, the switching loss The aforementioned on-state loss The copper loss and the driving loss Calculate using the following formulas respectively:

[0017] ;

[0018] Among them, the product of the turn-on current and the turn-on time and the product of the turn-off current and the turn-off time are calculated separately and then summed.

[0019] ;

[0020] ;

[0021] ;

[0022] in, This is the drain-source voltage of the switching transistor. This refers to the turn-on or turn-off current of the switching transistor. This refers to the turn-on or turn-off time of the switching transistor. For switching frequency, It is the square of the effective value of the inductor current. This is the on-resistance of the switching transistor. This is the equivalent impedance of the inductor. This refers to the gate drive voltage amplitude of the switching transistor. This represents the total gate charge of the switching transistor.

[0023] Preferably, the method further includes:

[0024] Pre-calculate the switching threshold under different combinations of input and output voltages. and compare it with the rated current of the converter. Compare;

[0025] If, under the current input and output voltages, the switching threshold Greater than or equal to the rated current Regardless of the load state parameters, the converter is controlled to operate in the second modulation mode across the entire load range;

[0026] If, under the current input and output voltages, the switching threshold Less than the rated current Then, the step of comparing the load status parameter with the switching threshold is executed.

[0027] Preferably, one switching cycle of the second modulation mode includes the following five stages in sequence:

[0028] Phase 1 : Control the first switching transistor and the fourth switching transistor Turn on, controlling the second switching transistor and the third switching transistor When turned off, the inductor current increases linearly;

[0029] Phase Two : Control the first switching transistor and the third switching transistor Turn on, controlling the second switching transistor and the fourth switching transistor When turned off, the inductor current rises, falls, or remains constant linearly according to the relationship between the input voltage and the output voltage.

[0030] Phase Three : Control the second switching transistor and the third switching transistor Turn on, controlling the first switching transistor and the fourth switching transistor When the circuit is turned off, the inductor current decreases linearly until the inductor current drops to zero, at which point the phase ends.

[0031] Phase 4 That is, during the zero-current holding phase, the second switching transistor is controlled. and the fourth switching transistor Turn on, keeping the inductor current zero;

[0032] Phase 5 : Control the second switching transistor and the third switching transistor When the circuit is turned on, a reverse inductance current is established.

[0033] Preferably, the converter includes a third switching transistor. and the fourth switching transistor The drive signal generation circuit, the third switch transistor and the fourth switching transistor The drive signal generation circuit is configured to receive a first initial drive signal EPMWA and a second initial drive signal EPMWB;

[0034] The third switching transistor and the fourth switching transistor The drive signal generation circuit includes an XOR gate and an AND gate;

[0035] The XOR gate receives the first initial drive signal and the second initial drive signal, and outputs the third switch. The driving signal;

[0036] The AND gate receives the first initial drive signal and the second initial drive signal, and outputs the fourth switch. The driving signal.

[0037] Preferably, when the converter operates using the first modulation mode, and the first modulation mode is a four-segment modulation mode:

[0038] The first initial drive signal EPMMA detects that the inductor current has dropped to zero voltage and the current is turned on. Time setting high, in the first stage Set to low at the end;

[0039] The second initial drive signal EPMWB remains at a constant high level throughout the entire switching cycle.

[0040] Preferably, when the converter operates in the second modulation mode:

[0041] The first initial drive signal EPMMA is set high when it detects that the inductor current has dropped to zero, in the first stage. Set to low at the end;

[0042] The second initial drive signal EPMWB is set high at the beginning of the switching cycle, and in the fifth stage... Set it low at the beginning.

[0043] Preferably, the first switching transistor The drive signal is set high at the beginning of the switching cycle, in the first stage. With the second phase Set to low when the total time ends;

[0044] Second switching transistor The drive signal in the first stage With the second phase It is set high at the end of the total time and low at the end of the switching cycle.

[0045] The above technical solution has the following advantages:

[0046] This invention proposes a hybrid modulation method for a four-switch Buck-Boost converter. By monitoring the load state in real time and comparing it with a switching threshold determined based on the loss balance point, dynamic optimization of the modulation mode is achieved. When the load state parameters indicate that the load is greater than or equal to the switching threshold, the first modulation mode (i.e., four-segment modulation mode) is adopted to ensure heavy-load performance; while when the load state parameters indicate that the load is less than the switching threshold, the second modulation mode (i.e., five-segment modulation mode) is automatically switched. In the second modulation mode, by promptly turning off the third switch and turning on the fourth switch when the inductor current drops to zero, the circuit enters a zero-current holding stage, thereby completely eliminating the ineffective free circulating current present in traditional modulation methods and significantly reducing the switching transistor conduction loss and inductor copper loss. At the same time, by introducing a reverse current build-up stage at the end of the cycle, the zero-voltage turn-on condition of the main switch is ensured. This method can significantly improve the operating efficiency of the converter under load conditions below the threshold, achieving an optimal balance between switching losses, drive losses, conduction losses, and copper losses. Attached Figure Description

[0047] The present invention will now be described in detail with reference to specific embodiments and accompanying drawings, wherein:

[0048] Figure 1 A schematic diagram of the main circuit topology of a four-switch Buck-Boost converter provided in an embodiment of the present invention.

[0049] Figure 2 This is a waveform diagram of a four-switch Buck-Boost converter using a quadrilateral inductor current modulation method in the prior art.

[0050] Figure 3 This is a waveform comparison diagram of a four-switch Buck-Boost converter in the prior art using the quadrilateral inductor current modulation method under different loads.

[0051] Figure 4 The waveform diagram of the four-switch Buck-Boost converter provided in the embodiment of the present invention using the second modulation mode, namely the five-segment modulation mode.

[0052] Figure 5 This is a schematic diagram of the equivalent circuit of the first stage in the second modulation mode provided in an embodiment of the present invention.

[0053] Figure 6 This is a schematic diagram of the equivalent circuit of the second stage in the second modulation mode provided in an embodiment of the present invention.

[0054] Figure 7 This is a schematic diagram of the equivalent circuit of the third stage in the second modulation mode provided in an embodiment of the present invention.

[0055] Figure 8 This is a schematic diagram of the equivalent circuit for the fourth stage, namely the zero-current holding stage, in the second modulation mode provided in the embodiments of the present invention.

[0056] Figure 9 This is a schematic diagram of the equivalent circuit of the fifth stage in the second modulation mode provided in an embodiment of the present invention.

[0057] Figure 10 This is a schematic diagram of the loss difference between the second modulation mode and the first modulation mode as a function of load, provided in an embodiment of the present invention.

[0058] Figure 11 This is a three-dimensional schematic diagram showing the comparison between the switching threshold and the rated current under different input and output voltage conditions, as provided in an embodiment of the present invention.

[0059] Figure 12 This is a schematic diagram of the two-dimensional lookup table range for the switching threshold provided in an embodiment of the present invention.

[0060] Figure 13 This is a schematic diagram of the driving signal timing logic of the converter when it is operating in the first modulation mode, as provided in an embodiment of the present invention.

[0061] Figure 14 This is a schematic diagram of the driving signal timing logic when the converter operates in the second modulation mode, as provided in an embodiment of the present invention. Detailed Implementation

[0062] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0063] Example 1

[0064] This embodiment provides a hybrid modulation method for a four-switch Buck-Boost converter. This method is applied to a four-switch Buck-Boost converter, such as... Figure 1 As shown, the main circuit topology of the converter includes a first switching transistor constituting the first bridge arm. Second switching transistor and the third switching transistor constituting the second bridge arm and the fourth switching transistor .inductance Connected between the midpoint of the first bridge arm and the midpoint of the second bridge arm. First switching transistor. Second switching transistor The third switching transistor is connected in series across the input power supply. and the fourth switching transistor It is connected in series between the output capacitor and the load. In this embodiment, the input voltage is... The output voltage is .

[0065] The core logic of this hybrid modulation method lies in dynamically adjusting the modulation strategy according to the load state to optimize efficiency under light load conditions. Specifically, the controller first acquires the converter's load state parameters, such as the load current. Then, the load status parameter is compared with a preset switching threshold. The comparison is performed. Based on the comparison results, the converter switches between two different modulation modes.

[0066] When the load status parameter indicates that the load is greater than or equal to the switching threshold When the circuit is under heavy load or rated load conditions, the controller controls the converter to operate in the first modulation mode. Specifically, the first modulation mode is a four-segment modulation mode, which is the traditional quadrilateral inductor current modulation method. For example... Figure 2 and Figure 3As shown, in this mode, the inductor current exhibits four stages of variation within a single switching cycle. Although zero-voltage turn-on of all switches can be achieved, there is a free-circulating current phase within the switching cycle, during which the inductor current remains a non-zero zero-voltage turn-on current. This results in significant on-state losses and coil copper losses.

[0067] When the load status parameter indicates that the load is less than the switching threshold When the circuit is under light load, the controller controls the converter to operate in the second modulation mode. The second modulation mode is specifically a five-segment modulation mode, and its waveform principle is as follows: Figure 4 As shown. This mode significantly improves light-load efficiency by eliminating the free circulating current in traditional modulation through improved switching timing. Within one switching cycle of the second modulation mode, the operation is divided into the following five stages:

[0068] Phase 1 :like Figure 5 As shown, the controller controls the first switching transistor. and the fourth switching transistor Turn on, and simultaneously control the second switching transistor. and the third switching transistor Shutdown. In the first phase. At the initial instant, due to the first switching transistor The body diode is pre-conducted, and the first switching transistor... The voltage across the inductor is clamped to zero, thus achieving zero-voltage switching. During this stage, the voltage across the inductor is approximately the input voltage. Inductor current With slope Linear increase. During the first stage... At the end, the fourth switch Turn off.

[0069] Phase Two :like Figure 6 As shown, the controller controls the first switching transistor. and the third switching transistor Turn on, and simultaneously control the second switching transistor. and the fourth switching transistor Shutdown. In the second phase. At the initial instant, due to the third switching transistor The body diode is turned on, and the third switching transistor is activated. Zero-voltage switching is achieved. At this time, the voltage across the inductor is... Inductor current The rate of change depends on the input voltage With output voltage The difference: when When the inductor current increases linearly, when When, the inductor current decreases linearly; when At that time, the inductor current remains constant. During the second stage... At the end, the first switching transistor Turn off.

[0070] Phase Three :like Figure 7 As shown, the controller controls the second switching transistor. and the third switching transistor Turn on, and simultaneously control the first switching transistor. and the fourth switching transistor Shutdown. In the third stage. At the start, the second switching transistor The body diode is turned on, and the second switching transistor is activated. Zero-voltage turn-on is achieved. At this time, the inductor is subjected to a reverse output voltage. Inductor current With slope Linear descent. Unlike traditional four-segment modulation, the third stage in this embodiment... The inductor current does not drop to the preset zero-voltage turn-on current. The process does not end immediately, but continues until inductor current is detected. This phase ends only when the current drops completely to zero amperes. At this point, the controller turns off the third switch. .

[0071] Phase 4 This stage is the zero-current holding stage, and the equivalent circuit is as follows: Figure 8 As shown. The controller controls the second switching transistor. and the fourth switching transistor Turn on, and at the same time, the first switching transistor and the third switching transistor Keep it off. In phase four. At the start, the fourth switching transistor The body diode conducts, achieving zero-voltage turn-on. During this stage, the inductor current... The current is kept constant at zero amperes. This control strategy eliminates the limitations of traditional methods. Free circulating current between circuits avoids ineffective conduction losses and inductor copper losses caused by circulating current during this period. Fourth stage When finished, the controller turns off the fourth switch. .

[0072] Phase 5 :like Figure 9 The controller shown controls the second switch again. and the third switching transistor Turn on, first switching transistor and the fourth switching transistor Turn off. During this stage, the inductor current increases in reverse from zero, establishing a reverse current. Introducing the fifth stage. The purpose is to draw the first switching transistor through the reverse inductor current before the start of the next switching cycle. The charge on the junction capacitor ensures the first switching transistor It can meet the zero-voltage turn-on condition.

[0073] In this embodiment, the switching threshold is... The determination is based on loss analysis calculations. The total loss of the converter mainly includes the switching losses of the switching transistors. On-state losses of switching transistors Inductor copper loss Inductance loss and the drive losses of the switching transistor .

[0074] Among them, switching losses The calculation formula is as follows:

[0075]

[0076] In the formula, This is the drain-source voltage of the switching transistor. This refers to the turn-on or turn-off current of the switching transistor. This refers to the turn-on or turn-off time of the switching transistor. is the switching frequency; where the summation is calculated and accumulated for the turn-on and turn-off times of each switch.

[0077] On-state loss The calculation formula is as follows:

[0078]

[0079] In the formula, This is the effective value of the inductor current. This is the on-resistance of the switching transistor.

[0080] Inductor copper loss The calculation formula is as follows:

[0081]

[0082] In the formula, This is the equivalent impedance of the inductor.

[0083] Inductor iron loss The calculation formula is as follows:

[0084]

[0085] In the formula, This refers to the iron loss per unit volume of the magnetic core. This represents the effective volume of the magnetic core.

[0086] Drive loss The calculation formula is as follows:

[0087]

[0088] In the formula, This refers to the gate drive voltage amplitude of the switching transistor. This represents the total gate charge of the switching transistor.

[0089] Compared to the first modulation mode, the second modulation mode, namely the five-segment modulation method, effectively reduces the effective value of the inductor current by eliminating circulating current. This reduces the on-state loss. and inductor copper loss However, due to the introduction of an additional switching action, the third switching transistor... and the fourth switching transistor The increased operating frequency within a cycle introduces additional switching losses. and drive loss .

[0090] With load current As the capacitance increases, the savings in conduction and copper losses in the second modulation mode gradually decrease, while the additional switching and drive losses remain relatively constant. For example... Figure 10 As shown, there exists a specific load current point, i.e., the switching threshold. At this point, the sum of the reduction in conduction losses and copper losses of the second modulation mode relative to the first modulation mode is exactly equal to the sum of the increase in switching losses and drive losses relative to the first modulation mode.

[0091] When the actual load current At that time, the total loss of the second modulation mode is less than that of the first modulation mode, and the efficiency is higher; when the actual load current At this time, the first modulation mode has lower total loss and higher efficiency. By monitoring the load in real time and switching modes accordingly, this embodiment ensures that the converter operates at optimal efficiency across the entire load range.

[0092] In addition, considering the input voltage and output voltage Changes in voltage levels can affect the loss balance point; the controller has pre-stored switching thresholds for different combinations of input and output voltages. Data table. For example... Figure 11 As shown in the figure, the switching thresholds under different voltage combinations are illustrated. With rated current The comparison relationship. In actual operation, the controller first looks up a table based on the current input voltage and output voltage (the table lookup range is shown in the diagram). Figure 12 (As shown) the corresponding theoretical switching threshold is obtained. If the theoretical switching threshold under this operating condition... Greater than or equal to the rated current of the converter This indicates that under this operating condition, the second modulation mode has an efficiency advantage across the entire load range. In this case, the controller operates the converter in the second modulation mode across the entire load range without switching. If the theoretical switching threshold... Less than the rated current Then the controller executes the load current comparison and switching logic described above.

[0093] Example 2

[0094] This embodiment focuses on the driving signal generation circuit and its control logic used to implement the above-described hybrid modulation method. This embodiment also focuses on the third switching transistor used to implement the above-described hybrid modulation method. and the fourth switching transistor Drive signal generation circuit and its control logic. The third switching transistor described in this embodiment. and the fourth switching transistor The drive signal generation circuit, consisting of a digital controller and discrete digital logic gates, is used to synthesize a third switch based on the initial drive signal generated by the controller. and the fourth switching transistor The final gate drive signal.

[0095] The drive signal generation circuit includes an XOR gate and an AND gate. The two inputs of the XOR gate receive the first initial drive signal EPMWA and the second initial drive signal EPMWB, respectively, and its output is connected to a third switch. The driving circuit of the AND gate receives the first initial driving signal EPMMA and the second initial driving signal EPMWB at its two inputs, respectively, and its output is connected to the fourth switching transistor. The driving circuit. Through this logic combination, by simply adjusting the generation logic of the second initial drive signal EPMWB and the comparison threshold (comp value) of the comparator inside the digital controller, it is possible to flexibly switch between four-segment modulation mode and five-segment modulation mode without changing the hardware connection.

[0096] When the converter operates in the first modulation mode, i.e., the four-segment modulation mode, the logic for generating the drive signal is as follows: Figure 13 As shown:

[0097] First switching transistor The drive signal is set to high at the beginning of the switching cycle, and in the first stage With the second phase The sum of the durations is set to low when the second switch transistor ends. The drive signal is related to the first switching transistor. Complementarity, specifically, is complementarity after considering dead time, that is, in the first stage. With the second phase The value is set to high at the end of the sum of the durations and low at the end of the switching cycle.

[0098] For the third switching transistor and the fourth switching transistor The internal comparator module of the digital controller detects the inductor current in real time. When inductor current is detected The current drops to the preset zero-voltage turn-on current. When the time reaches the first stage, the first initial drive signal EPMMA is set to high level; when the time reaches the first stage... At the end of the switching cycle, the first initial drive signal EPMMA is set to low. In this mode, the second initial drive signal EPMWB remains constant at a high level throughout the entire switching cycle.

[0099] Based on the above logic, the output of the XOR gate, i.e. The drive signal behaves as a high level when EPMWA is low (i.e., when EPMWB is high), and as a low level when EPMWA is high. The output of the AND gate... The drive signal follows the level state of EPMWA. This makes and The on / off state can be coordinated and To achieve the current modulation waveform of a traditional quadrilateral inductor.

[0100] When the converter operates in the second modulation mode, i.e., the five-segment modulation mode, the logic for generating the drive signal is adjusted as follows, and its timing logic is as follows: Figure 14 As shown:

[0101] First switching transistor Second switching transistor The timing logic of the drive signal remains unchanged, consistent with the four-segment modulation mode.

[0102] For the third switching transistor and the fourth switching transistor The internal comparator module of the digital controller adjusts the detection threshold to zero amperes. That is, when inductor current is detected... When the current drops to 0 amperes, the first initial drive signal EPMMA is set to high; when the time reaches the first stage... At the end time, the first initial drive signal EPMMA is set to low.

[0103] Meanwhile, the second initial drive signal EPMWB is no longer constantly high, but is configured to be set to high at the beginning of the switching cycle and reserve a fifth stage before the end of the switching cycle. The duration of time, that is The time is set to low level.

[0104] Under this logic:

[0105] Before the inductor current drops to zero, EPMWA is low, EPMWA is high, and the XOR gate output is high. When the gate is on, the AND gate output is low, i.e. Shutdown, corresponding to the third stage .

[0106] When the inductor current drops to zero, EPMMA flips high, while EPMMAB remains high. At this point, the XOR gate output flips low. When turned off, the AND gate output flips to high, i.e. Conduction complete. The circuit enters the fourth stage. ,Right now and Zero current holding phase during conduction.

[0107] When the time comes At that moment, EPMWB flips to low, while EPMWA is usually already low. The signal is reset to low at the end, or remains low at the end of the cycle depending on the specific waveform. If EPMWA is low and EPMVB is low, the XOR gate output is low, and the AND gate output is low. However, according to the timing requirements of five-segment modulation, in... Stage needs and Conduction, that is It should be "high".

[0108] It should be added here that, in five-segment modulation, in order to achieve the fifth stage... ,Right now and For conduction to occur, the specific coordination between EPMMA and EPMWB at the end of the cycle must satisfy XOR = high and AND = low. According to the logic of this invention, EPMWB at... If EPMWA is set low at a given time, and EPMWA remains high at this time (e.g., configured to maintain a high level at the end of the cycle), then the XOR gate outputs high. When the gate is on, the AND gate output is low, i.e. Shutdown, thereby achieving the fifth stage. The function is as follows. Alternatively, the controller can use a complementary PWM generator in conjunction with the above logic gates, specifically configured to trigger EPMWB on the falling edge. The activation of this system allows for the implementation of complex five-segment modulation timing without increasing hardware costs, through this purely digital logic configuration adjustment.

[0109] Example 3

[0110] This embodiment details the switching current lookup table method and the full load range efficiency optimization strategy in the hybrid modulation method.

[0111] Because the five-segment modulation method reduces conduction loss under light load by eliminating circulating current. and inductor copper loss However, the increased switching frequency also increases switching losses. and drive loss Therefore, there exists a critical load current, i.e., the switching threshold. This threshold is not a fixed value, but varies with the input voltage. and output voltage It changes with the changes.

[0112] This embodiment employs a combination of offline calculation and online table lookup. First, based on the converter's hardware parameters, such as the on-resistance of the switching transistors... Inductance equivalent impedance Gate charge Etc., using the loss formula across the entire operating range, i.e., different... and The total loss curves of the four-segment and five-segment modulation methods are calculated in combination, and the intersection point where the losses of the two methods are equal is found, thereby obtaining a series of switching thresholds corresponding to different operating conditions. These data are organized into two-dimensional lookup tables or multidimensional arrays and stored in the non-volatile memory of the digital controller.

[0113] During converter operation, the controller samples the input voltage in real time. and output voltage The controller looks up the corresponding switching threshold in the memory based on the sampled value. To improve accuracy, if the sampling condition lies between table nodes, linear interpolation can be used to calculate the current switching threshold. .

[0114] Get the switching threshold of the current working condition Then, the controller first compares it with the converter's rated current. The comparison is performed. This step is to determine whether there is an "optimal operating condition" that does not require switching.

[0115] Scenario 1: If the results are found This means that the efficiency of five-band modulation is always higher than that of four-band modulation across the entire rated load range of the converter. In this case, regardless of changes in the actual load, the converter is controlled to operate in the second modulation mode across the entire load range. Case 2: If the detected... This means that as the load increases, at some point, that is... An efficiency reversal occurs. In this situation, the controller activates dynamic switching logic and collects load current in real time. and Comparison. When When, use the second modulation mode; when When the threshold is reached, the first modulation mode is used. To prevent oscillation caused by frequent switching near the threshold, the controller introduces a hysteresis interval in the comparison logic, for example, in... Rise above Switch to the first mode at that time. Decline below Switch back to the second mode.

[0116] This method only requires modification to the EPMWB generation logic and comparator threshold at the software level, without any hardware changes, and has extremely high engineering application value and cost advantages.

[0117] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A hybrid modulation method for a four-switch Buck-Boost converter, the converter comprising a first switch forming a first bridge arm. Second switching transistor The third switching transistor constituting the second bridge arm and the fourth switching transistor and an inductor L connected between the first bridge arm and the second bridge arm, characterized in that, The method includes: Obtain the load status parameters of the converter and compare the load status parameters with a preset switching threshold; When the load status parameter indicates that the load is greater than or equal to the switching threshold, the converter is controlled to operate in a first modulation mode, which is a four-segment modulation mode. When the load status parameter indicates that the load is less than the switching threshold, the converter is controlled to operate in the second modulation mode. The second modulation mode includes: During the decrease of inductor current, when the inductor current is detected to have dropped to zero, the third switch is controlled. Turn off and control the fourth switch. Turn on to enter the zero-current holding phase; During the zero-current holding phase, the second switch is held. and the fourth switching transistor It is in the on state, thereby keeping the current in the inductor at zero; After the zero-current holding phase ends, control the second switching transistor. and the third switching transistor Turn on to establish a reverse inductance current until the first switch transistor is switched on. The zero-voltage turn-on condition is met; The switching threshold is determined by calculating the loss balance point of the converter under different input and output voltage conditions; The loss balance point is the sum of the reduced conduction loss and copper loss of the second modulation mode relative to the first modulation mode, which is equal to the sum of the increased switching loss and drive loss of the second modulation mode relative to the first modulation mode, and the load current value at which this sum is equal to the load current value.

2. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 1, characterized in that, The switching loss The aforementioned on-state loss The copper loss and the driving loss Calculate using the following formulas respectively: ； Among them, the product of the turn-on current and the turn-on time and the product of the turn-off current and the turn-off time are calculated separately and then summed. ； ； ； in, This is the drain-source voltage of the switching transistor. This refers to the turn-on or turn-off current of the switching transistor. This refers to the turn-on or turn-off time of the switching transistor. For switching frequency, This is the effective value of the inductor current. This is the on-resistance of the switching transistor. This is the equivalent impedance of the inductor. This refers to the gate drive voltage amplitude of the switching transistor. This represents the total gate charge of the switching transistor.

3. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 1, characterized in that, The method further includes: Pre-calculate the switching threshold under different combinations of input and output voltages. and compare it with the rated current of the converter. Compare; If, under the current input and output voltages, the switching threshold Greater than or equal to the rated current Regardless of the load state parameters, the converter is controlled to operate in the second modulation mode across the entire load range; If, under the current input and output voltages, the switching threshold Less than the rated current Then, the step of comparing the load status parameter with the switching threshold is executed.

4. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 1, characterized in that, One switching cycle of the second modulation mode includes the following five stages in sequence: Phase 1 : Control the first switching transistor and the fourth switching transistor Turn on, controlling the second switching transistor and the third switching transistor When turned off, the inductor current increases linearly; Phase Two : Control the first switching transistor and the third switching transistor Turn on, controlling the second switching transistor and the fourth switching transistor When turned off, the inductor current rises, falls, or remains constant linearly according to the relationship between the input voltage and the output voltage. Phase Three : Control the second switching transistor and the third switching transistor Turn on, controlling the first switching transistor and the fourth switching transistor When the circuit is turned off, the inductor current decreases linearly until the inductor current drops to zero, at which point the phase ends. Phase 4 That is, during the zero-current holding phase, the second switching transistor is controlled. and the fourth switching transistor Turn on the circuit to keep the inductor current zero; Phase 5 : Control the second switching transistor and the third switching transistor When the circuit is turned on, a reverse inductance current is established.

5. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 1, characterized in that, The converter includes a third switching transistor. and the fourth switching transistor The drive signal generation circuit, the third switch transistor and the fourth switching transistor The drive signal generation circuit is configured to receive a first initial drive signal EPMWA and a second initial drive signal EPMWB; The third switching transistor and the fourth switching transistor The drive signal generation circuit includes an XOR gate and an AND gate; The XOR gate receives the first initial drive signal and the second initial drive signal, and outputs the third switch. The drive signal; The AND gate receives the first initial drive signal and the second initial drive signal, and outputs the fourth switch. The driving signal.

6. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 5, characterized in that, When the converter operates using the first modulation mode, and the first modulation mode is a four-segment modulation mode: The first initial drive signal EPMMA detects that the inductor current has dropped to zero voltage and the current is turned on. Time setting high, in the first stage Set to low at the end; The second initial drive signal EPMWB remains at a constant high level throughout the entire switching cycle.

7. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 5, characterized in that, When the converter operates in the second modulation mode: The first initial drive signal EPMMA is set high when it detects that the inductor current has dropped to zero, in the first stage. Set to low at the end; The second initial drive signal EPMWB is set high at the beginning of the switching cycle, and in the fifth stage... Set it low at the beginning.

8. The hybrid modulation method for a four-switch Buck-Boost converter according to claim 5, characterized in that, The first switching transistor The drive signal is set high at the beginning of the switching cycle, in the first stage. With the second phase Set to low when the total time ends; Second switching transistor The drive signal in the first stage With the second phase It is set high at the end of the total time and low at the end of the switching cycle.

Images