Fabrication Method and Application of Enhanced HEMT Ohmic Contact Structure

Abstract

This invention discloses a method for fabricating an enhanced HEMT ohmic contact structure and its application. In one embodiment, the fabrication method includes: sequentially depositing a bottom layer photoresist, a metal layer, and a top layer photoresist on the epitaxial structure of the HEMT device to form a sandwich-structured composite mask; selectively exposing and developing the top layer photoresist; then etching away the metal layer below the developed area; then removing the top layer photoresist and the bottom layer photoresist below the developed area; subsequently etching away the p-GaN below the developed area to expose the ohmic contact region; and finally depositing source and drain metals in the ohmic contact region to form the ohmic contact structure. This invention effectively supports oxygen-passing self-stopping GaN etching processes, precisely controls the GaN etching depth in the ohmic contact region, reduces secondary etching damage, eliminates the influence of secondary photolithography deviations, significantly improves the ohmic contact performance of enhanced HEMT devices, simplifies the process, and reduces costs.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology and relates to a method for fabricating an enhanced HEMT device, specifically a method for fabricating an enhanced HEMT ohmic contact structure, a method for fabricating an enhanced HEMT device, and an enhanced HEMT device. Background Technology

[0002] In today's society, power conversion and control are inseparable from power electronic devices. With increasing environmental concerns and growing awareness of resource conservation, there is a growing demand for reduced losses and increased efficiency in energy conversion processes. To achieve this high-efficiency energy conversion, the requirements for power devices—the core components of power conversion in power electronic systems—are becoming increasingly stringent.

[0003] Currently, the performance of power electronic devices fabricated using Si-based materials has reached the theoretical limits of the materials. To further improve device performance and reliability, the development of new materials is imperative. Compared to Si, GaN materials possess superior characteristics such as a large bandgap, high breakdown field strength, and high electron saturation velocity. Therefore, GaN HEMT devices can meet the requirements of high frequency, high power, and high efficiency.

[0004] Ohmic contact metal is one of the key processes in fabricating enhanced p-GaN HEMT devices. Currently, the main methods for fabricating ohmic contact metal in p-GaN HEMT devices include double-layer photolithography etching and lift-off processes, and dielectric thin film secondary photolithography etching and lift-off processes.

[0005] In particular, for the photolithography-etching and lift-off process using a double-layer resist, the low selectivity of p-GaN compared to AlGaN makes p-GaN etching difficult to control. Although the oxygen-assisted self-stopping etching process can solve the problem of the low selectivity of p-GaN compared to AlGaN, and thus allow for precise control of the p-GaN etching depth, the etching rate of the photoresist becomes very fast after oxygen is introduced. The low selectivity between p-GaN and the double-layer resist means that the double-layer resist cannot protect the p-GaN in the non-ohmic contact areas, and the etching depth of p-GaN in the ohmic contact areas cannot be accurately monitored. This can lead to incomplete etching or over-etching of p-GaN in the ohmic contact areas, resulting in increased device contact resistance, cut-off of the two-dimensional electron gas channels, and a reduction in device saturation current. Although the secondary photolithography etching and lift-off process for dielectric thin films is compatible with the oxygen-passing self-stop etching GaN process, the ohmic contact performance of the device will be affected by the alignment deviation of the secondary photolithography machine. Moreover, the secondary photolithography etching process is complex, costly, prone to secondary etching damage, cumbersome to operate, and difficult to implement. Summary of the Invention

[0006] The main objective of this invention is to provide a method for fabricating an enhanced HEMT ohmic contact structure, a method for fabricating an enhanced HEMT device, and an enhanced HEMT device, so as to overcome the shortcomings of the prior art.

[0007] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0008] One aspect of the present invention provides a method for fabricating an enhanced HEMT ohmic contact structure, comprising:

[0009] An epitaxial structure for forming an enhancement-mode HEMT device is provided, the epitaxial structure comprising a channel layer, a barrier layer and a P-type layer stacked sequentially;

[0010] A first mask layer, a second mask layer, and a third mask layer are sequentially disposed on the P-type layer, wherein, for a selected etchant, the etching selectivity ratio of the second mask layer to the P-type layer is greater than the etching selectivity ratio of either the first mask layer or the third mask layer to the P-type layer;

[0011] Remove the region corresponding to the ohmic contact area in the third mask layer;

[0012] Using the remaining area of ​​the third mask layer as a mask, the second mask layer is etched to remove the area in the second mask layer corresponding to the ohmic contact area;

[0013] The third mask layer is completely etched away, and the area in the first mask layer corresponding to the ohmic contact area is also etched away.

[0014] Using the remaining areas of the first and second mask layers as masks, the selected etchant is used to etch the P-type layer to remove the area in the P-type layer corresponding to the ohmic contact area, thereby exposing the ohmic contact area.

[0015] A source and a drain are fabricated in the ohmic contact region, and the source and drain form an ohmic contact with the barrier layer.

[0016] In some embodiments, the first and third mask layers are made of photoresist, the second mask layer is made of any one or more combinations of metal, metal oxide, and non-metal oxide, and the selected etchant is an oxygen-containing dry etching agent.

[0017] Another aspect of the present invention provides an enhanced HEMT ohmic contact structure prepared by any of the foregoing methods.

[0018] Another aspect of the present invention also provides the use of the aforementioned manufacturing method.

[0019] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0020] (1) By using a composite mask with a sandwich structure, such as inserting one or more metal layers between two photoresist masks, it is possible to be compatible with the oxygen-through self-stop etching GaN process, accurately monitor the p-GaN etching depth in the ohmic contact area, and effectively solve the problem that the p-GaN in the non-ohmic contact area cannot be well protected because the etching rate of the double photoresist mask in the oxygen-through self-stop etching GaN process is too fast.

[0021] (2) Ohmic contact metal can be grown directly in the etched area after one photolithography etching, thereby achieving ohmic contact self-alignment etching and photolithography, reducing the ohmic contact resistance of the device, increasing the saturation current of the device, simplifying the process difficulty, reducing the process cost, and effectively overcoming the shortcomings of the existing dielectric thin film secondary photolithography etching and stripping process, such as the need for secondary alignment photolithography etching and the inability of ohmic contact metal to grow in situ on the ohmic etched area. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the epitaxial structure of an enhanced HMET device in a typical embodiment of the present invention;

[0024] Figure 2 Is Figure 1 A schematic diagram showing the formation of a composite mask on the epitaxial structure;

[0025] Figure 3 It is Figure 2 A schematic diagram showing the composite mask after the second and third mask layers have been partially removed;

[0026] Figure 4 This is a schematic diagram showing the removal of a localized area of ​​the P-type layer by etching using a composite mask.

[0027] Figure 5 This is a schematic diagram of the ohmic contact structure of an enhanced HMET device in a typical embodiment of the present invention;

[0028] Figure 6 This is a schematic diagram of the structure of an enhanced HMET device in a typical embodiment of the present invention;

[0029] Figure 7This is a schematic diagram of another enhanced HMET device in a typical embodiment of the present invention. Detailed Implementation

[0030] In view of the deficiencies of the prior art, the inventors of this invention, through long-term research and extensive practice, have come up with the technical solution of this invention. A clearer and more complete description of the technical solution of this invention is provided below.

[0031] Some embodiments of the present invention provide a method for fabricating an enhanced HEMT ohmic contact structure, comprising:

[0032] An epitaxial structure for forming an enhancement-mode HEMT device is provided, the epitaxial structure comprising a channel layer, a barrier layer and a P-type layer stacked sequentially;

[0033] A first mask layer, a second mask layer, and a third mask layer are sequentially disposed on the P-type layer, wherein, for a selected etchant, the etching selectivity ratio of the second mask layer to the P-type layer is greater than the etching selectivity ratio of either the first mask layer or the third mask layer to the P-type layer;

[0034] Remove the region corresponding to the ohmic contact area in the third mask layer;

[0035] Using the remaining area of ​​the third mask layer as a mask, the second mask layer is etched to remove the area in the second mask layer corresponding to the ohmic contact area;

[0036] The third mask layer is completely etched away, and the area in the first mask layer corresponding to the ohmic contact area is also etched away.

[0037] Using the remaining areas of the first and second mask layers as masks, the selected etchant is used to etch the P-type layer to remove the area in the P-type layer corresponding to the ohmic contact area, thereby exposing the ohmic contact area.

[0038] A source and a drain are fabricated in the ohmic contact region, and the source and drain form an ohmic contact with the barrier layer.

[0039] In some embodiments, the materials of the first mask layer and the third mask layer include photoresist, such as LOR10A photoresist, AZ5214 photoresist or other photoresist, but are not limited thereto.

[0040] In some embodiments, the material of the second mask layer includes any one or more combinations of metals (such as Cr), metal oxides (such as aluminum oxide), and non-metal oxides (such as silicon nitride, silicon dioxide, etc.), and is not limited thereto.

[0041] In some embodiments, the selected etchant includes oxygen-containing dry etching agents, such as inductively coupled plasma, which may contain oxygen plasma, to achieve an oxygen-driven self-stopping etching GaN process.

[0042] In some more specific implementations, the first mask layer is formed of non-photosensitive photoresist, the third mask layer is formed of photosensitive photoresist, and the second mask layer is a metal layer. The third mask layer can be used to transfer the ohmic contact region pattern onto the second mask layer. The second mask layer can prevent the paste effect caused by the reaction of oxygen with the photoresist during oxygen-assisted self-stop etching of GaN, improve the etching selectivity between the etching mask layer and GaN, and protect the first mask layer.

[0043] In some embodiments, the epitaxial structure may be formed of a III-V compound. For example, the channel layer may be made of GaN, the barrier layer may be made of AlGaN, and the p-type layer may be made of GaN, but these are not limited to these.

[0044] In some embodiments, the manufacturing method specifically includes:

[0045] The third mask layer is exposed and developed using a photolithography machine to remove the region in the third mask layer corresponding to the ohmic contact area;

[0046] Using the remaining area of ​​the third mask layer as a mask, a metal dry etching machine is used to etch away the area in the second mask layer corresponding to the ohmic contact area;

[0047] The remaining area of ​​the third mask layer and the area in the first mask layer corresponding to the ohmic contact area are etched away using a plasma resist remover.

[0048] The region corresponding to the ohmic contact area in the P-type layer is etched away using inductively coupled plasma dry etching.

[0049] In some embodiments, the fabrication method specifically includes: depositing source metal and drain metal in the exposed ohmic contact region, then stripping and annealing, so that the formed source and drain can achieve ohmic contact with the barrier layer.

[0050] In a more specific embodiment, a method for fabricating an ohmic contact structure for an enhanced p-GaN HEMT device includes: setting a composite mask with a sandwich structure on the epitaxial structure of the HEMT device; characterized by inserting a metal layer (i.e., the aforementioned second mask layer) between two layers of photoresist (i.e., the first and third mask layers); selectively exposing and developing the top photoresist; then etching away the metal layer below the developed area using a dry metal etching apparatus; subsequently removing the top photoresist and the bottom photoresist below the developed area using a plasma photoresist stripper; then etching away the p-GaN below the developed area to expose the ohmic contact region; and finally depositing source and drain metals in the ohmic contact region to form an ohmic contact structure, thereby achieving in-situ growth of ohmic contact metal for p-GaN HEMT. This method is compatible with oxygen-assisted self-stopping GaN etching processes, precisely controls the GaN etching depth in the ohmic contact region, reduces secondary etching damage, eliminates the influence of secondary photolithography deviations, significantly improves ohmic contact performance, simplifies the process, and reduces costs.

[0051] Some embodiments of the present invention also provide ohmic contact structures for enhanced HEMT devices fabricated by any of the foregoing methods.

[0052] Some embodiments of the present invention also provide a composite mask structure disposed on an epitaxial structure for forming an enhancement-mode HEMT device, the epitaxial structure comprising a channel layer, a barrier layer, and a P-type layer stacked sequentially; further, the composite mask structure comprises a first mask layer, a second mask layer, and a third mask layer stacked sequentially on the P-type layer; wherein, for a selected etchant, the etching selectivity ratio of the second mask layer to the P-type layer is greater than the etching selectivity ratio of either the first mask layer or the third mask layer to the P-type layer.

[0053] In some embodiments, the materials of the first and third mask layers include, but are not limited to, photoresist. The material of the second mask layer includes, but is not limited to, any one or more combinations of metals, metal oxides, and non-metal oxides. The selected etchant includes, but is not limited to, oxygen-containing dry etching reagents.

[0054] Some embodiments of the present invention also provide a method for fabricating an enhanced HEMT device, comprising:

[0055] The ohmic contact structure for forming an enhanced HEMT device is fabricated using any of the aforementioned methods;

[0056] In addition, the gate is fabricated on the P-type layer.

[0057] The aforementioned fabrication method provided in this embodiment of the invention is simple and easy to implement, requiring no complex secondary photolithography and etching processes, and is highly controllable and low in cost. It can effectively improve product yield and ensure product performance. For example, the resulting enhanced HEMT device has the characteristics of low ohmic contact resistance and high saturation current.

[0058] The technical solution of the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. This embodiment is implemented on the premise of the technical solution of the invention, and provides detailed implementation methods and specific operation processes. However, the protection scope of the present invention is not limited to the following embodiments.

[0059] In summary, the method for fabricating an ohmic contact structure for an enhanced p-GaN HEMT device provided in this embodiment includes the following steps: spin-coating a non-photosensitive bottom layer photoresist (first mask layer) onto a wafer; growing a metal layer (second mask layer); spin-coating a photosensitive top layer photoresist (third mask layer); exposing and developing the area corresponding to the ohmic contact region using a photolithography machine; etching away the area of ​​the metal layer corresponding to the ohmic contact region using a dry metal etching machine; removing all the top and bottom layer photoresists corresponding to the ohmic contact region using a plasma resist remover; dry etching the p-GaN and other materials corresponding to the ohmic contact region; growing ohmic contact metal in the exposed ohmic contact region; organically cleaning and stripping away the metal distributed in the non-ohmic contact region; and rapid annealing to form the ohmic contact structure.

[0060] Specifically, the manufacturing method includes:

[0061] (1) First, obtain the epitaxial structure (hereinafter referred to as "wafer") of the Si-based p-GaN HEMT device, which includes an AlN nucleation layer 2, a GaN buffer layer 3, a GaN channel layer 4, an AlGaN barrier layer 5, and a p-GaN layer 6 sequentially formed on a Si substrate 1, such as Figure 1 As shown in the figure. The thickness of the nucleation layer is about 1 μm, the thickness of the buffer layer is about 3-5 μm, the thickness of the channel layer is about 100-300 nm, the thickness of the barrier layer is about 15-30 nm, and the thickness of the p-GaN layer is about 50-150 nm.

[0062] (2) The wafer is cleaned, and then a bottom layer of LOR10A photoresist (non-photosensitive photoresist) is spin-coated onto the wafer to form a first mask layer 9. A metal Cr layer, i.e., a second mask layer 10, is then grown on the first mask layer. Finally, a top layer of AZ5214 photoresist (photosensitive photoresist) is spin-coated onto the second mask layer to form a third mask layer 11. This forms a sandwich-structured composite mask on the wafer. Figure 2 As shown.

[0063] More specifically, the wafer can be ultrasonically cleaned with acetone, isopropanol, and deionized water respectively. Then, the wafer is placed in an HMDS surface pretreatment machine for hexamethyldisilazane coating. A spin coater is used to coat the wafer with LOR10A photoresist at 4000 rpm for 30 seconds, followed by soft baking at 140°C for 120 seconds. A 100 nm thick Cr layer is then evaporated using a PVD electron beam evaporation stage. The wafer is then placed back in the HMDS surface pretreatment machine for hexamethyldisilazane coating. A spin coater is used to coat the wafer with AZ5214 photoresist at 4000 rpm for 30 seconds, followed by soft baking at 95°C for 90 seconds.

[0064] (3) The wafer covered with the composite mask is placed in a photolithography machine, and the region of the third mask layer corresponding to the ohmic contact region (source region, drain region) is exposed. The exposed sample is placed in a developing solution for development, and is repeatedly rinsed with ultrapure water and dried with nitrogen gas, thereby removing the region of the third mask layer corresponding to the ohmic contact region.

[0065] (4) Using the remaining third mask layer as a mask, use a dry metal etching machine to etch the area of ​​the Cr metal layer corresponding to the ohmic contact region. The etching depth can be 100 nm. See [reference needed]. Figure 3 As shown.

[0066] (5) The third mask layer on the wafer surface is completely removed using a plasma resist remover, and the area of ​​the first mask layer corresponding to the ohmic contact region is also completely removed, such as... Figure 4 As shown.

[0067] (6) The p-GaN layer corresponding to the ohmic contact region is etched clean using an inductively coupled plasma dry etching machine to expose the ohmic contact region. An etching atmosphere containing oxygen plasma is used in this process, and the oxygen-driven self-stopping etching GaN process is preferred to more accurately control the p-GaN etching depth.

[0068] (7) Using metal deposition techniques such as electron beam evaporation or sputtering, source and drain metals are deposited in the ohmic contact region. The wafer is then stripped of its metal, and after thorough stripping, it is annealed in a rapid annealing furnace to achieve the ohmic contact, resulting in the desired product. Figure 5 The ohmic contact structure shown.

[0069] Specifically, the wafer with the ohmic contact area exposed can be placed in an electron beam evaporation stage, where four metal layers of Ti / Al / Ni / Au are sequentially deposited in the source and drain regions. After the metal deposition is completed, the wafer is stripped and placed in a rapid annealing furnace to form the ohmic contact under a nitrogen atmosphere at a temperature of 875°C for 30 seconds.

[0070] Furthermore, the p-GaN layer can be processed using methods known in the art, and then the gate can be fabricated to form an enhancement-mode HEMT device. For example... Figure 6 As shown, the gate-source and gate-drain regions of the p-GaN layer can be removed by methods such as dry etching, and then the gate 12 can be fabricated on the remaining p-GaN layer. Alternatively, as... Figure 7 As shown, the gate source and gate drain regions of the p-GaN layer can also be transformed into a high-resistivity GaN layer 13 by means of H ion implantation, H plasma treatment, etc., and a gate 12 can be fabricated on the gate region of the p-GaN layer.

[0071] Compared to Si-based p-GaN HEMT devices fabricated using a double-layer photolithography etching and lift-off process and a dielectric thin film secondary photolithography etching and lift-off process, the Si-based p-GaN HEMT device in this embodiment exhibits a significantly improved ohmic contact saturation current and a significantly reduced contact resistance.

[0072] It should be understood that the technical solutions of the present invention are not limited to the specific embodiments described above. Any technical modifications made to the technical solutions of the present invention without departing from the spirit and scope of the claims are within the scope of protection of the present invention.

Claims

1. A method for fabricating an enhanced HEMT ohmic contact structure, characterized in that... include: An epitaxial structure for forming an enhancement-mode HEMT device is provided, the epitaxial structure comprising a channel layer, a barrier layer and a P-type layer stacked sequentially; A first mask layer, a second mask layer, and a third mask layer are sequentially disposed on the P-type layer. For a selected etchant, the etching selectivity ratio of the second mask layer to the P-type layer is greater than the etching selectivity ratio of either the first mask layer or the third mask layer to the P-type layer. The first mask layer and the third mask layer are made of photoresist, and the material of the second mask layer is selected from any one or more combinations of metal, metal oxide, and non-metal oxide. Remove the region corresponding to the ohmic contact area in the third mask layer; Using the remaining area of ​​the third mask layer as a mask, the second mask layer is etched to remove the area in the second mask layer corresponding to the ohmic contact area; The third mask layer is completely etched away, and the area in the first mask layer corresponding to the ohmic contact area is also etched away. Using the remaining areas of the first and second mask layers as masks, the selected etchant is used to etch the P-type layer to remove the area in the P-type layer corresponding to the ohmic contact area, thereby exposing the ohmic contact area. A source and a drain are fabricated in the ohmic contact region, and the source and drain form an ohmic contact with the barrier layer.

2. The manufacturing method according to claim 1, characterized in that: The selected etchant includes oxygen-containing dry etching reagents.

3. The manufacturing method according to claim 2, characterized in that: The first mask layer and the third mask layer are formed of non-photosensitive photoresist and photosensitive photoresist, respectively, and the second mask layer is a metal layer.

4. The manufacturing method according to claim 1, characterized in that: The channel layer is made of GaN.

5. The manufacturing method according to claim 1, characterized in that: The barrier layer is made of AlGaN.

6. The manufacturing method according to claim 1, characterized in that: The material of the P-type layer includes GaN.

7. The manufacturing method according to claim 3, characterized in that... Specifically, it includes: The third mask layer is exposed and developed using a photolithography machine to remove the region in the third mask layer corresponding to the ohmic contact area; Using the remaining area of ​​the third mask layer as a mask, a metal dry etching machine is used to etch away the area in the second mask layer corresponding to the ohmic contact area; The remaining area of ​​the third mask layer and the area in the first mask layer corresponding to the ohmic contact area are etched away using a plasma resist remover. The region corresponding to the ohmic contact area in the P-type layer is etched away using inductively coupled plasma dry etching.

8. The manufacturing method according to claim 1, characterized in that... Specifically, this includes: depositing source and drain metals in the exposed ohmic contact area, then stripping and annealing them to achieve ohmic contact between the formed source and drain and the barrier layer.

9. An ohmic contact structure of an enhanced HEMT device formed by the fabrication method of any one of claims 1-8.

10. A composite mask structure disposed on an epitaxial structure for forming an enhancement-mode HEMT device, the epitaxial structure comprising a channel layer, a barrier layer, and a p-type layer stacked sequentially, characterized in that: The composite mask structure includes a first mask layer, a second mask layer, and a third mask layer sequentially stacked on the P-type layer; wherein, for a selected etchant, the etching selectivity ratio of the second mask layer to the P-type layer is greater than the etching selectivity ratio of either the first mask layer or the third mask layer to the P-type layer; the first mask layer and the third mask layer are made of photoresist; and the material of the second mask layer is selected from any one or more combinations of metal, metal oxide, and non-metal oxide.

11. The composite mask structure according to claim 10, characterized in that: The selected etchant includes oxygen-containing dry etching reagents.

12. A method for fabricating an enhanced HEMT device, characterized in that... include: An ohmic contact structure for an enhanced HEMT device is fabricated using the fabrication method described in any one of claims 1-8. In addition, the gate is fabricated on the P-type layer.

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