A smart meter load identification performance evaluation device

Abstract

The present invention provides a device for evaluating the load identification performance of a smart meter, comprising a control unit, a waveform playback unit and a serial port server; the control unit is responsible for case issuance, report generation and identification result call testing; the control unit selects cases from a typical case library with multiple scenarios and hierarchies according to test requirements, controls the waveform playback unit to output voltage and current waveforms through an Ethernet port, and reproduces load waveforms in a variety of real power usage scenarios; the waveform playback unit outputs voltage and current test signals required for the test; a new generation of smart meters under test is connected to an input end of the serial port server through a 485 serial port; the load waveforms in a variety of real power usage scenarios can be accurately reproduced, and batch testing of non-intrusive load identification capabilities of a new generation of smart meters can be realized, which is beneficial to improving detection efficiency and saving labor costs.

Description

Technical Field

[0001] The present invention relates to the field of electrical measurement technology, and in particular to a smart meter load identification performance evaluation device. Background Art

[0002] Non-intrusive load identification technology is one of the important technologies of the customer-side power Internet of Things. The essence of this technology is load decomposition, that is, decomposing the total load information of the user into the information of each power-consuming device, and then obtaining the energy consumption of the power-consuming equipment and the power consumption pattern of the user. In recent years, the State Grid Corporation of China has actively promoted the promotion and application of a new generation of smart meters, which have the function of non-intrusive load identification. However, the current load identification capability detection method often adopts the real load method, which has the disadvantages of large differences in test results, high power consumption, and low efficiency. The virtual load method can be used to build a typical case library of multi-scenario classification based on the load characteristics of household appliances, and the host controls the waveform playback circuit to achieve the reproduction of the voltage and current waveforms of the load in a variety of real power consumption scenarios. Since the output current signal changes dynamically in a short time, the power amplifier should have fast dynamic response and good command tracking performance.

[0003] Traditional linear power amplifiers have limited power handling capabilities and are large in size. Switching power amplifiers, represented by Class D amplifiers, have the advantages of high efficiency and small size, but are only suitable for audio and other applications. Due to the limitation of amplitude-frequency characteristics, the bandwidth of power amplifiers based on PWM feedback control is limited, and the command tracking performance is insufficient. Compensation can be made by adding a set of small power amplifier circuits with high-speed dynamic performance to improve the dynamic performance of the main power amplifier, but the circuit is more complex and the cost increases. Single-cycle control technology can also be used to improve the dynamic response of switching power amplifiers. This method has the advantage of simple control circuits, but the existence of the integral capacitor reset time affects the actual improvement effect. Current technologies cannot meet the requirements of the new generation of smart meter load identification performance evaluation. Summary of the invention

[0004] The purpose of the present invention is to provide a smart meter load identification performance evaluation device that can accurately reproduce the load waveforms under a variety of real power usage scenarios, and realize batch detection of the non-intrusive load identification capabilities of a new generation of smart meters, which is conducive to improving detection efficiency and saving labor costs.

[0005] To achieve the above-mentioned purpose, the technical scheme of the present invention is as follows: a smart meter load identification performance evaluation device, comprising a control unit, a waveform playback unit and a serial port server; the output end of the control unit is connected to the input end of the waveform playback unit, the input end of the control unit is connected to the output end of the serial port server, and the control unit is responsible for case issuance, report generation, and identification result call test; the control unit selects cases from a typical case library with multi-scenario classification constructed according to test requirements, and controls the waveform playback unit to output voltage and current waveforms through the Ethernet port to reproduce the load waveforms under various real power consumption scenarios; the voltage and current output ends of the waveform playback unit are respectively connected to the corresponding voltage and current ports of the smart meter under test, and the waveform playback unit outputs the voltage and current test signals required for the test; the smart meter under test is connected to the input end of the serial port server through a 485 serial port to realize interface management of batch testing of multiple smart meters and improve test efficiency.

[0006] The waveform playback unit includes two parts, namely, a half-bridge power circuit and an improved single-cycle control circuit. In the half-bridge power circuit, two input side capacitors C1 and C2 are connected in series, that is, the negative electrode of capacitor C1 is connected to the positive electrode of capacitor C2, and is also connected to the ground of the half-bridge power circuit. The positive electrode of capacitor C1 is connected to the positive electrode of the input voltage, and the negative electrode of capacitor C2 is connected to the negative electrode of the input voltage. Switches S1 and S2 form a half-bridge circuit, that is, the source of switch S1 is connected to the drain of switch S2. At the same time, the drain of switch S1 is connected to the positive electrode of capacitor C1, and the source of switch S2 is connected to the negative electrode of capacitor C2. Diodes D1 and D2 are parasitic body diodes inside switches S1 and S2, respectively. The cathode of diode D1 is connected to the drain of switch S1, and the anode of diode D1 is connected to the source of switch S1. The cathode of diode D2 is connected to the drain of switch S2, and the anode of diode D2 is connected to the source of switch S2. The inductor L and the capacitor C3 form an LC filter, one end of the inductor L is connected to the source of the switch S1 and the drain of the switch S2, and the other end is connected to one end of the capacitor C3 and a section of the load R. The other end of the capacitor C3 is connected to the other end of the load R and the ground of the half-bridge power circuit. Vo is the output voltage, and Vp is the switch node voltage of the half-bridge arm.

[0007] In the improved single-cycle control circuit, the switch node voltage Vp enters the inverting input terminal of the operational amplifier U1 through the resistor R1 as the controlled quantity, and the non-inverting input terminal of the operational amplifier U1 is grounded. Switches S3, S4, S5, S6 and capacitors C4 and C5 form a dual-channel reset circuit. Compared with the classic single-cycle control circuit, this is the main improvement, which is used to solve the control accuracy problem caused by the discharge time of capacitors C4 and C5. The output of the operational amplifier U1 enters the non-inverting input terminal of the comparator U2, and the inverting input terminal of the comparator U2 is the reference command signal input externally. After comparing the two input signals of the comparator U2, a pulse output signal is obtained and enters the R terminal of the trigger U3. The S terminal of the trigger U3 is externally connected to a clock signal of a certain frequency. The output signal of the / Q terminal of the trigger U3 enters the drive circuit, and then generates a PWM drive signal to the gates of switches S1 and S2 respectively. At the same time, the output signal of the / Q terminal of the trigger U3 enters the trigger U4, thereby generating two pulse signals to control the opening and closing of the switches S3, S4, S5, and S6 respectively.

[0008] In order to improve the efficiency of the circuit, switching devices based on wide bandgap technology can be used, such as power devices based on silicon carbide and gallium nitride technology. Silicon carbide power devices have the advantages of high switching frequency, high temperature resistance, radiation resistance and almost no reverse recovery, which greatly reduces switching losses and electromagnetic interference. Gallium nitride technology can reduce both the conduction loss and switching loss of power switches.

[0009] In terms of the driving circuit of the main control switches S1 and S2, a driving transformer with electrical isolation characteristics can be used for gate driving, or a non-isolated bootstrap floating driving solution can be used. The choice can be flexibly made according to specific design requirements.

[0010] The beneficial effects of the present invention are:

[0011] A smart meter load identification performance evaluation device is provided. On the basis of a traditional single-cycle control circuit, a set of integrator circuits is added. By alternating the two sets of integrators, the output accuracy of the test signal is improved, and batch testing of the load identification performance of a new generation of smart meters is realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a structural schematic diagram of a smart meter load identification performance evaluation device of the present invention;

[0013] Figure 2 It is a circuit principle diagram of the waveform playback unit described in the present invention. DETAILED DESCRIPTION

[0014] The present invention will be further described in detail below in conjunction with the accompanying drawings.

[0015] like Figure 1 A smart meter load identification performance evaluation device shown includes: a control unit, a waveform playback unit and a serial port server; the output end of the control unit is connected to the input end of the waveform playback unit, the input end of the control unit is connected to the output end of the serial port server, and the control unit is responsible for case issuance, report generation, and identification result call testing; the control unit selects cases from a typical case library with multi-scenario classification constructed according to test requirements, controls the waveform playback unit to output voltage and current waveforms through the Ethernet port, and reproduces load waveforms under diverse real power consumption scenarios; the voltage and current output ends of the waveform playback unit are respectively connected to the corresponding voltage and current ports of the new generation smart meter under test, and the waveform playback unit outputs the voltage and current test signals required for the test; the new generation smart meter under test is connected to the input end of the serial port server through a 485 serial port, realizing interface management of batch testing of multiple new generation smart meters and improving test efficiency.

[0016] like Figure 2 The waveform playback unit shown includes a half-bridge power circuit and an improved single-cycle control circuit. The half-bridge power circuit and the improved single-cycle control circuit are connected through the switch node voltage Vp and the gate PWM drive signal of switches S1 and S2. The waveform playback circuit only needs to output the required waveform envelope without providing load capacity. The waveform envelope can be a sine wave or other nonlinear waveforms.

[0017] In a half-bridge power circuit, two input side capacitors C1 and C2 are connected in series. Switches S1 and S2 form a half-bridge circuit, and inductor L and capacitor C3 form an LC filter. Vo is the output voltage, Vp is the switch node voltage of the half-bridge arm, and R is the load. The voltage difference VEN between the input side ground and the output side ground of the present invention is constant. When all inductors in the circuit are in a current continuous state, VEN will not change due to changes in the circuit working mode within a switching cycle.

[0018] Preferably, the two input side capacitors C1 and C2 are connected in series, the negative electrode of capacitor C1 is connected to the positive electrode of capacitor C2, and is also connected to the ground of the half-bridge power circuit. The positive electrode of capacitor C1 is connected to the positive electrode of the input voltage, and the negative electrode of capacitor C2 is connected to the negative electrode of the input voltage.

[0019] Preferably, the switches S1 and S2 form a half-bridge circuit, and the source of the switch S1 is connected to the drain of the switch S2. At the same time, the drain of the switch S1 is connected to the positive electrode of the capacitor C1, and the source of the switch S2 is connected to the negative electrode of the capacitor C2. The diodes D1 and D2 are parasitic body diodes inside the switches S1 and S2, respectively. The cathode of the diode D1 is connected to the drain of the switch S1, and the anode of the diode D1 is connected to the source of the switch S1. The cathode of the diode D2 is connected to the drain of the switch S2, and the anode of the diode D2 is connected to the source of the switch S2.

[0020] Preferably, the inductor L and the capacitor C3 form an LC filter, one end of the inductor L is connected to the source of the switch S1 and the drain of the switch S2, and the other end is connected to one end of the capacitor C3 and a section of the load R. The other end of the capacitor C3 is connected to the other end of the load R and the ground of the power circuit.

[0021] In the improved single-cycle control circuit, the switch node voltage Vp enters the inverting input terminal of the operational amplifier U1 through the resistor R1 as the controlled quantity, and the non-inverting input terminal of the operational amplifier U1 is grounded. Switches S3, S4, S5, S6 and capacitors C4 and C5 form a dual-channel reset circuit. The output of the operational amplifier U1 enters the non-inverting input terminal of the comparator U2, and the inverting input terminal of the comparator U2 is the reference command signal input from the outside. The two input signals of the comparator U2 are compared to obtain a pulse output signal, and enter the R terminal of the trigger U3. The S terminal of the trigger U3 is externally connected to a clock signal of a certain frequency. The clock signal should have a small duty cycle, generally less than 0.05, to ensure that the R terminal action signal will not be covered by the S terminal clock signal when the duty cycle is extremely small. At the same time, the clock signal also determines the switching frequency of the half-bridge power circuit in the waveform playback circuit. The output signal of the / Q terminal of the trigger U3 enters the drive circuit, and then generates a PWM drive signal to the gates of switches S1 and S2 respectively. At the same time, the output signal of the / Q terminal of the trigger U3 enters the trigger U4, thereby generating two pulse signals to control the opening and closing of switches S3, S4, S5, and S6 respectively. The switch node voltage Vp is one of the input quantities of the entire control circuit, and the gate PWM drive signal of switches S1 and S2 is the only output quantity of the entire control circuit.

[0022] Preferably, in the dual-channel reset circuit, the switches S3 and S5 operate in unison, and the switches S4 and S6 operate in unison. The switches S3 and S5 and the switches S4 and S6 operate in two adjacent switching cycles respectively.

[0023] Preferably, the two driving pulses output by the driving circuit are complementary to each other and have a certain dead time. The driving can be performed by an isolation transformer or by a photoelectric isolation chip. The dead time can be appropriately adjusted, which can optimize the conversion efficiency of the circuit power level on the one hand and the dynamic response of the waveform playback circuit on the other hand.

[0024] Preferably, the operational amplifier U1 should have a relatively large bandwidth value, generally greater than 10 MHz. An operational amplifier with a relatively large bandwidth can quickly adjust the dynamic response of the integration circuit under large dynamic conditions.

[0025] Preferably, the comparator U2 should have a smaller transmission delay and a faster action response.

[0026] Preferably, the switches S1 and S2 can be silicon-based MOSFET, silicon carbide MOSFET, gallium nitride MOSFET, IGBT, or intelligent power module (IPM).

[0027] The above only expresses the preferred embodiments of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that for ordinary technicians in this field, several modifications, improvements and substitutions can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.

Claims

1. A smart meter load identification performance evaluation device, characterized in that: It includes a control unit, a waveform playback unit and a serial port server; the output end of the control unit is connected to the input end of the waveform playback unit, and the input end of the control unit is connected to the output end of the serial port server. The control unit is responsible for case distribution, report generation, and identification result call testing; the control unit selects cases from a typical case library with multi-scenario grading constructed according to test requirements, and controls the waveform playback unit to output voltage and current waveforms through the Ethernet port to reproduce load waveforms in a variety of real power consumption scenarios; the voltage and current output ends of the waveform playback unit are respectively connected to the corresponding voltage and current ports of the smart meter under test, and the waveform playback unit outputs the voltage and current test signals required for the test; The smart meter under test is connected to the input end of the serial port server through the 485 serial port to realize the interface management of batch testing of multiple smart meters; The waveform playback unit includes two parts: a half-bridge power circuit and an improved single-cycle control circuit. The half-bridge power circuit and the improved single-cycle control circuit are connected through the switch node voltage Vp and the gate PWM drive signal of the switches S1 and S2. The waveform playback unit works in a no-load state. In the improved single-cycle control circuit, the switch node voltage Vp enters the inverting input terminal of the operational amplifier U1 through the resistor R1 as a controlled quantity, and the non-inverting input terminal of the operational amplifier U1 is grounded; switches S3, S4, S5, S6 and capacitors C4 and C5 form a dual-channel reset circuit, and the dual-channel reset circuit is located between the inverting input terminal of the operational amplifier U1 and the non-inverting input terminal of the comparator U2, wherein the reset circuit of one channel is formed by the switch S3 and the capacitor C4 connected in series, and the switch S4 is connected in parallel to both ends of the capacitor C4; the reset circuit of the other channel is formed by the switch S6 and the capacitor C5 connected in series, and the switch S5 is connected in parallel to both ends of the capacitor C5; the output of the operational amplifier U1 enters the The non-inverting input terminal and the inverting input terminal of the comparator U2 are the external input reference command signals. After the two input signals of the comparator U2 are compared, a pulse output signal is obtained and enters the R terminal of the trigger U3; the S terminal of the trigger U3 is externally connected to the clock signal; the output signal of the / Q terminal of the trigger U3 enters the drive circuit, and then generates a PWM drive signal to the gates of switches S1 and S2 respectively; at the same time, the output signal of the / Q terminal of the trigger U3 enters the trigger U4, thereby generating two pulse signals to control the opening and closing of switches S3, S4, S5, and S6 respectively. The actions of switches S3 and S5 are consistent, and the actions of switches S4 and S6 are consistent; switches S3, S5 and switches S4, S6 work in adjacent switching cycles respectively.

2. The device for evaluating load identification performance of a smart meter according to claim 1, characterized in that: In the half-bridge power circuit, two input side capacitors C1 and C2 are connected in series; switches S1 and S2 form a half-bridge circuit, and an inductor L and a capacitor C3 form an LC filter; Vo is the output voltage, Vp is the switch node voltage of the half-bridge arm, and R is the load; one end of the inductor L is connected to the source of the switch S1 and the drain of the switch S2, and the other end is connected to one end of the capacitor C3 and one end of the load R; the other end of the capacitor C3 is connected to the other end of the load R and the ground of the half-bridge power circuit.

3. The smart meter load identification performance evaluation device according to claim 2, characterized in that: The positive electrode of the capacitor C1 is connected to the positive electrode of the input voltage, the negative electrode of the capacitor C1 is connected to the positive electrode of the capacitor C2 and is also connected to the ground of the half-bridge power circuit, and the negative electrode of the capacitor C2 is connected to the negative electrode of the input voltage.

4. The smart meter load identification performance evaluation device according to claim 2, characterized in that: The source of switch S1 is connected to the drain of switch S2; at the same time, the drain of switch S1 is connected to the positive electrode of capacitor C1, and the source of switch S2 is connected to the negative electrode of capacitor C2; diodes D1 and D2 are parasitic body diodes inside switches S1 and S2 respectively; the cathode of diode D1 is connected to the drain of switch S1, and the anode of diode D1 is connected to the source of switch S1; the cathode of diode D2 is connected to the drain of switch S2, and the anode of diode D2 is connected to the source of switch S2.

5. The smart meter load identification performance evaluation device according to claim 1, characterized in that: The two driving pulses output by the driving circuit are complementary to each other and have a dead time; the driving is performed by adopting an isolation transformer or a photoelectric isolation chip.

6. The smart meter load identification performance evaluation device according to claim 1, characterized in that: The clock signal should have a small duty cycle, less than 0.05, to ensure that the R-terminal action signal will not be covered by the S-terminal clock signal when the duty cycle is extremely small; At the same time, the clock signal also determines the switching frequency of the half-bridge power circuit in the waveform playback unit.

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