Method for manufacturing a flash memory device

Abstract

The present invention provides a method for manufacturing a flash memory device, comprising the following steps: forming a floating gate polysilicon and a control gate polysilicon above a silicon substrate; forming a first oxide layer above the control gate polysilicon; fabricating a word line polysilicon and a silicon nitride. In the present invention, an oxide layer is oxidized on the surface of the CG after fabricating the control gate polysilicon, and this oxide layer serves as a barrier layer to protect the CG from being corroded by H3PO4, thereby avoiding the residue of the floating gate polysilicon and solving the problem that a single bit cannot be erased and programmed during flash memory operation.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integrated circuit manufacturing technology, and particularly relates to a manufacturing method for a flash memory device. Background Art

[0002] During the manufacturing process, it was found that the yield of a certain NOR flash (a type of flash memory) product was relatively low. After verification by EFA (Electrical Failure Analysis), it was found that single bit could not be erased. After analysis by PFA (Physical Failure Analysis), FG (Floating Gate) poly residue was found in all cases, resulting in BL (Bit Line) CT (Contact) being bridged by NiPt salicide with the FG, affecting erasing and reading.

[0003] In the flash memory manufacturing process, CG (Control Gate) CT etching is a key process. Figures 1 to 4 Shows a partial manufacturing process of a flash memory device. According to the prior art, referring to Figure 1 , after forming a floating gate polysilicon 102 and a control gate polysilicon 103 above a silicon substrate 101, a word line polysilicon 104 and silicon nitride (SiN) 105 are fabricated. Then, referring to Figure 2 , the silicon nitride in the memory cell region is removed. In this step, the CG is etched along the grain boundary, generating voids 11 (a type of material defect that affects the density of the material and thus the strength). Next, referring to Figure 3 , a hard mask (HM) 106 is deposited and the voids 11 are filled. Then, referring to Figure 4 , control gate via etching is performed, generating floating gate polysilicon residue 12, resulting in a thicker hard mask at the location of the voids, causing subsequent CGCT Block Etch (Control Gate Via Block Etch). Summary of the Invention

[0004] The technical problem to be solved by the present invention is to overcome the defect that single bit of the prior art flash memory device cannot be erased, and to provide a manufacturing method for a flash memory device.

[0005] The present invention solves the above technical problem through the following technical solutions:

[0006] The present invention provides a manufacturing method for a flash memory device, including the following steps:

[0007] Fabricate and form a floating gate polysilicon and a control gate polysilicon above the silicon substrate;

[0008] Form a first oxide layer above the control gate polysilicon;

[0009] Fabricate word line polysilicon and silicon nitride.

[0010] Preferably, forming a first oxide layer above the control gate polysilicon includes:

[0011] Oxidize the surface of the control gate polysilicon to form the first oxide layer.

[0012] Preferably, forming a first oxide layer above the control gate polysilicon includes:

[0013] Deposit to form the first oxide layer above the control gate polysilicon.

[0014] Preferably, the thickness of the first oxide layer is

[0015] Preferably, after the step of fabricating word line polysilicon and silicon nitride, the manufacturing method of the flash memory device further includes the following steps:

[0016] Remove the silicon nitride in the memory cell region.

[0017] Preferably, after the step of removing the silicon nitride in the memory cell region, the manufacturing method of the flash memory device further includes the following steps:

[0018] Deposit to form a hard mask.

[0019] Preferably, after the step of depositing to form a hard mask, the manufacturing method of the flash memory device further includes the following steps:

[0020] Perform control gate via etching.

[0021] Preferably, the flash memory device is a NORD flash memory device.

[0022] Preferably, the manufacturing method of the flash memory device adopts a 55nm (nanometer) process.

[0023] The positive progressive effect of the present invention is that: after fabricating the control gate polysilicon in the present invention, an oxide layer is oxidized on the surface of the CG, and this oxide layer serves as a barrier layer to protect the CG from being corroded by H3PO4 (phosphoric acid), thereby avoiding the residue of the floating gate polysilicon, so as to solve the problem that a single bit cannot be erased and written during the flash memory.

[0024] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. Description of the Drawings

[0025] Figure 1 It is a schematic diagram of forming word line polysilicon and silicon nitride during the manufacturing process of a prior art flash memory device.

[0026] Figure 2Schematic diagram of removing silicon nitride in the storage cell region during the manufacturing process of a prior art flash memory device.

[0027] Figure 3 Schematic diagram of depositing to form a hard mask during the manufacturing process of a prior art flash memory device.

[0028] Figure 4 Schematic diagram of performing control gate via etching during the manufacturing process of a prior art flash memory device.

[0029] Figure 5 Flowchart of a manufacturing method for a flash memory device according to a preferred embodiment of the present invention.

[0030] Figure 6 Schematic diagram of forming a first oxide layer in the manufacturing method of a flash memory device according to a preferred embodiment of the present invention.

[0031] Figure 7 Flowchart of forming word line polysilicon and silicon nitride in the manufacturing method of a flash memory device according to a preferred embodiment of the present invention.

[0032] Figure 8 Schematic diagram of removing silicon nitride in the storage cell region in the manufacturing method of a flash memory device according to a preferred embodiment of the present invention.

[0033] Figure 9 Schematic diagram of performing control gate via etching in the manufacturing method of a flash memory device according to a preferred embodiment of the present invention. Detailed implementation manners

[0034] The following is a preferred embodiment, and the present invention will be more clearly and completely described in conjunction with the accompanying drawings.

[0035] This embodiment provides a manufacturing method for a flash memory device. Referring to Figure 5 , the manufacturing method of the flash memory device includes the following steps:

[0036] Step S201: Fabricate floating gate polysilicon and control gate polysilicon above the silicon substrate.

[0037] Step S202: Form a first oxide layer above the control gate polysilicon.

[0038] Step S203: Fabricate word line polysilicon and silicon nitride.

[0039] Step S204: Remove the silicon nitride in the storage cell region.

[0040] Step S205: Deposit to form a hard mask.

[0041] Step S206: Perform control gate via etching.

[0042] As an alternative embodiment, the flash memory device is a NORD flash memory device based on a 55nm process.

[0043] In step S201, a floating gate polysilicon 102 and a control gate polysilicon 103 are formed above the silicon substrate 101.

[0044] Then, in step S202, with reference to Figure 6 , a first oxide layer 21 is formed above the control gate polysilicon 103. In an alternative embodiment, in step S202, the surface of the control gate polysilicon 103 is oxidized to form the first oxide layer 21. In another alternative embodiment, in step S202, the first oxide layer 21 is deposited above the control gate polysilicon 103. The first oxide layer 21 is very thin, and the thickness of the first oxide layer 21 preferably ranges from

[0045] Then, in step S203, with reference to Figure 7 , a word line polysilicon 104 and a silicon nitride 105 are fabricated.

[0046] Then, in step S204, with reference to Figure 8 , the silicon nitride 105 in the memory cell region is removed. The first oxide layer 21 acts as a barrier layer to protect the control gate polysilicon 103 from being corroded by H3PO4, thereby avoiding the residue of the floating gate polysilicon.

[0047] Next, in step S205, a hard mask is deposited.

[0048] Then, in step S206, with reference to Figure 9 control gate via etching is performed.

[0049] Other structures shown in the figure are clear to those skilled in the art according to the structure of the NORD flash memory device, and will not be elaborated here.

[0050] The process steps and specific processes for manufacturing other structures of the NORD flash memory device are clear to those skilled in the art, and will not be elaborated here.

[0051] During the manufacturing process of the flash memory device, after the control gate polysilicon is formed, adding a first oxide layer film can appropriately fine-tune the FGSN ET (etching to remove the silicon nitride of the floating gate) and Peripheral ET (etching the peripheral circuit) in the manufacturing process of the NORD flash memory device, and basically no other process flows in the manufacturing process of the NORD flash memory device need to be modified.

[0052] Although the specific embodiments of the present invention have been described above, those skilled in the art should understand that this is only an example, and the protection scope of the present invention is defined by the appended claims. Without departing from the principles and essence of the present invention, those skilled in the art can make various changes or modifications to these embodiments, but these changes and modifications all fall within the protection scope of the present invention.

Claims

1. A manufacturing method of a flash memory device, characterized in that, Including the following steps: Forming a floating gate polysilicon and a control gate polysilicon above the silicon substrate; Forming a first oxide layer above the control gate polysilicon; Fabricating a word line polysilicon and a silicon nitride; Removing the silicon nitride in the memory cell region.

2. The manufacturing method of the flash memory device according to claim 1, characterized in that, The forming a first oxide layer above the control gate polysilicon includes: Oxidizing the surface of the control gate polysilicon to form the first oxide layer.

3. The manufacturing method of the flash memory device according to claim 1, characterized in that, The forming a first oxide layer above the control gate polysilicon includes: Depositing to form the first oxide layer above the control gate polysilicon.

4. The manufacturing method of the flash memory device according to any one of claims 1 to 3, characterized in that, The thickness of the first oxide layer is 5. The manufacturing method of the flash memory device according to claim 1, characterized in that, After the step of removing the silicon nitride in the memory cell region, the manufacturing method of the flash memory device further includes the following steps: Depositing to form a hard mask.

6. The manufacturing method of the flash memory device according to claim 5, characterized in that, After the step of depositing to form a hard mask, the manufacturing method of the flash memory device further includes the following steps: Performing a control gate via etching.

7. The manufacturing method of the flash memory device according to claim 1, characterized in that, The flash memory device is a NORD flash memory device.

8. The manufacturing method of the flash memory device according to claim 1, characterized in that, The manufacturing method of the flash memory device adopts a 55nm process.

Images